s2650: I/O modernization

- Replace fake S2650_SENSE_PORT address with line read callback (set_input_line should also work). There are still some doubts regarding whether VBLANK should be inverted in various drivers.
- Replace fake S2650_CTRL_PORT and S2650_DATA_PORT addresses with... well, these aren't dedicated parallel ports, so they actually haven't gone away. They have, however, been moved to a new 1-bit address space, since the ports share the main data bus and are distinguished from each other by an address line.
This commit is contained in:
AJR 2017-06-22 18:21:28 -04:00
parent 137a83532b
commit aa191bfe6b
38 changed files with 240 additions and 251 deletions

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@ -31,10 +31,12 @@ DEFINE_DEVICE_TYPE(S2650, s2650_device, "s2650", "S2650")
s2650_device::s2650_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, S2650, tag, owner, clock)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 15)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 9)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 8)
, m_data_config("io", ENDIANNESS_LITTLE, 8, 1)
, m_sense_handler(*this)
, m_flag_handler(*this), m_intack_handler(*this)
, m_ppc(0), m_page(0), m_iar(0), m_ea(0), m_psl(0), m_psu(0), m_r(0)
, m_halt(0), m_ir(0), m_irq_state(0), m_icount(0), m_program(nullptr), m_direct(nullptr), m_io(nullptr)
, m_halt(0), m_ir(0), m_irq_state(0), m_icount(0), m_direct(nullptr)
, m_debugger_temp(0)
{
memset(m_reg, 0x00, sizeof(m_reg));
@ -48,6 +50,26 @@ offs_t s2650_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u
}
const address_space_config *s2650_device::memory_space_config(address_spacenum spacenum) const
{
switch (spacenum)
{
// Memory-mapped: M/~IO=1
case AS_PROGRAM: return &m_program_config;
// Extended I/O: M/~IO=0 ADR13(E)=1 ADR14=Don't Care
case AS_IO: return &m_io_config;
// Non-extended I/O: M/~IO=0 ADR13(~NE)=0 ADR14=D/~C
// "The D/~C line can be used as a 1-bit device address in simple systems."
// -- Signetics 2650 Microprocessor databook, page 41
case AS_DATA: return &m_data_config;
default: return nullptr;
}
}
/* condition code changes for a byte */
static const uint8_t ccc[0x200] = {
0x00,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
@ -145,7 +167,7 @@ static const int S2650_relative[0x100] =
* RDMEM
* read memory byte from addr
***************************************************************/
#define RDMEM(addr) m_program->read_byte(addr)
#define RDMEM(addr) space(AS_PROGRAM).read_byte(addr)
inline void s2650_device::set_psu(uint8_t new_val)
{
@ -156,6 +178,19 @@ inline void s2650_device::set_psu(uint8_t new_val)
m_flag_handler((new_val & FO) ? 1 : 0);
}
inline uint8_t s2650_device::get_psu()
{
if (!m_sense_handler.isnull())
{
if (m_sense_handler())
m_psu |= SI;
else
m_psu &= ~SI;
}
return m_psu;
}
inline uint8_t s2650_device::get_sp()
{
return (m_psu & SP);
@ -528,7 +563,7 @@ inline uint8_t s2650_device::ARG()
* Store source register to memory addr (CC unchanged)
***************************************************************/
#define M_STR(address,source) \
m_program->write_byte(address, source)
space(AS_PROGRAM).write_byte(address, source)
/***************************************************************
* M_AND
@ -673,7 +708,7 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_SPSU() \
{ \
R0 = ((m_psu & ~PSU34) | (m_io->read_byte(S2650_SENSE_PORT) ? SI : 0)); \
R0 = get_psu() & ~PSU34; \
SET_CC(R0); \
}
@ -742,7 +777,7 @@ inline uint8_t s2650_device::ARG()
#define M_TPSU() \
{ \
uint8_t tpsu = ARG(); \
uint8_t rpsu = (m_psu | (m_io->read_byte(S2650_SENSE_PORT) ? SI : 0)); \
uint8_t rpsu = get_psu(); \
m_psl &= ~CC; \
if( (rpsu & tpsu) != tpsu ) \
m_psl |= 0x80; \
@ -787,12 +822,11 @@ static void BRA_EA(void) _BRA_EA()
void s2650_device::device_start()
{
m_sense_handler.resolve();
m_flag_handler.resolve_safe();
m_intack_handler.resolve_safe();
m_program = &space(AS_PROGRAM);
m_direct = &m_program->direct();
m_io = &space(AS_IO);
m_direct = &space(AS_PROGRAM).direct();
save_item(NAME(m_ppc));
save_item(NAME(m_page));
@ -913,9 +947,6 @@ void s2650_device::device_reset()
memset(m_reg, 0, sizeof(m_reg));
memset(m_ras, 0, sizeof(m_ras));
m_program = &space(AS_PROGRAM);
m_direct = &m_program->direct();
m_io = &space(AS_IO);
m_psl = COM | WC;
/* force write */
m_psu = 0xff;
@ -1095,7 +1126,7 @@ void s2650_device::execute_run()
case 0x32: /* REDC,2 */
case 0x33: /* REDC,3 */
m_icount -= 6;
m_reg[m_r] = m_io->read_byte(S2650_CTRL_PORT);
m_reg[m_r] = space(AS_DATA).read_byte(S2650_CTRL_PORT);
SET_CC( m_reg[m_r] );
break;
@ -1185,7 +1216,7 @@ void s2650_device::execute_run()
case 0x56: /* REDE,2 v */
case 0x57: /* REDE,3 v */
m_icount -= 9;
m_reg[m_r] = m_io->read_byte( ARG() );
m_reg[m_r] = space(AS_IO).read_byte(ARG());
SET_CC(m_reg[m_r]);
break;
@ -1244,7 +1275,7 @@ void s2650_device::execute_run()
case 0x72: /* REDD,2 */
case 0x73: /* REDD,3 */
m_icount -= 6;
m_reg[m_r] = m_io->read_byte(S2650_DATA_PORT);
m_reg[m_r] = space(AS_DATA).read_byte(S2650_DATA_PORT);
SET_CC(m_reg[m_r]);
break;
@ -1400,7 +1431,7 @@ void s2650_device::execute_run()
case 0xb2: /* WRTC,2 */
case 0xb3: /* WRTC,3 */
m_icount -= 6;
m_io->write_byte(S2650_CTRL_PORT,m_reg[m_r]);
space(AS_DATA).write_byte(S2650_CTRL_PORT,m_reg[m_r]);
break;
case 0xb4: /* TPSU */
@ -1486,7 +1517,7 @@ void s2650_device::execute_run()
case 0xd6: /* WRTE,2 v */
case 0xd7: /* WRTE,3 v */
m_icount -= 9;
m_io->write_byte( ARG(), m_reg[m_r] );
space(AS_IO).write_byte( ARG(), m_reg[m_r] );
break;
case 0xd8: /* BIRR,0 (*)a */
@ -1544,7 +1575,7 @@ void s2650_device::execute_run()
case 0xf2: /* WRTD,2 */
case 0xf3: /* WRTD,3 */
m_icount -= 6;
m_io->write_byte(S2650_DATA_PORT, m_reg[m_r]);
space(AS_DATA).write_byte(S2650_DATA_PORT, m_reg[m_r]);
break;
case 0xf4: /* TMI,0 v */

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@ -15,20 +15,21 @@ enum
S2650_HALT, S2650_SI, S2650_FO
};
/* fake I/O space ports */
// D/~C (A14) single-bit addresses for non-extended I/O ports
enum
{
S2650_EXT_PORT = 0x00ff, /* M/~IO=0 D/~C=x E/~NE=1 */
S2650_CTRL_PORT = 0x0100, /* M/~IO=0 D/~C=0 E/~NE=0 */
S2650_DATA_PORT = 0x0101, /* M/~IO=0 D/~C=1 E/~NE=0 */
S2650_SENSE_PORT = 0x0102 /* Fake Sense Line */
S2650_CTRL_PORT = 0,
S2650_DATA_PORT = 1
};
DECLARE_DEVICE_TYPE(S2650, s2650_device)
#define MCFG_S2650_FLAG_HANDLER(_devcb) \
#define MCFG_S2650_SENSE_INPUT(_devcb) \
devcb = &s2650_device::set_sense_handler(*device, DEVCB_##_devcb);
#define MCFG_S2650_FLAG_OUTPUT(_devcb) \
devcb = &s2650_device::set_flag_handler(*device, DEVCB_##_devcb);
#define MCFG_S2650_INTACK_HANDLER(_devcb) \
@ -41,6 +42,7 @@ public:
s2650_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template <class Object> static devcb_base &set_sense_handler(device_t &device, Object &&cb) { return downcast<s2650_device &>(device).m_sense_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_flag_handler(device_t &device, Object &&cb) { return downcast<s2650_device &>(device).m_flag_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_intack_handler(device_t &device, Object &&cb) { return downcast<s2650_device &>(device).m_intack_handler.set_callback(std::forward<Object>(cb)); }
@ -58,10 +60,7 @@ protected:
virtual void execute_set_input(int inputnum, int state) override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override
{
return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : nullptr );
}
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry) override;
@ -76,7 +75,9 @@ protected:
private:
address_space_config m_program_config;
address_space_config m_io_config;
address_space_config m_data_config;
devcb_read_line m_sense_handler;
devcb_write_line m_flag_handler;
devcb_write_line m_intack_handler;
@ -94,14 +95,13 @@ private:
uint8_t m_irq_state;
int m_icount;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
// For debugger
uint16_t m_debugger_temp;
inline void set_psu(uint8_t new_val);
inline uint8_t get_psu();
inline uint8_t get_sp();
inline void set_sp(uint8_t new_sp);
inline int check_irq_line();

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@ -1198,7 +1198,7 @@ void tms5110_device::device_timer(emu_timer &timer, device_timer_id id, int para
m_romclk_hack_state = !m_romclk_hack_state;
}
READ8_MEMBER( tms5110_device::romclk_hack_r )
READ_LINE_MEMBER( tms5110_device::romclk_hack_r )
{
/* bring up to date first */
m_stream->update();

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@ -63,7 +63,7 @@ public:
// this is only used by cvs.c
// it is not related at all to the speech generation and conflicts with the new ROM controller interface.
DECLARE_READ8_MEMBER( romclk_hack_r );
DECLARE_READ_LINE_MEMBER( romclk_hack_r );
void set_frequency(int frequency);

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@ -129,10 +129,6 @@ static ADDRESS_MAP_START( arcadia_mem, AS_PROGRAM, 8, arcadia_state )
AM_RANGE( 0x1800, 0x1aff) AM_READWRITE(video_r, video_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( arcadia_io, AS_IO, 8, arcadia_state )
AM_RANGE( S2650_SENSE_PORT,S2650_SENSE_PORT) AM_READ(vsync_r)
ADDRESS_MAP_END
/* The Emerson Arcadia 2001 controllers have 2 fire buttons on the side,
but actually they are wired to keypad button #2. The following definitions
are meant to document this fact. The keypad has the following layout:
@ -477,7 +473,7 @@ static MACHINE_CONFIG_START( arcadia )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", S2650, 3580000/4) /* 0.895 MHz */
MCFG_CPU_PROGRAM_MAP(arcadia_mem)
MCFG_CPU_IO_MAP(arcadia_io)
MCFG_S2650_SENSE_INPUT(READLINE(arcadia_state, vsync_r))
MCFG_CPU_PERIODIC_INT_DRIVER(arcadia_state, video_line, 262*60)
MCFG_QUANTUM_TIME(attotime::from_hz(60))

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@ -79,7 +79,7 @@ public:
}
DECLARE_WRITE8_MEMBER(binbug_ctrl_w);
DECLARE_READ8_MEMBER(binbug_serial_r);
DECLARE_READ_LINE_MEMBER(binbug_serial_r);
DECLARE_WRITE_LINE_MEMBER(binbug_serial_w);
DECLARE_QUICKLOAD_LOAD_MEMBER( binbug );
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -99,7 +99,7 @@ WRITE8_MEMBER( binbug_state::binbug_ctrl_w )
{
}
READ8_MEMBER( binbug_state::binbug_serial_r )
READ_LINE_MEMBER( binbug_state::binbug_serial_r )
{
return m_rs232->rxd_r() & (m_cass->input() < 0.03);
}
@ -117,10 +117,9 @@ static ADDRESS_MAP_START(binbug_mem, AS_PROGRAM, 8, binbug_state)
AM_RANGE( 0x7c00, 0x7fff) AM_RAM AM_SHARE("attribram")
ADDRESS_MAP_END
static ADDRESS_MAP_START(binbug_io, AS_IO, 8, binbug_state)
static ADDRESS_MAP_START(binbug_data, AS_DATA, 8, binbug_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_WRITE(binbug_ctrl_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(binbug_serial_r)
ADDRESS_MAP_END
/* Input ports */
@ -297,8 +296,9 @@ static MACHINE_CONFIG_START( binbug )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(binbug_mem)
MCFG_CPU_IO_MAP(binbug_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(binbug_state, binbug_serial_w))
MCFG_CPU_DATA_MAP(binbug_data)
MCFG_S2650_SENSE_INPUT(READLINE(binbug_state, binbug_serial_r))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(binbug_state, binbug_serial_w))
/* video hardware */
MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::amber())

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@ -54,7 +54,7 @@ public:
DECLARE_READ8_MEMBER(keyin_r);
DECLARE_WRITE8_MEMBER(beep_w);
void kbd_put(u8 data);
DECLARE_READ8_MEMBER(cass_r);
DECLARE_READ_LINE_MEMBER(cass_r);
DECLARE_WRITE_LINE_MEMBER(cass_w);
DECLARE_QUICKLOAD_LOAD_MEMBER(cd2650);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -81,7 +81,7 @@ WRITE_LINE_MEMBER( cd2650_state::cass_w )
m_cass->output(state ? -1.0 : +1.0);
}
READ8_MEMBER( cd2650_state::cass_r )
READ_LINE_MEMBER( cd2650_state::cass_r )
{
return (m_cass->input() > 0.03) ? 1 : 0;
}
@ -102,8 +102,10 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( cd2650_io, AS_IO, 8, cd2650_state)
ADDRESS_MAP_UNMAP_HIGH
//AM_RANGE(0x80, 0x84) disk i/o
ADDRESS_MAP_END
static ADDRESS_MAP_START( cd2650_data, AS_DATA, 8, cd2650_state)
AM_RANGE(S2650_DATA_PORT,S2650_DATA_PORT) AM_READWRITE(keyin_r, beep_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cass_r)
ADDRESS_MAP_END
/* Input ports */
@ -262,7 +264,9 @@ static MACHINE_CONFIG_START( cd2650 )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(cd2650_mem)
MCFG_CPU_IO_MAP(cd2650_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(cd2650_state, cass_w))
MCFG_CPU_DATA_MAP(cd2650_data)
MCFG_S2650_SENSE_INPUT(READLINE(cd2650_state, cass_r))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(cd2650_state, cass_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

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@ -949,6 +949,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( bullsdrt_port_map, AS_IO, 8, centiped_state )
AM_RANGE(0x00, 0x00) AM_WRITE(bullsdrt_sprites_bank_w)
AM_RANGE(0x20, 0x3f) AM_WRITE(bullsdrt_tilesbank_w) AM_SHARE("bullsdrt_bank")
ADDRESS_MAP_END
static ADDRESS_MAP_START( bullsdrt_data_map, AS_DATA, 8, centiped_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READ(bullsdrt_data_port_r) AM_DEVWRITE("snsnd", sn76496_device, write)
ADDRESS_MAP_END
@ -1848,6 +1851,7 @@ static MACHINE_CONFIG_START( bullsdrt )
MCFG_CPU_ADD("maincpu", S2650, 12096000/8)
MCFG_CPU_PROGRAM_MAP(bullsdrt_map)
MCFG_CPU_IO_MAP(bullsdrt_port_map)
MCFG_CPU_DATA_MAP(bullsdrt_data_map)
MCFG_ATARIVGEAROM_ADD("earom")

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@ -72,7 +72,10 @@ static ADDRESS_MAP_START( chaos_io, AS_IO, 8, chaos_state )
AM_RANGE(0x90, 0x90) AM_READ(port90_r)
AM_RANGE(0x91, 0x91) AM_READ(port91_r)
AM_RANGE(0x92, 0x92) AM_DEVWRITE("terminal", generic_terminal_device, write)
AM_RANGE(0x101, 0x103) AM_NOP // stops error log filling up while using debug
ADDRESS_MAP_END
static ADDRESS_MAP_START( chaos_data, AS_DATA, 8, chaos_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_NOP // stops error log filling up while using debug
ADDRESS_MAP_END
/* Input ports */
@ -143,6 +146,7 @@ static MACHINE_CONFIG_START( chaos )
MCFG_CPU_ADD("maincpu", S2650, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(chaos_mem)
MCFG_CPU_IO_MAP(chaos_io)
MCFG_CPU_DATA_MAP(chaos_data)
/* video hardware */
MCFG_DEVICE_ADD("terminal", GENERIC_TERMINAL, 0)

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@ -277,17 +277,12 @@ READ8_MEMBER(cvs_state::cvs_input_r)
*
*************************************/
#if 0
READ8_MEMBER(cvs_state::cvs_393hz_clock_r)
READ_LINE_MEMBER(cvs_state::cvs_393hz_clock_r)
{
return m_cvs_393hz_clock ? 0x80 : 0;
return m_cvs_393hz_clock;
}
#endif
READ8_MEMBER(cvs_state::tms_clock_r)
{
return m_tms5110->romclk_hack_r(space, 0) ? 0x80 : 0;
}
TIMER_CALLBACK_MEMBER(cvs_state::cvs_393hz_timer_cb)
{
m_cvs_393hz_clock = !m_cvs_393hz_clock;
@ -463,10 +458,12 @@ static ADDRESS_MAP_START( cvs_main_cpu_map, AS_PROGRAM, 8, cvs_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( cvs_main_cpu_io_map, AS_IO, 8, cvs_state )
AM_RANGE(0x00, 0xff) AM_READ(cvs_input_r) AM_WRITE(cvs_scroll_w)
AM_RANGE(0x00, 0xff) AM_READWRITE(cvs_input_r, cvs_scroll_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( cvs_main_cpu_data_map, AS_DATA, 8, cvs_state )
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(cvs_collision_r, audio_command_w)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(cvs_collision_clear, cvs_video_fx_w)
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READ(cvs_collision_r) AM_WRITE(audio_command_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
/*************************************
@ -486,12 +483,6 @@ static ADDRESS_MAP_START( cvs_dac_cpu_map, AS_PROGRAM, 8, cvs_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( cvs_dac_cpu_io_map, AS_IO, 8, cvs_state )
/* doesn't look like it is used at all */
//AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cvs_393hz_clock_r)
ADDRESS_MAP_END
/*************************************
*
@ -510,13 +501,6 @@ static ADDRESS_MAP_START( cvs_speech_cpu_map, AS_PROGRAM, 8, cvs_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( cvs_speech_cpu_io_map, AS_IO, 8, cvs_state )
/* romclk is much more probable, 393 Hz results in timing issues */
// AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cvs_393hz_clock_r)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(tms_clock_r)
ADDRESS_MAP_END
/*************************************
*
* Standard CVS port definitions
@ -583,9 +567,6 @@ static INPUT_PORTS_START( cvs )
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x10, "5" )
PORT_DIPUNUSED( 0x20, IP_ACTIVE_HIGH ) /* can't tell if it's ACTIVE_HIGH or ACTIVE_LOW */
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
static INPUT_PORTS_START( cvs_registration )
@ -980,16 +961,21 @@ static MACHINE_CONFIG_START( cvs )
MCFG_CPU_ADD("maincpu", S2650, XTAL_14_31818MHz/16)
MCFG_CPU_PROGRAM_MAP(cvs_main_cpu_map)
MCFG_CPU_IO_MAP(cvs_main_cpu_io_map)
MCFG_CPU_DATA_MAP(cvs_main_cpu_data_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cvs_state, cvs_main_cpu_interrupt)
MCFG_S2650_FLAG_HANDLER(WRITELINE(cvs_state, write_s2650_flag))
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(cvs_state, write_s2650_flag))
MCFG_CPU_ADD("audiocpu", S2650, XTAL_14_31818MHz/16)
MCFG_CPU_PROGRAM_MAP(cvs_dac_cpu_map)
MCFG_CPU_IO_MAP(cvs_dac_cpu_io_map)
/* doesn't look like it is used at all */
//MCFG_S2650_SENSE_INPUT(READLINE(cvs_state, cvs_393hz_clock_r))
MCFG_CPU_ADD("speechcpu", S2650, XTAL_14_31818MHz/16)
MCFG_CPU_PROGRAM_MAP(cvs_speech_cpu_map)
MCFG_CPU_IO_MAP(cvs_speech_cpu_io_map)
/* romclk is much more probable, 393 Hz results in timing issues */
//MCFG_S2650_SENSE_INPUT(READLINE(cvs_state, cvs_393hz_clock_r))
MCFG_S2650_SENSE_INPUT(DEVREADLINE("tms", tms5110_device, romclk_hack_r))
MCFG_MACHINE_START_OVERRIDE(cvs_state,cvs)
MCFG_MACHINE_RESET_OVERRIDE(cvs_state,cvs)

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@ -918,7 +918,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( s2650_io_map, AS_IO, 8, dkong_state )
AM_RANGE(0x00, 0x00) AM_READ(s2650_port0_r)
AM_RANGE(0x01, 0x01) AM_READ(s2650_port1_r)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
static ADDRESS_MAP_START( s2650_data_map, AS_DATA, 8, dkong_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_WRITE(s2650_data_w)
ADDRESS_MAP_END
@ -1239,9 +1241,6 @@ static INPUT_PORTS_START( hunchbkd )
PORT_DIPSETTING( 0x08, "40000" )
PORT_DIPSETTING( 0x0c, "80000" )
PORT_START("SENSE") /* Sense */
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_INCLUDE( dkong_config )
INPUT_PORTS_END
@ -1283,9 +1282,6 @@ static INPUT_PORTS_START( shootgal )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
PORT_START("SENSE") /* Sense */
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_INCLUDE( dkong_config )
INPUT_PORTS_END
@ -1316,9 +1312,6 @@ static INPUT_PORTS_START( sbdk )
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW1:!3" )
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "SW1:!4" )
PORT_START("SENSE") /* Sense */
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_INCLUDE( dkong_config )
INPUT_PORTS_END
@ -1335,9 +1328,6 @@ static INPUT_PORTS_START( herbiedk )
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW1:!3" )
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "SW1:!4" )
PORT_START("SENSE") /* Sense */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_INCLUDE( dkong_config )
INPUT_PORTS_END
@ -1369,9 +1359,6 @@ static INPUT_PORTS_START( herodk )
PORT_DIPSETTING( 0x08, "2" )
PORT_DIPSETTING( 0x0c, "3" )
PORT_START("SENSE") /* Sense */
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_INCLUDE( dkong_config )
INPUT_PORTS_END
@ -1467,9 +1454,6 @@ static INPUT_PORTS_START( spclforc )
PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_4C ) )
PORT_START("SENSE") /* Sense */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_INCLUDE( dkong_config )
INPUT_PORTS_END
@ -1500,9 +1484,6 @@ static INPUT_PORTS_START( 8ballact )
PORT_DIPSETTING( 0x60, DEF_STR( 1C_4C ) )
PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:!8" )
PORT_START("SENSE") /* Sense */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_INCLUDE( dkong_config )
INPUT_PORTS_END
@ -1846,7 +1827,9 @@ static MACHINE_CONFIG_DERIVED( s2650, dkong2b )
MCFG_CPU_REPLACE("maincpu", S2650, CLOCK_1H / 2) /* ??? */
MCFG_CPU_PROGRAM_MAP(s2650_map)
MCFG_CPU_IO_MAP(s2650_io_map)
MCFG_S2650_FLAG_HANDLER(WRITELINE(dkong_state, s2650_fo_w))
MCFG_CPU_DATA_MAP(s2650_data_map)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(dkong_state, s2650_fo_w))
MCFG_CPU_VBLANK_INT_DRIVER("screen", dkong_state, s2650_interrupt)
MCFG_DEVICE_MODIFY("dma8257")
@ -1856,7 +1839,12 @@ static MACHINE_CONFIG_DERIVED( s2650, dkong2b )
MCFG_MACHINE_START_OVERRIDE(dkong_state,s2650)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( spclforc, s2650 )
static MACHINE_CONFIG_DERIVED( herbiedk, s2650 )
MCFG_CPU_MODIFY("maincpu")
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank)) MCFG_DEVCB_INVERT // ???
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( spclforc, herbiedk )
/* basic machine hardware */
MCFG_DEVICE_REMOVE("soundcpu")
@ -3410,13 +3398,13 @@ GAME( 1984, dkong3b, dkong3, dkong3b, dkong3b, dkong_state, 0, ROT
GAME( 1983, pestplce, mario, pestplce, pestplce, dkong_state, 0, ROT180, "bootleg", "Pest Place", MACHINE_WRONG_COLORS | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
/* 2650 based */
GAME( 1984, herbiedk, huncholy, s2650, herbiedk, dkong_state, 0, ROT90, "Century Electronics / Seatongrove Ltd", "Herbie at the Olympics (DK conversion)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, herbiedk, huncholy, herbiedk, herbiedk, dkong_state, 0, ROT90, "Century Electronics / Seatongrove Ltd", "Herbie at the Olympics (DK conversion)", MACHINE_SUPPORTS_SAVE )
GAME( 1983, hunchbkd, hunchbak, s2650, hunchbkd, dkong_state, 0, ROT90, "Century Electronics", "Hunchback (DK conversion)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, sbdk, superbik, s2650, sbdk, dkong_state, 0, ROT90, "Century Electronics", "Super Bike (DK conversion)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, herodk, hero, s2650, herodk, dkong_state, herodk, ROT90, "Seatongrove Ltd (Crown license)", "Hero in the Castle of Doom (DK conversion)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, herodku, hero, s2650, herodk, dkong_state, 0, ROT90, "Seatongrove Ltd (Crown license)", "Hero in the Castle of Doom (DK conversion not encrypted)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, 8ballact, 0, s2650, 8ballact, dkong_state, 0, ROT90, "Seatongrove Ltd (Magic Electronics USA license)", "Eight Ball Action (DK conversion)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, 8ballact2, 8ballact, s2650, 8ballact, dkong_state, 0, ROT90, "Seatongrove Ltd (Magic Electronics USA license)", "Eight Ball Action (DKJr conversion)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, 8ballact, 0, herbiedk, 8ballact, dkong_state, 0, ROT90, "Seatongrove Ltd (Magic Electronics USA license)", "Eight Ball Action (DK conversion)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, 8ballact2, 8ballact, herbiedk, 8ballact, dkong_state, 0, ROT90, "Seatongrove Ltd (Magic Electronics USA license)", "Eight Ball Action (DKJr conversion)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, shootgal, 0, s2650, shootgal, dkong_state, 0, ROT180, "Seatongrove Ltd (Zaccaria license)", "Shooting Gallery", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
GAME( 1985, spclforc, 0, spclforc, spclforc, dkong_state, 0, ROT90, "Senko Industries (Magic Electronics Inc. license)", "Special Forces", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
GAME( 1985, spcfrcii, 0, spclforc, spclforc, dkong_state, 0, ROT90, "Senko Industries (Magic Electronics Inc. license)", "Special Forces II", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )

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@ -100,7 +100,7 @@ public:
, m_cass(*this, "cassette")
{ }
DECLARE_READ8_MEMBER(cass_r);
DECLARE_READ_LINE_MEMBER(cass_r);
DECLARE_WRITE_LINE_MEMBER(cass_w);
DECLARE_READ8_MEMBER(port07_r);
DECLARE_WRITE8_MEMBER(port00_w);
@ -117,7 +117,7 @@ private:
required_device<cassette_image_device> m_cass;
};
READ8_MEMBER( dauphin_state::cass_r )
READ_LINE_MEMBER( dauphin_state::cass_r )
{
return (m_cass->input() > 0.03) ? 1 : 0;
}
@ -192,8 +192,6 @@ static ADDRESS_MAP_START( dauphin_io, AS_IO, 8, dauphin_state )
AM_RANGE(0x00, 0x03) AM_WRITE(port00_w) // 4-led display
AM_RANGE(0x06, 0x06) AM_WRITE(port06_w) // speaker (NOT a keyclick)
AM_RANGE(0x07, 0x07) AM_READ(port07_r) // pushbuttons
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cass_r)
AM_RANGE(0x102, 0x103) AM_NOP // stops error log filling up while using debug
ADDRESS_MAP_END
/* Input ports */
@ -229,7 +227,8 @@ static MACHINE_CONFIG_START( dauphin )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(dauphin_mem)
MCFG_CPU_IO_MAP(dauphin_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(dauphin_state, cass_w))
MCFG_S2650_SENSE_INPUT(READLINE(dauphin_state, cass_r))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(dauphin_state, cass_w))
/* video hardware */
MCFG_DEFAULT_LAYOUT(layout_dolphunk)

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@ -176,6 +176,9 @@ static ADDRESS_MAP_START( main_io_map, AS_IO, 8, embargo_state )
AM_RANGE(0x01, 0x01) AM_READ_PORT("IN0") AM_WRITE(port_1_w)
AM_RANGE(0x02, 0x02) AM_READWRITE(dial_r, port_2_w)
AM_RANGE(0x03, 0x03) AM_WRITENOP /* always 0xFE */
ADDRESS_MAP_END
static ADDRESS_MAP_START( main_data_map, AS_DATA, 8, embargo_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READ_PORT("IN2")
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(input_port_bit_r, input_select_w)
ADDRESS_MAP_END
@ -260,7 +263,7 @@ static MACHINE_CONFIG_START( embargo )
MCFG_CPU_ADD("maincpu", S2650, 625000)
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_IO_MAP(main_io_map)
MCFG_CPU_DATA_MAP(main_data_map)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

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@ -158,9 +158,11 @@ static ADDRESS_MAP_START( galaxia_io_map, AS_IO, 8, galaxia_state )
AM_RANGE(0x06, 0x06) AM_READ_PORT("DSW0")
AM_RANGE(0x07, 0x07) AM_READ_PORT("DSW1")
AM_RANGE(0xac, 0xac) AM_READNOP
ADDRESS_MAP_END
static ADDRESS_MAP_START( galaxia_data_map, AS_DATA, 8, galaxia_state )
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(galaxia_collision_r, galaxia_ctrlport_w)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(galaxia_collision_clear, galaxia_dataport_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
@ -240,9 +242,6 @@ static INPUT_PORTS_START( galaxia )
PORT_DIPNAME( 0x80, 0x00, "UNK17" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@ -289,8 +288,10 @@ static MACHINE_CONFIG_START( galaxia )
MCFG_CPU_ADD("maincpu", S2650, XTAL_14_31818MHz/8)
MCFG_CPU_PROGRAM_MAP(galaxia_mem_map)
MCFG_CPU_IO_MAP(galaxia_io_map)
MCFG_CPU_DATA_MAP(galaxia_data_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", galaxia_state, galaxia_interrupt)
MCFG_S2650_FLAG_HANDLER(WRITELINE(cvs_state, write_s2650_flag))
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(cvs_state, write_s2650_flag))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -331,8 +332,9 @@ static MACHINE_CONFIG_START( astrowar )
MCFG_CPU_ADD("maincpu", S2650, XTAL_14_31818MHz/8)
MCFG_CPU_PROGRAM_MAP(astrowar_mem_map)
MCFG_CPU_IO_MAP(galaxia_io_map)
MCFG_CPU_DATA_MAP(galaxia_data_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", galaxia_state, galaxia_interrupt)
MCFG_S2650_FLAG_HANDLER(WRITELINE(cvs_state, write_s2650_flag))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(cvs_state, write_s2650_flag))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

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@ -669,7 +669,7 @@ static ADDRESS_MAP_START( spcwarp, AS_PROGRAM, 8, galaxold_state )
AM_RANGE(0x6000, 0x6fff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( hunchbkg_io, AS_IO, 8, galaxold_state )
static ADDRESS_MAP_START( hunchbkg_data, AS_DATA, 8, galaxold_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READNOP // not used
ADDRESS_MAP_END
@ -698,7 +698,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( drivfrcg_io, AS_IO, 8, galaxold_state )
AM_RANGE(0x00, 0x00) AM_READ(drivfrcg_port0_r)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE") AM_WRITENOP
ADDRESS_MAP_END
@ -728,7 +727,6 @@ static ADDRESS_MAP_START( racknrol_io, AS_IO, 8, galaxold_state )
// AM_RANGE(0x1e, 0x1e) AM_WRITENOP
// AM_RANGE(0x1f, 0x1f) AM_WRITENOP
AM_RANGE(0x20, 0x3f) AM_WRITE(racknrol_tiles_bank_w) AM_SHARE("racknrol_tbank")
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
READ8_MEMBER(galaxold_state::hexpoola_data_port_r)
@ -748,8 +746,10 @@ READ8_MEMBER(galaxold_state::hexpoola_data_port_r)
static ADDRESS_MAP_START( hexpoola_io, AS_IO, 8, galaxold_state )
AM_RANGE(0x00, 0x00) AM_READNOP
AM_RANGE(0x20, 0x3f) AM_WRITE(racknrol_tiles_bank_w) AM_SHARE("racknrol_tbank")
ADDRESS_MAP_END
static ADDRESS_MAP_START( hexpoola_data, AS_DATA, 8, galaxold_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READ(hexpoola_data_port_r) AM_DEVWRITE("snsnd", sn76496_device, write)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
READ8_MEMBER(galaxold_state::bullsdrtg_data_port_r)
@ -773,11 +773,8 @@ READ8_MEMBER(galaxold_state::bullsdrtg_data_port_r)
return 0;
}
static ADDRESS_MAP_START( bullsdrtg_io_map, AS_IO, 8, galaxold_state )
AM_RANGE(0x00, 0x00) AM_READNOP
AM_RANGE(0x20, 0x3f) AM_WRITE(racknrol_tiles_bank_w) AM_SHARE("racknrol_tbank")
static ADDRESS_MAP_START( bullsdrtg_data_map, AS_IO, 8, galaxold_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READ(bullsdrtg_data_port_r) AM_DEVWRITE("snsnd", sn76496_device, write)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
/* Lives Dips are spread across two input ports */
@ -1875,9 +1872,6 @@ static INPUT_PORTS_START( drivfrcg )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@ -1939,9 +1933,6 @@ static INPUT_PORTS_START( racknrol )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@ -2003,9 +1994,6 @@ static INPUT_PORTS_START( trvchlng )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@ -2392,6 +2380,7 @@ static MACHINE_CONFIG_START( drivfrcg )
MCFG_CPU_PROGRAM_MAP(drivfrcg)
MCFG_CPU_IO_MAP(drivfrcg_io)
MCFG_CPU_VBLANK_INT_DRIVER("screen", galaxold_state, hunchbks_vh_interrupt)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank)) // ???
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -2441,7 +2430,7 @@ static MACHINE_CONFIG_DERIVED( hunchbkg, galaxold_base )
MCFG_CPU_REPLACE("maincpu", S2650, PIXEL_CLOCK / 4)
MCFG_CPU_PROGRAM_MAP(hunchbkg)
MCFG_CPU_IO_MAP(hunchbkg_io)
MCFG_CPU_DATA_MAP(hunchbkg_data)
MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(galaxold_state,hunchbkg_irq_callback)
MCFG_DEVICE_MODIFY("7474_9m_1")
@ -2477,6 +2466,7 @@ static MACHINE_CONFIG_START( racknrol )
MCFG_CPU_PROGRAM_MAP(racknrol)
MCFG_CPU_IO_MAP(racknrol_io)
MCFG_CPU_VBLANK_INT_DRIVER("screen", galaxold_state, hunchbks_vh_interrupt)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank)) MCFG_DEVCB_INVERT // ???
/* video hardware */
MCFG_GFXDECODE_ADD("gfxdecode", "palette", galaxian)
@ -2503,6 +2493,7 @@ static MACHINE_CONFIG_START( hexpoola )
MCFG_CPU_ADD("maincpu", S2650, PIXEL_CLOCK/2)
MCFG_CPU_PROGRAM_MAP(racknrol)
MCFG_CPU_IO_MAP(hexpoola_io)
MCFG_CPU_DATA_MAP(hexpoola_data)
MCFG_CPU_VBLANK_INT_DRIVER("screen", galaxold_state, hunchbks_vh_interrupt)
MCFG_GFXDECODE_ADD("gfxdecode", "palette", galaxian)
@ -2550,7 +2541,8 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( bullsdrtg, hexpoola )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_IO_MAP(bullsdrtg_io_map)
MCFG_CPU_DATA_MAP(bullsdrtg_data_map)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank)) // ???
MACHINE_CONFIG_END

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@ -69,7 +69,7 @@ public:
DECLARE_READ8_MEMBER(portfc_r);
DECLARE_READ8_MEMBER(portfd_r);
DECLARE_READ8_MEMBER(portfe_r);
DECLARE_READ8_MEMBER(sense_r);
DECLARE_READ_LINE_MEMBER(sense_r);
DECLARE_WRITE_LINE_MEMBER(flag_w);
DECLARE_WRITE8_MEMBER(port_w);
DECLARE_WRITE8_MEMBER(portf8_w);
@ -170,7 +170,7 @@ READ8_MEMBER( instruct_state::portfe_r )
// Read cassette and SENS key
READ8_MEMBER( instruct_state::sense_r )
READ_LINE_MEMBER( instruct_state::sense_r )
{
if (m_cassin)
return (m_cass->input() > 0.03) ? 1 : 0;
@ -232,8 +232,11 @@ static ADDRESS_MAP_START( instruct_io, AS_IO, 8, instruct_state )
AM_RANGE(0xfc, 0xfc) AM_READ(portfc_r)
AM_RANGE(0xfd, 0xfd) AM_READ(portfd_r)
AM_RANGE(0xfe, 0xfe) AM_READ(portfe_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( instruct_data, AS_DATA, 8, instruct_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(port_r,port_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(sense_r)
ADDRESS_MAP_END
/* Input ports */
@ -410,8 +413,10 @@ static MACHINE_CONFIG_START( instruct )
MCFG_CPU_ADD("maincpu",S2650, XTAL_3_579545MHz / 4)
MCFG_CPU_PROGRAM_MAP(instruct_mem)
MCFG_CPU_IO_MAP(instruct_io)
MCFG_CPU_DATA_MAP(instruct_data)
MCFG_CPU_PERIODIC_INT_DRIVER(instruct_state, t2l_int, 120)
MCFG_S2650_FLAG_HANDLER(WRITELINE(instruct_state, flag_w))
MCFG_S2650_SENSE_INPUT(READLINE(instruct_state, sense_r))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(instruct_state, flag_w))
/* video hardware */
MCFG_DEFAULT_LAYOUT(layout_instruct)

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@ -192,8 +192,6 @@ static ADDRESS_MAP_START( laserbat_io_map, AS_IO, 8, laserbat_state_base )
AM_RANGE(0x05, 0x05) AM_WRITE(wcov_w)
AM_RANGE(0x06, 0x06) AM_WRITE(ct_io_w)
AM_RANGE(0x07, 0x07) AM_WRITE(csound2_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
@ -278,9 +276,6 @@ static INPUT_PORTS_START( laserbat_base )
PORT_DIPNAME( 0x80, 0x80, "Coin C" ) PORT_DIPLOCATION("SW-2:8")
PORT_DIPSETTING( 0x00, DEF_STR(2C_1C) )
PORT_DIPSETTING( 0x80, DEF_STR(1C_1C) )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@ -473,6 +468,7 @@ static MACHINE_CONFIG_START( laserbat_base )
MCFG_CPU_PROGRAM_MAP(laserbat_map)
MCFG_CPU_IO_MAP(laserbat_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", laserbat_state_base, laserbat_interrupt)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank))
// video hardware
MCFG_SCREEN_ADD("screen", RASTER)

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@ -438,7 +438,7 @@ static ADDRESS_MAP_START( bbonk_map, AS_PROGRAM, 8, lazercmd_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( lazercmd_portmap, AS_IO, 8, lazercmd_state )
static ADDRESS_MAP_START( lazercmd_portmap, AS_DATA, 8, lazercmd_state )
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(lazercmd_ctrl_port_r, lazercmd_ctrl_port_w)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(lazercmd_data_port_r, lazercmd_data_port_w)
ADDRESS_MAP_END
@ -631,7 +631,7 @@ static MACHINE_CONFIG_START( lazercmd )
within the line and frame blanking period
thus requiring an extra loading of approx 3-5 */
MCFG_CPU_PROGRAM_MAP(lazercmd_map)
MCFG_CPU_IO_MAP(lazercmd_portmap)
MCFG_CPU_DATA_MAP(lazercmd_portmap)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", lazercmd_state, lazercmd_timer, "screen", 0, 1)
/* video hardware */
@ -670,7 +670,7 @@ static MACHINE_CONFIG_START( medlanes )
within the line and frame blanking period
thus requiring an extra loading of approx 3-5 */
MCFG_CPU_PROGRAM_MAP(medlanes_map)
MCFG_CPU_IO_MAP(lazercmd_portmap)
MCFG_CPU_DATA_MAP(lazercmd_portmap)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", lazercmd_state, lazercmd_timer, "screen", 0, 1)
/* video hardware */
@ -705,7 +705,7 @@ static MACHINE_CONFIG_START( bbonk )
within the line and frame blanking period
thus requiring an extra loading of approx 3-5 */
MCFG_CPU_PROGRAM_MAP(bbonk_map)
MCFG_CPU_IO_MAP(lazercmd_portmap)
MCFG_CPU_DATA_MAP(lazercmd_portmap)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", lazercmd_state, bbonk_timer, "screen", 0, 1)
/* video hardware */

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@ -187,8 +187,10 @@ static ADDRESS_MAP_START( malzak_io_map, AS_IO, 8, malzak_state )
AM_RANGE(0x80, 0x80) AM_READ_PORT("IN0") //controls
AM_RANGE(0xa0, 0xa0) AM_WRITENOP // echoes I/O port read from port 0x80
AM_RANGE(0xc0, 0xc0) AM_WRITE(portc0_w) // possibly playfield row selection for writing and/or collisions
ADDRESS_MAP_END
static ADDRESS_MAP_START( malzak_data_map, AS_DATA, 8, malzak_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READ(s2650_data_r) // read upon death
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
@ -210,9 +212,6 @@ static INPUT_PORTS_START( malzak )
PORT_START("POT")
/* No POT switch on Malzak as far as I know */
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
static INPUT_PORTS_START( malzak2 )
@ -237,9 +236,6 @@ static INPUT_PORTS_START( malzak2 )
PORT_DIPSETTING( 0x02, "3" )
PORT_DIPSETTING( 0x03, "4" ) // Change settings
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@ -305,6 +301,8 @@ static MACHINE_CONFIG_START( malzak )
MCFG_CPU_ADD("maincpu", S2650, 3800000/4)
MCFG_CPU_PROGRAM_MAP(malzak_map)
MCFG_CPU_IO_MAP(malzak_io_map)
MCFG_CPU_DATA_MAP(malzak_data_map)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

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@ -362,7 +362,7 @@ static ADDRESS_MAP_START( minferno_main_map, AS_PROGRAM, 8, meadows_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( minferno_io_map, AS_IO, 8, meadows_state )
static ADDRESS_MAP_START( minferno_data_map, AS_DATA, 8, meadows_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READ_PORT("DSW2")
ADDRESS_MAP_END
@ -652,7 +652,7 @@ static MACHINE_CONFIG_START( minferno )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", S2650, MASTER_CLOCK/24) /* 5MHz / 8 / 3 = 208.33 kHz */
MCFG_CPU_PROGRAM_MAP(minferno_main_map)
MCFG_CPU_IO_MAP(minferno_io_map)
MCFG_CPU_DATA_MAP(minferno_data_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", meadows_state, minferno_interrupt)
/* video hardware */

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@ -1443,29 +1443,23 @@ static ADDRESS_MAP_START( bigbucks_portmap, AS_IO, 8, pacman_state )
AM_RANGE(0x0000, 0xffff) AM_READ(bigbucks_question_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( s2650games_writeport, AS_IO, 8, pacman_state )
static ADDRESS_MAP_START( s2650games_dataport, AS_DATA, 8, pacman_state )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_DEVWRITE("sn1", sn76496_device, write)
ADDRESS_MAP_END
static ADDRESS_MAP_START( drivfrcp_portmap, AS_IO, 8, pacman_state )
AM_RANGE(0x00, 0x00) AM_READNOP
AM_RANGE(0x01, 0x01) AM_READ(drivfrcp_port1_r)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
AM_IMPORT_FROM(s2650games_writeport)
ADDRESS_MAP_END
static ADDRESS_MAP_START( _8bpm_portmap, AS_IO, 8, pacman_state )
AM_RANGE(0x00, 0x00) AM_READNOP
AM_RANGE(0x01, 0x01) AM_READ(_8bpm_port1_r)
AM_RANGE(0xe0, 0xe0) AM_READNOP
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
AM_IMPORT_FROM(s2650games_writeport)
ADDRESS_MAP_END
static ADDRESS_MAP_START( porky_portmap, AS_IO, 8, pacman_state )
AM_RANGE(0x01, 0x01) AM_READ(porky_port1_r)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
AM_IMPORT_FROM(s2650games_writeport)
ADDRESS_MAP_END
static ADDRESS_MAP_START( crushs_portmap, AS_IO, 8, pacman_state )
@ -3172,9 +3166,6 @@ static INPUT_PORTS_START( drivfrcp )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@ -3224,9 +3215,6 @@ static INPUT_PORTS_START( 8bpm )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@ -3276,9 +3264,6 @@ static INPUT_PORTS_START( porky )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@ -3753,7 +3738,9 @@ static MACHINE_CONFIG_DERIVED( s2650games, pacman )
MCFG_DEVICE_REMOVE("maincpu")
MCFG_CPU_ADD("maincpu", S2650, MASTER_CLOCK/6/2) /* 2H */
MCFG_CPU_PROGRAM_MAP(s2650games_map)
MCFG_CPU_DATA_MAP(s2650games_dataport)
MCFG_CPU_VBLANK_INT_DRIVER("screen", pacman_state, s2650_interrupt)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank)) MCFG_DEVCB_INVERT
MCFG_GFXDECODE_MODIFY("gfxdecode", s2650games)

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@ -57,7 +57,7 @@ public:
DECLARE_WRITE8_MEMBER(phunsy_ctrl_w);
DECLARE_WRITE8_MEMBER(phunsy_data_w);
void kbd_put(u8 data);
DECLARE_READ8_MEMBER(cass_r);
DECLARE_READ_LINE_MEMBER(cass_r);
DECLARE_WRITE_LINE_MEMBER(cass_w);
DECLARE_QUICKLOAD_LOAD_MEMBER(phunsy);
DECLARE_PALETTE_INIT(phunsy);
@ -80,7 +80,7 @@ WRITE_LINE_MEMBER( phunsy_state::cass_w )
m_cass->output(state ? -1.0 : +1.0);
}
READ8_MEMBER( phunsy_state::cass_r )
READ_LINE_MEMBER(phunsy_state::cass_r)
{
return (m_cass->input() > 0.03) ? 0 : 1;
}
@ -96,9 +96,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( phunsy_io, AS_IO, 8, phunsy_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE( S2650_CTRL_PORT, S2650_CTRL_PORT ) AM_WRITE( phunsy_ctrl_w )
AM_RANGE( S2650_DATA_PORT,S2650_DATA_PORT) AM_READWRITE( phunsy_data_r, phunsy_data_w )
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cass_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( phunsy_data, AS_DATA, 8, phunsy_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_WRITE(phunsy_ctrl_w)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(phunsy_data_r, phunsy_data_w)
ADDRESS_MAP_END
@ -332,7 +335,9 @@ static MACHINE_CONFIG_START( phunsy )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(phunsy_mem)
MCFG_CPU_IO_MAP(phunsy_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(phunsy_state, cass_w))
MCFG_CPU_DATA_MAP(phunsy_data)
MCFG_S2650_SENSE_INPUT(READLINE(phunsy_state, cass_r))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(phunsy_state, cass_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

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@ -71,10 +71,9 @@ static ADDRESS_MAP_START(pipbug_mem, AS_PROGRAM, 8, pipbug_state)
AM_RANGE( 0x0400, 0x7fff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START(pipbug_io, AS_IO, 8, pipbug_state)
static ADDRESS_MAP_START(pipbug_data, AS_DATA, 8, pipbug_state)
// ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_WRITE(pipbug_ctrl_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READNOP // this has to return zero or the parameter to write_sense is ignored
ADDRESS_MAP_END
/* Input ports */
@ -156,10 +155,10 @@ QUICKLOAD_LOAD_MEMBER( pipbug_state, pipbug )
static MACHINE_CONFIG_START( pipbug )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz)
MCFG_CPU_ADD("maincpu", S2650, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(pipbug_mem)
MCFG_CPU_IO_MAP(pipbug_io)
MCFG_S2650_FLAG_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd))
MCFG_CPU_DATA_MAP(pipbug_data)
MCFG_S2650_FLAG_OUTPUT(DEVWRITELINE("rs232", rs232_port_device, write_txd))
/* video hardware */
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")

View File

@ -126,9 +126,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( quasar_io, AS_IO, 8, quasar_state )
AM_RANGE(0x00, 0x03) AM_READWRITE(quasar_IO_r, video_page_select_w)
AM_RANGE(0x08, 0x0b) AM_WRITE(io_page_select_w)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READ(cvs_collision_clear) AM_WRITE(quasar_sh_command_w)
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READ(cvs_collision_r) AM_WRITENOP
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
static ADDRESS_MAP_START( quasar_data, AS_DATA, 8, quasar_state )
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READ(cvs_collision_r) AM_WRITENOP
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(cvs_collision_clear, quasar_sh_command_w)
ADDRESS_MAP_END
/*************************************
@ -217,9 +219,6 @@ static INPUT_PORTS_START( quasar )
PORT_DIPSETTING( 0x80, "Stop at edge" )
PORT_DIPSETTING( 0x00, "Wrap Around" )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_START("DSW2")
#if 0
PORT_DIPNAME( 0x0f, 0x00, "Noise to play" )
@ -300,7 +299,9 @@ static MACHINE_CONFIG_START( quasar )
MCFG_CPU_ADD("maincpu", S2650, 14318000/4) /* 14 mhz crystal divide by 4 on board */
MCFG_CPU_PROGRAM_MAP(quasar)
MCFG_CPU_IO_MAP(quasar_io)
MCFG_CPU_DATA_MAP(quasar_data)
MCFG_CPU_VBLANK_INT_DRIVER("screen", quasar_state, quasar_interrupt)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank))
MCFG_CPU_ADD("soundcpu",I8035,6000000) /* 6MHz crystal divide by 15 in CPU */
MCFG_CPU_PROGRAM_MAP(sound_map)

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@ -66,7 +66,7 @@ public:
DECLARE_WRITE8_MEMBER(quizshow_audio_w);
DECLARE_WRITE8_MEMBER(quizshow_video_disable_w);
DECLARE_READ8_MEMBER(quizshow_timing_r);
DECLARE_READ8_MEMBER(quizshow_tape_signal_r);
DECLARE_READ_LINE_MEMBER(quizshow_tape_signal_r);
DECLARE_WRITE8_MEMBER(quizshow_main_ram_w);
DECLARE_CUSTOM_INPUT_MEMBER(quizshow_tape_headpos_r);
DECLARE_INPUT_CHANGED_MEMBER(quizshow_category_select);
@ -206,10 +206,10 @@ READ8_MEMBER(quizshow_state::quizshow_timing_r)
return ret;
}
READ8_MEMBER(quizshow_state::quizshow_tape_signal_r)
READ_LINE_MEMBER(quizshow_state::quizshow_tape_signal_r)
{
// TODO (for now, hold INS to fastforward and it'll show garbage questions where D is always(?) the right answer)
return machine().rand() & 0x80;
return machine().rand() & 1;
}
WRITE8_MEMBER(quizshow_state::quizshow_main_ram_w)
@ -238,9 +238,6 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( quizshow_io_map, AS_IO, 8, quizshow_state )
ADDRESS_MAP_UNMAP_HIGH
// AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_NOP // unused
// AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_NOP // unused
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(quizshow_tape_signal_r)
ADDRESS_MAP_END
@ -384,6 +381,7 @@ static MACHINE_CONFIG_START( quizshow )
MCFG_CPU_ADD("maincpu", S2650, MASTER_CLOCK / 16) // divider guessed
MCFG_CPU_PROGRAM_MAP(quizshow_mem_map)
MCFG_CPU_IO_MAP(quizshow_io_map)
MCFG_S2650_SENSE_INPUT(READLINE(quizshow_state, quizshow_tape_signal_r))
MCFG_TIMER_DRIVER_ADD_PERIODIC("clock_timer", quizshow_state, quizshow_clock_timer_cb, attotime::from_hz(PIXEL_CLOCK / (HTOTAL * 8))) // 8V
/* video hardware */

View File

@ -102,7 +102,7 @@ public:
DECLARE_WRITE8_MEMBER(leds_w);
void kbd_put(u8 data);
DECLARE_MACHINE_RESET(ravens2);
DECLARE_READ8_MEMBER(cass_r);
DECLARE_READ_LINE_MEMBER(cass_r);
DECLARE_WRITE_LINE_MEMBER(cass_w);
DECLARE_QUICKLOAD_LOAD_MEMBER( ravens );
uint8_t m_term_char;
@ -117,7 +117,7 @@ WRITE_LINE_MEMBER( ravens_state::cass_w )
m_cass->output(state ? -1.0 : +1.0);
}
READ8_MEMBER( ravens_state::cass_r )
READ_LINE_MEMBER( ravens_state::cass_r )
{
return (m_cass->input() > 0.03) ? 1 : 0;
}
@ -214,7 +214,6 @@ static ADDRESS_MAP_START( ravens_io, AS_IO, 8, ravens_state )
AM_RANGE(0x09, 0x09) AM_WRITE(leds_w) // LED output port
AM_RANGE(0x10, 0x15) AM_WRITE(display_w) // 6-led display
AM_RANGE(0x17, 0x17) AM_READ(port17_r) // pushbuttons
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cass_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ravens2_io, AS_IO, 8, ravens_state )
@ -222,7 +221,6 @@ static ADDRESS_MAP_START( ravens2_io, AS_IO, 8, ravens_state )
AM_RANGE(0x07, 0x07) AM_READ(port07_r)
AM_RANGE(0x1b, 0x1b) AM_WRITE(port1b_w)
AM_RANGE(0x1c, 0x1c) AM_WRITE(port1c_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(cass_r)
ADDRESS_MAP_END
/* Input ports */
@ -333,7 +331,8 @@ static MACHINE_CONFIG_START( ravens )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz) // frequency is unknown
MCFG_CPU_PROGRAM_MAP(ravens_mem)
MCFG_CPU_IO_MAP(ravens_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(ravens_state, cass_w))
MCFG_S2650_SENSE_INPUT(READLINE(ravens_state, cass_r))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(ravens_state, cass_w))
/* video hardware */
MCFG_DEFAULT_LAYOUT(layout_ravens)
@ -353,7 +352,8 @@ static MACHINE_CONFIG_START( ravens2 )
MCFG_CPU_ADD("maincpu",S2650, XTAL_1MHz) // frequency is unknown
MCFG_CPU_PROGRAM_MAP(ravens_mem)
MCFG_CPU_IO_MAP(ravens2_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(ravens_state, cass_w))
MCFG_S2650_SENSE_INPUT(READLINE(ravens_state, cass_r))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(ravens_state, cass_w))
MCFG_MACHINE_RESET_OVERRIDE(ravens_state, ravens2)

View File

@ -338,7 +338,6 @@ READ8_MEMBER(scramble_state::hncholms_prot_r)
static ADDRESS_MAP_START( hunchbks_readport, AS_IO, 8, scramble_state )
AM_RANGE(0x00, 0x00) AM_READ(hncholms_prot_r)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
@ -879,9 +878,6 @@ static INPUT_PORTS_START( hunchbks )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* protection check? */
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* protection check? */
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
static INPUT_PORTS_START( hncholms )
@ -923,9 +919,6 @@ static INPUT_PORTS_START( hncholms )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* protection check? */
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* protection check? */
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
static INPUT_PORTS_START( cavelon )
@ -1548,6 +1541,7 @@ static MACHINE_CONFIG_DERIVED( hunchbks, scramble )
MCFG_CPU_REPLACE("maincpu", S2650, 18432000/6)
MCFG_CPU_PROGRAM_MAP(hunchbks_map)
MCFG_CPU_IO_MAP(hunchbks_readport)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank))
MCFG_CPU_VBLANK_INT_DRIVER("screen", scramble_state, hunchbks_vh_interrupt)
MCFG_SCREEN_MODIFY("screen")

View File

@ -267,10 +267,9 @@ static ADDRESS_MAP_START( seabattl_map, AS_PROGRAM, 8, seabattl_state )
AM_RANGE(0x1f00, 0x1fff) AM_MIRROR(0x2000) AM_DEVREADWRITE("s2636", s2636_device, read_data, write_data)
ADDRESS_MAP_END
static ADDRESS_MAP_START( seabattl_io_map, AS_IO, 8, seabattl_state )
static ADDRESS_MAP_START( seabattl_data_map, AS_DATA, 8, seabattl_state )
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE( seabattl_collision_r, seabattl_control_w )
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE( seabattl_collision_clear_r, seabattl_collision_clear_w )
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
READ8_MEMBER(seabattl_state::seabattl_collision_r)
@ -423,9 +422,6 @@ static INPUT_PORTS_START( seabattl )
PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_HIGH, "DS1:5")
PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "DS1:8" )
PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@ -482,8 +478,9 @@ static MACHINE_CONFIG_START( seabattl )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", S2650, 14318180/4/2)
MCFG_CPU_PROGRAM_MAP(seabattl_map)
MCFG_CPU_IO_MAP(seabattl_io_map)
MCFG_CPU_DATA_MAP(seabattl_data_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", seabattl_state, seabattl_interrupt)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank))
MCFG_DEVICE_ADD("s2636", S2636, 0)
MCFG_S2636_OFFSETS(-13, -29)

View File

@ -77,10 +77,12 @@ static ADDRESS_MAP_START( subhuntr_map, AS_PROGRAM, 8, subhuntr_state )
AM_RANGE(0x1c00, 0x1fff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( subhuntr_io_map, AS_IO, 8, subhuntr_state )
static ADDRESS_MAP_START( subhuntr_io_map, AS_PROGRAM, 8, subhuntr_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( subhuntr_data_map, AS_DATA, 8, subhuntr_state )
// AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE( , )
// AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE( , )
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
/***************************************************************************
@ -90,8 +92,6 @@ ADDRESS_MAP_END
***************************************************************************/
static INPUT_PORTS_START( subhuntr )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
INPUT_PORTS_END
@ -136,7 +136,9 @@ static MACHINE_CONFIG_START( subhuntr )
MCFG_CPU_ADD("maincpu", S2650, 14318180/4/2)
MCFG_CPU_PROGRAM_MAP(subhuntr_map)
MCFG_CPU_IO_MAP(subhuntr_io_map)
MCFG_CPU_DATA_MAP(subhuntr_data_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", subhuntr_state, subhuntr_interrupt)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank))
// MCFG_DEVICE_ADD("s2636", S2636, 0)
// MCFG_S2636_WORKRAM_SIZE(0x100)

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@ -192,10 +192,6 @@ static ADDRESS_MAP_START( vc4000_mem, AS_PROGRAM, 8, vc4000_state )
AM_RANGE(0x1700, 0x17ff) AM_READWRITE(vc4000_video_r, vc4000_video_w) AM_MIRROR(0x0800)
ADDRESS_MAP_END
static ADDRESS_MAP_START( vc4000_io, AS_IO, 8, vc4000_state )
AM_RANGE( S2650_SENSE_PORT,S2650_SENSE_PORT) AM_READ(vc4000_vsync_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START(elektor_mem, AS_PROGRAM, 8, vc4000_state)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0x1fff)
@ -532,7 +528,7 @@ static MACHINE_CONFIG_START( vc4000 )
// MCFG_CPU_ADD("maincpu", S2650, 865000) /* 3550000/4, 3580000/3, 4430000/3 */
MCFG_CPU_ADD("maincpu", S2650, 3546875/4)
MCFG_CPU_PROGRAM_MAP(vc4000_mem)
MCFG_CPU_IO_MAP(vc4000_io)
MCFG_S2650_SENSE_INPUT(READLINE(vc4000_state, vc4000_vsync_r))
MCFG_CPU_PERIODIC_INT_DRIVER(vc4000_state, vc4000_video_line, 312*53) // GOLF needs this exact value
/* video hardware */

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@ -38,10 +38,6 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, zac2650_state )
AM_RANGE(0x1f00, 0x1fff) AM_READWRITE(zac_s2636_r, zac_s2636_w) AM_SHARE("s2636_0_ram")
ADDRESS_MAP_END
static ADDRESS_MAP_START( port_map, AS_IO, 8, zac2650_state )
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
ADDRESS_MAP_END
static INPUT_PORTS_START( tinvader )
PORT_START("1E80")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
@ -86,9 +82,6 @@ static INPUT_PORTS_START( tinvader )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_START("1E85")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
@ -154,9 +147,6 @@ static INPUT_PORTS_START( dodgem )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("SENSE")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_START("1E85")
PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Easy) )
@ -244,7 +234,7 @@ static MACHINE_CONFIG_START( tinvader )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", S2650, 3800000/4)
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_IO_MAP(port_map)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank)) MCFG_DEVCB_INVERT
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

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@ -46,7 +46,7 @@ public:
DECLARE_READ8_MEMBER(ctrl_r);
DECLARE_WRITE8_MEMBER(ctrl_w);
DECLARE_READ8_MEMBER(serial_r);
DECLARE_READ_LINE_MEMBER(serial_r);
DECLARE_WRITE_LINE_MEMBER(serial_w);
DECLARE_READ8_MEMBER(reset_int_r);
DECLARE_WRITE8_MEMBER(reset_int_w);
@ -77,8 +77,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( zac_1_io, AS_IO, 8, zac_1_state )
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_END
static ADDRESS_MAP_START( zac_1_data, AS_DATA, 8, zac_1_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(ctrl_r,ctrl_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(serial_r)
ADDRESS_MAP_END
static INPUT_PORTS_START( zac_1 )
@ -177,7 +180,7 @@ WRITE8_MEMBER( zac_1_state::reset_int_w )
m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
}
READ8_MEMBER( zac_1_state::serial_r )
READ_LINE_MEMBER( zac_1_state::serial_r )
{
// from printer
return 0;
@ -248,7 +251,9 @@ static MACHINE_CONFIG_START( zac_1 )
MCFG_CPU_ADD("maincpu", S2650, 6000000/2) // no xtal, just 2 chips forming a random oscillator
MCFG_CPU_PROGRAM_MAP(zac_1_map)
MCFG_CPU_IO_MAP(zac_1_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(zac_1_state, serial_w))
MCFG_CPU_DATA_MAP(zac_1_data)
MCFG_S2650_SENSE_INPUT(READLINE(zac_1_state, serial_r))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(zac_1_state, serial_w))
MCFG_NVRAM_ADD_0FILL("ram")
MCFG_TIMER_DRIVER_ADD_PERIODIC("zac_1_inttimer", zac_1_state, zac_1_inttimer, attotime::from_hz(200))
@ -272,9 +277,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( locomotp_io, AS_IO, 8, zac_1_state)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_END
static ADDRESS_MAP_START( locomotp_data, AS_DATA, 8, zac_1_state)
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(ctrl_r,ctrl_w)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READ(reset_int_r)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(serial_r)
ADDRESS_MAP_END
READ8_MEMBER( zac_1_state::reset_int_r )
@ -288,6 +295,7 @@ static MACHINE_CONFIG_DERIVED( locomotp, zac_1 )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(locomotp_map)
MCFG_CPU_IO_MAP(locomotp_io)
MCFG_CPU_DATA_MAP(locomotp_data)
// also has sound cpu
MACHINE_CONFIG_END

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@ -27,7 +27,7 @@ public:
DECLARE_WRITE8_MEMBER(ctrl_w);
DECLARE_READ8_MEMBER(data_r);
DECLARE_WRITE8_MEMBER(data_w);
DECLARE_READ8_MEMBER(serial_r);
DECLARE_READ_LINE_MEMBER(serial_r);
DECLARE_WRITE_LINE_MEMBER(serial_w);
uint8_t m_t_c;
uint8_t m_out_offs;
@ -59,9 +59,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(zac_2_io, AS_IO, 8, zac_2_state)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_END
static ADDRESS_MAP_START(zac_2_data, AS_DATA, 8, zac_2_state)
AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(ctrl_r,ctrl_w)
AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(data_r,data_w)
AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(serial_r)
ADDRESS_MAP_END
static INPUT_PORTS_START( zac_2 )
@ -162,7 +164,7 @@ WRITE8_MEMBER( zac_2_state::data_w )
// writes to lines HS0-7, no idea what they do
}
READ8_MEMBER( zac_2_state::serial_r )
READ_LINE_MEMBER( zac_2_state::serial_r )
{
// from printer
return 0;
@ -206,7 +208,9 @@ static MACHINE_CONFIG_START( zac_2 )
MCFG_CPU_ADD("maincpu", S2650, 6000000/2)
MCFG_CPU_PROGRAM_MAP(zac_2_map)
MCFG_CPU_IO_MAP(zac_2_io)
MCFG_S2650_FLAG_HANDLER(WRITELINE(zac_2_state, serial_w))
MCFG_CPU_DATA_MAP(zac_2_data)
MCFG_S2650_SENSE_INPUT(READLINE(zac_2_state, serial_r))
MCFG_S2650_FLAG_OUTPUT(WRITELINE(zac_2_state, serial_w))
MCFG_NVRAM_ADD_0FILL("ram")
MCFG_TIMER_DRIVER_ADD_PERIODIC("zac_2_inttimer", zac_2_state, zac_2_inttimer, attotime::from_hz(200))

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@ -49,7 +49,7 @@ public:
m_palette(*this, "palette"),
m_screen(*this, "screen") { }
DECLARE_READ8_MEMBER(vsync_r);
DECLARE_READ_LINE_MEMBER(vsync_r);
DECLARE_READ8_MEMBER(video_r);
DECLARE_WRITE8_MEMBER(video_w);
int m_line;

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@ -115,7 +115,7 @@ public:
DECLARE_READ8_MEMBER(cvs_collision_r);
DECLARE_READ8_MEMBER(cvs_collision_clear);
DECLARE_WRITE8_MEMBER(cvs_scroll_w);
DECLARE_READ8_MEMBER(tms_clock_r);
DECLARE_READ_LINE_MEMBER(tms_clock_r);
DECLARE_WRITE8_MEMBER(cvs_4_bit_dac_data_w);
DECLARE_WRITE8_MEMBER(cvs_unknown_w);
DECLARE_WRITE8_MEMBER(cvs_tms5110_ctl_w);

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@ -107,7 +107,7 @@ public:
DECLARE_READ8_MEMBER(vc4000_key_r);
DECLARE_READ8_MEMBER(vc4000_video_r);
DECLARE_WRITE8_MEMBER(vc4000_video_w);
DECLARE_READ8_MEMBER(vc4000_vsync_r);
DECLARE_READ_LINE_MEMBER(vc4000_vsync_r);
DECLARE_READ8_MEMBER(elektor_cass_r);
DECLARE_WRITE8_MEMBER(elektor_cass_w);
vc4000_video_t m_video;

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@ -665,9 +665,9 @@ INTERRUPT_GEN_MEMBER(arcadia_state::video_line)
draw_sprites();
}
READ8_MEMBER( arcadia_state::vsync_r )
READ_LINE_MEMBER(arcadia_state::vsync_r)
{
return m_line>=216 ? 0x80 : 0 ;
return m_line >= 216 ? ASSERT_LINE : CLEAR_LINE;
}
uint32_t arcadia_state::screen_update_arcadia(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)

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@ -350,9 +350,9 @@ WRITE8_MEMBER( vc4000_state::vc4000_video_w )
}
READ8_MEMBER( vc4000_state::vc4000_vsync_r )
READ_LINE_MEMBER(vc4000_state::vc4000_vsync_r)
{
return m_video.line >= VC4000_END_LINE ? 0x80 : 0;
return m_video.line >= VC4000_END_LINE ? ASSERT_LINE : CLEAR_LINE;
}
static const char led[20][12+1] =