mirror of
https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
amusco: Start fleshing out the driver
- Change CPU type to 8088 - Hook up a bunch of devices - Identify a few inputs
This commit is contained in:
AJR
parent
a1eea6e153
commit
aa4f5599b3
@ -80,13 +80,14 @@
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#define CRTC_CLOCK SECOND_CLOCK / 8 /* guess */
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#define SND_CLOCK SECOND_CLOCK / 8 /* guess */
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#include "emu.h"
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#include "cpu/i86/i86.h"
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#include "video/mc6845.h"
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#include "machine/i8255.h"
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#include "sound/sn76496.h"
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#include "machine/pic8259.h"
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#include "machine/pit8253.h"
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#include "machine/msm5832.h"
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class amusco_state : public driver_device
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@ -98,27 +99,35 @@ public:
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m_maincpu(*this, "maincpu"),
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m_gfxdecode(*this, "gfxdecode"),
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m_pic(*this, "pic8259"),
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m_rtc(*this, "rtc"),
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m_crtc(*this, "crtc")
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{ }
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required_shared_ptr<UINT16> m_videoram;
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required_shared_ptr<UINT8> m_videoram;
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tilemap_t *m_bg_tilemap;
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DECLARE_WRITE16_MEMBER(amusco_videoram_w);
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TILE_GET_INFO_MEMBER(get_bg_tile_info);
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virtual void video_start() override;
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DECLARE_READ8_MEMBER(mc6845_r);
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DECLARE_WRITE8_MEMBER(mc6845_w);
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DECLARE_WRITE16_MEMBER(vram_w);
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DECLARE_WRITE8_MEMBER(output_a_w);
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DECLARE_WRITE8_MEMBER(output_b_w);
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DECLARE_WRITE8_MEMBER(output_c_w);
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DECLARE_WRITE8_MEMBER(vram_w);
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DECLARE_READ8_MEMBER(lpt_r);
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DECLARE_WRITE8_MEMBER(lpt_w);
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DECLARE_READ8_MEMBER(rtc_r);
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DECLARE_WRITE8_MEMBER(rtc_w);
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MC6845_ON_UPDATE_ADDR_CHANGED(crtc_addr);
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UINT32 screen_update_amusco(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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required_device<cpu_device> m_maincpu;
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required_device<gfxdecode_device> m_gfxdecode;
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required_device<pic8259_device> m_pic;
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required_device<msm5832_device> m_rtc;
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required_device<mc6845_device> m_crtc;
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INTERRUPT_GEN_MEMBER(amusco_vblank_irq);
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INTERRUPT_GEN_MEMBER(amusco_timer_irq);
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UINT16 m_mc6845_address;
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UINT8 m_mc6845_address;
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UINT16 m_video_update_address;
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};
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@ -127,10 +136,6 @@ public:
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* Video Hardware *
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*************************/
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WRITE16_MEMBER(amusco_state::amusco_videoram_w)
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{
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}
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TILE_GET_INFO_MEMBER(amusco_state::get_bg_tile_info)
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{
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/* - bits -
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@ -139,7 +144,7 @@ TILE_GET_INFO_MEMBER(amusco_state::get_bg_tile_info)
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---- ---- color code.
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---- ---- seems unused.
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*/
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int code = m_videoram[tile_index];
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int code = m_videoram[tile_index * 2] | (m_videoram[tile_index * 2 + 1] << 8);
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SET_TILE_INFO_MEMBER(
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0 /* bank */,
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@ -170,7 +175,7 @@ UINT32 amusco_state::screen_update_amusco(screen_device &screen, bitmap_ind16 &b
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* Memory Map Information *
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*************************/
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static ADDRESS_MAP_START( amusco_mem_map, AS_PROGRAM, 16, amusco_state )
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static ADDRESS_MAP_START( amusco_mem_map, AS_PROGRAM, 8, amusco_state )
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AM_RANGE(0x00000, 0x0ffff) AM_RAM
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AM_RANGE(0xec000, 0xecfff) AM_RAM AM_SHARE("videoram") // placeholder
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AM_RANGE(0xf8000, 0xfffff) AM_ROM
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@ -201,25 +206,83 @@ WRITE8_MEMBER( amusco_state::mc6845_w)
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}
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}
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WRITE16_MEMBER( amusco_state::vram_w)
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WRITE8_MEMBER(amusco_state::output_a_w)
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{
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m_videoram[m_video_update_address] = data;
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//logerror("Writing %02Xh to PPI output A\n", data);
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}
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WRITE8_MEMBER(amusco_state::output_b_w)
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{
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//logerror("Writing %02Xh to PPI output B\n", data);
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}
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WRITE8_MEMBER(amusco_state::output_c_w)
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{
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//logerror("Writing %02Xh to PPI output C\n", data);
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}
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WRITE8_MEMBER(amusco_state::vram_w)
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{
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m_videoram[m_video_update_address * 2 + offset] = data;
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m_bg_tilemap->mark_tile_dirty(m_video_update_address);
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// printf("%04x %04x\n",m_video_update_address,data);
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}
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static ADDRESS_MAP_START( amusco_io_map, AS_IO, 16, amusco_state )
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AM_RANGE(0x0000, 0x0001) AM_READWRITE8(mc6845_r, mc6845_w, 0xffff)
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// AM_RANGE(0x0000, 0x0001) AM_DEVREADWRITE8("crtc", mc6845_device, status_r, address_w, 0x00ff)
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// AM_RANGE(0x0000, 0x0001) AM_DEVREADWRITE8("crtc", mc6845_device, register_r, register_w, 0xff00)
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AM_RANGE(0x0010, 0x0011) AM_DEVREADWRITE8("pic8259", pic8259_device, read, write, 0xffff ) //PPI 8255
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READ8_MEMBER(amusco_state::lpt_r)
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{
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logerror("Reading from printer port 28%dh\n", offset);
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return 0;
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}
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AM_RANGE(0x0060, 0x0061) AM_DEVWRITE8("sn", sn76489_device, write, 0x00ff) /* sound */
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WRITE8_MEMBER(amusco_state::lpt_w)
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{
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logerror("Writing %02Xh to printer port 28%dh\n", data, offset);
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}
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READ8_MEMBER(amusco_state::rtc_r)
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{
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switch (offset)
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{
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case 3:
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return m_rtc->data_r(space, 0);
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default:
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logerror("Reading from RTC port 38%dh\n", offset);
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return 0;
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}
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}
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WRITE8_MEMBER(amusco_state::rtc_w)
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{
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switch (offset)
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{
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case 1:
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m_rtc->address_w(data & 0x0f);
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m_rtc->cs_w(BIT(data, 6));
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m_rtc->write_w(BIT(data, 5));
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m_rtc->read_w(BIT(data, 4));
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break;
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case 3:
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m_rtc->data_w(space, 0, data);
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break;
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default:
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logerror("Writing %02Xh to RTC port 38%dh\n", data, offset);
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break;
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}
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}
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static ADDRESS_MAP_START( amusco_io_map, AS_IO, 8, amusco_state )
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AM_RANGE(0x0000, 0x0001) AM_READWRITE(mc6845_r, mc6845_w)
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AM_RANGE(0x0010, 0x0011) AM_DEVWRITE("pic8259", pic8259_device, write)
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AM_RANGE(0x0020, 0x0023) AM_DEVWRITE("pit8253", pit8253_device, write)
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AM_RANGE(0x0030, 0x0033) AM_DEVREADWRITE("ppi_outputs", i8255_device, read, write)
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AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE("ppi_inputs", i8255_device, read, write)
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AM_RANGE(0x0060, 0x0060) AM_DEVWRITE("sn", sn76489_device, write)
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AM_RANGE(0x0070, 0x0071) AM_WRITE(vram_w)
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// AM_RANGE(0x0010, 0x0011) AM_READ_PORT("IN1")
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// AM_RANGE(0x0012, 0x0013) AM_READ_PORT("IN3")
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AM_RANGE(0x0030, 0x0031) AM_READ_PORT("DSW1") AM_WRITENOP // lamps?
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AM_RANGE(0x0040, 0x0041) AM_READ_PORT("DSW2")
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AM_RANGE(0x0280, 0x0283) AM_READWRITE(lpt_r, lpt_w)
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AM_RANGE(0x0380, 0x0383) AM_READWRITE(rtc_r, rtc_w)
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ADDRESS_MAP_END
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/* I/O byte R/W
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@ -243,18 +306,18 @@ static INPUT_PORTS_START( amusco )
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1) PORT_NAME("IN0-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2) PORT_NAME("IN0-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3) PORT_NAME("IN0-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4) PORT_NAME("IN0-4")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_CODE(KEYCODE_4)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5) PORT_NAME("IN0-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6) PORT_NAME("IN0-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7) PORT_NAME("IN0-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8) PORT_NAME("IN0-8")
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PORT_START("IN1")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Q) PORT_NAME("IN1-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W) PORT_NAME("IN1-2")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Q) PORT_NAME("Cash Door")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_CODE(KEYCODE_W)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_E) PORT_NAME("IN1-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_R) PORT_NAME("IN1-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("IN1-5")
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("Logic Door")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Y) PORT_NAME("IN1-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U) PORT_NAME("IN1-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I) PORT_NAME("IN1-8")
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@ -268,181 +331,6 @@ static INPUT_PORTS_START( amusco )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_H) PORT_NAME("IN2-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_J) PORT_NAME("IN2-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_K) PORT_NAME("IN2-8")
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PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED)
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PORT_START("IN3")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_NAME("IN3-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_NAME("IN3-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_C) PORT_NAME("IN3-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_V) PORT_NAME("IN3-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_B) PORT_NAME("IN3-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_N) PORT_NAME("IN3-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M) PORT_NAME("IN3-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L) PORT_NAME("IN3-8")
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PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED)
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PORT_START("IN4")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("IN4-1")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("IN4-2")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("IN4-3")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("IN4-4")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("IN4-5")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("IN4-6")
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("IN4-7")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("IN4-8")
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PORT_START("DSW1")
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PORT_DIPNAME( 0x01, 0x01, "DSW1" )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x0100, 0x0100, "DSW1-2" )
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PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_START("DSW2")
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PORT_DIPNAME( 0x01, 0x01, "DSW2" )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x0100, 0x0100, "DSW2-1" )
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PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
PORT_START("DSW3")
|
||||
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("DSW4")
|
||||
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
@ -499,14 +387,27 @@ INTERRUPT_GEN_MEMBER(amusco_state::amusco_timer_irq)
|
||||
static MACHINE_CONFIG_START( amusco, amusco_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
/* FIXME: Need to find the correct CPU */
|
||||
MCFG_CPU_ADD("maincpu", I8086, CPU_CLOCK) // 5 MHz ?
|
||||
MCFG_CPU_ADD("maincpu", I8088, CPU_CLOCK) // 5 MHz ?
|
||||
MCFG_CPU_PROGRAM_MAP(amusco_mem_map)
|
||||
MCFG_CPU_IO_MAP(amusco_io_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", amusco_state, amusco_vblank_irq)
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(amusco_state, amusco_timer_irq, 60*32)
|
||||
|
||||
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NOOP)
|
||||
MCFG_PIC8259_ADD("pic8259", INPUTLINE("maincpu", 0), VCC, NOOP)
|
||||
|
||||
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||
|
||||
MCFG_DEVICE_ADD("ppi_outputs", I8255, 0)
|
||||
MCFG_I8255_OUT_PORTA_CB(WRITE8(amusco_state, output_a_w))
|
||||
MCFG_I8255_OUT_PORTB_CB(WRITE8(amusco_state, output_b_w))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(amusco_state, output_c_w))
|
||||
|
||||
MCFG_DEVICE_ADD("ppi_inputs", I8255, 0)
|
||||
MCFG_I8255_IN_PORTA_CB(IOPORT("IN0"))
|
||||
MCFG_I8255_IN_PORTB_CB(IOPORT("IN1"))
|
||||
MCFG_I8255_IN_PORTC_CB(IOPORT("IN2"))
|
||||
|
||||
MCFG_MSM5832_ADD("rtc", XTAL_32_768kHz)
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user