wip

src/devices/bus/nscsi/hd.cpp

@@ -10,7 +10,7 @@
 #define LOG_DATA        (1U << 2)
 #define LOG_UNSUPPORTED (1U << 3)
 
-#define VERBOSE 0
+#define VERBOSE (LOG_GENERAL)
 
 #include "logmacro.h"
 

src/devices/bus/vme/mvme327a.cpp

@@ -9,6 +9,7 @@
  *
  * TODO:
  *  - skeleton only
+ *  - wip failures due to pit outputs, interrupts?
  */
 
 #include "emu.h"
@@ -20,6 +21,12 @@
 #define VERBOSE 0
 #include "logmacro.h"
 
+enum int_mask : u8
+{
+	INT_SCSI = 0x04,
+	INT_PIT  = 0xe1, // 0x1110'0001
+};
+
 DEFINE_DEVICE_TYPE(VME_MVME327A, vme_mvme327a_device, "mvme327a", "Motorola MVME327A")
 
 vme_mvme327a_device::vme_mvme327a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
@@ -90,12 +97,19 @@ void vme_mvme327a_device::device_add_mconfig(machine_config &config)
 	NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr, false);
 	NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr, false);
 	NSCSI_CONNECTOR(config, "scsi:7").option_set("wd33c93a", WD33C93A).machine_config(
-			[] (device_t *device)
+			[this] (device_t *device)
 			{
 				wd33c9x_base_device &wd33c93(downcast<wd33c9x_base_device &>(*device));
 
 				wd33c93.set_clock(10000000);
-				//wd33c93.irq_cb().set(*this, ...);
+				wd33c93.irq_cb().set(
+					[this](int state)
+					{
+						if (state)
+							m_int |= INT_SCSI;
+						else
+							m_int &= ~INT_SCSI;
+					});
 				//wd33c93.drq_cb().set(*this, ...);
 			});
 }
@@ -106,8 +120,12 @@ void vme_mvme327a_device::cpu_mem(address_map &map)
 	m_boot[0](0x00'0000, 0x01'ffff).rom().region("eprom", 0);
 	m_boot[1](0x00'0000, 0x01'ffff).ram();
 
-	//map(0x04'0000, 0x04'0001).rw(m_scsi, FUNC(wd33c93a_device))
+	map(0x03'0001, 0x03'0001).lr8([this]() { return m_int; }, "int_r"); // interrupt register?
-	//map(0x07'0000, 0x07'0003).m(m_fdc, &wd37c65c_device::map).umask16(0x00ff);
+	map(0x04'0000, 0x04'0003).rw(m_scsi, FUNC(wd33c93a_device::indir_r), FUNC(wd33c93a_device::indir_w)).umask16(0x00ff);
+	map(0x07'0000, 0x07'0003).m(m_fdc, FUNC(wd37c65c_device::map)).umask16(0x00ff);
+	// 0x07'0005 w
+	// 0x07'0007 r/w
+	//map(0x09'0000, 0x09'0003); // ???
 	map(0x0b'0000, 0x0b'003f).rw(m_pit, FUNC(pit68230_device::read), FUNC(pit68230_device::write)).mirror(0xffc0).umask16(0x00ff);
 	map(0x0c'0000, 0x0c'000f).rw(m_bim, FUNC(bim68153_device::read), FUNC(bim68153_device::write)).mirror(0xfff0).umask16(0x00ff);
 

src/devices/bus/vme/mvme327a.h

@@ -41,6 +41,8 @@ private:
 	required_device<wd33c93a_device> m_scsi;
 
 	memory_view m_boot;
+
+	u8 m_int;
 };
 
 DECLARE_DEVICE_TYPE(VME_MVME327A, vme_mvme327a_device)

src/devices/bus/vme/tp880v.cpp

@@ -37,7 +37,7 @@ vme_tp880v_card_device::vme_tp880v_card_device(machine_config const &mconfig, ch
 	, m_scsi(*this, "scsi:7:ncr53c90")
 	, m_duart(*this, "duart")
 	, m_serial(*this, "serial%u", 0U)
-	, m_ram(*this, "ram")
+	, m_ram_88k(*this, "ram")
 	, m_ram_68k(nullptr)
 {
 }
@@ -63,7 +63,8 @@ ioport_constructor vme_tp880v_card_device::device_input_ports() const
 
 void vme_tp880v_card_device::device_start()
 {
-	m_ram_68k = util::big_endian_cast<u16>(m_ram.target());
+	m_ram_68k = util::big_endian_cast<u16>(m_ram_88k.target());
+	m_pb = 0;
 }
 
 void vme_tp880v_card_device::device_reset()
@@ -89,19 +90,36 @@ void vme_tp880v_card_device::device_add_mconfig(machine_config &config)
 
 	M68000(config, m_ios, 10'000'000);
 	m_ios->set_addrmap(AS_PROGRAM, &vme_tp880v_card_device::ios_mem);
+	m_ios->set_addrmap(m68000_base_device::AS_CPU_SPACE, &vme_tp880v_card_device::ios_ack);
 
 	Z8036(config, m_cio[0], 4'000'000); // Z0803606VSC
-	m_cio[0]->irq_wr_cb().set_inputline(m_ios, INPUT_LINE_IRQ4); // ?
+	m_cio[0]->pb_rd_cb().set([this]() { return ~m_pb; });
+	m_cio[0]->pa_wr_cb().set(
+		[this](u8 data)
+		{
+			logerror("pa 0x%02x (%s)\n", data, machine().describe_context());
+			m_cpu->set_input_line(INPUT_LINE_IRQ0, BIT(data, 4));
+			m_ios->set_input_line(INPUT_LINE_IRQ4, !BIT(data, 3));
+		});
+	// pb0..2 are outputs
+	m_cio[0]->pb_wr_cb().set(
+		[this](u8 data)
+		{
+			// 0x0d 1101
+			// 0x01 0001 on host 1 test
+			logerror("pb 0x%02x (%s)\n", data, machine().describe_context());
+			if (!BIT(data, 2))
+				m_ios->set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
+		});
 	Z8036(config, m_cio[1], 4'000'000); // Z0803606VSC
-	m_cio[0]->irq_wr_cb().set_inputline(m_ios, INPUT_LINE_IRQ1); // ?
 
 	// TODO: MC68440 is function and pin compatible with MC68450/HD63450, but
 	// has only two DMA channels instead of four.
 	HD63450(config, m_dma, 10'000'000); // MC68440FN10
 	m_dma->set_cpu_tag(m_ios);
 	m_dma->irq_callback().set_inputline(m_ios, INPUT_LINE_IRQ3);
-	m_dma->dma_read<0>().set(m_scsi, FUNC(ncr53c90_device::dma_r));
+	//m_dma->dma_read<0>().set(m_scsi, FUNC(ncr53c90_device::dma_r));
-	m_dma->dma_write<0>().set(m_scsi, FUNC(ncr53c90_device::dma_w));
+	//m_dma->dma_write<0>().set(m_scsi, FUNC(ncr53c90_device::dma_w));
 
 	M48T02(config, m_rtc, 0); // MK40T02B-25
 
@@ -125,7 +143,19 @@ void vme_tp880v_card_device::device_add_mconfig(machine_config &config)
 
 	SCN2681(config, m_duart, 3.6864_MHz_XTAL);
 	m_duart->irq_cb().set_inputline(m_ios, INPUT_LINE_IRQ6);
-	m_duart->outport_cb().set([this](int state) { m_cpu->set_input_line(INPUT_LINE_RESET, state); }).bit(5);
+	m_duart->outport_cb().set(
+		[this](u8 data)
+		{
+			logerror("op 0x%02x (%s)\n", data, machine().describe_context());
+			if (!BIT(data, 3))
+				m_pb |= 0x40;
+			else
+				m_pb &= ~0x40;
+			m_cpu->set_input_line(INPUT_LINE_IRQ0, BIT(data, 3));
+			if (!BIT(data, 4))
+				m_ios->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
+			m_cpu->set_input_line(INPUT_LINE_RESET, BIT(data, 5));
+		});
 
 	RS232_PORT(config, m_serial[0], default_rs232_devices, "terminal");
 	RS232_PORT(config, m_serial[1], default_rs232_devices, nullptr);
@@ -166,3 +196,15 @@ void vme_tp880v_card_device::ios_mem(address_map &map)
 		[this](offs_t offset, u16 mem_mask) { return m_ram_68k[offset]; }, "ram_68k_r",
 		[this](offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_ram_68k[offset]); }, "ram_68k_w");
 }
+
+void vme_tp880v_card_device::ios_ack(address_map &map)
+{
+	map(0xff'fff3, 0xff'fff3).lr8(NAME([]() { return m68000_base_device::autovector(1); }));
+	map(0xff'fff5, 0xff'fff5).lr8(NAME([]() { return m68000_base_device::autovector(2); }));
+	//map(0xff'fff7, 0xff'fff7).lr8(NAME([this]() { return m_dma->iack(); }));
+	map(0xff'fff7, 0xff'fff7).lr8(NAME([]() { return m68000_base_device::autovector(3); }));
+	map(0xff'fff9, 0xff'fff9).lr8(NAME([]() { return m68000_base_device::autovector(4); }));
+	map(0xff'fffb, 0xff'fffb).lr8(NAME([]() { return m68000_base_device::autovector(5); }));
+	map(0xff'fffd, 0xff'fffd).lr8(NAME([]() { return m68000_base_device::autovector(6); }));
+	map(0xff'ffff, 0xff'ffff).lr8(NAME([]() { return m68000_base_device::autovector(7); }));
+}

src/devices/bus/vme/tp880v.h

@@ -35,6 +35,7 @@ protected:
 private:
 	void cpu_mem(address_map &map) ATTR_COLD;
 	void ios_mem(address_map &map) ATTR_COLD;
+	void ios_ack(address_map &map) ATTR_COLD;
 
 	required_device<mc88100_device> m_cpu;
 	required_device_array<mc88200_device, 2> m_mmu;
@@ -48,8 +49,10 @@ private:
 
 	required_device_array<rs232_port_device, 2> m_serial;
 
-	required_shared_ptr<u32> m_ram;
+	required_shared_ptr<u32> m_ram_88k;
 	util::endian_cast<u32, u16, util::endianness::big> m_ram_68k;
+
+	u8 m_pb;
 };
 
 DECLARE_DEVICE_TYPE(VME_TP880V, vme_tp880v_card_device)

src/devices/bus/vme/vme.cpp

@@ -78,7 +78,7 @@
 #include "emu.h"
 #include "vme.h"
 
-#define VERBOSE 0
+#define VERBOSE (LOG_GENERAL)
 #include "logmacro.h"
 
 DEFINE_DEVICE_TYPE(VME, vme_bus_device, "vme", "VME bus")

src/devices/machine/hd63450.cpp

@@ -9,7 +9,7 @@
 #include "emu.h"
 #include "hd63450.h"
 
-//#define VERBOSE 1
+#define VERBOSE 1
 #include "logmacro.h"
 
 DEFINE_DEVICE_TYPE(HD63450, hd63450_device, "hd63450", "Hitachi HD63450 DMAC")
@@ -306,7 +306,7 @@ void hd63450_device::dma_transfer_start(int channel)
 	else if ((m_reg[channel].ocr & 3) == 2)
 		m_timer[channel]->adjust(attotime::never, channel, attotime::never);
 
-	m_transfer_size[channel] = m_reg[channel].mtc;
+	m_transfer_size[channel] = m_reg[channel].mtc * 2;
 
 	LOG("DMA: Transfer begins: size=0x%08x\n",m_transfer_size[channel]);
 }
@@ -366,8 +366,6 @@ void hd63450_device::single_transfer(int x)
 		if (!m_dma_read[x].isunset())
 		{
 			data = m_dma_read[x](m_reg[x].mar);
-			if (data == -1)
-				return;  // not ready to receive data
 			space.write_byte(m_reg[x].mar,data);
 			datasize = 1;
 		}
@@ -447,8 +445,8 @@ void hd63450_device::single_transfer(int x)
 	}
 
 	// decrease memory transfer counter
-	if (m_reg[x].mtc > 0)
+	if (m_transfer_size[x] > 0)
-		m_reg[x].mtc--;
+		m_transfer_size[x] -= datasize;
 
 	// handle change of memory and device addresses
 	if ((m_reg[x].scr & 0x03) == 0x01)
@@ -461,7 +459,7 @@ void hd63450_device::single_transfer(int x)
 	else if ((m_reg[x].scr & 0x0c) == 0x08)
 		m_reg[x].mar-=datasize;
 
-	if (m_reg[x].mtc <= 0)
+	if (m_transfer_size[x] <= 0)
 	{
 		// End of transfer
 		LOG("DMA#%i: End of transfer\n",x);

src/devices/machine/ncr53c90.cpp

@@ -14,7 +14,7 @@
 #define LOG_FIFO    (1U << 2)
 #define LOG_COMMAND (1U << 3)
 
-#define VERBOSE (0)
+#define VERBOSE (LOG_GENERAL|LOG_COMMAND|LOG_FIFO)
 #include "logmacro.h"
 
 #define DELAY_HACK

src/devices/machine/nscsi_bus.cpp

@@ -14,8 +14,8 @@
 #define LOG_DATA        (1U << 4)
 #define LOG_DATA_SENT   (1U << 5)
 
-#define VERBOSE (LOG_UNSUPPORTED)
+//#define VERBOSE (LOG_GENERAL | LOG_STATE | LOG_CONTROL | LOG_DATA)
-//#define LOG_OUTPUT_FUNC osd_printf_info
+#define VERBOSE (LOG_GENERAL|LOG_UNSUPPORTED)
 
 #include "logmacro.h"
 

src/mame/vme.flt

@@ -0,0 +1,18 @@
+// drivers which are actually vme cards:
+// ffcpu30: sys68k/cpu-30 card
+// force68k: card -> done -> working
+// hk68v10: card -> done -> working
+// mzr8105: card -> done -> no serial?
+// mvme147: card -> done
+// clxvme186: card (not vme yet)
+//
+// ffcpu20: driver for fccpu2* cards - should be deleted?
+// miniforce: vme backplane (fccpu21)
+// m8120: computer (mvme187)
+// sys1121: backplane
+//
+force/miniforce.cpp
+motorola/m8120.cpp
+motorola/sys1121.cpp
+sgi/tt.cpp
+skeleton/clxvme186.cpp