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mips1: cop0 initialization for r3041 (nw)

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This commit is contained in:
Patrick Mackinlay 2019-12-18 18:44:36 +07:00
parent 2e1ba819b6
commit aa9440c8bc
2 changed files with 18 additions and 2 deletions
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17
src/devices/cpu/mips/mips1.cpp
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@ -54,7 +54,7 @@ DEFINE_DEVICE_TYPE(R3071, r3071_device, "r3071", "IDT R3071")
DEFINE_DEVICE_TYPE(R3081, r3081_device, "r3081", "IDT R3081") DEFINE_DEVICE_TYPE(R3081, r3081_device, "r3081", "IDT R3081")
DEFINE_DEVICE_TYPE(SONYPS2_IOP, iop_device, "sonyiop", "Sony Playstation 2 IOP") DEFINE_DEVICE_TYPE(SONYPS2_IOP, iop_device, "sonyiop", "Sony Playstation 2 IOP")
ALLOW_SAVE_TYPE(mips1core_device_base::branch_state_t); ALLOW_SAVE_TYPE(mips1core_device_base::branch_state);
mips1core_device_base::mips1core_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 cpurev, size_t icache_size, size_t dcache_size) mips1core_device_base::mips1core_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 cpurev, size_t icache_size, size_t dcache_size)
: cpu_device(mconfig, type, tag, owner, clock) : cpu_device(mconfig, type, tag, owner, clock)
@ -184,6 +184,8 @@ void mips1core_device_base::device_start()
// initialise cpu id register // initialise cpu id register
m_cop0[COP0_PRId] = m_cpurev; m_cop0[COP0_PRId] = m_cpurev;
m_cop0[COP0_Cause] = 0;
m_r[0] = 0; m_r[0] = 0;
} }
@ -197,6 +199,10 @@ void r3041_device::device_start()
state_add(MIPS1_COP0 + COP0_Count, "Count", m_cop0[COP0_Count]); state_add(MIPS1_COP0 + COP0_Count, "Count", m_cop0[COP0_Count]);
state_add(MIPS1_COP0 + COP0_PortSize, "PortSize", m_cop0[COP0_PortSize]); state_add(MIPS1_COP0 + COP0_PortSize, "PortSize", m_cop0[COP0_PortSize]);
state_add(MIPS1_COP0 + COP0_Compare, "Compare", m_cop0[COP0_Compare]); state_add(MIPS1_COP0 + COP0_Compare, "Compare", m_cop0[COP0_Compare]);
m_cop0[COP0_BusCtrl] = 0x20130b00U;
m_cop0[COP0_Config] = 0x40000000U;
m_cop0[COP0_PortSize] = 0;
} }
void mips1core_device_base::device_reset() void mips1core_device_base::device_reset()
@ -212,6 +218,14 @@ void mips1core_device_base::device_reset()
m_bus_error = false; m_bus_error = false;
} }
void r3041_device::device_reset()
{
mips1core_device_base::device_reset();
m_cop0[COP0_Count] = 0;
m_cop0[COP0_Compare] = 0x00ffffffU;
}
void mips1core_device_base::execute_run() void mips1core_device_base::execute_run()
{ {
// core execution loop // core execution loop
@ -914,6 +928,7 @@ void mips1core_device_base::handle_cop0(u32 const op)
u32 mips1core_device_base::get_cop0_reg(unsigned const reg) u32 mips1core_device_base::get_cop0_reg(unsigned const reg)
{ {
machine().debug_break();
return m_cop0[reg]; return m_cop0[reg];
} }

3
src/devices/cpu/mips/mips1.h
View File

@ -223,7 +223,7 @@ protected:
// internal stuff // internal stuff
int m_icount; int m_icount;
enum branch_state_t : unsigned enum branch_state : unsigned
{ {
NONE = 0, NONE = 0,
DELAY = 1, // delay slot instruction active DELAY = 1, // delay slot instruction active
@ -351,6 +351,7 @@ public:
protected: protected:
virtual void device_start() override; virtual void device_start() override;
virtual void device_reset() override;
}; };
class r3051_device : public mips1core_device_base class r3051_device : public mips1core_device_base