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added alpha8201 emulation, hooked it up to shougi.c

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This commit is contained in:
hap 2015-10-31 17:36:13 +01:00
parent c2b22aacf5
commit ab0a3b1c99
3 changed files with 128 additions and 30 deletions
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47
src/mame/drivers/shougi.c
View File

@ -79,7 +79,6 @@ PROM : Type MB7051
**************************************************************************/
#include "emu.h"
#include "cpu/alph8201/alph8201.h"
#include "machine/alpha8201.h"
#include "cpu/z80/z80.h"
#include "sound/ay8910.h"
@ -93,13 +92,14 @@ public:
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_subcpu(*this, "sub"),
m_mcu(*this, "mcu"),
m_alpha_8201(*this, "alpha_8201"),
m_videoram(*this, "videoram")
{ }
// devices/pointers
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_subcpu;
required_device<cpu_device> m_mcu;
required_device<alpha_8201_device> m_alpha_8201;
required_shared_ptr<UINT8> m_videoram;
@ -110,11 +110,12 @@ public:
DECLARE_READ8_MEMBER(dummy_r);
DECLARE_PALETTE_INIT(shougi);
virtual void machine_start();
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(vblank_nmi);
protected:
virtual void machine_start();
};
@ -248,8 +249,14 @@ WRITE8_MEMBER(shougi_state::control_w)
}
break;
case 3:
// start/halt ALPHA-8201
m_alpha_8201->mcu_start_w(data);
break;
case 4:
m_mcu->set_input_line(INPUT_LINE_HALT, data ? ASSERT_LINE : CLEAR_LINE);
// ALPHA-8201 shared RAM bus direction: 0: mcu, 1: maincpu
m_alpha_8201->bus_dir_w(!data);
break;
default:
@ -268,8 +275,8 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, shougi_state )
AM_RANGE(0x5800, 0x5800) AM_READ_PORT("P2") AM_WRITE(watchdog_reset_w) /* game won't boot if watchdog doesn't work */
AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("aysnd", ay8910_device, address_w)
AM_RANGE(0x6800, 0x6800) AM_DEVWRITE("aysnd", ay8910_device, data_w)
AM_RANGE(0x7000, 0x73ff) AM_RAM AM_SHARE("share1") /* 2114 x 2 (0x400 x 4bit each) */
AM_RANGE(0x7800, 0x7bff) AM_RAM AM_SHARE("share2") /* 2114 x 2 (0x400 x 4bit each) */
AM_RANGE(0x7000, 0x73ff) AM_DEVREADWRITE("alpha_8201", alpha_8201_device, main_ram_r, main_ram_w) /* 2114 x 2 (0x400 x 4bit each) */
AM_RANGE(0x7800, 0x7bff) AM_RAM AM_SHARE("sharedram") /* 2114 x 2 (0x400 x 4bit each) */
AM_RANGE(0x8000, 0xffff) AM_RAM AM_SHARE("videoram") /* 4116 x 16 (32K) */
ADDRESS_MAP_END
@ -290,7 +297,7 @@ READ8_MEMBER(shougi_state::dummy_r)
static ADDRESS_MAP_START( sub_map, AS_PROGRAM, 8, shougi_state )
AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0x6000, 0x63ff) AM_RAM AM_SHARE("share2") /* 2114 x 2 (0x400 x 4bit each) */
AM_RANGE(0x6000, 0x63ff) AM_RAM AM_SHARE("sharedram") /* 2114 x 2 (0x400 x 4bit each) */
ADDRESS_MAP_END
static ADDRESS_MAP_START( readport_sub, AS_IO, 8, shougi_state )
@ -299,13 +306,6 @@ static ADDRESS_MAP_START( readport_sub, AS_IO, 8, shougi_state )
ADDRESS_MAP_END
// mcu side (fake!)
static ADDRESS_MAP_START( mcu_map, AS_PROGRAM, 8, shougi_state )
AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("share1")
ADDRESS_MAP_END
/***************************************************************************
@ -400,10 +400,7 @@ static MACHINE_CONFIG_START( shougi, shougi_state )
MCFG_CPU_PROGRAM_MAP(sub_map)
MCFG_CPU_IO_MAP(readport_sub)
MCFG_CPU_ADD("mcu", ALPHA8201L, XTAL_10MHz/4/8)
MCFG_CPU_PROGRAM_MAP(mcu_map)
MCFG_DEVICE_ADD("prot", ALPHA_8201, XTAL_10MHz/4/8)
MCFG_DEVICE_ADD("alpha_8201", ALPHA_8201, XTAL_10MHz/4/8)
MCFG_QUANTUM_PERFECT_CPU("maincpu")
MCFG_WATCHDOG_VBLANK_INIT(16) // assuming it's the same as champbas
@ -450,10 +447,7 @@ ROM_START( shougi )
ROM_LOAD( "7.3h", 0x4000, 0x1000, CRC(7ea8ec4a) SHA1(d3b999a683f49c911871d0ae6bb2022e73e3cfb8) )
/* shougi has one socket empty */
ROM_REGION( 0x2000, "mcu", 0 )
ROM_LOAD( "alpha-8201__44801a75__2f25.bin", 0x0000, 0x2000, CRC(b77931ac) SHA1(405b02585e80d95a2821455538c5c2c31ce262d1) )
ROM_REGION( 0x2000, "prot:mcu", 0 )
ROM_REGION( 0x2000, "alpha_8201:mcu", 0 )
ROM_LOAD( "alpha-8201__44801a75__2f25.bin", 0x0000, 0x2000, CRC(b77931ac) SHA1(405b02585e80d95a2821455538c5c2c31ce262d1) )
ROM_REGION( 0x0020, "proms", 0 )
@ -476,10 +470,7 @@ ROM_START( shougi2 )
ROM_LOAD( "7-2.3h", 0x4000, 0x1000, CRC(5f37ebc6) SHA1(2e5c4c2f455979e2ad2c66c5aa9f4d92194796af) )
ROM_LOAD( "10-2.3l", 0x5000, 0x1000, CRC(a26385fd) SHA1(2adb21bb4f67a378014bc1edda48daca349d17e1) )
ROM_REGION( 0x2000, "mcu", 0 )
ROM_LOAD( "alpha-8201__44801a75__2f25.bin", 0x0000, 0x2000, CRC(b77931ac) SHA1(405b02585e80d95a2821455538c5c2c31ce262d1) )
ROM_REGION( 0x2000, "prot:mcu", 0 )
ROM_REGION( 0x2000, "alpha_8201:mcu", 0 )
ROM_LOAD( "alpha-8201__44801a75__2f25.bin", 0x0000, 0x2000, CRC(b77931ac) SHA1(405b02585e80d95a2821455538c5c2c31ce262d1) )
ROM_REGION( 0x0020, "proms", 0 )

92
src/mame/machine/alpha8201.c
View File

@ -31,6 +31,7 @@ alpha_8201_device::alpha_8201_device(const machine_config &mconfig, const char *
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
@ -38,15 +39,32 @@ alpha_8201_device::alpha_8201_device(const machine_config &mconfig, const char *
void alpha_8201_device::device_start()
{
m_shared_ram = auto_alloc_array_clear(machine(), UINT8, 0x400);
// zerofill
m_dir = 0;
m_mcu_address = 0;
m_mcu_d = 0;
memset(m_mcu_r, 0, sizeof(m_mcu_r));
// register for savestates
save_pointer(NAME(m_shared_ram), 0x400);
save_item(NAME(m_dir));
save_item(NAME(m_mcu_address));
save_item(NAME(m_mcu_d));
save_item(NAME(m_mcu_r));
}
// machine config additions
static MACHINE_CONFIG_FRAGMENT(alpha8201)
MCFG_CPU_ADD("mcu", HD44801, DERIVED_CLOCK(1,1))
MCFG_CPU_ADD("mcu", HD44801, DERIVED_CLOCK(1,1)) // 8H
MCFG_HMCS40_READ_R_CB(0, READ8(alpha_8201_device, mcu_data_r))
MCFG_HMCS40_READ_R_CB(1, READ8(alpha_8201_device, mcu_data_r))
MCFG_HMCS40_WRITE_R_CB(0, WRITE8(alpha_8201_device, mcu_data_w))
MCFG_HMCS40_WRITE_R_CB(1, WRITE8(alpha_8201_device, mcu_data_w))
MCFG_HMCS40_WRITE_R_CB(2, WRITE8(alpha_8201_device, mcu_data_w))
MCFG_HMCS40_WRITE_R_CB(3, WRITE8(alpha_8201_device, mcu_data_w))
MCFG_HMCS40_WRITE_D_CB(WRITE16(alpha_8201_device, mcu_d_w))
MACHINE_CONFIG_END
machine_config_constructor alpha_8201_device::device_mconfig_additions() const
@ -54,22 +72,70 @@ machine_config_constructor alpha_8201_device::device_mconfig_additions() const
return MACHINE_CONFIG_NAME(alpha8201);
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void alpha_8201_device::device_reset()
{
m_dir = 0;
m_mcu->set_input_line(0, CLEAR_LINE);
}
/***************************************************************************
Internal I/O
***************************************************************************/
void alpha_8201_device::mcu_writeram()
{
// RAM WR is level-triggered
if (m_dir && (m_mcu_d & 0xc) == 0xc)
m_shared_ram[m_mcu_address] = m_mcu_r[0] << 4 | m_mcu_r[1];
}
void alpha_8201_device::mcu_update_address()
{
m_mcu_address = (m_mcu_d << 8 & 0x300) | m_mcu_r[2] << 4 | m_mcu_r[3];
mcu_writeram();
}
READ8_MEMBER(alpha_8201_device::mcu_data_r)
{
UINT8 ret = 0;
if (m_dir && ~m_mcu_d & 4)
ret = m_shared_ram[m_mcu_address];
// else
// logerror("1\n");
if (offset == HMCS40_PORT_R0X)
ret >>= 4;
return ret & 0xf;
}
WRITE8_MEMBER(alpha_8201_device::mcu_data_w)
{
// R0,R1: RAM data
// R2,R3: RAM A0-A7
m_mcu_r[offset] = data & 0xf;
mcu_update_address();
}
WRITE16_MEMBER(alpha_8201_device::mcu_d_w)
{
// D0,D1: RAM A8,A9
// D2: _RD
// D3: WR
m_mcu_d = data;
mcu_update_address();
}
/***************************************************************************
@ -77,3 +143,27 @@ void alpha_8201_device::device_reset()
I/O for External Interface
***************************************************************************/
WRITE_LINE_MEMBER(alpha_8201_device::bus_dir_w)
{
// set bus direction to 0: external, 1: MCU side
m_dir = (state) ? 1 : 0;
mcu_writeram();
}
WRITE_LINE_MEMBER(alpha_8201_device::mcu_start_w)
{
// connected to MCU INT0
m_mcu->set_input_line(0, (state) ? ASSERT_LINE : CLEAR_LINE);
}
READ8_MEMBER(alpha_8201_device::main_ram_r)
{
return m_shared_ram[offset & 0x3ff];
}
WRITE8_MEMBER(alpha_8201_device::main_ram_w)
{
if (!m_dir)
m_shared_ram[offset & 0x3ff] = data;
}

19
src/mame/machine/alpha8201.h
View File

@ -17,6 +17,16 @@ public:
alpha_8201_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~alpha_8201_device() {}
DECLARE_READ8_MEMBER(mcu_data_r);
DECLARE_WRITE8_MEMBER(mcu_data_w);
DECLARE_WRITE16_MEMBER(mcu_d_w);
// external I/O
DECLARE_WRITE_LINE_MEMBER(bus_dir_w);
DECLARE_WRITE_LINE_MEMBER(mcu_start_w);
DECLARE_READ8_MEMBER(main_ram_r);
DECLARE_WRITE8_MEMBER(main_ram_w);
protected:
// device-level overrides
virtual void device_start();
@ -28,7 +38,14 @@ private:
required_device<cpu_device> m_mcu;
// internal state
UINT8* m_shared_ram;
int m_dir; // shared RAM bus direction
UINT16 m_mcu_address; // MCU side RAM address
UINT16 m_mcu_d; // MCU D output data
UINT8 m_mcu_r[4]; // MCU R0-R3 output data
UINT8* m_shared_ram; // 1KB RAM
void mcu_update_address();
void mcu_writeram();
};