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some memconv.h and devconv.h usage removal (nw)

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This commit is contained in:
Miodrag Milanovic 2012-05-24 11:47:20 +00:00
parent 536f20a903
commit ab5fd7ef46
12 changed files with 9 additions and 144 deletions
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16
src/mame/drivers/calchase.c
View File

@ -109,8 +109,6 @@ something wrong in the disk geometry reported by calchase.chd (20,255,63) since
#include "emu.h"
#include "cpu/i386/i386.h"
#include "memconv.h"
#include "devconv.h"
#include "machine/8237dma.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
@ -175,18 +173,6 @@ static WRITE8_DEVICE_HANDLER(at_dma8237_2_w)
i8237_w(device, offset / 2, data);
}
static READ32_DEVICE_HANDLER(at32_dma8237_2_r)
{
return read32le_with_read8_device_handler(at_dma8237_2_r, device, offset, mem_mask);
}
static WRITE32_DEVICE_HANDLER(at32_dma8237_2_w)
{
write32le_with_write8_device_handler(at_dma8237_2_w, device, offset, data, mem_mask);
}
READ8_MEMBER(calchase_state::at_page8_r)
{
UINT8 data = m_at_pages[offset % 0x10];
@ -566,7 +552,7 @@ static ADDRESS_MAP_START( calchase_io, AS_IO, 32, calchase_state )
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff)
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
//AM_RANGE(0x00e8, 0x00eb) AM_NOP
AM_RANGE(0x00e8, 0x00ef) AM_NOP //AMI BIOS write to this ports as delays between I/O ports operations sending al value -> NEWIODELAY
AM_RANGE(0x0170, 0x0177) AM_NOP //To debug

17
src/mame/drivers/funkball.c
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@ -69,8 +69,6 @@ Notes:
#include "emu.h"
#include "cpu/i386/i386.h"
#include "memconv.h"
#include "devconv.h"
#include "machine/8237dma.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
@ -326,19 +324,6 @@ static WRITE8_DEVICE_HANDLER(at_dma8237_2_w)
i8237_w(device, offset / 2, data);
}
static READ32_DEVICE_HANDLER(at32_dma8237_2_r)
{
return read32le_with_read8_device_handler(at_dma8237_2_r, device, offset, mem_mask);
}
static WRITE32_DEVICE_HANDLER(at32_dma8237_2_w)
{
write32le_with_write8_device_handler(at_dma8237_2_w, device, offset, data, mem_mask);
}
static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed )
{
cputag_set_input_line(device->machine(), "maincpu", INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
@ -589,7 +574,7 @@ static ADDRESS_MAP_START(funkball_io, AS_IO, 32, funkball_state)
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r,at_page8_w, 0xffffffff)
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
AM_RANGE(0x00e8, 0x00ef) AM_NOP
// AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w)

16
src/mame/drivers/gamecstl.c
View File

@ -64,8 +64,6 @@
#include "emu.h"
#include "cpu/i386/i386.h"
#include "memconv.h"
#include "devconv.h"
#include "machine/8237dma.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
@ -184,18 +182,6 @@ static WRITE8_DEVICE_HANDLER(at_dma8237_2_w)
i8237_w(device, offset / 2, data);
}
static READ32_DEVICE_HANDLER(at32_dma8237_2_r)
{
return read32le_with_read8_device_handler(at_dma8237_2_r, device, offset, mem_mask);
}
static WRITE32_DEVICE_HANDLER(at32_dma8237_2_w)
{
write32le_with_write8_device_handler(at_dma8237_2_w, device, offset, data, mem_mask);
}
// Intel 82439TX System Controller (MXTC)
static UINT8 mxtc_config_r(device_t *busdevice, device_t *device, int function, int reg)
@ -526,7 +512,7 @@ static ADDRESS_MAP_START(gamecstl_io, AS_IO, 32, gamecstl_state )
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff)
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r,at_page8_w, 0xffffffff)
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
AM_RANGE(0x00e8, 0x00eb) AM_NOP
AM_RANGE(0x00ec, 0x00ef) AM_NOP
AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w)

1
src/mame/drivers/mediagx.c
View File

@ -66,7 +66,6 @@
#include "emu.h"
#include "cpu/i386/i386.h"
#include "devconv.h"
#include "machine/8237dma.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"

17
src/mame/drivers/midqslvr.c
View File

@ -24,8 +24,6 @@
#include "emu.h"
#include "cpu/i386/i386.h"
#include "memconv.h"
#include "devconv.h"
#include "machine/8237dma.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
@ -454,19 +452,6 @@ static WRITE8_DEVICE_HANDLER(at_dma8237_2_w)
i8237_w(device, offset / 2, data);
}
static READ32_DEVICE_HANDLER(at32_dma8237_2_r)
{
return read32le_with_read8_device_handler(at_dma8237_2_r, device, offset, mem_mask);
}
static WRITE32_DEVICE_HANDLER(at32_dma8237_2_w)
{
write32le_with_write8_device_handler(at_dma8237_2_w, device, offset, data, mem_mask);
}
static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed )
{
cputag_set_input_line(device->machine(), "maincpu", INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
@ -549,7 +534,7 @@ static ADDRESS_MAP_START(midqslvr_io, AS_IO, 32, midqslvr_state)
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r,at_page8_w,0xffffffff)
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
AM_RANGE(0x00e8, 0x00ef) AM_NOP
AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w)

2
src/mame/drivers/photoply.c
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@ -11,8 +11,6 @@ TODO:
#include "emu.h"
#include "cpu/i386/i386.h"
#include "memconv.h"
#include "devconv.h"
#include "machine/8237dma.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"

17
src/mame/drivers/queen.c
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@ -34,8 +34,6 @@ processor speed is 533MHz <- likely to be a Celeron or a Pentium III class CPU -
#include "emu.h"
#include "cpu/i386/i386.h"
#include "memconv.h"
#include "devconv.h"
#include "machine/8237dma.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
@ -439,19 +437,6 @@ static WRITE8_DEVICE_HANDLER(at_dma8237_2_w)
i8237_w(device, offset / 2, data);
}
static READ32_DEVICE_HANDLER(at32_dma8237_2_r)
{
return read32le_with_read8_device_handler(at_dma8237_2_r, device, offset, mem_mask);
}
static WRITE32_DEVICE_HANDLER(at32_dma8237_2_w)
{
write32le_with_write8_device_handler(at_dma8237_2_w, device, offset, data, mem_mask);
}
static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed )
{
cputag_set_input_line(device->machine(), "maincpu", INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
@ -533,7 +518,7 @@ static ADDRESS_MAP_START( queen_io, AS_IO, 32, queen_state )
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff)
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
AM_RANGE(0x00e8, 0x00ef) AM_NOP
AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w)

17
src/mame/drivers/savquest.c
View File

@ -27,8 +27,6 @@
#include "emu.h"
#include "cpu/i386/i386.h"
#include "memconv.h"
#include "devconv.h"
#include "machine/8237dma.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
@ -316,19 +314,6 @@ static WRITE8_DEVICE_HANDLER(at_dma8237_2_w)
i8237_w(device, offset / 2, data);
}
static READ32_DEVICE_HANDLER(at32_dma8237_2_r)
{
return read32le_with_read8_device_handler(at_dma8237_2_r, device, offset, mem_mask);
}
static WRITE32_DEVICE_HANDLER(at32_dma8237_2_w)
{
write32le_with_write8_device_handler(at_dma8237_2_w, device, offset, data, mem_mask);
}
static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed )
{
cputag_set_input_line(device->machine(), "maincpu", INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
@ -408,7 +393,7 @@ static ADDRESS_MAP_START(savquest_io, AS_IO, 32, savquest_state)
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff)
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
AM_RANGE(0x00e8, 0x00ef) AM_NOP
AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w)

1
src/mame/drivers/seta2.c
View File

@ -99,7 +99,6 @@ reelquak:
***************************************************************************/
#include "emu.h"
#include "memconv.h"
#include "includes/seta2.h"
#include "cpu/m68000/m68000.h"
#include "machine/tmp68301.h"

16
src/mame/drivers/taitowlf.c
View File

@ -27,8 +27,6 @@ clocks 50MHz (near 3DFX) and 14.31818MHz (near RAMDAC)
#include "emu.h"
#include "cpu/i386/i386.h"
#include "memconv.h"
#include "devconv.h"
#include "machine/8237dma.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
@ -111,18 +109,6 @@ static WRITE8_DEVICE_HANDLER(at_dma8237_2_w)
i8237_w(device, offset / 2, data);
}
static READ32_DEVICE_HANDLER(at32_dma8237_2_r)
{
return read32le_with_read8_device_handler(at_dma8237_2_r, device, offset, mem_mask);
}
static WRITE32_DEVICE_HANDLER(at32_dma8237_2_w)
{
write32le_with_write8_device_handler(at_dma8237_2_w, device, offset, data, mem_mask);
}
// Intel 82439TX System Controller (MXTC)
static UINT8 mxtc_config_r(device_t *busdevice, device_t *device, int function, int reg)
@ -470,7 +456,7 @@ static ADDRESS_MAP_START(taitowlf_io, AS_IO, 32, taitowlf_state )
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff)
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff)
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
AM_RANGE(0x00e8, 0x00eb) AM_NOP
AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w)
AM_RANGE(0x0300, 0x03af) AM_NOP

16
src/mame/drivers/voyager.c
View File

@ -14,8 +14,6 @@ TODO: VIA KT133a chipset support, GeForce 2MX video support, lots of things ;-)
#include "emu.h"
#include "cpu/i386/i386.h"
#include "memconv.h"
#include "devconv.h"
#include "machine/8237dma.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
@ -71,18 +69,6 @@ static WRITE8_DEVICE_HANDLER(at_dma8237_2_w)
i8237_w(device, offset / 2, data);
}
static READ32_DEVICE_HANDLER(at32_dma8237_2_r)
{
return read32le_with_read8_device_handler(at_dma8237_2_r, device, offset, mem_mask);
}
static WRITE32_DEVICE_HANDLER(at32_dma8237_2_w)
{
write32le_with_write8_device_handler(at_dma8237_2_w, device, offset, data, mem_mask);
}
READ8_MEMBER(voyager_state::at_page8_r)
{
UINT8 data = m_at_pages[offset % 0x10];
@ -421,7 +407,7 @@ static ADDRESS_MAP_START( voyager_io, AS_IO, 32, voyager_state )
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff)
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
//AM_RANGE(0x00e8, 0x00eb) AM_NOP
AM_RANGE(0x00e8, 0x00ef) AM_NOP //AMI BIOS write to this ports as delays between I/O ports operations sending al value -> NEWIODELAY
AM_RANGE(0x0170, 0x0177) AM_NOP //To debug

17
src/mame/drivers/xtom3d.c
View File

@ -40,8 +40,6 @@ MX29F1610MC 16M FlashROM (x7)
#include "emu.h"
#include "cpu/i386/i386.h"
#include "memconv.h"
#include "devconv.h"
#include "machine/8237dma.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
@ -446,19 +444,6 @@ static WRITE8_DEVICE_HANDLER(at_dma8237_2_w)
i8237_w(device, offset / 2, data);
}
static READ32_DEVICE_HANDLER(at32_dma8237_2_r)
{
return read32le_with_read8_device_handler(at_dma8237_2_r, device, offset, mem_mask);
}
static WRITE32_DEVICE_HANDLER(at32_dma8237_2_w)
{
write32le_with_write8_device_handler(at_dma8237_2_w, device, offset, data, mem_mask);
}
static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed )
{
cputag_set_input_line(device->machine(), "maincpu", INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
@ -540,7 +525,7 @@ static ADDRESS_MAP_START(xtom3d_io, AS_IO, 32, xtom3d_state)
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff) /* todo: nvram (CMOS Setup Save)*/
AM_RANGE(0x0080, 0x009f) AM_READWRITE8(at_page8_r, at_page8_w, 0xffffffff)
AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE8_LEGACY("dma8237_2", at_dma8237_2_r, at_dma8237_2_w, 0xffffffff)
AM_RANGE(0x00e8, 0x00ef) AM_NOP
AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w)