Cleanups and version bump.
This commit is contained in:
Aaron Giles
parent
ee50133db6
commit
ab7d486957
@ -1706,7 +1706,7 @@ static astring *quote_astring_expression(astring *string, int isattribute)
|
|||||||
astring_replacec(string, 0, " <", " lt ");
|
astring_replacec(string, 0, " <", " lt ");
|
||||||
astring_replacec(string, 0, "< ", " lt ");
|
astring_replacec(string, 0, "< ", " lt ");
|
||||||
astring_replacec(string, 0, "<", " lt ");
|
astring_replacec(string, 0, "<", " lt ");
|
||||||
|
|
||||||
astring_replacec(string, 0, " << ", " lshift ");
|
astring_replacec(string, 0, " << ", " lshift ");
|
||||||
astring_replacec(string, 0, " <<", " lshift ");
|
astring_replacec(string, 0, " <<", " lshift ");
|
||||||
astring_replacec(string, 0, "<< ", " lshift ");
|
astring_replacec(string, 0, "<< ", " lshift ");
|
||||||
|
|||||||
@ -310,22 +310,22 @@ static int h8_get_priority(h83xx_state *h8, UINT8 bit)
|
|||||||
if (h8->per_regs[0xF8]&0x10) res = 1; break;
|
if (h8->per_regs[0xF8]&0x10) res = 1; break;
|
||||||
case 53: // SCI0 Rx
|
case 53: // SCI0 Rx
|
||||||
if (!(h8->per_regs[0xB2]&0x40)) res = -2;
|
if (!(h8->per_regs[0xB2]&0x40)) res = -2;
|
||||||
else if (h8->per_regs[0xF9]&0x08) res = 1; break;
|
else if (h8->per_regs[0xF9]&0x08) res = 1; break;
|
||||||
case 54: // SCI0 Tx Empty
|
case 54: // SCI0 Tx Empty
|
||||||
if (!(h8->per_regs[0xB2]&0x80)) res = -2;
|
if (!(h8->per_regs[0xB2]&0x80)) res = -2;
|
||||||
else if (h8->per_regs[0xF9]&0x08) res = 1; break;
|
else if (h8->per_regs[0xF9]&0x08) res = 1; break;
|
||||||
case 55: // SCI0 Tx End
|
case 55: // SCI0 Tx End
|
||||||
if (!(h8->per_regs[0xB2]&0x04)) res = -2;
|
if (!(h8->per_regs[0xB2]&0x04)) res = -2;
|
||||||
else if (h8->per_regs[0xF9]&0x08) res = 1; break;
|
else if (h8->per_regs[0xF9]&0x08) res = 1; break;
|
||||||
case 57: // SCI1 Rx
|
case 57: // SCI1 Rx
|
||||||
if (!(h8->per_regs[0xBA]&0x40)) res = -2;
|
if (!(h8->per_regs[0xBA]&0x40)) res = -2;
|
||||||
else if (h8->per_regs[0xF9]&0x04) res = 1; break;
|
else if (h8->per_regs[0xF9]&0x04) res = 1; break;
|
||||||
case 58: // SCI1 Tx Empty
|
case 58: // SCI1 Tx Empty
|
||||||
if (!(h8->per_regs[0xBA]&0x80)) res = -2;
|
if (!(h8->per_regs[0xBA]&0x80)) res = -2;
|
||||||
else if (h8->per_regs[0xF9]&0x04) res = 1; break;
|
else if (h8->per_regs[0xF9]&0x04) res = 1; break;
|
||||||
case 59: // SCI1 Tx End
|
case 59: // SCI1 Tx End
|
||||||
if (!(h8->per_regs[0xBA]&0x04)) res = -2;
|
if (!(h8->per_regs[0xBA]&0x04)) res = -2;
|
||||||
else if (h8->per_regs[0xF9]&0x04) res = 1; break;
|
else if (h8->per_regs[0xF9]&0x04) res = 1; break;
|
||||||
}
|
}
|
||||||
return res;
|
return res;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -296,7 +296,7 @@ static void h8_GenException(h83xx_state *h8, UINT8 vectornr)
|
|||||||
if (h8->h8uiflag == 0)
|
if (h8->h8uiflag == 0)
|
||||||
h8_set_ccr(h8, h8_get_ccr(h8) | 0x40);
|
h8_set_ccr(h8, h8_get_ccr(h8) | 0x40);
|
||||||
h8->pc = h8_mem_read16(h8, vectornr * 2) & 0xffff;
|
h8->pc = h8_mem_read16(h8, vectornr * 2) & 0xffff;
|
||||||
|
|
||||||
// these timings are still approximations but much better than before
|
// these timings are still approximations but much better than before
|
||||||
H8_IFETCH_TIMING(8); // 24 cycles
|
H8_IFETCH_TIMING(8); // 24 cycles
|
||||||
H8_STACK_TIMING(3); // 12 cycles
|
H8_STACK_TIMING(3); // 12 cycles
|
||||||
@ -406,7 +406,7 @@ static void recalc_8bit_timer(h83xx_state *h8, int t)
|
|||||||
|
|
||||||
// if "no clock source", stop
|
// if "no clock source", stop
|
||||||
if (div < 2)
|
if (div < 2)
|
||||||
{
|
{
|
||||||
timer_adjust_oneshot(h8->timer[(t*2)], attotime_never, 0);
|
timer_adjust_oneshot(h8->timer[(t*2)], attotime_never, 0);
|
||||||
timer_adjust_oneshot(h8->timer[(t*2)+1], attotime_never, 0);
|
timer_adjust_oneshot(h8->timer[(t*2)+1], attotime_never, 0);
|
||||||
return;
|
return;
|
||||||
@ -463,7 +463,7 @@ static void timer_8bit_expire(h83xx_state *h8, int t, int sel)
|
|||||||
|
|
||||||
case 3: // clear on external reset input signal (not implemented)
|
case 3: // clear on external reset input signal (not implemented)
|
||||||
logerror("H8: external reset not implemented for 8-bit timers\n");
|
logerror("H8: external reset not implemented for 8-bit timers\n");
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -1923,13 +1923,13 @@ static void h8_group7(h83xx_state *h8, UINT16 opcode)
|
|||||||
bitnr = (ext16>>4)&7;
|
bitnr = (ext16>>4)&7;
|
||||||
h8_btst8(h8, bitnr, udata8);
|
h8_btst8(h8, bitnr, udata8);
|
||||||
break;
|
break;
|
||||||
// bld.b #imm, @Rn
|
// bld.b #imm, @Rn
|
||||||
case 0x77:
|
case 0x77:
|
||||||
udata16 = h8_mem_read16(h8, h8->pc);
|
udata16 = h8_mem_read16(h8, h8->pc);
|
||||||
h8->pc += 2;
|
h8->pc += 2;
|
||||||
dstreg = (opcode>>4) & 7;
|
dstreg = (opcode>>4) & 7;
|
||||||
h8_bld8(h8, (udata16>>4) & 7, h8_mem_read8(h8_getreg16(h8, dstreg)));
|
h8_bld8(h8, (udata16>>4) & 7, h8_mem_read8(h8_getreg16(h8, dstreg)));
|
||||||
H8_IFETCH_TIMING(1);
|
H8_IFETCH_TIMING(1);
|
||||||
H8_WORD_TIMING(1, h8_getreg16(h8, dstreg));
|
H8_WORD_TIMING(1, h8_getreg16(h8, dstreg));
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
|||||||
@ -666,7 +666,7 @@ static CPU_RESET( m68k )
|
|||||||
m68ki_jump(m68k, REG_PC);
|
m68ki_jump(m68k, REG_PC);
|
||||||
|
|
||||||
m68k->run_mode = RUN_MODE_NORMAL;
|
m68k->run_mode = RUN_MODE_NORMAL;
|
||||||
|
|
||||||
m68k->reset_cycles = m68k->cyc_exception[EXCEPTION_RESET];
|
m68k->reset_cycles = m68k->cyc_exception[EXCEPTION_RESET];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -147,7 +147,7 @@ static CPU_INIT( mb88 )
|
|||||||
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
|
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
|
||||||
cpustate->data = memory_find_address_space(device, ADDRESS_SPACE_DATA);
|
cpustate->data = memory_find_address_space(device, ADDRESS_SPACE_DATA);
|
||||||
cpustate->io = memory_find_address_space(device, ADDRESS_SPACE_IO);
|
cpustate->io = memory_find_address_space(device, ADDRESS_SPACE_IO);
|
||||||
|
|
||||||
cpustate->serial = timer_alloc(device->machine, serial_timer, (void *)device);
|
cpustate->serial = timer_alloc(device->machine, serial_timer, (void *)device);
|
||||||
|
|
||||||
state_save_register_device_item(device, 0, cpustate->PC);
|
state_save_register_device_item(device, 0, cpustate->PC);
|
||||||
@ -212,18 +212,18 @@ static TIMER_CALLBACK( serial_timer )
|
|||||||
mb88_state *cpustate = get_safe_token((const device_config *)ptr);
|
mb88_state *cpustate = get_safe_token((const device_config *)ptr);
|
||||||
|
|
||||||
cpustate->SBcount++;
|
cpustate->SBcount++;
|
||||||
|
|
||||||
/* if we get too many interrupts with no servicing, disable the timer
|
/* if we get too many interrupts with no servicing, disable the timer
|
||||||
until somebody does something */
|
until somebody does something */
|
||||||
if (cpustate->SBcount >= SERIAL_DISABLE_THRESH)
|
if (cpustate->SBcount >= SERIAL_DISABLE_THRESH)
|
||||||
timer_adjust_oneshot(cpustate->serial, attotime_never, 0);
|
timer_adjust_oneshot(cpustate->serial, attotime_never, 0);
|
||||||
|
|
||||||
/* only read if not full; this is needed by the Namco 52xx to ensure that
|
/* only read if not full; this is needed by the Namco 52xx to ensure that
|
||||||
the program can write to S and recover the value even if serial is enabled */
|
the program can write to S and recover the value even if serial is enabled */
|
||||||
if (!cpustate->sf)
|
if (!cpustate->sf)
|
||||||
{
|
{
|
||||||
cpustate->SB = (cpustate->SB >> 1) | (READPORT(MB88_PORTSI) ? 8 : 0);
|
cpustate->SB = (cpustate->SB >> 1) | (READPORT(MB88_PORTSI) ? 8 : 0);
|
||||||
|
|
||||||
if (cpustate->SBcount >= 4)
|
if (cpustate->SBcount >= 4)
|
||||||
{
|
{
|
||||||
cpustate->sf = 1;
|
cpustate->sf = 1;
|
||||||
@ -266,7 +266,7 @@ static void update_pio_enable( mb88_state *cpustate, UINT8 newpio )
|
|||||||
else
|
else
|
||||||
fatalerror("mb88xx: update_pio_enable set serial enable to unsupported value %02X\n", newpio & 0x30);
|
fatalerror("mb88xx: update_pio_enable set serial enable to unsupported value %02X\n", newpio & 0x30);
|
||||||
}
|
}
|
||||||
|
|
||||||
cpustate->pio = newpio;
|
cpustate->pio = newpio;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -327,7 +327,7 @@ void mb88_external_clock_w(const device_config *device, int state)
|
|||||||
if (state != cpustate->ctr)
|
if (state != cpustate->ctr)
|
||||||
{
|
{
|
||||||
cpustate->ctr = state;
|
cpustate->ctr = state;
|
||||||
|
|
||||||
/* on a falling clock, increment the timer, but only if enabled */
|
/* on a falling clock, increment the timer, but only if enabled */
|
||||||
if (cpustate->ctr == 0 && (cpustate->pio & 0x40))
|
if (cpustate->ctr == 0 && (cpustate->pio & 0x40))
|
||||||
increment_timer(cpustate);
|
increment_timer(cpustate);
|
||||||
|
|||||||
@ -612,13 +612,13 @@ static void ppc403_spu_w(UINT32 a, UINT8 d)
|
|||||||
if (ppc.spu.sprc & 0x80) /* enable RX */
|
if (ppc.spu.sprc & 0x80) /* enable RX */
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
int baud_rate;
|
int baud_rate;
|
||||||
if (ppc.iocr & 0x2) {
|
if (ppc.iocr & 0x2) {
|
||||||
baud_rate = (3686400 / (ppc.spu.brd + 1)) / 16;
|
baud_rate = (3686400 / (ppc.spu.brd + 1)) / 16;
|
||||||
} else {
|
} else {
|
||||||
baud_rate = (33333333 / (ppc.spu.brd + 1)) / 16;
|
baud_rate = (33333333 / (ppc.spu.brd + 1)) / 16;
|
||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* check if serial port is hooked to a DMA channel */
|
/* check if serial port is hooked to a DMA channel */
|
||||||
/* if so, do a DMA operation */
|
/* if so, do a DMA operation */
|
||||||
|
|||||||
@ -890,7 +890,7 @@ static EXPRERR parse_string_into_tokens(const char *stringstart, parsed_expressi
|
|||||||
else if (strcmp(buffer, "lshift") == 0)
|
else if (strcmp(buffer, "lshift") == 0)
|
||||||
SET_TOKEN_INFO(0, TOK_OPERATOR, TVL_LSHIFT, TIN_PRECEDENCE_5);
|
SET_TOKEN_INFO(0, TOK_OPERATOR, TVL_LSHIFT, TIN_PRECEDENCE_5);
|
||||||
else if (strcmp(buffer, "rshift") == 0)
|
else if (strcmp(buffer, "rshift") == 0)
|
||||||
SET_TOKEN_INFO(0, TOK_OPERATOR, TVL_RSHIFT, TIN_PRECEDENCE_5);
|
SET_TOKEN_INFO(0, TOK_OPERATOR, TVL_RSHIFT, TIN_PRECEDENCE_5);
|
||||||
|
|
||||||
/* process anything else as a number or string */
|
/* process anything else as a number or string */
|
||||||
else
|
else
|
||||||
|
|||||||
@ -1313,7 +1313,7 @@ void mame_parse_ini_files(core_options *options, const game_driver *driver)
|
|||||||
const device_config *device;
|
const device_config *device;
|
||||||
machine_config *config;
|
machine_config *config;
|
||||||
astring *sourcename;
|
astring *sourcename;
|
||||||
|
|
||||||
/* parse "vertical.ini" or "horizont.ini" */
|
/* parse "vertical.ini" or "horizont.ini" */
|
||||||
if (driver->flags & ORIENTATION_SWAP_XY)
|
if (driver->flags & ORIENTATION_SWAP_XY)
|
||||||
parse_ini_file(options, "vertical");
|
parse_ini_file(options, "vertical");
|
||||||
|
|||||||
@ -110,7 +110,7 @@ void tlc34076_state_save(running_machine *machine)
|
|||||||
state_save_register_global_array(machine, local_paletteram);
|
state_save_register_global_array(machine, local_paletteram);
|
||||||
state_save_register_global_array(machine, regs);
|
state_save_register_global_array(machine, regs);
|
||||||
state_save_register_global_array(machine, pens);
|
state_save_register_global_array(machine, pens);
|
||||||
|
|
||||||
state_save_register_global(machine, writeindex);
|
state_save_register_global(machine, writeindex);
|
||||||
state_save_register_global(machine, readindex);
|
state_save_register_global(machine, readindex);
|
||||||
state_save_register_global(machine, dacbits);
|
state_save_register_global(machine, dacbits);
|
||||||
|
|||||||
@ -154,7 +154,7 @@ WRITE8_DEVICE_HANDLER( namco_52xx_write )
|
|||||||
timer_call_after_resynch(device->machine, (void *)device, data, namco_52xx_latch_callback);
|
timer_call_after_resynch(device->machine, (void *)device, data, namco_52xx_latch_callback);
|
||||||
|
|
||||||
cpu_set_input_line(state->cpu, 0, ASSERT_LINE);
|
cpu_set_input_line(state->cpu, 0, ASSERT_LINE);
|
||||||
|
|
||||||
// The execution time of one instruction is ~4us, so we must make sure to
|
// The execution time of one instruction is ~4us, so we must make sure to
|
||||||
// give the cpu time to poll the /IRQ input before we clear it.
|
// give the cpu time to poll the /IRQ input before we clear it.
|
||||||
// The input clock to the 06XX interface chip is 64H, that is
|
// The input clock to the 06XX interface chip is 64H, that is
|
||||||
@ -162,7 +162,7 @@ WRITE8_DEVICE_HANDLER( namco_52xx_write )
|
|||||||
// asserted for one clock cycle ~= 21us.
|
// asserted for one clock cycle ~= 21us.
|
||||||
|
|
||||||
/* the 52xx uses TSTI to check for an interrupt; it also may be handling
|
/* the 52xx uses TSTI to check for an interrupt; it also may be handling
|
||||||
a timer interrupt, so we need to ensure the IRQ line is held long enough */
|
a timer interrupt, so we need to ensure the IRQ line is held long enough */
|
||||||
timer_set(device->machine, ATTOTIME_IN_USEC(5*21), (void *)device, 0, namco_52xx_irq_clear);
|
timer_set(device->machine, ATTOTIME_IN_USEC(5*21), (void *)device, 0, namco_52xx_irq_clear);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -217,17 +217,17 @@ static DEVICE_START( namco_52xx )
|
|||||||
state->cpu = cputag_get_cpu(device->machine, device_build_tag(tempstring, device, "mcu"));
|
state->cpu = cputag_get_cpu(device->machine, device_build_tag(tempstring, device, "mcu"));
|
||||||
assert(state->cpu != NULL);
|
assert(state->cpu != NULL);
|
||||||
astring_free(tempstring);
|
astring_free(tempstring);
|
||||||
|
|
||||||
/* find the attached discrete sound device */
|
/* find the attached discrete sound device */
|
||||||
assert(intf->discrete != NULL);
|
assert(intf->discrete != NULL);
|
||||||
state->discrete = devtag_get_device(device->machine, intf->discrete);
|
state->discrete = devtag_get_device(device->machine, intf->discrete);
|
||||||
assert(state->discrete != NULL);
|
assert(state->discrete != NULL);
|
||||||
state->basenode = intf->firstnode;
|
state->basenode = intf->firstnode;
|
||||||
|
|
||||||
/* resolve our read/write callbacks */
|
/* resolve our read/write callbacks */
|
||||||
devcb_resolve_read8(&state->romread, &intf->romread, device);
|
devcb_resolve_read8(&state->romread, &intf->romread, device);
|
||||||
devcb_resolve_read8(&state->si, &intf->si, device);
|
devcb_resolve_read8(&state->si, &intf->si, device);
|
||||||
|
|
||||||
/* start the external clock */
|
/* start the external clock */
|
||||||
if (intf->extclock != 0)
|
if (intf->extclock != 0)
|
||||||
timer_pulse(device->machine, attotime_make(0, intf->extclock), (void *)device, 0, external_clock_pulse);
|
timer_pulse(device->machine, attotime_make(0, intf->extclock), (void *)device, 0, external_clock_pulse);
|
||||||
@ -240,7 +240,7 @@ static DEVICE_START( namco_52xx )
|
|||||||
|
|
||||||
static DEVICE_RESET( namco_52xx )
|
static DEVICE_RESET( namco_52xx )
|
||||||
{
|
{
|
||||||
// namco_52xx_state *state = get_safe_token(device);
|
// namco_52xx_state *state = get_safe_token(device);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -174,7 +174,7 @@ static DEVICE_START( namco_54xx )
|
|||||||
state->cpu = cputag_get_cpu(device->machine, device_build_tag(tempstring, device, "mcu"));
|
state->cpu = cputag_get_cpu(device->machine, device_build_tag(tempstring, device, "mcu"));
|
||||||
assert(state->cpu != NULL);
|
assert(state->cpu != NULL);
|
||||||
astring_free(tempstring);
|
astring_free(tempstring);
|
||||||
|
|
||||||
/* find the attached discrete sound device */
|
/* find the attached discrete sound device */
|
||||||
assert(config->discrete != NULL);
|
assert(config->discrete != NULL);
|
||||||
state->discrete = devtag_get_device(device->machine, config->discrete);
|
state->discrete = devtag_get_device(device->machine, config->discrete);
|
||||||
@ -189,7 +189,7 @@ static DEVICE_START( namco_54xx )
|
|||||||
|
|
||||||
static DEVICE_RESET( namco_54xx )
|
static DEVICE_RESET( namco_54xx )
|
||||||
{
|
{
|
||||||
// namco_54xx_state *state = get_safe_token(device);
|
// namco_54xx_state *state = get_safe_token(device);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -71,7 +71,7 @@ WRITE16_HANDLER( f3_volume_w )
|
|||||||
static TIMER_CALLBACK( taito_en_timer_callback )
|
static TIMER_CALLBACK( taito_en_timer_callback )
|
||||||
{
|
{
|
||||||
/* Only cause IRQ if the mask is set to allow it */
|
/* Only cause IRQ if the mask is set to allow it */
|
||||||
if (m68681_imr & 0x08)
|
if (m68681_imr & 0x08)
|
||||||
{
|
{
|
||||||
cpu_set_input_line_vector(cputag_get_cpu(machine, "audiocpu"), 6, vector_reg);
|
cpu_set_input_line_vector(cputag_get_cpu(machine, "audiocpu"), 6, vector_reg);
|
||||||
cputag_set_input_line(machine, "audiocpu", 6, ASSERT_LINE);
|
cputag_set_input_line(machine, "audiocpu", 6, ASSERT_LINE);
|
||||||
@ -86,7 +86,7 @@ void f3_68681_reset(running_machine *machine)
|
|||||||
|
|
||||||
READ16_HANDLER(f3_68681_r)
|
READ16_HANDLER(f3_68681_r)
|
||||||
{
|
{
|
||||||
if (offset == 0x05)
|
if (offset == 0x05)
|
||||||
{
|
{
|
||||||
int ret = imr_status;
|
int ret = imr_status;
|
||||||
imr_status = 0;
|
imr_status = 0;
|
||||||
@ -97,7 +97,7 @@ READ16_HANDLER(f3_68681_r)
|
|||||||
return 1;
|
return 1;
|
||||||
|
|
||||||
/* IRQ ack */
|
/* IRQ ack */
|
||||||
if (offset == 0x0f)
|
if (offset == 0x0f)
|
||||||
{
|
{
|
||||||
cputag_set_input_line(space->machine, "audiocpu", 6, CLEAR_LINE);
|
cputag_set_input_line(space->machine, "audiocpu", 6, CLEAR_LINE);
|
||||||
return 0;
|
return 0;
|
||||||
|
|||||||
@ -1698,12 +1698,12 @@ ROM_START( robocop )
|
|||||||
/*
|
/*
|
||||||
MB7116E at 12C on CPU board - Removing this causes all sprites to disappear
|
MB7116E at 12C on CPU board - Removing this causes all sprites to disappear
|
||||||
|
|
||||||
MB7124E at 12A on ROM Board (although the board
|
MB7124E at 12A on ROM Board (although the board
|
||||||
is screened as MB7130) - Removing this causes the
|
is screened as MB7130) - Removing this causes the
|
||||||
display to disappear, although coining up makes
|
display to disappear, although coining up makes
|
||||||
the correct text appear (and sound to play),
|
the correct text appear (and sound to play),
|
||||||
intro graphics appear on starting a game, then
|
intro graphics appear on starting a game, then
|
||||||
nothing, it won't even play blind (although the
|
nothing, it won't even play blind (although the
|
||||||
coin up sound still plays on coin insert)
|
coin up sound still plays on coin insert)
|
||||||
*/
|
*/
|
||||||
ROM_REGION( 0xc00, "proms", 0 ) /* PROMs */
|
ROM_REGION( 0xc00, "proms", 0 ) /* PROMs */
|
||||||
|
|||||||
@ -905,7 +905,7 @@ static MACHINE_RESET( galaga )
|
|||||||
{
|
{
|
||||||
/* Reset all latches */
|
/* Reset all latches */
|
||||||
bosco_latch_reset(machine);
|
bosco_latch_reset(machine);
|
||||||
|
|
||||||
timer_adjust_oneshot(cpu3_interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, 64, 0), 64);
|
timer_adjust_oneshot(cpu3_interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, 64, 0), 64);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1089,7 +1089,7 @@ static INPUT_PORTS_START( bosco )
|
|||||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) )
|
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) )
|
||||||
PORT_DIPSETTING( 0x80, DEF_STR( Upright ) )
|
PORT_DIPSETTING( 0x80, DEF_STR( Upright ) )
|
||||||
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
|
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
|
||||||
|
|
||||||
PORT_START("DSWB")
|
PORT_START("DSWB")
|
||||||
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) )
|
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) )
|
||||||
PORT_DIPSETTING( 0x01, DEF_STR( 4C_1C ) )
|
PORT_DIPSETTING( 0x01, DEF_STR( 4C_1C ) )
|
||||||
@ -1668,7 +1668,7 @@ static MACHINE_DRIVER_START( bosco )
|
|||||||
|
|
||||||
MDRV_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
|
MDRV_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
|
||||||
MDRV_CPU_PROGRAM_MAP(bosco_map)
|
MDRV_CPU_PROGRAM_MAP(bosco_map)
|
||||||
|
|
||||||
MDRV_NAMCO_50XX_ADD("50xx_1", MASTER_CLOCK/12) /* 1.536 MHz */
|
MDRV_NAMCO_50XX_ADD("50xx_1", MASTER_CLOCK/12) /* 1.536 MHz */
|
||||||
MDRV_NAMCO_50XX_ADD("50xx_2", MASTER_CLOCK/12) /* 1.536 MHz */
|
MDRV_NAMCO_50XX_ADD("50xx_2", MASTER_CLOCK/12) /* 1.536 MHz */
|
||||||
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/12, namco_51xx_intf) /* 1.536 MHz */
|
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/12, namco_51xx_intf) /* 1.536 MHz */
|
||||||
|
|||||||
@ -216,7 +216,7 @@ static ADDRESS_MAP_START( ncb3_map, ADDRESS_SPACE_PROGRAM, 8 )
|
|||||||
AM_RANGE(0xf810, 0xf813) AM_DEVREADWRITE("ppi8255_1", ppi8255_r, ppi8255_w) /* Input Ports */
|
AM_RANGE(0xf810, 0xf813) AM_DEVREADWRITE("ppi8255_1", ppi8255_r, ppi8255_w) /* Input Ports */
|
||||||
AM_RANGE(0xf822, 0xf822) AM_WRITE(goldstar_fa00_w) // hack (connected to ppi output port?, needed for colour banking)
|
AM_RANGE(0xf822, 0xf822) AM_WRITE(goldstar_fa00_w) // hack (connected to ppi output port?, needed for colour banking)
|
||||||
AM_RANGE(0xf820, 0xf823) AM_DEVREADWRITE("ppi8255_2", ppi8255_r, ppi8255_w) /* Input/Output Ports */
|
AM_RANGE(0xf820, 0xf823) AM_DEVREADWRITE("ppi8255_2", ppi8255_r, ppi8255_w) /* Input/Output Ports */
|
||||||
|
|
||||||
AM_RANGE(0xf830, 0xf830) AM_DEVREADWRITE("ay", ay8910_r, ay8910_data_w)
|
AM_RANGE(0xf830, 0xf830) AM_DEVREADWRITE("ay", ay8910_r, ay8910_data_w)
|
||||||
AM_RANGE(0xf840, 0xf840) AM_DEVWRITE("ay", ay8910_address_w)
|
AM_RANGE(0xf840, 0xf840) AM_DEVWRITE("ay", ay8910_address_w)
|
||||||
// AM_RANGE(0xf850, 0xf850) AM_WRITE(ncb3_p1_flip_w) // need flip?
|
// AM_RANGE(0xf850, 0xf850) AM_WRITE(ncb3_p1_flip_w) // need flip?
|
||||||
@ -5116,7 +5116,7 @@ static MACHINE_DRIVER_START( cherrys )
|
|||||||
|
|
||||||
MDRV_IMPORT_FROM(ncb3)
|
MDRV_IMPORT_FROM(ncb3)
|
||||||
MDRV_GFXDECODE(cherrys)
|
MDRV_GFXDECODE(cherrys)
|
||||||
|
|
||||||
MACHINE_DRIVER_END
|
MACHINE_DRIVER_END
|
||||||
|
|
||||||
/***************************************************************************
|
/***************************************************************************
|
||||||
|
|||||||
@ -1203,7 +1203,7 @@ static void jamma_jvs_cmd_exec(running_machine *machine)
|
|||||||
byte_num = jvs_sdata[2];
|
byte_num = jvs_sdata[2];
|
||||||
|
|
||||||
#if 0
|
#if 0
|
||||||
length =
|
length =
|
||||||
#endif
|
#endif
|
||||||
jvs_decode_data(&jvs_sdata[3], data, byte_num-1);
|
jvs_decode_data(&jvs_sdata[3], data, byte_num-1);
|
||||||
#if 0
|
#if 0
|
||||||
|
|||||||
@ -243,7 +243,7 @@ static WRITE8_DEVICE_HANDLER( jan_adpcm_w )
|
|||||||
adpcm_idle = 0;
|
adpcm_idle = 0;
|
||||||
msm5205_reset_w(device,0);
|
msm5205_reset_w(device,0);
|
||||||
/* I don't think that this will ever happen, it's there just to be sure
|
/* I don't think that this will ever happen, it's there just to be sure
|
||||||
(i.e. I'll probably never do a "nagare" in my entire life ;-) ) */
|
(i.e. I'll probably never do a "nagare" in my entire life ;-) ) */
|
||||||
if(data & 0x20)
|
if(data & 0x20)
|
||||||
popmessage("ADPCM called with data = %02x, contact MAMEdev",data);
|
popmessage("ADPCM called with data = %02x, contact MAMEdev",data);
|
||||||
// printf("%02x 0\n",data);
|
// printf("%02x 0\n",data);
|
||||||
|
|||||||
@ -465,9 +465,9 @@ static void update_outputs(UINT16 which)
|
|||||||
if (which & (1 << i))
|
if (which & (1 << i))
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
int val;
|
int val;
|
||||||
|
|
||||||
val = i8279.ram[i] & 0xff;
|
val = i8279.ram[i] & 0xff;
|
||||||
|
|
||||||
val = i8279.ram[i] & 0x0f;
|
val = i8279.ram[i] & 0x0f;
|
||||||
if (i8279.inhibit & 0x01)
|
if (i8279.inhibit & 0x01)
|
||||||
|
|||||||
@ -146,7 +146,7 @@ VIDEO_UPDATE( test_vcu )
|
|||||||
color_base = 0x0;
|
color_base = 0x0;
|
||||||
|
|
||||||
bitmap_fill(bitmap,NULL,0);
|
bitmap_fill(bitmap,NULL,0);
|
||||||
// logerror("-->frame\n");
|
// logerror("-->frame\n");
|
||||||
|
|
||||||
if (planes_enabled[3])
|
if (planes_enabled[3])
|
||||||
copybitmap(bitmap,tmpbitmaps[3],0,0,0,0,cliprect);
|
copybitmap(bitmap,tmpbitmaps[3],0,0,0,0,cliprect);
|
||||||
@ -241,7 +241,7 @@ static VIDEO_UPDATE( greatgun )
|
|||||||
if (game_id==GREATGUN)
|
if (game_id==GREATGUN)
|
||||||
color_base = 0x0;
|
color_base = 0x0;
|
||||||
|
|
||||||
// bitmap_fill(bitmap,NULL,0);
|
// bitmap_fill(bitmap,NULL,0);
|
||||||
|
|
||||||
copybitmap (bitmap,tmpbitmaps[3],0,0,0,0,cliprect);
|
copybitmap (bitmap,tmpbitmaps[3],0,0,0,0,cliprect);
|
||||||
copybitmap_trans(bitmap,tmpbitmaps[2],0,0,0,0,cliprect,color_base);
|
copybitmap_trans(bitmap,tmpbitmaps[2],0,0,0,0,cliprect,color_base);
|
||||||
@ -260,7 +260,7 @@ static VIDEO_UPDATE( mazerbla )
|
|||||||
if (game_id==GREATGUN)
|
if (game_id==GREATGUN)
|
||||||
color_base = 0x0;
|
color_base = 0x0;
|
||||||
|
|
||||||
// bitmap_fill(bitmap,NULL,0);
|
// bitmap_fill(bitmap,NULL,0);
|
||||||
|
|
||||||
copybitmap (bitmap,tmpbitmaps[3],0,0,0,0,cliprect); //text
|
copybitmap (bitmap,tmpbitmaps[3],0,0,0,0,cliprect); //text
|
||||||
copybitmap_trans(bitmap,tmpbitmaps[2],0,0,0,0,cliprect,0);
|
copybitmap_trans(bitmap,tmpbitmaps[2],0,0,0,0,cliprect,0);
|
||||||
@ -401,9 +401,9 @@ static READ8_HANDLER( VCU_set_gfx_addr_r )
|
|||||||
case 0x0e:
|
case 0x0e:
|
||||||
case 0x0d:
|
case 0x0d:
|
||||||
case 0x0c:
|
case 0x0c:
|
||||||
// if (dbg_gfx_e)
|
// if (dbg_gfx_e)
|
||||||
// {
|
// {
|
||||||
// if (vbank==dbg_vbank)
|
// if (vbank==dbg_vbank)
|
||||||
{
|
{
|
||||||
if (game_id==MAZERBLA)
|
if (game_id==MAZERBLA)
|
||||||
color_base = 0x80; /* 0x80 constant: matches Mazer Blazer movie */
|
color_base = 0x80; /* 0x80 constant: matches Mazer Blazer movie */
|
||||||
@ -442,7 +442,7 @@ static READ8_HANDLER( VCU_set_gfx_addr_r )
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
// }
|
// }
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* 1 bit per pixel */
|
/* 1 bit per pixel */
|
||||||
@ -450,9 +450,9 @@ static READ8_HANDLER( VCU_set_gfx_addr_r )
|
|||||||
case 0x0a:/* verified - 1bpp */
|
case 0x0a:/* verified - 1bpp */
|
||||||
case 0x09:/* verified - 1bpp: gun crosshair */
|
case 0x09:/* verified - 1bpp: gun crosshair */
|
||||||
case 0x08:/* */
|
case 0x08:/* */
|
||||||
// if (dbg_gfx_e)
|
// if (dbg_gfx_e)
|
||||||
// {
|
// {
|
||||||
// if (vbank==dbg_vbank)
|
// if (vbank==dbg_vbank)
|
||||||
{
|
{
|
||||||
if (game_id==MAZERBLA)
|
if (game_id==MAZERBLA)
|
||||||
color_base = 0x80; /* 0x80 - good for Mazer Blazer: (only in game, CRT test mode is bad) */
|
color_base = 0x80; /* 0x80 - good for Mazer Blazer: (only in game, CRT test mode is bad) */
|
||||||
@ -476,16 +476,16 @@ static READ8_HANDLER( VCU_set_gfx_addr_r )
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
// }
|
// }
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* 4 bits per pixel */
|
/* 4 bits per pixel */
|
||||||
case 0x03:
|
case 0x03:
|
||||||
case 0x01:
|
case 0x01:
|
||||||
case 0x00:
|
case 0x00:
|
||||||
// if (dbg_gfx_e)
|
// if (dbg_gfx_e)
|
||||||
// {
|
// {
|
||||||
// if (vbank==dbg_vbank)
|
// if (vbank==dbg_vbank)
|
||||||
{
|
{
|
||||||
if (game_id==MAZERBLA)
|
if (game_id==MAZERBLA)
|
||||||
color_base = 0x80; /* 0x80 - good for Mazer Blazer: (only in game, CRT test mode is bad) */
|
color_base = 0x80; /* 0x80 - good for Mazer Blazer: (only in game, CRT test mode is bad) */
|
||||||
@ -510,7 +510,7 @@ static READ8_HANDLER( VCU_set_gfx_addr_r )
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
// }
|
// }
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
popmessage("not supported VCU drawing mode=%2x", mode);
|
popmessage("not supported VCU drawing mode=%2x", mode);
|
||||||
@ -568,7 +568,7 @@ static READ8_HANDLER( VCU_set_clr_addr_r )
|
|||||||
case 0x13: /* draws sprites?? in mazer blazer and ... wrong sprite in place of targeting-cross and UFO laser */
|
case 0x13: /* draws sprites?? in mazer blazer and ... wrong sprite in place of targeting-cross and UFO laser */
|
||||||
case 0x03:
|
case 0x03:
|
||||||
/* ... this may proove that there is really only one area and that
|
/* ... this may proove that there is really only one area and that
|
||||||
the draw command/palette selector is done via the 'mode' only ... */
|
the draw command/palette selector is done via the 'mode' only ... */
|
||||||
//if (dbg_clr_e)
|
//if (dbg_clr_e)
|
||||||
{
|
{
|
||||||
offs = VCU_gfx_addr;
|
offs = VCU_gfx_addr;
|
||||||
@ -1360,12 +1360,12 @@ static IRQ_CALLBACK(irq_callback)
|
|||||||
/* D2 is set to GND when INT comes from ZPU board - from 6850 on schematics (RS232 controller) */
|
/* D2 is set to GND when INT comes from ZPU board - from 6850 on schematics (RS232 controller) */
|
||||||
|
|
||||||
/* resulting vectors:
|
/* resulting vectors:
|
||||||
1111 11000 (0xf8)
|
1111 11000 (0xf8)
|
||||||
1111 11010 (0xfa)
|
1111 11010 (0xfa)
|
||||||
1111 11100 (0xfc)
|
1111 11100 (0xfc)
|
||||||
|
|
||||||
note:
|
note:
|
||||||
1111 11110 (0xfe) - cannot happen and is not handled by game */
|
1111 11110 (0xfe) - cannot happen and is not handled by game */
|
||||||
|
|
||||||
return (zpu_int_vector & ~1); /* D0->GND is performed on CFB board */
|
return (zpu_int_vector & ~1); /* D0->GND is performed on CFB board */
|
||||||
}
|
}
|
||||||
@ -1399,11 +1399,11 @@ static MACHINE_RESET( greatgun )
|
|||||||
cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
|
cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
|
||||||
|
|
||||||
|
|
||||||
// patch VCU test
|
// patch VCU test
|
||||||
// VCU test starts at PC=0x56f
|
// VCU test starts at PC=0x56f
|
||||||
rom[0x05b6] = 0;
|
rom[0x05b6] = 0;
|
||||||
rom[0x05b7] = 0;
|
rom[0x05b7] = 0;
|
||||||
// so we also need to patch ROM checksum test
|
// so we also need to patch ROM checksum test
|
||||||
rom[0x037f] = 0;
|
rom[0x037f] = 0;
|
||||||
rom[0x0380] = 0;
|
rom[0x0380] = 0;
|
||||||
}
|
}
|
||||||
@ -1417,15 +1417,15 @@ static MACHINE_DRIVER_START( mazerbla )
|
|||||||
MDRV_CPU_ADD("sub", Z80, MASTER_CLOCK) /* 4 MHz, NMI, IM1 INT */
|
MDRV_CPU_ADD("sub", Z80, MASTER_CLOCK) /* 4 MHz, NMI, IM1 INT */
|
||||||
MDRV_CPU_PROGRAM_MAP(mazerbla_cpu2_map)
|
MDRV_CPU_PROGRAM_MAP(mazerbla_cpu2_map)
|
||||||
MDRV_CPU_IO_MAP(mazerbla_cpu2_io_map)
|
MDRV_CPU_IO_MAP(mazerbla_cpu2_io_map)
|
||||||
// MDRV_CPU_PERIODIC_INT(irq0_line_hold, 400 ) /* frequency in Hz */
|
// MDRV_CPU_PERIODIC_INT(irq0_line_hold, 400 ) /* frequency in Hz */
|
||||||
|
|
||||||
MDRV_CPU_ADD("sub2", Z80, MASTER_CLOCK) /* 4 MHz, no NMI, IM1 INT */
|
MDRV_CPU_ADD("sub2", Z80, MASTER_CLOCK) /* 4 MHz, no NMI, IM1 INT */
|
||||||
MDRV_CPU_PROGRAM_MAP(mazerbla_cpu3_map)
|
MDRV_CPU_PROGRAM_MAP(mazerbla_cpu3_map)
|
||||||
MDRV_CPU_IO_MAP(mazerbla_cpu3_io_map)
|
MDRV_CPU_IO_MAP(mazerbla_cpu3_io_map)
|
||||||
/* (vblank related ??) int generated by a custom video processor
|
/* (vblank related ??) int generated by a custom video processor
|
||||||
and cleared on ANY port access.
|
and cleared on ANY port access.
|
||||||
but handled differently for now
|
but handled differently for now
|
||||||
*/
|
*/
|
||||||
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
|
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
|
||||||
|
|
||||||
/* synchronization forced on the fly */
|
/* synchronization forced on the fly */
|
||||||
@ -1464,9 +1464,9 @@ static MACHINE_DRIVER_START( greatgun )
|
|||||||
MDRV_CPU_PROGRAM_MAP(mazerbla_cpu3_map)
|
MDRV_CPU_PROGRAM_MAP(mazerbla_cpu3_map)
|
||||||
MDRV_CPU_IO_MAP(greatgun_cpu3_io_map)
|
MDRV_CPU_IO_MAP(greatgun_cpu3_io_map)
|
||||||
/* (vblank related ??) int generated by a custom video processor
|
/* (vblank related ??) int generated by a custom video processor
|
||||||
and cleared on ANY port access.
|
and cleared on ANY port access.
|
||||||
but handled differently for now
|
but handled differently for now
|
||||||
*/
|
*/
|
||||||
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
|
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
|
||||||
|
|
||||||
MDRV_MACHINE_RESET(greatgun)
|
MDRV_MACHINE_RESET(greatgun)
|
||||||
|
|||||||
@ -145,9 +145,9 @@
|
|||||||
*
|
*
|
||||||
* Namco Super System 22 Hardware Overview (last updated 26th April 2009 at 4:11pm)
|
* Namco Super System 22 Hardware Overview (last updated 26th April 2009 at 4:11pm)
|
||||||
* ---------------------------------------
|
* ---------------------------------------
|
||||||
*
|
*
|
||||||
* Note! This document will be updated from time to time when more dumps are available.
|
* Note! This document will be updated from time to time when more dumps are available.
|
||||||
*
|
*
|
||||||
* This document covers all the known Namco Super System 22 games, including....
|
* This document covers all the known Namco Super System 22 games, including....
|
||||||
* Air Combat 22 (C) Namco, 1995
|
* Air Combat 22 (C) Namco, 1995
|
||||||
* Alpine Racer 1 (C) Namco, 1995
|
* Alpine Racer 1 (C) Namco, 1995
|
||||||
@ -160,15 +160,15 @@
|
|||||||
* Prop Cycle (C) Namco, 1996
|
* Prop Cycle (C) Namco, 1996
|
||||||
* Time Crisis (C) Namco, 1995
|
* Time Crisis (C) Namco, 1995
|
||||||
* Tokyo Wars (C) Namco, 1996
|
* Tokyo Wars (C) Namco, 1996
|
||||||
*
|
*
|
||||||
* ! - denotes secured but not dumped yet.
|
* ! - denotes secured but not dumped yet.
|
||||||
* * - denotes not available. If you can help with the remaining undumped SS22 games,
|
* * - denotes not available. If you can help with the remaining undumped SS22 games,
|
||||||
* please contact http://guru.mameworld.info/
|
* please contact http://guru.mameworld.info/
|
||||||
*
|
*
|
||||||
* The Namco Super System 22 System comprises 4 PCB's plugged into a motherboard. The motherboard contains only
|
* The Namco Super System 22 System comprises 4 PCB's plugged into a motherboard. The motherboard contains only
|
||||||
* some slots and connectors. The 4 PCB's are housed in a metal box with a large fan on the side. The fan mostly cools
|
* some slots and connectors. The 4 PCB's are housed in a metal box with a large fan on the side. The fan mostly cools
|
||||||
* the video board as these are known to run hot and commonly fail, especially now the system is 10 years+ old.
|
* the video board as these are known to run hot and commonly fail, especially now the system is 10 years+ old.
|
||||||
*
|
*
|
||||||
* CPU PCB - There are four known revisions of this PCB. Three of them have an extra connector for an
|
* CPU PCB - There are four known revisions of this PCB. Three of them have an extra connector for an
|
||||||
* auxillary PCB. One of the others doesn't have that connector but is are otherwise identical.
|
* auxillary PCB. One of the others doesn't have that connector but is are otherwise identical.
|
||||||
* All PCBs can be swapped to any game and it will work. However, ALL required IC's must be swapped.
|
* All PCBs can be swapped to any game and it will work. However, ALL required IC's must be swapped.
|
||||||
@ -192,7 +192,7 @@
|
|||||||
* The differences are very minor, just the amount of connectors on the PCB. The Mother PCB is swappable to
|
* The differences are very minor, just the amount of connectors on the PCB. The Mother PCB is swappable to
|
||||||
* any game as long as the required connectors for that game are present on the PCB. (all dumped games tested
|
* any game as long as the required connectors for that game are present on the PCB. (all dumped games tested
|
||||||
* and worked fine using any MOTHER PCB)
|
* and worked fine using any MOTHER PCB)
|
||||||
*
|
*
|
||||||
* Each game has a 2 or 3 digit letter code assigned to it. Then a number 1 or 2, Then a Rev. A/B/C/D which denotes the
|
* Each game has a 2 or 3 digit letter code assigned to it. Then a number 1 or 2, Then a Rev. A/B/C/D which denotes the
|
||||||
* software revision.
|
* software revision.
|
||||||
* The 1 denotes a Japanese version. 2 denotes a World version. So far there are no other numbers used other than 1 or 2.
|
* The 1 denotes a Japanese version. 2 denotes a World version. So far there are no other numbers used other than 1 or 2.
|
||||||
@ -200,18 +200,18 @@
|
|||||||
* There is one exception so far. The World version of Alpine Racer 2, which uses a World version DATA ROM, and also one
|
* There is one exception so far. The World version of Alpine Racer 2, which uses a World version DATA ROM, and also one
|
||||||
* of the WAVE ROMs is a World version, but one Japanese WAVE ROM is also used.
|
* of the WAVE ROMs is a World version, but one Japanese WAVE ROM is also used.
|
||||||
* See the CPU PCB, Program ROM Daughterboard and MROM PCB texts below for more details on ROM usage.
|
* See the CPU PCB, Program ROM Daughterboard and MROM PCB texts below for more details on ROM usage.
|
||||||
*
|
*
|
||||||
* CPU PCB
|
* CPU PCB
|
||||||
* -------
|
* -------
|
||||||
* 1st Revision
|
* 1st Revision
|
||||||
* SYSTEM SUPER22 CPU PCB 8646960102 (8646970102)
|
* SYSTEM SUPER22 CPU PCB 8646960102 (8646970102)
|
||||||
*
|
*
|
||||||
* 2nd Revision
|
* 2nd Revision
|
||||||
* SYSTEM SUPER22 CPU(B) PCB 8646962600 (8646972600)
|
* SYSTEM SUPER22 CPU(B) PCB 8646962600 (8646972600)
|
||||||
*
|
*
|
||||||
* 3rd Revision
|
* 3rd Revision
|
||||||
* SYSTEM SUPER22 CPU(B) PCB 8646962600 (8646972601) <-- very minor?
|
* SYSTEM SUPER22 CPU(B) PCB 8646962600 (8646972601) <-- very minor?
|
||||||
*
|
*
|
||||||
* 4th Revision
|
* 4th Revision
|
||||||
* SYSTEM SUPER22 CPU(B) PCB 8646962601 (8646972601) <-- very minor?
|
* SYSTEM SUPER22 CPU(B) PCB 8646962601 (8646972601) <-- very minor?
|
||||||
* |--------------------------------------------------------------|
|
* |--------------------------------------------------------------|
|
||||||
@ -245,7 +245,7 @@
|
|||||||
* | WAVEB.1L LC78815M LC78815M |
|
* | WAVEB.1L LC78815M LC78815M |
|
||||||
* |--------------------------------------------------------------|
|
* |--------------------------------------------------------------|
|
||||||
* (logic chips omitted from the PCB layout)
|
* (logic chips omitted from the PCB layout)
|
||||||
*
|
*
|
||||||
* Notes:
|
* Notes:
|
||||||
* J6 : Custom Namco connector for plug-in program ROM PCB
|
* J6 : Custom Namco connector for plug-in program ROM PCB
|
||||||
* J11 : Custom Namco connector for optional plug-in WAVE ROM PCB (holds some SOP44 MASKROMs)
|
* J11 : Custom Namco connector for optional plug-in WAVE ROM PCB (holds some SOP44 MASKROMs)
|
||||||
@ -293,7 +293,7 @@
|
|||||||
* Prop Cycle = C428
|
* Prop Cycle = C428
|
||||||
* Time Crisis = C419
|
* Time Crisis = C419
|
||||||
* Tokyo Wars = C424
|
* Tokyo Wars = C424
|
||||||
*
|
*
|
||||||
* *1 : Unpopulated position for PAL16V8 (PLCC20)
|
* *1 : Unpopulated position for PAL16V8 (PLCC20)
|
||||||
* *2 : Unpopulated position for Fujitsu MB86601 (QFP100)
|
* *2 : Unpopulated position for Fujitsu MB86601 (QFP100)
|
||||||
* *3 : Unpopulated position for 32MHz OSC
|
* *3 : Unpopulated position for 32MHz OSC
|
||||||
@ -311,7 +311,7 @@
|
|||||||
* Prop Cycle 'PR1 DATA'
|
* Prop Cycle 'PR1 DATA'
|
||||||
* Time Crisis 'TS1 DATA'
|
* Time Crisis 'TS1 DATA'
|
||||||
* Tokyo Wars 'TW1 DATA'
|
* Tokyo Wars 'TW1 DATA'
|
||||||
*
|
*
|
||||||
* WAVEA.2L \
|
* WAVEA.2L \
|
||||||
* WAVEB.1L / : 16M/32M WAVE MASKROMs. If 32MBit DIP42, they're programmed in BYTE mode (DIP42/SOP44)
|
* WAVEB.1L / : 16M/32M WAVE MASKROMs. If 32MBit DIP42, they're programmed in BYTE mode (DIP42/SOP44)
|
||||||
* Game Wave A Wave B Type
|
* Game Wave A Wave B Type
|
||||||
@ -327,8 +327,8 @@
|
|||||||
* Prop Cycle 'PR1 WAVE A', 'PR1 WAVE B' , both DIP42 32M MASKROM
|
* Prop Cycle 'PR1 WAVE A', 'PR1 WAVE B' , both DIP42 32M MASKROM
|
||||||
* Time Crisis 'TS1 WAVE A', 'TS1 WAVE B' , WAVE A DIP42 32M MASKROM, WAVE B DIP42 16M MASKROM
|
* Time Crisis 'TS1 WAVE A', 'TS1 WAVE B' , WAVE A DIP42 32M MASKROM, WAVE B DIP42 16M MASKROM
|
||||||
* Tokyo Wars 'TW1 WAVE A', , DIP42 32M MASKROM
|
* Tokyo Wars 'TW1 WAVE A', , DIP42 32M MASKROM
|
||||||
*
|
*
|
||||||
*
|
*
|
||||||
* PROGRAM ROM Daughterboard PCB
|
* PROGRAM ROM Daughterboard PCB
|
||||||
* -----------------------------
|
* -----------------------------
|
||||||
* This PCB holds the main program ROMs. There is a small sticker on each PCB stating the game code and software revision.
|
* This PCB holds the main program ROMs. There is a small sticker on each PCB stating the game code and software revision.
|
||||||
@ -336,7 +336,7 @@
|
|||||||
* There are 4 known types of program daughterboards used on SS22 games (so far). The most common is the first type.
|
* There are 4 known types of program daughterboards used on SS22 games (so far). The most common is the first type.
|
||||||
* The PCB is very small (approx 2" x 3") containing one custom connector and some FlashROMs, and a PAL (in some cases).
|
* The PCB is very small (approx 2" x 3") containing one custom connector and some FlashROMs, and a PAL (in some cases).
|
||||||
* The ones that contain a PAL are approx 3" x 3".
|
* The ones that contain a PAL are approx 3" x 3".
|
||||||
*
|
*
|
||||||
* Type 1
|
* Type 1
|
||||||
* SYSTEM SUPER22 MPM(F) PCB 8646961600 (8646971600)
|
* SYSTEM SUPER22 MPM(F) PCB 8646961600 (8646971600)
|
||||||
* |-------------------------|
|
* |-------------------------|
|
||||||
@ -350,7 +350,7 @@
|
|||||||
* |-------------------------|
|
* |-------------------------|
|
||||||
* Notes:
|
* Notes:
|
||||||
* ROMx: Intel E28F008SA 8MBit FlashROM (x4, TSOP40)
|
* ROMx: Intel E28F008SA 8MBit FlashROM (x4, TSOP40)
|
||||||
*
|
*
|
||||||
* This PCB is used on:
|
* This PCB is used on:
|
||||||
* Game Software revision
|
* Game Software revision
|
||||||
* -------------------------------
|
* -------------------------------
|
||||||
@ -362,7 +362,7 @@
|
|||||||
* Prop Cycle 'PR2 Ver.A'
|
* Prop Cycle 'PR2 Ver.A'
|
||||||
* Time Crisis 'TS2 Ver.B'
|
* Time Crisis 'TS2 Ver.B'
|
||||||
* Tokyo Wars 'TW2 Ver.A'
|
* Tokyo Wars 'TW2 Ver.A'
|
||||||
*
|
*
|
||||||
* Type 2
|
* Type 2
|
||||||
* SYSTEM SUPER22 MPM(F16) PCB 8646962500 (8646972500)
|
* SYSTEM SUPER22 MPM(F16) PCB 8646962500 (8646972500)
|
||||||
* |-------------------------|
|
* |-------------------------|
|
||||||
@ -377,12 +377,12 @@
|
|||||||
* |-------------------------|
|
* |-------------------------|
|
||||||
* Notes:
|
* Notes:
|
||||||
* ROMx: Intel E28F016SA 16MBit FlashROMs (x2, TSOP56)
|
* ROMx: Intel E28F016SA 16MBit FlashROMs (x2, TSOP56)
|
||||||
*
|
*
|
||||||
* This PCB is used on:
|
* This PCB is used on:
|
||||||
* Game Software revision
|
* Game Software revision
|
||||||
* -------------------------------
|
* -------------------------------
|
||||||
* Time Crisis 'TS2 Ver.A'
|
* Time Crisis 'TS2 Ver.A'
|
||||||
*
|
*
|
||||||
* Type 3
|
* Type 3
|
||||||
* SYSTEM SUPER22 MPM(F16X4) PCB 8646962901 (8646972901)
|
* SYSTEM SUPER22 MPM(F16X4) PCB 8646962901 (8646972901)
|
||||||
* |-------------------------|
|
* |-------------------------|
|
||||||
@ -400,12 +400,12 @@
|
|||||||
* Notes:
|
* Notes:
|
||||||
* ICx* : Intel E28F016SA 16MBit FlashROMs (x4, TSOP56)
|
* ICx* : Intel E28F016SA 16MBit FlashROMs (x4, TSOP56)
|
||||||
* SS22P1B: PALCE16V8H (PLCC20, labelled 'SS22P1B')
|
* SS22P1B: PALCE16V8H (PLCC20, labelled 'SS22P1B')
|
||||||
*
|
*
|
||||||
* This PCB is used on:
|
* This PCB is used on:
|
||||||
* Game Software revision
|
* Game Software revision
|
||||||
* -------------------------------
|
* -------------------------------
|
||||||
* Alpine Racer 2 'ARS2 Ver.B'
|
* Alpine Racer 2 'ARS2 Ver.B'
|
||||||
*
|
*
|
||||||
* Type 4
|
* Type 4
|
||||||
* SYSTEM SUPER22 MPM(F16X4F) PCB 8646963500 (8646973500)
|
* SYSTEM SUPER22 MPM(F16X4F) PCB 8646963500 (8646973500)
|
||||||
* |-------------------------|
|
* |-------------------------|
|
||||||
@ -430,13 +430,13 @@
|
|||||||
* That pin traces to pin 6 (OUTPUT Y) of a 74F08 at 15F on the CPU board
|
* That pin traces to pin 6 (OUTPUT Y) of a 74F08 at 15F on the CPU board
|
||||||
* Pins 4 (INPUT A) & 5 (INPUT B) of the 74F08 at 15F trace to Namco custom
|
* Pins 4 (INPUT A) & 5 (INPUT B) of the 74F08 at 15F trace to Namco custom
|
||||||
* IC C383 pins 53 (A INPUT) & 52 (B INPUT)
|
* IC C383 pins 53 (A INPUT) & 52 (B INPUT)
|
||||||
*
|
*
|
||||||
* This PCB is used on:
|
* This PCB is used on:
|
||||||
* Game Software revision
|
* Game Software revision
|
||||||
* -------------------------------
|
* -------------------------------
|
||||||
* Alpine Surfer 'AF2 Ver.A'
|
* Alpine Surfer 'AF2 Ver.A'
|
||||||
*
|
*
|
||||||
*
|
*
|
||||||
* Auxillary PCB (connector JC410 on the CPU PCB is used only for Time Crisis)
|
* Auxillary PCB (connector JC410 on the CPU PCB is used only for Time Crisis)
|
||||||
* -------------
|
* -------------
|
||||||
* V159 GUN POINT PCB 244790102 (2447970102)
|
* V159 GUN POINT PCB 244790102 (2447970102)
|
||||||
@ -463,8 +463,8 @@
|
|||||||
* J1 : Connector joining Gun PCB to a connector on the metal box (which joins to the gun interface PCB in the
|
* J1 : Connector joining Gun PCB to a connector on the metal box (which joins to the gun interface PCB in the
|
||||||
* cab which supplies 24V for the solenoid in the guns)
|
* cab which supplies 24V for the solenoid in the guns)
|
||||||
* J2 : Connector joining to the CPU PCB (to JC410)
|
* J2 : Connector joining to the CPU PCB (to JC410)
|
||||||
*
|
*
|
||||||
*
|
*
|
||||||
* DSP PCB
|
* DSP PCB
|
||||||
* -------
|
* -------
|
||||||
* SYSTEM SUPER22 DSP PCB 8646960302 (8646970302)
|
* SYSTEM SUPER22 DSP PCB 8646960302 (8646970302)
|
||||||
@ -499,7 +499,7 @@
|
|||||||
* | |-----| |---------| |
|
* | |-----| |---------| |
|
||||||
* |--------------------------------------------------------------|
|
* |--------------------------------------------------------------|
|
||||||
* (logic chips omitted from the PCB layout)
|
* (logic chips omitted from the PCB layout)
|
||||||
*
|
*
|
||||||
* Notes:
|
* Notes:
|
||||||
* JD3 : Custom Namco connector joining this PCB to the MROM PCB with a special flat cable known as a
|
* JD3 : Custom Namco connector joining this PCB to the MROM PCB with a special flat cable known as a
|
||||||
* 'DHD harness'
|
* 'DHD harness'
|
||||||
@ -521,8 +521,8 @@
|
|||||||
* SS22D4B : PALCE 16V8H (PLCC20, labelled 'SS22D4B')
|
* SS22D4B : PALCE 16V8H (PLCC20, labelled 'SS22D4B')
|
||||||
* SS22D5 : PALCE 16V8H (PLCC20, labelled 'SS22D5')
|
* SS22D5 : PALCE 16V8H (PLCC20, labelled 'SS22D5')
|
||||||
* LEDS : 8 red LEDs flash (in various pretty patterns) when the DSP PCB is active.
|
* LEDS : 8 red LEDs flash (in various pretty patterns) when the DSP PCB is active.
|
||||||
*
|
*
|
||||||
*
|
*
|
||||||
* ROM PCB (type 1)
|
* ROM PCB (type 1)
|
||||||
* -------
|
* -------
|
||||||
* SYSTEM SUPER22 MROM PCB 8646960400 (8646970400)
|
* SYSTEM SUPER22 MROM PCB 8646960400 (8646970400)
|
||||||
@ -557,11 +557,11 @@
|
|||||||
* | SCG6.1L SCG6.1F |
|
* | SCG6.1L SCG6.1F |
|
||||||
* |--------------------------------------------------------------|
|
* |--------------------------------------------------------------|
|
||||||
* (logic chips omitted from the PCB layout)
|
* (logic chips omitted from the PCB layout)
|
||||||
*
|
*
|
||||||
* Notes:
|
* Notes:
|
||||||
* Namco SS22 MROM PCBs have 2 identical sets of CG*, SCG* and CCR-L/CCR-H ROMs on the PCB.
|
* Namco SS22 MROM PCBs have 2 identical sets of CG*, SCG* and CCR-L/CCR-H ROMs on the PCB.
|
||||||
* The Japanese region code '1' is appended to all game codes on all MROMs.
|
* The Japanese region code '1' is appended to all game codes on all MROMs.
|
||||||
*
|
*
|
||||||
* JR3, JR4 : Custom Namco connector joining this PCB to the VIDEO & DSP PCBs with a special flat cable known
|
* JR3, JR4 : Custom Namco connector joining this PCB to the VIDEO & DSP PCBs with a special flat cable known
|
||||||
* as a 'DHD harness'
|
* as a 'DHD harness'
|
||||||
* SS22M1 : PALCE 16V8H (PLCC20, labelled 'SS22M1')
|
* SS22M1 : PALCE 16V8H (PLCC20, labelled 'SS22M1')
|
||||||
@ -573,7 +573,7 @@
|
|||||||
* JP7, JP8, JP9: Jumpers to configure SCG* ROMs. Hardwired to '16M' on the PCB. Alt. setting '32M'
|
* JP7, JP8, JP9: Jumpers to configure SCG* ROMs. Hardwired to '16M' on the PCB. Alt. setting '32M'
|
||||||
* JP10, JP11, JP12: Jumpers to configure SCG* ROMs. Hardwired to '16M' on the PCB. Alt. setting '32M'
|
* JP10, JP11, JP12: Jumpers to configure SCG* ROMs. Hardwired to '16M' on the PCB. Alt. setting '32M'
|
||||||
* JP13 : Jumper to configure PTR* ROMs. Hardwired to '4M' on the PCB. Alt. setting '8M'
|
* JP13 : Jumper to configure PTR* ROMs. Hardwired to '4M' on the PCB. Alt. setting '8M'
|
||||||
*
|
*
|
||||||
* Game ROMs populated
|
* Game ROMs populated
|
||||||
* ---------------------------------------------------------
|
* ---------------------------------------------------------
|
||||||
* Air Combat 22 ACS1CCRH.5B, ACS1CCRH.1D 4M SOP32
|
* Air Combat 22 ACS1CCRH.5B, ACS1CCRH.1D 4M SOP32
|
||||||
@ -600,7 +600,7 @@
|
|||||||
* ACS1PTRL1.16K "
|
* ACS1PTRL1.16K "
|
||||||
* ACS1PTRL2.15K "
|
* ACS1PTRL2.15K "
|
||||||
* ACS1PTRL3.14K "
|
* ACS1PTRL3.14K "
|
||||||
*
|
*
|
||||||
* Alpine Racer 1 AR1CCRH.5B, AR1CCRH.1D 4M SOP32
|
* Alpine Racer 1 AR1CCRH.5B, AR1CCRH.1D 4M SOP32
|
||||||
* AR1CCRL.7B, AR1CCRL.3D 16M SOP44
|
* AR1CCRL.7B, AR1CCRL.3D 16M SOP44
|
||||||
* AR1CG0.12B, AR1CG0.8D "
|
* AR1CG0.12B, AR1CG0.8D "
|
||||||
@ -625,7 +625,7 @@
|
|||||||
* AR1PTRL1.16K "
|
* AR1PTRL1.16K "
|
||||||
* AR1PTRL2.15K "
|
* AR1PTRL2.15K "
|
||||||
* AR1PTRL3.14K "
|
* AR1PTRL3.14K "
|
||||||
*
|
*
|
||||||
* Alpine Racer 2 ARS1CCRH.5B, ARS1CCRH.1D 4M SOP32
|
* Alpine Racer 2 ARS1CCRH.5B, ARS1CCRH.1D 4M SOP32
|
||||||
* ARS1CCRL.7B, ARS1CCRL.3D 16M SOP44
|
* ARS1CCRL.7B, ARS1CCRL.3D 16M SOP44
|
||||||
* ARS1CG0.12B, ARS1CG0.8D "
|
* ARS1CG0.12B, ARS1CG0.8D "
|
||||||
@ -647,7 +647,7 @@
|
|||||||
* ARS1PTRL1.16K "
|
* ARS1PTRL1.16K "
|
||||||
* ARS1PTRL2.15K "
|
* ARS1PTRL2.15K "
|
||||||
* ARS1PTRL3.14K "
|
* ARS1PTRL3.14K "
|
||||||
*
|
*
|
||||||
* Alpine Surfer AF1CCRH.5B, AF1CCRH.1D 4M SOP32
|
* Alpine Surfer AF1CCRH.5B, AF1CCRH.1D 4M SOP32
|
||||||
* AF1CCRL.7B, AF1CCRL.3D 16M SOP44
|
* AF1CCRL.7B, AF1CCRL.3D 16M SOP44
|
||||||
* AF1CG0.12B, AF1CG0.8D "
|
* AF1CG0.12B, AF1CG0.8D "
|
||||||
@ -662,7 +662,7 @@
|
|||||||
* AF1PTRM1.16J "
|
* AF1PTRM1.16J "
|
||||||
* AF1PTRL0.18K "
|
* AF1PTRL0.18K "
|
||||||
* AF1PTRL1.16K "
|
* AF1PTRL1.16K "
|
||||||
*
|
*
|
||||||
* Aqua Jet AJ1CCRH.5B, AJ1CCRH.1D 4M SOP32
|
* Aqua Jet AJ1CCRH.5B, AJ1CCRH.1D 4M SOP32
|
||||||
* AJ1CCRL.7B, AJ1CCRL.3D 16M SOP44
|
* AJ1CCRL.7B, AJ1CCRL.3D 16M SOP44
|
||||||
* AJ1CG0.12B, AJ1CG0.8D "
|
* AJ1CG0.12B, AJ1CG0.8D "
|
||||||
@ -688,7 +688,7 @@
|
|||||||
* AJ1PTRL1.16K "
|
* AJ1PTRL1.16K "
|
||||||
* AJ1PTRL2.15K "
|
* AJ1PTRL2.15K "
|
||||||
* AJ1PTRL3.14K "
|
* AJ1PTRL3.14K "
|
||||||
*
|
*
|
||||||
* Cyber Cycles CB1CCRH.5B, CB1CCRH.1D 4M SOP32
|
* Cyber Cycles CB1CCRH.5B, CB1CCRH.1D 4M SOP32
|
||||||
* CB1CCRL.7B, CB1CCRL.3D 16M SOP44
|
* CB1CCRL.7B, CB1CCRL.3D 16M SOP44
|
||||||
* CB1CG0.12B, CB1CG0.8D "
|
* CB1CG0.12B, CB1CG0.8D "
|
||||||
@ -712,9 +712,9 @@
|
|||||||
* CB1PTRL1.16K "
|
* CB1PTRL1.16K "
|
||||||
* CB1PTRL2.15K "
|
* CB1PTRL2.15K "
|
||||||
* CB1PTRL3.14K "
|
* CB1PTRL3.14K "
|
||||||
*
|
*
|
||||||
* Dirt Dash N/A
|
* Dirt Dash N/A
|
||||||
*
|
*
|
||||||
* Prop Cycle PR1CCRH.5B, PR1CCRH.1D 4M SOP32
|
* Prop Cycle PR1CCRH.5B, PR1CCRH.1D 4M SOP32
|
||||||
* PR1CCRL.7B, PR1CCRL.3D 16M SOP44
|
* PR1CCRL.7B, PR1CCRL.3D 16M SOP44
|
||||||
* PR1CG0.12B, PR1CG0.8D "
|
* PR1CG0.12B, PR1CG0.8D "
|
||||||
@ -736,7 +736,7 @@
|
|||||||
* PR1PTRL0.18K "
|
* PR1PTRL0.18K "
|
||||||
* PR1PTRL1.16K "
|
* PR1PTRL1.16K "
|
||||||
* PR1PTRL2.15K "
|
* PR1PTRL2.15K "
|
||||||
*
|
*
|
||||||
* Time Crisis TS1CCRH.5B, TS1CCRH.1D 4M SOP32
|
* Time Crisis TS1CCRH.5B, TS1CCRH.1D 4M SOP32
|
||||||
* TS1CCRL.7B, TS1CCRL.3D 16M SOP44
|
* TS1CCRL.7B, TS1CCRL.3D 16M SOP44
|
||||||
* TS1CG0.12B, TS1CG0.8D "
|
* TS1CG0.12B, TS1CG0.8D "
|
||||||
@ -762,7 +762,7 @@
|
|||||||
* TS1PTRL0.18K "
|
* TS1PTRL0.18K "
|
||||||
* TS1PTRL1.16K "
|
* TS1PTRL1.16K "
|
||||||
* TS1PTRL2.15K "
|
* TS1PTRL2.15K "
|
||||||
*
|
*
|
||||||
* Tokyo Wars TW1CCRH.5B, TW1CCRH.1D 4M SOP32
|
* Tokyo Wars TW1CCRH.5B, TW1CCRH.1D 4M SOP32
|
||||||
* TW1CCRL.7B, TW1CCRL.3D 16M SOP44
|
* TW1CCRL.7B, TW1CCRL.3D 16M SOP44
|
||||||
* TW1CG0.12B, TW1CG0.8D "
|
* TW1CG0.12B, TW1CG0.8D "
|
||||||
@ -789,8 +789,8 @@
|
|||||||
* TW1PTRL1.16K "
|
* TW1PTRL1.16K "
|
||||||
* TW1PTRL2.15K "
|
* TW1PTRL2.15K "
|
||||||
* TW1PTRL3.14K "
|
* TW1PTRL3.14K "
|
||||||
*
|
*
|
||||||
*
|
*
|
||||||
* ROM PCB (type 2)
|
* ROM PCB (type 2)
|
||||||
* -------
|
* -------
|
||||||
* SS22DS FLASH PCB 8650961300 (8650971300)
|
* SS22DS FLASH PCB 8650961300 (8650971300)
|
||||||
@ -825,10 +825,10 @@
|
|||||||
* | SS22DSF2 F1L F1M F1J F1E |
|
* | SS22DSF2 F1L F1M F1J F1E |
|
||||||
* |--------------------------------------------------------------|
|
* |--------------------------------------------------------------|
|
||||||
* (logic chips omitted from the PCB layout)
|
* (logic chips omitted from the PCB layout)
|
||||||
*
|
*
|
||||||
* Notes:
|
* Notes:
|
||||||
* Namco SS22 FLASH PCBs have 2 identical sets of CG*, SCG* and CCR-L/CCR-H ROMs on the PCB.
|
* Namco SS22 FLASH PCBs have 2 identical sets of CG*, SCG* and CCR-L/CCR-H ROMs on the PCB.
|
||||||
*
|
*
|
||||||
* JR3, JR4 : Custom Namco connector joining this PCB to the VIDEO & DSP PCBs with a special flat cable known
|
* JR3, JR4 : Custom Namco connector joining this PCB to the VIDEO & DSP PCBs with a special flat cable known
|
||||||
* as a 'DHD harness'
|
* as a 'DHD harness'
|
||||||
* EPMXXXX : Altera EPM??? (PLCC84, unknown chip model, possibly EPM7064, sticker on top of it blocking ID markings)
|
* EPMXXXX : Altera EPM??? (PLCC84, unknown chip model, possibly EPM7064, sticker on top of it blocking ID markings)
|
||||||
@ -837,30 +837,30 @@
|
|||||||
* SS22DSF3 : EPM7032 (x2, PLCC44, labelled 'SS22DSF3')
|
* SS22DSF3 : EPM7032 (x2, PLCC44, labelled 'SS22DSF3')
|
||||||
* SS22DSF2 : EPM7032 (x2, PLCC44, labelled 'SS22DSF2')
|
* SS22DSF2 : EPM7032 (x2, PLCC44, labelled 'SS22DSF2')
|
||||||
* HM628128 : Hitachi HM628128 128k x8 SRAM (TSOP32)
|
* HM628128 : Hitachi HM628128 128k x8 SRAM (TSOP32)
|
||||||
*
|
*
|
||||||
* Game ROMs populated (All Intel E28F016SA TSOP56 16M FlashROMs)
|
* Game ROMs populated (All Intel E28F016SA TSOP56 16M FlashROMs)
|
||||||
* -----------------------------------------------------------------
|
* -----------------------------------------------------------------
|
||||||
* Armidillo Racing F1E, F1J, F2E, F2J - CCRL/CCRH ROMs
|
* Armidillo Racing F1E, F1J, F2E, F2J - CCRL/CCRH ROMs
|
||||||
*
|
*
|
||||||
* F4E, F4J, F5E, F5J, F6E, F6J, \
|
* F4E, F4J, F5E, F5J, F6E, F6J, \
|
||||||
* F7E, F7J, F8E, F8J, F9E, F9J, \ CGx ROMs
|
* F7E, F7J, F8E, F8J, F9E, F9J, \ CGx ROMs
|
||||||
* F11E, F11J, F12E, F12J /
|
* F11E, F11J, F12E, F12J /
|
||||||
*
|
*
|
||||||
* F1L, F1M, F3L, F3M, F5L, F5M, \
|
* F1L, F1M, F3L, F3M, F5L, F5M, \
|
||||||
* F7L, F7M / SCGx ROMs
|
* F7L, F7M / SCGx ROMs
|
||||||
*
|
*
|
||||||
* F9L, F11L, F12L, F13L, \
|
* F9L, F11L, F12L, F13L, \
|
||||||
* F12M, F13M / PTR ROMs
|
* F12M, F13M / PTR ROMs
|
||||||
*
|
*
|
||||||
*
|
*
|
||||||
* VIDEO PCB
|
* VIDEO PCB
|
||||||
* ---------
|
* ---------
|
||||||
* 1st Revision
|
* 1st Revision
|
||||||
* SYSTEM SUPER22 VIDEO 8646960204 (8646970204)
|
* SYSTEM SUPER22 VIDEO 8646960204 (8646970204)
|
||||||
*
|
*
|
||||||
* 2nd Revision
|
* 2nd Revision
|
||||||
* SYSTEM SUPER22 VIDEO(B) 8646961200 (8646971200)
|
* SYSTEM SUPER22 VIDEO(B) 8646961200 (8646971200)
|
||||||
*
|
*
|
||||||
* 3rd Revision (PCB layout shown below)
|
* 3rd Revision (PCB layout shown below)
|
||||||
* SYSTEM SUPER22 VIDEO(C) 8646962700 (8646972700)
|
* SYSTEM SUPER22 VIDEO(C) 8646962700 (8646972700)
|
||||||
* |--------------------------------------------------------------|
|
* |--------------------------------------------------------------|
|
||||||
@ -894,7 +894,7 @@
|
|||||||
* | |---------| |---------| N341256 CXD1178Q |
|
* | |---------| |---------| N341256 CXD1178Q |
|
||||||
* |--------------------------------------------------------------|
|
* |--------------------------------------------------------------|
|
||||||
* (logic chips omitted from the PCB layout)
|
* (logic chips omitted from the PCB layout)
|
||||||
*
|
*
|
||||||
* Notes:
|
* Notes:
|
||||||
* JV3 : Custom Namco connector joining this PCB to the MROM PCB with a special flat cable known
|
* JV3 : Custom Namco connector joining this PCB to the MROM PCB with a special flat cable known
|
||||||
* as a 'DHD harness'
|
* as a 'DHD harness'
|
||||||
@ -923,16 +923,16 @@
|
|||||||
* video faults on Namco Super System 22 PCBs.
|
* video faults on Namco Super System 22 PCBs.
|
||||||
* (Second reason for video faults is generally attributed
|
* (Second reason for video faults is generally attributed
|
||||||
* to failure of RAM on this PCB and/or the DSP PCB)
|
* to failure of RAM on this PCB and/or the DSP PCB)
|
||||||
*
|
*
|
||||||
*
|
*
|
||||||
* Motherboard PCB
|
* Motherboard PCB
|
||||||
* ---------------
|
* ---------------
|
||||||
* 1st Revision
|
* 1st Revision
|
||||||
* SYSTEM SUPER22 MOTHER PCB 8646960602 (8646970602)
|
* SYSTEM SUPER22 MOTHER PCB 8646960602 (8646970602)
|
||||||
*
|
*
|
||||||
* 2nd Revision
|
* 2nd Revision
|
||||||
* SYSTEM SUPER22 MOTHER(B) PCB (number not known)
|
* SYSTEM SUPER22 MOTHER(B) PCB (number not known)
|
||||||
*
|
*
|
||||||
* 3rd Revision
|
* 3rd Revision
|
||||||
* SYSTEM SUPER22 MOTHER(C) PCB 8646960602 (8646970602)
|
* SYSTEM SUPER22 MOTHER(C) PCB 8646960602 (8646970602)
|
||||||
* |------------------------------------------------------------------|
|
* |------------------------------------------------------------------|
|
||||||
@ -955,12 +955,12 @@
|
|||||||
* Notes:
|
* Notes:
|
||||||
* IC1 : LB1233 (DIP8)
|
* IC1 : LB1233 (DIP8)
|
||||||
* IC2, IC3: LB1235 (DIP8)
|
* IC2, IC3: LB1235 (DIP8)
|
||||||
*
|
*
|
||||||
* JC1, JC2: Connectors to plug in CPU PCB
|
* JC1, JC2: Connectors to plug in CPU PCB
|
||||||
* JD1, JD2: Connectors to plug in DSP PCB
|
* JD1, JD2: Connectors to plug in DSP PCB
|
||||||
* JR1 : Connector to plug in MROM PCB
|
* JR1 : Connector to plug in MROM PCB
|
||||||
* JV1, JV2: Connectors to plug in VIDEO PCB
|
* JV1, JV2: Connectors to plug in VIDEO PCB
|
||||||
*
|
*
|
||||||
* J1 : 9 pin power input socket Pin Use
|
* J1 : 9 pin power input socket Pin Use
|
||||||
* -----------
|
* -----------
|
||||||
* 1 +5V
|
* 1 +5V
|
||||||
@ -972,7 +972,7 @@
|
|||||||
* 7 Ground
|
* 7 Ground
|
||||||
* 8 NC
|
* 8 NC
|
||||||
* 9 +12V
|
* 9 +12V
|
||||||
*
|
*
|
||||||
* J2 : 9 pin link connector Pin Use
|
* J2 : 9 pin link connector Pin Use
|
||||||
* --------------
|
* --------------
|
||||||
* 1 Ring In+
|
* 1 Ring In+
|
||||||
@ -984,7 +984,7 @@
|
|||||||
* 7 /TXD (NC)
|
* 7 /TXD (NC)
|
||||||
* 8 GND (NC)
|
* 8 GND (NC)
|
||||||
* 9 +5V (NC)
|
* 9 +5V (NC)
|
||||||
*
|
*
|
||||||
* J3 : 9 pin socket Pin Use
|
* J3 : 9 pin socket Pin Use
|
||||||
* -------------------
|
* -------------------
|
||||||
* 1 Service Credit
|
* 1 Service Credit
|
||||||
@ -996,7 +996,7 @@
|
|||||||
* 7 Ground
|
* 7 Ground
|
||||||
* 8 Coin Sw
|
* 8 Coin Sw
|
||||||
* 9 NC
|
* 9 NC
|
||||||
*
|
*
|
||||||
* J4 : 8 pin connector Pin Use
|
* J4 : 8 pin connector Pin Use
|
||||||
* -------------------------------------
|
* -------------------------------------
|
||||||
* 1 Start
|
* 1 Start
|
||||||
@ -1007,7 +1007,7 @@
|
|||||||
* 6 NC
|
* 6 NC
|
||||||
* 7 Ground
|
* 7 Ground
|
||||||
* 8 Ground
|
* 8 Ground
|
||||||
*
|
*
|
||||||
* J5 : 15 pin socket Pin Use
|
* J5 : 15 pin socket Pin Use
|
||||||
* ---------------
|
* ---------------
|
||||||
* 1 Relay1
|
* 1 Relay1
|
||||||
@ -1025,7 +1025,7 @@
|
|||||||
* 13 +12V
|
* 13 +12V
|
||||||
* 14 +5V
|
* 14 +5V
|
||||||
* 15 NC
|
* 15 NC
|
||||||
*
|
*
|
||||||
* J6 : 12 pin audio output connector Pin Use
|
* J6 : 12 pin audio output connector Pin Use
|
||||||
* ----------
|
* ----------
|
||||||
* 1 SPKL+
|
* 1 SPKL+
|
||||||
@ -1040,7 +1040,7 @@
|
|||||||
* 10 NC
|
* 10 NC
|
||||||
* 11 NC
|
* 11 NC
|
||||||
* 12 NC
|
* 12 NC
|
||||||
*
|
*
|
||||||
* J7 : 12 pin analog controls socket Pin Use
|
* J7 : 12 pin analog controls socket Pin Use
|
||||||
* ---------------------------
|
* ---------------------------
|
||||||
* 1 +5V
|
* 1 +5V
|
||||||
@ -1055,9 +1055,9 @@
|
|||||||
* 10 NC
|
* 10 NC
|
||||||
* 11 NC
|
* 11 NC
|
||||||
* 12 NC
|
* 12 NC
|
||||||
*
|
*
|
||||||
* J8 : 10 pin connector (not used?)
|
* J8 : 10 pin connector (not used?)
|
||||||
*
|
*
|
||||||
* J9 : 6 pin video output socket Pin Use
|
* J9 : 6 pin video output socket Pin Use
|
||||||
* ---------
|
* ---------
|
||||||
* 1 Red
|
* 1 Red
|
||||||
@ -1066,10 +1066,10 @@
|
|||||||
* 4 Composite Sync (VSync 15kHz interlaced)
|
* 4 Composite Sync (VSync 15kHz interlaced)
|
||||||
* 5 Ground
|
* 5 Ground
|
||||||
* 6 NC
|
* 6 NC
|
||||||
*
|
*
|
||||||
* J10: 16 pin flat cable connector (only populated on Mother(C) PCB, use not known)
|
* J10: 16 pin flat cable connector (only populated on Mother(C) PCB, use not known)
|
||||||
*
|
*
|
||||||
*
|
*
|
||||||
* AMP PCB
|
* AMP PCB
|
||||||
* -------
|
* -------
|
||||||
* SYSTEM SUPER22 AMP(4) PCB 8647960100 (8647970100) (sticker 'AMP(2) PCB 8647961100')
|
* SYSTEM SUPER22 AMP(4) PCB 8647960100 (8647970100) (sticker 'AMP(2) PCB 8647961100')
|
||||||
@ -1084,14 +1084,14 @@
|
|||||||
* 1 +12V
|
* 1 +12V
|
||||||
* 2 Ground
|
* 2 Ground
|
||||||
* 3 NC
|
* 3 NC
|
||||||
*
|
*
|
||||||
* J2 : 4 pin dual speaker output socket Pin Use
|
* J2 : 4 pin dual speaker output socket Pin Use
|
||||||
* ---------
|
* ---------
|
||||||
* 1 SP1+
|
* 1 SP1+
|
||||||
* 2 SP1-
|
* 2 SP1-
|
||||||
* 3 SP2+
|
* 3 SP2+
|
||||||
* 4 SP2-
|
* 4 SP2-
|
||||||
*
|
*
|
||||||
* J3 : 8 pin sound data input connector from Mother PCB J6 Pin Use
|
* J3 : 8 pin sound data input connector from Mother PCB J6 Pin Use
|
||||||
* ----------
|
* ----------
|
||||||
* 1 SPKL+
|
* 1 SPKL+
|
||||||
@ -1102,7 +1102,7 @@
|
|||||||
* 6 NC
|
* 6 NC
|
||||||
* 7 NC
|
* 7 NC
|
||||||
* 8 NC
|
* 8 NC
|
||||||
*
|
*
|
||||||
* *1 : Unpopulated position for a 2nd LA4705 Power Amp
|
* *1 : Unpopulated position for a 2nd LA4705 Power Amp
|
||||||
* *2 : J4 - Unpopulated position for another 4 pin dual speaker output socket
|
* *2 : J4 - Unpopulated position for another 4 pin dual speaker output socket
|
||||||
* J5 : 2 pin connector used for sound mute Pin Use
|
* J5 : 2 pin connector used for sound mute Pin Use
|
||||||
@ -2214,7 +2214,7 @@ static INTERRUPT_GEN( namcos22s_interrupt )
|
|||||||
|
|
||||||
static READ32_HANDLER( namcos22_keycus_r )
|
static READ32_HANDLER( namcos22_keycus_r )
|
||||||
{
|
{
|
||||||
// printf("Hit keycus mask %x PC=%x\n", mem_mask, cpu_get_pc(space->cpu));
|
// printf("Hit keycus mask %x PC=%x\n", mem_mask, cpu_get_pc(space->cpu));
|
||||||
|
|
||||||
switch( namcos22_gametype )
|
switch( namcos22_gametype )
|
||||||
{
|
{
|
||||||
@ -2735,11 +2735,11 @@ static READ8_HANDLER( aquajet_mcu_adc_r )
|
|||||||
ddy <<= 2;
|
ddy <<= 2;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
0 & 1 = handle left/right
|
0 & 1 = handle left/right
|
||||||
2 & 3 = accelerator
|
2 & 3 = accelerator
|
||||||
4 & 5 = handle pole (Y axis)
|
4 & 5 = handle pole (Y axis)
|
||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
switch (offset)
|
switch (offset)
|
||||||
{
|
{
|
||||||
@ -2754,12 +2754,12 @@ static READ8_HANDLER( aquajet_mcu_adc_r )
|
|||||||
|
|
||||||
case 3:
|
case 3:
|
||||||
return (gas>>8);
|
return (gas>>8);
|
||||||
|
|
||||||
case 4:
|
case 4:
|
||||||
return ddy & 0xff;
|
return ddy & 0xff;
|
||||||
|
|
||||||
case 5:
|
case 5:
|
||||||
return (ddy>>8);
|
return (ddy>>8);
|
||||||
|
|
||||||
default:
|
default:
|
||||||
return 0;
|
return 0;
|
||||||
@ -4529,18 +4529,18 @@ ROM_START( tokyowar )
|
|||||||
ROM_LOAD( "tw1scg3.7f", 0x600000, 0x200000, CRC(8e14d013) SHA1(ca63105a5c07bb9653499eef7a757db52612b59b) )
|
ROM_LOAD( "tw1scg3.7f", 0x600000, 0x200000, CRC(8e14d013) SHA1(ca63105a5c07bb9653499eef7a757db52612b59b) )
|
||||||
|
|
||||||
ROM_REGION( 0x200000*8, "textile", ROMREGION_DISPOSE) /* 16x16x8bpp texture tiles */
|
ROM_REGION( 0x200000*8, "textile", ROMREGION_DISPOSE) /* 16x16x8bpp texture tiles */
|
||||||
ROM_LOAD( "tw1cg0.8d", 0x000000, 0x200000, CRC(98b9b070) SHA1(cb920a34700dab330c967cc634717134c04b7e1d) )
|
ROM_LOAD( "tw1cg0.8d", 0x000000, 0x200000, CRC(98b9b070) SHA1(cb920a34700dab330c967cc634717134c04b7e1d) )
|
||||||
ROM_LOAD( "tw1cg1.10d", 0x200000, 0x200000, CRC(f96a723a) SHA1(5ba14963a4c51c875ac8d3b42049bc334de90038) )
|
ROM_LOAD( "tw1cg1.10d", 0x200000, 0x200000, CRC(f96a723a) SHA1(5ba14963a4c51c875ac8d3b42049bc334de90038) )
|
||||||
ROM_LOAD( "tw1cg2.12d", 0x400000, 0x200000, CRC(573e9ded) SHA1(815bda1ac000532c915c2d65ffdb04fee6fa8201) )
|
ROM_LOAD( "tw1cg2.12d", 0x400000, 0x200000, CRC(573e9ded) SHA1(815bda1ac000532c915c2d65ffdb04fee6fa8201) )
|
||||||
ROM_LOAD( "tw1cg3.13d", 0x600000, 0x200000, CRC(302d5c74) SHA1(5a823f6842cf0f79eb93da47d5bf8c5f51e420db) )
|
ROM_LOAD( "tw1cg3.13d", 0x600000, 0x200000, CRC(302d5c74) SHA1(5a823f6842cf0f79eb93da47d5bf8c5f51e420db) )
|
||||||
ROM_LOAD( "tw1cg4.14d", 0x800000, 0x200000, CRC(ab8aa1df) SHA1(355192d999f493e0761fbc822fa9b30c33d8e1c4) )
|
ROM_LOAD( "tw1cg4.14d", 0x800000, 0x200000, CRC(ab8aa1df) SHA1(355192d999f493e0761fbc822fa9b30c33d8e1c4) )
|
||||||
ROM_LOAD( "tw1cg5.16d", 0xa00000, 0x200000, CRC(5063f3d0) SHA1(ad8dd2f4184373a3a3ca748b411a5eec1835dc97) )
|
ROM_LOAD( "tw1cg5.16d", 0xa00000, 0x200000, CRC(5063f3d0) SHA1(ad8dd2f4184373a3a3ca748b411a5eec1835dc97) )
|
||||||
ROM_LOAD( "tw1cg6.18d", 0xc00000, 0x200000, CRC(d764027c) SHA1(5cbf93392683885c220628936ba50c09cb40fcfb) )
|
ROM_LOAD( "tw1cg6.18d", 0xc00000, 0x200000, CRC(d764027c) SHA1(5cbf93392683885c220628936ba50c09cb40fcfb) )
|
||||||
ROM_LOAD( "tw1cg7.19d", 0xe00000, 0x200000, CRC(8d89877e) SHA1(7d76d48d64d7ac5411d714a4bb83f37e3e5b8df6) )
|
ROM_LOAD( "tw1cg7.19d", 0xe00000, 0x200000, CRC(8d89877e) SHA1(7d76d48d64d7ac5411d714a4bb83f37e3e5b8df6) )
|
||||||
|
|
||||||
ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */
|
ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */
|
||||||
ROM_LOAD( "tw1ccrl.3d", 0x000000, 0x200000, CRC(d08f5794) SHA1(336a97a2b060505e259e3bcedb9eb8aa4ea8815e) )
|
ROM_LOAD( "tw1ccrl.3d", 0x000000, 0x200000, CRC(d08f5794) SHA1(336a97a2b060505e259e3bcedb9eb8aa4ea8815e) )
|
||||||
ROM_LOAD( "tw1ccrh.1d", 0x200000, 0x080000, CRC(ad17e693) SHA1(4f06dc82c03159894fb8e10383862920f94563b1) )
|
ROM_LOAD( "tw1ccrh.1d", 0x200000, 0x080000, CRC(ad17e693) SHA1(4f06dc82c03159894fb8e10383862920f94563b1) )
|
||||||
|
|
||||||
ROM_REGION( 0x600000, "pointrom", 0 ) /* 3d model data */
|
ROM_REGION( 0x600000, "pointrom", 0 ) /* 3d model data */
|
||||||
ROM_LOAD( "tw1ptrl0.18k", 0x000000, 0x080000, CRC(44ac5e86) SHA1(5e42db58f2e352c0fe5e49588a9283817dd15ab1) )
|
ROM_LOAD( "tw1ptrl0.18k", 0x000000, 0x080000, CRC(44ac5e86) SHA1(5e42db58f2e352c0fe5e49588a9283817dd15ab1) )
|
||||||
@ -4584,18 +4584,18 @@ ROM_START( aquajet )
|
|||||||
ROM_LOAD( "aj1scg2.8f", 0x400000, 0x200000, CRC(1048a09b) SHA1(6859533e24db5ac54e28d480aaac7b411a648dfe) )
|
ROM_LOAD( "aj1scg2.8f", 0x400000, 0x200000, CRC(1048a09b) SHA1(6859533e24db5ac54e28d480aaac7b411a648dfe) )
|
||||||
|
|
||||||
ROM_REGION( 0x200000*8, "textile", ROMREGION_DISPOSE) /* 16x16x8bpp texture tiles */
|
ROM_REGION( 0x200000*8, "textile", ROMREGION_DISPOSE) /* 16x16x8bpp texture tiles */
|
||||||
ROM_LOAD( "aj1cg0.8d", 0x000000, 0x200000, CRC(b814e1eb) SHA1(1af29897dcfd0a58743b4fcdd5049d9e6e3d4cbd) )
|
ROM_LOAD( "aj1cg0.8d", 0x000000, 0x200000, CRC(b814e1eb) SHA1(1af29897dcfd0a58743b4fcdd5049d9e6e3d4cbd) )
|
||||||
ROM_LOAD( "aj1cg1.10d", 0x200000, 0x200000, CRC(dc63d496) SHA1(d3c3eea6b134850004062dd513c0f26096101227) )
|
ROM_LOAD( "aj1cg1.10d", 0x200000, 0x200000, CRC(dc63d496) SHA1(d3c3eea6b134850004062dd513c0f26096101227) )
|
||||||
ROM_LOAD( "aj1cg2.12d", 0x400000, 0x200000, CRC(71fbb571) SHA1(40f84ab5a4a7bb4438fb53751762609671d17800) )
|
ROM_LOAD( "aj1cg2.12d", 0x400000, 0x200000, CRC(71fbb571) SHA1(40f84ab5a4a7bb4438fb53751762609671d17800) )
|
||||||
ROM_LOAD( "aj1cg3.13d", 0x600000, 0x200000, CRC(e28052e2) SHA1(3dbc446d7a13312ed4c1d20c2e1209947853f2c4) )
|
ROM_LOAD( "aj1cg3.13d", 0x600000, 0x200000, CRC(e28052e2) SHA1(3dbc446d7a13312ed4c1d20c2e1209947853f2c4) )
|
||||||
ROM_LOAD( "aj1cg4.14d", 0x800000, 0x200000, CRC(c77ae1a0) SHA1(e15f2ccbadb8634f6e5cfd2cf48f428d68bd92e1) )
|
ROM_LOAD( "aj1cg4.14d", 0x800000, 0x200000, CRC(c77ae1a0) SHA1(e15f2ccbadb8634f6e5cfd2cf48f428d68bd92e1) )
|
||||||
ROM_LOAD( "aj1cg5.16d", 0xa00000, 0x200000, CRC(15be0080) SHA1(ca14dfd2a66996f0b32fa1155c04f21d300e8f30) )
|
ROM_LOAD( "aj1cg5.16d", 0xa00000, 0x200000, CRC(15be0080) SHA1(ca14dfd2a66996f0b32fa1155c04f21d300e8f30) )
|
||||||
ROM_LOAD( "aj1cg6.18d", 0xc00000, 0x200000, CRC(1a4f733a) SHA1(60a991f06e73667fa2c9016189999c4301cba24f) )
|
ROM_LOAD( "aj1cg6.18d", 0xc00000, 0x200000, CRC(1a4f733a) SHA1(60a991f06e73667fa2c9016189999c4301cba24f) )
|
||||||
ROM_LOAD( "aj1cg7.19d", 0xe00000, 0x200000, CRC(ea118130) SHA1(24ef22e5c8c6f6e8a01c72466be1e7acbfba63bc) )
|
ROM_LOAD( "aj1cg7.19d", 0xe00000, 0x200000, CRC(ea118130) SHA1(24ef22e5c8c6f6e8a01c72466be1e7acbfba63bc) )
|
||||||
|
|
||||||
ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */
|
ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */
|
||||||
ROM_LOAD( "aj1ccrl.3d", 0x000000, 0x200000, CRC(3cc7a247) SHA1(336e4dd506d932987e20a5890dd3b0db75c02ccf) )
|
ROM_LOAD( "aj1ccrl.3d", 0x000000, 0x200000, CRC(3cc7a247) SHA1(336e4dd506d932987e20a5890dd3b0db75c02ccf) )
|
||||||
ROM_LOAD( "aj1ccrh.1d", 0x200000, 0x080000, CRC(9d936030) SHA1(a383bcca494a9f8d9a08fbe9940c8071d4525d65) )
|
ROM_LOAD( "aj1ccrh.1d", 0x200000, 0x080000, CRC(9d936030) SHA1(a383bcca494a9f8d9a08fbe9940c8071d4525d65) )
|
||||||
|
|
||||||
ROM_REGION( 0x600000, "pointrom", 0 ) /* 3d model data */
|
ROM_REGION( 0x600000, "pointrom", 0 ) /* 3d model data */
|
||||||
ROM_LOAD( "aj1ptrl0.18k", 0x000000, 0x080000, CRC(16205d45) SHA1(7e9681af852e2e875f80cbbe350e4982eaf80884) )
|
ROM_LOAD( "aj1ptrl0.18k", 0x000000, 0x080000, CRC(16205d45) SHA1(7e9681af852e2e875f80cbbe350e4982eaf80884) )
|
||||||
@ -4890,7 +4890,7 @@ static INPUT_PORTS_START( aquajet )
|
|||||||
PORT_START("MCUP5B")
|
PORT_START("MCUP5B")
|
||||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||||
|
|||||||
@ -1264,7 +1264,7 @@ static READ8_HANDLER(s23_mcu_p6_r)
|
|||||||
|
|
||||||
static WRITE8_HANDLER(s23_mcu_p6_w)
|
static WRITE8_HANDLER(s23_mcu_p6_w)
|
||||||
{
|
{
|
||||||
// printf("%02x to port 6\n", data);
|
// printf("%02x to port 6\n", data);
|
||||||
}
|
}
|
||||||
|
|
||||||
static ADDRESS_MAP_START( s23h8iomap, ADDRESS_SPACE_IO, 8 )
|
static ADDRESS_MAP_START( s23h8iomap, ADDRESS_SPACE_IO, 8 )
|
||||||
@ -1339,8 +1339,8 @@ static ADDRESS_MAP_START( s23iobrdmap, ADDRESS_SPACE_PROGRAM, 8 )
|
|||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
/*
|
/*
|
||||||
port 5 bit 2 = LED to indicate transmitting packet to main
|
port 5 bit 2 = LED to indicate transmitting packet to main
|
||||||
port 4 bit 2 = SENSE line back to main (0 = asserted, 1 = dropped)
|
port 4 bit 2 = SENSE line back to main (0 = asserted, 1 = dropped)
|
||||||
*/
|
*/
|
||||||
static ADDRESS_MAP_START( s23iobrdiomap, ADDRESS_SPACE_IO, 8 )
|
static ADDRESS_MAP_START( s23iobrdiomap, ADDRESS_SPACE_IO, 8 )
|
||||||
AM_RANGE(H8_PORT_4, H8_PORT_4) AM_READWRITE( s23_iob_p4_r, s23_iob_p4_w )
|
AM_RANGE(H8_PORT_4, H8_PORT_4) AM_READWRITE( s23_iob_p4_r, s23_iob_p4_w )
|
||||||
@ -1636,7 +1636,7 @@ ROM_START( timecrs2 )
|
|||||||
|
|
||||||
ROM_REGION( 0x80000, "audiocpu", 0 ) /* Hitachi H8/3002 MCU code */
|
ROM_REGION( 0x80000, "audiocpu", 0 ) /* Hitachi H8/3002 MCU code */
|
||||||
ROM_LOAD16_WORD_SWAP( "tss3verb.3", 0x000000, 0x080000, CRC(41e41994) SHA1(eabc1a307c329070bfc6486cb68169c94ff8a162) )
|
ROM_LOAD16_WORD_SWAP( "tss3verb.3", 0x000000, 0x080000, CRC(41e41994) SHA1(eabc1a307c329070bfc6486cb68169c94ff8a162) )
|
||||||
|
|
||||||
ROM_REGION( 0x40000, "ioboard", 0 ) /* I/O board HD643334 H8/3334 MCU code */
|
ROM_REGION( 0x40000, "ioboard", 0 ) /* I/O board HD643334 H8/3334 MCU code */
|
||||||
ROM_LOAD( "tssioprog.ic3", 0x000000, 0x040000, CRC(edad4538) SHA1(1330189184a636328d956c0e435f8d9ad2e96a80) )
|
ROM_LOAD( "tssioprog.ic3", 0x000000, 0x040000, CRC(edad4538) SHA1(1330189184a636328d956c0e435f8d9ad2e96a80) )
|
||||||
|
|
||||||
|
|||||||
@ -1134,7 +1134,7 @@ static WRITE64_HANDLER( eeprom_93c46a_w )
|
|||||||
COMBINE_DATA(&dc_texture_ram[offset]);
|
COMBINE_DATA(&dc_texture_ram[offset]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Naomi 1 address map
|
* Naomi 1 address map
|
||||||
@ -1249,7 +1249,7 @@ static ADDRESS_MAP_START( aw_map, ADDRESS_SPACE_PROGRAM, 64 )
|
|||||||
AM_RANGE(0x12800000, 0x12ffffff) AM_WRITE( ta_fifo_yuv_w )
|
AM_RANGE(0x12800000, 0x12ffffff) AM_WRITE( ta_fifo_yuv_w )
|
||||||
AM_RANGE(0x13000000, 0x137fffff) AM_WRITE( ta_texture_directpath1_w ) AM_MIRROR(0x00800000) // access to texture / fraembfufer memory (either 32-bit or 64-bit area depending on SB_LMMODE1 register - cannot be written directly, only through dma / store queue
|
AM_RANGE(0x13000000, 0x137fffff) AM_WRITE( ta_texture_directpath1_w ) AM_MIRROR(0x00800000) // access to texture / fraembfufer memory (either 32-bit or 64-bit area depending on SB_LMMODE1 register - cannot be written directly, only through dma / store queue
|
||||||
|
|
||||||
|
|
||||||
/* Area 5 */
|
/* Area 5 */
|
||||||
//AM_RANGE(0x14000000, 0x17ffffff) AM_NOP // MPX Ext.
|
//AM_RANGE(0x14000000, 0x17ffffff) AM_NOP // MPX Ext.
|
||||||
|
|
||||||
|
|||||||
@ -166,7 +166,7 @@ Notes:
|
|||||||
-------
|
-------
|
||||||
M Connector H Connector G Connector
|
M Connector H Connector G Connector
|
||||||
------------ ------------ ------------
|
------------ ------------ ------------
|
||||||
1 BUTTON 2 (grenade) 1 GND Solder Parts
|
1 BUTTON 2 (grenade) 1 GND Solder Parts
|
||||||
2 not used 2 GND GND A 1 GND
|
2 not used 2 GND GND A 1 GND
|
||||||
3 +12V (to motor in gun) 3 GND VIDEO GND B 2 RED
|
3 +12V (to motor in gun) 3 GND VIDEO GND B 2 RED
|
||||||
4 -12V (to motor in gun) 4 GND BLUE C 3 GREEN
|
4 -12V (to motor in gun) 4 GND BLUE C 3 GREEN
|
||||||
|
|||||||
@ -414,7 +414,7 @@ static READ8_DEVICE_HANDLER( steering_changed_r )
|
|||||||
UINT8 steer_new = input_port_read(device->machine, "STEER");
|
UINT8 steer_new = input_port_read(device->machine, "STEER");
|
||||||
steer_accum += (INT8)(steer_new - steer_last);
|
steer_accum += (INT8)(steer_new - steer_last);
|
||||||
steer_last = steer_new;
|
steer_last = steer_new;
|
||||||
|
|
||||||
/* if we have delta, clock things */
|
/* if we have delta, clock things */
|
||||||
if (steer_accum < 0)
|
if (steer_accum < 0)
|
||||||
{
|
{
|
||||||
@ -551,7 +551,7 @@ static INPUT_PORTS_START( polepos )
|
|||||||
PORT_DIPNAME( 0x80, 0x80, "Nr. of Laps" )
|
PORT_DIPNAME( 0x80, 0x80, "Nr. of Laps" )
|
||||||
PORT_DIPSETTING( 0x80, "3" )
|
PORT_DIPSETTING( 0x80, "3" )
|
||||||
PORT_DIPSETTING( 0x00, "4" )
|
PORT_DIPSETTING( 0x00, "4" )
|
||||||
|
|
||||||
PORT_START("DSWA_HI")
|
PORT_START("DSWA_HI")
|
||||||
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
|
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
|
||||||
|
|
||||||
@ -580,7 +580,7 @@ static INPUT_PORTS_START( polepos )
|
|||||||
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
|
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
|
||||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ))
|
PORT_DIPSETTING( 0x80, DEF_STR( Off ))
|
||||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||||
|
|
||||||
PORT_START("DSWB_HI")
|
PORT_START("DSWB_HI")
|
||||||
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWB")
|
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWB")
|
||||||
|
|
||||||
@ -631,7 +631,7 @@ static INPUT_PORTS_START( poleposa )
|
|||||||
PORT_DIPNAME( 0x01, 0x01, "Nr. of Laps" )
|
PORT_DIPNAME( 0x01, 0x01, "Nr. of Laps" )
|
||||||
PORT_DIPSETTING( 0x01, "3" )
|
PORT_DIPSETTING( 0x01, "3" )
|
||||||
PORT_DIPSETTING( 0x00, "4" )
|
PORT_DIPSETTING( 0x00, "4" )
|
||||||
|
|
||||||
PORT_START("DSWA_HI")
|
PORT_START("DSWA_HI")
|
||||||
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
|
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
|
||||||
|
|
||||||
@ -709,7 +709,7 @@ static INPUT_PORTS_START( topracra )
|
|||||||
PORT_DIPNAME( 0x80, 0x80, "Nr. of Laps" )
|
PORT_DIPNAME( 0x80, 0x80, "Nr. of Laps" )
|
||||||
PORT_DIPSETTING( 0x80, "3" )
|
PORT_DIPSETTING( 0x80, "3" )
|
||||||
PORT_DIPSETTING( 0x00, "4" )
|
PORT_DIPSETTING( 0x00, "4" )
|
||||||
|
|
||||||
PORT_START("DSWA_HI")
|
PORT_START("DSWA_HI")
|
||||||
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
|
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
|
||||||
|
|
||||||
@ -790,7 +790,7 @@ static INPUT_PORTS_START( polepos2 )
|
|||||||
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) /* docs say "freeze", but it doesn't seem to work */
|
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) /* docs say "freeze", but it doesn't seem to work */
|
||||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ))
|
PORT_DIPSETTING( 0x01, DEF_STR( Off ))
|
||||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||||
|
|
||||||
PORT_START("DSWA_HI")
|
PORT_START("DSWA_HI")
|
||||||
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
|
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
|
||||||
|
|
||||||
|
|||||||
@ -483,9 +483,9 @@ static READ32_HANDLER( randomrabbits )
|
|||||||
static WRITE32_HANDLER ( rabbit_rombank_w )
|
static WRITE32_HANDLER ( rabbit_rombank_w )
|
||||||
{
|
{
|
||||||
UINT8 *dataroms = memory_region(space->machine, "gfx1");
|
UINT8 *dataroms = memory_region(space->machine, "gfx1");
|
||||||
// int bank;
|
// int bank;
|
||||||
// mame_printf_debug("rabbit rombank %08x\n",data&0x3ff);
|
// mame_printf_debug("rabbit rombank %08x\n",data&0x3ff);
|
||||||
// bank = data & 0x3ff;
|
// bank = data & 0x3ff;
|
||||||
|
|
||||||
// memory_set_bankptr(space->machine, 1,&dataroms[0x40000*(bank&0x3ff)]);
|
// memory_set_bankptr(space->machine, 1,&dataroms[0x40000*(bank&0x3ff)]);
|
||||||
memory_set_bankptr(space->machine, 1,&dataroms[0]);
|
memory_set_bankptr(space->machine, 1,&dataroms[0]);
|
||||||
|
|||||||
@ -263,7 +263,7 @@ static MACHINE_RESET( system16a )
|
|||||||
/* if we have a fake i8751 handler, disable the actual 8751 */
|
/* if we have a fake i8751 handler, disable the actual 8751 */
|
||||||
if (i8751_vblank_hook != NULL)
|
if (i8751_vblank_hook != NULL)
|
||||||
timer_call_after_resynch(machine, NULL, 0, suspend_i8751);
|
timer_call_after_resynch(machine, NULL, 0, suspend_i8751);
|
||||||
|
|
||||||
mcu_control = 0x00;
|
mcu_control = 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -363,7 +363,7 @@ static WRITE8_DEVICE_HANDLER( video_control_w )
|
|||||||
if (((video_control ^ data) & 0x0c) && lamp_changed_w)
|
if (((video_control ^ data) & 0x0c) && lamp_changed_w)
|
||||||
(*lamp_changed_w)(video_control ^ data, data);
|
(*lamp_changed_w)(video_control ^ data, data);
|
||||||
video_control = data;
|
video_control = data;
|
||||||
|
|
||||||
segaic16_tilemap_set_flip(device->machine, 0, data & 0x80);
|
segaic16_tilemap_set_flip(device->machine, 0, data & 0x80);
|
||||||
segaic16_sprites_set_flip(device->machine, 0, data & 0x80);
|
segaic16_sprites_set_flip(device->machine, 0, data & 0x80);
|
||||||
|
|
||||||
@ -841,7 +841,7 @@ static WRITE8_HANDLER( mcu_control_w )
|
|||||||
cpu_set_input_line(maincpu, INPUT_LINE_RESET, (data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
|
cpu_set_input_line(maincpu, INPUT_LINE_RESET, (data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
|
||||||
for (irqline = 1; irqline <= 7; irqline++)
|
for (irqline = 1; irqline <= 7; irqline++)
|
||||||
cpu_set_input_line(maincpu, irqline, ((~data & 7) == irqline) ? ASSERT_LINE : CLEAR_LINE);
|
cpu_set_input_line(maincpu, irqline, ((~data & 7) == irqline) ? ASSERT_LINE : CLEAR_LINE);
|
||||||
|
|
||||||
if (data & 0x40)
|
if (data & 0x40)
|
||||||
segaic16_set_display_enable(space->machine, 1);
|
segaic16_set_display_enable(space->machine, 1);
|
||||||
|
|
||||||
@ -854,14 +854,14 @@ static WRITE8_HANDLER( mcu_control_w )
|
|||||||
|
|
||||||
static WRITE8_HANDLER( mcu_io_w )
|
static WRITE8_HANDLER( mcu_io_w )
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
1.00 0... = work RAM (accessed @ $4000+x) or I/O (accessed @ $8000+x)
|
1.00 0... = work RAM (accessed @ $4000+x) or I/O (accessed @ $8000+x)
|
||||||
1.00 1... = text RAM (accessed @ $8000+x)
|
1.00 1... = text RAM (accessed @ $8000+x)
|
||||||
1.01 1... = palette RAM
|
1.01 1... = palette RAM
|
||||||
1.10 1... = checksum #0
|
1.10 1... = checksum #0
|
||||||
1.11 0... = checksum #1
|
1.11 0... = checksum #1
|
||||||
1.11 1... = checksum #2
|
1.11 1... = checksum #2
|
||||||
*/
|
*/
|
||||||
switch ((mcu_control >> 3) & 7)
|
switch ((mcu_control >> 3) & 7)
|
||||||
{
|
{
|
||||||
case 0:
|
case 0:
|
||||||
@ -2043,7 +2043,7 @@ ROM_END
|
|||||||
**************************************************************************************************************************
|
**************************************************************************************************************************
|
||||||
**************************************************************************************************************************
|
**************************************************************************************************************************
|
||||||
Action Fighter, Sega System 16A
|
Action Fighter, Sega System 16A
|
||||||
CPU: FD1089A 317-0018<EFBFBD>@(dedicated cabinet version uses 317-0014)
|
CPU: FD1089A 317-0018?@(dedicated cabinet version uses 317-0014)
|
||||||
*/
|
*/
|
||||||
ROM_START( afighter )
|
ROM_START( afighter )
|
||||||
ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
|
ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
|
||||||
@ -2930,8 +2930,8 @@ ROM_START( shinoblb )
|
|||||||
ROM_LOAD( "7751.bin", 0x0000, 0x0400, CRC(6a9534fc) SHA1(67ad94674db5c2aab75785668f610f6f4eccd158) ) /* 7751 - U34 */
|
ROM_LOAD( "7751.bin", 0x0000, 0x0400, CRC(6a9534fc) SHA1(67ad94674db5c2aab75785668f610f6f4eccd158) ) /* 7751 - U34 */
|
||||||
|
|
||||||
ROM_REGION( 0x08000, "n7751data", 0 ) /* 7751 sound data */
|
ROM_REGION( 0x08000, "n7751data", 0 ) /* 7751 sound data */
|
||||||
ROM_LOAD( "b9", 0x0000, 0x8000, CRC(6d7966da) SHA1(90f55a99f784c21d7c135e630f4e8b1d4d043d66) )
|
ROM_LOAD( "b9", 0x0000, 0x8000, CRC(6d7966da) SHA1(90f55a99f784c21d7c135e630f4e8b1d4d043d66) )
|
||||||
|
|
||||||
ROM_REGION( 0x08000, "samples", 0 )
|
ROM_REGION( 0x08000, "samples", 0 )
|
||||||
/* sound samples (played by what?, not the same as the original) */
|
/* sound samples (played by what?, not the same as the original) */
|
||||||
/* marked as 'bad dump' pending investigation, we might actually be missing a cpu rom to play them */
|
/* marked as 'bad dump' pending investigation, we might actually be missing a cpu rom to play them */
|
||||||
|
|||||||
@ -792,7 +792,7 @@ static READ32_HANDLER ( stv_io_r32 )
|
|||||||
// if(LOG_IOGA) logerror("(PC=%08X): I/O r %08X & %08X\n", cpu_get_pc(space->cpu), offset*4, mem_mask);
|
// if(LOG_IOGA) logerror("(PC=%08X): I/O r %08X & %08X\n", cpu_get_pc(space->cpu), offset*4, mem_mask);
|
||||||
// popmessage("SEL: %02x MUX: %02x OFF: %02x",port_sel,mux_data,offset*4);
|
// popmessage("SEL: %02x MUX: %02x OFF: %02x",port_sel,mux_data,offset*4);
|
||||||
|
|
||||||
// printf("(PC=%08X): I/O r %08X & %08X\n", cpu_get_pc(space->cpu), offset*4, mem_mask);
|
// printf("(PC=%08X): I/O r %08X & %08X\n", cpu_get_pc(space->cpu), offset*4, mem_mask);
|
||||||
|
|
||||||
switch(offset)
|
switch(offset)
|
||||||
{
|
{
|
||||||
@ -907,7 +907,7 @@ static WRITE32_HANDLER ( stv_io_w32 )
|
|||||||
{
|
{
|
||||||
// if(LOG_IOGA) logerror("(PC=%08X): I/O w %08X = %08X & %08X\n", cpu_get_pc(space->cpu), offset*4, data, mem_mask);
|
// if(LOG_IOGA) logerror("(PC=%08X): I/O w %08X = %08X & %08X\n", cpu_get_pc(space->cpu), offset*4, data, mem_mask);
|
||||||
|
|
||||||
// printf("(PC=%08X): I/O w %08X = %08X & %08X\n", cpu_get_pc(space->cpu), offset*4, data, mem_mask);
|
// printf("(PC=%08X): I/O w %08X = %08X & %08X\n", cpu_get_pc(space->cpu), offset*4, data, mem_mask);
|
||||||
|
|
||||||
switch(offset)
|
switch(offset)
|
||||||
{
|
{
|
||||||
|
|||||||
@ -189,7 +189,7 @@ static WRITE8_HANDLER( suprgolf_vregs_w )
|
|||||||
suprgolf_bg_bank = (data & 0x1f);
|
suprgolf_bg_bank = (data & 0x1f);
|
||||||
|
|
||||||
//if(data & 0x60)
|
//if(data & 0x60)
|
||||||
// printf("Video regs with data %02x activated\n",data);
|
// printf("Video regs with data %02x activated\n",data);
|
||||||
}
|
}
|
||||||
|
|
||||||
static UINT8 pen;
|
static UINT8 pen;
|
||||||
@ -232,7 +232,7 @@ static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
|
|||||||
AM_RANGE(0x00, 0x00) AM_READ_PORT("P1")
|
AM_RANGE(0x00, 0x00) AM_READ_PORT("P1")
|
||||||
AM_RANGE(0x01, 0x01) AM_READ_PORT("P2")
|
AM_RANGE(0x01, 0x01) AM_READ_PORT("P2")
|
||||||
AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") // ??
|
AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") // ??
|
||||||
// AM_RANGE(0x03, 0x03)
|
// AM_RANGE(0x03, 0x03)
|
||||||
AM_RANGE(0x04, 0x04) AM_READ_PORT("SYSTEM")
|
AM_RANGE(0x04, 0x04) AM_READ_PORT("SYSTEM")
|
||||||
AM_RANGE(0x05, 0x05) AM_READ(rom_bank_select_r) AM_WRITE(rom_bank_select_w)
|
AM_RANGE(0x05, 0x05) AM_READ(rom_bank_select_r) AM_WRITE(rom_bank_select_w)
|
||||||
AM_RANGE(0x06, 0x06) AM_READWRITE( suprgolf_vregs_r,suprgolf_vregs_w ) // game locks up or crashes? if this doesn't return right values?
|
AM_RANGE(0x06, 0x06) AM_READWRITE( suprgolf_vregs_r,suprgolf_vregs_w ) // game locks up or crashes? if this doesn't return right values?
|
||||||
|
|||||||
@ -1,89 +1,89 @@
|
|||||||
/*
|
/*
|
||||||
System 16 / 18 bootlegs
|
System 16 / 18 bootlegs
|
||||||
|
|
||||||
Sega's System 16 and System 18 hardware was heavily bootlegged.
|
|
||||||
|
|
||||||
Most of these bootlegs had significant modifications compared to the real hardware.
|
|
||||||
They still roughly reflect which system they have been bootlegged from however.
|
|
||||||
|
|
||||||
|
Sega's System 16 and System 18 hardware was heavily bootlegged.
|
||||||
Bootlegs
|
|
||||||
|
Most of these bootlegs had significant modifications compared to the real hardware.
|
||||||
Type 16B:
|
They still roughly reflect which system they have been bootlegged from however.
|
||||||
--------
|
|
||||||
|
|
||||||
Encrypted / Protected bootlegs
|
Bootlegs
|
||||||
- Bay Route (set 1)
|
|
||||||
|
Type 16B:
|
||||||
|
--------
|
||||||
|
|
||||||
|
Encrypted / Protected bootlegs
|
||||||
|
- Bay Route (set 1)
|
||||||
- Golden Axe (set 1)
|
- Golden Axe (set 1)
|
||||||
|
|
||||||
These share a common encryption, Bay Route is also proteceted, the Golden Axe set has a strange
|
|
||||||
unknown rom, maybe it's related to an MCU that isn't present on the GA board?
|
|
||||||
|
|
||||||
---
|
These share a common encryption, Bay Route is also proteceted, the Golden Axe set has a strange
|
||||||
|
unknown rom, maybe it's related to an MCU that isn't present on the GA board?
|
||||||
Datsu bootlegs
|
|
||||||
- Bay Route (set 2)
|
|
||||||
- Flash Point (2 sets)
|
|
||||||
- Dynamite Dux
|
|
||||||
- Tough Turf
|
|
||||||
|
|
||||||
The tilemap page select writes have been split across 4 8-bit registers on these
|
|
||||||
|
|
||||||
---
|
|
||||||
|
|
||||||
Other bootegs
|
|
||||||
- Tetris
|
|
||||||
- E-Swat
|
|
||||||
|
|
||||||
These appear to be a variation no the encrypted / protected bootlegs, but without the encryption
|
---
|
||||||
or protection
|
|
||||||
|
Datsu bootlegs
|
||||||
- Golden Axe (set 2)
|
- Bay Route (set 2)
|
||||||
|
- Flash Point (2 sets)
|
||||||
Unique bootleg, tilemap paging is split across 8 registers, bits are inverted etc.
|
- Dynamite Dux
|
||||||
|
- Tough Turf
|
||||||
|
|
||||||
|
The tilemap page select writes have been split across 4 8-bit registers on these
|
||||||
|
|
||||||
|
---
|
||||||
|
|
||||||
|
Other bootegs
|
||||||
|
- Tetris
|
||||||
|
- E-Swat
|
||||||
|
|
||||||
|
These appear to be a variation no the encrypted / protected bootlegs, but without the encryption
|
||||||
|
or protection
|
||||||
|
|
||||||
|
- Golden Axe (set 2)
|
||||||
|
|
||||||
|
Unique bootleg, tilemap paging is split across 8 registers, bits are inverted etc.
|
||||||
|
|
||||||
|
---
|
||||||
|
|
||||||
|
Type 16A:
|
||||||
|
---------
|
||||||
|
|
||||||
|
Shinobi
|
||||||
|
Passing Shot (2 sets)
|
||||||
|
Wonderboy 3
|
||||||
|
|
||||||
|
System 18 (more commplex tilemaps)
|
||||||
|
----------------------------------
|
||||||
|
|
||||||
|
Alien Storm
|
||||||
|
Shadow Dancer
|
||||||
|
Moonwalker
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
AMT Games
|
||||||
|
---------
|
||||||
|
|
||||||
|
these aren't strictly bootlegs, but are clearly based on bootleg Tetris hardware with additional protection
|
||||||
|
- Beauty Block
|
||||||
|
- IQ Pipe
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
ToDo
|
||||||
|
----
|
||||||
|
|
||||||
|
Fully fix the tilemap banking and scrolling for all sets
|
||||||
|
Fix sprites (and check for bad roms)
|
||||||
|
Add support for custom sound HW used by the various bootlegs
|
||||||
|
Look at the system18 bootlegs
|
||||||
|
|
||||||
|
Partially Done
|
||||||
|
--------------
|
||||||
|
|
||||||
|
Strip out old hacks & obsolete comments (many related to the *original* system16/18 sets which have their own
|
||||||
|
driver now)
|
||||||
|
|
||||||
---
|
|
||||||
|
|
||||||
Type 16A:
|
|
||||||
---------
|
|
||||||
|
|
||||||
Shinobi
|
|
||||||
Passing Shot (2 sets)
|
|
||||||
Wonderboy 3
|
|
||||||
|
|
||||||
System 18 (more commplex tilemaps)
|
|
||||||
----------------------------------
|
|
||||||
|
|
||||||
Alien Storm
|
|
||||||
Shadow Dancer
|
|
||||||
Moonwalker
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
AMT Games
|
|
||||||
---------
|
|
||||||
|
|
||||||
these aren't strictly bootlegs, but are clearly based on bootleg Tetris hardware with additional protection
|
|
||||||
- Beauty Block
|
|
||||||
- IQ Pipe
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
ToDo
|
|
||||||
----
|
|
||||||
|
|
||||||
Fully fix the tilemap banking and scrolling for all sets
|
|
||||||
Fix sprites (and check for bad roms)
|
|
||||||
Add support for custom sound HW used by the various bootlegs
|
|
||||||
Look at the system18 bootlegs
|
|
||||||
|
|
||||||
Partially Done
|
|
||||||
--------------
|
|
||||||
|
|
||||||
Strip out old hacks & obsolete comments (many related to the *original* system16/18 sets which have their own
|
|
||||||
driver now)
|
|
||||||
|
|
||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "driver.h"
|
#include "driver.h"
|
||||||
@ -613,7 +613,7 @@ static MACHINE_RESET( eswatbl )
|
|||||||
2,3, 6,7,
|
2,3, 6,7,
|
||||||
10,11, 14,15
|
10,11, 14,15
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
sys16_obj_bank = bank;
|
sys16_obj_bank = bank;
|
||||||
sys16_sprxoffset = -0x23c;
|
sys16_sprxoffset = -0x23c;
|
||||||
@ -781,26 +781,26 @@ static WRITE16_HANDLER( sys16bootleg_fgpage_w )
|
|||||||
|
|
||||||
static WRITE16_HANDLER( sys16bootleg_fgscrollx_bank_w )
|
static WRITE16_HANDLER( sys16bootleg_fgscrollx_bank_w )
|
||||||
{
|
{
|
||||||
|
|
||||||
int scroll = data & 0x1ff;
|
int scroll = data & 0x1ff;
|
||||||
int bank = (data&0xc000)>>14;
|
int bank = (data&0xc000)>>14;
|
||||||
scroll+=0x200;
|
scroll+=0x200;
|
||||||
set_tile_bank( bank );
|
set_tile_bank( bank );
|
||||||
|
|
||||||
scroll+=3; // so that the character portraits in attract mode are properly aligned (alighnment on character select no longer matches original tho?)
|
scroll+=3; // so that the character portraits in attract mode are properly aligned (alighnment on character select no longer matches original tho?)
|
||||||
sys16_fg_scrollx = -scroll;
|
sys16_fg_scrollx = -scroll;
|
||||||
}
|
}
|
||||||
|
|
||||||
static WRITE16_HANDLER( sys16bootleg_fgscrollx_w )
|
static WRITE16_HANDLER( sys16bootleg_fgscrollx_w )
|
||||||
{
|
{
|
||||||
|
|
||||||
//data ^= 0x7; // 4 player passing shot
|
//data ^= 0x7; // 4 player passing shot
|
||||||
|
|
||||||
int scroll = data & 0x1ff;
|
int scroll = data & 0x1ff;
|
||||||
scroll+=0x200;
|
scroll+=0x200;
|
||||||
scroll+=3;
|
scroll+=3;
|
||||||
|
|
||||||
|
|
||||||
sys16_fg_scrollx = -scroll;
|
sys16_fg_scrollx = -scroll;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -817,7 +817,7 @@ static WRITE16_HANDLER( sys16bootleg_bgscrollx_w )
|
|||||||
int scroll = data & 0x1ff;
|
int scroll = data & 0x1ff;
|
||||||
scroll+=0x200;
|
scroll+=0x200;
|
||||||
scroll+=1; // so that the background fo the select screen is properly aligned
|
scroll+=1; // so that the background fo the select screen is properly aligned
|
||||||
sys16_bg_scrollx = -scroll;
|
sys16_bg_scrollx = -scroll;
|
||||||
}
|
}
|
||||||
|
|
||||||
static WRITE16_HANDLER( sys16bootleg_bgscrolly_w )
|
static WRITE16_HANDLER( sys16bootleg_bgscrolly_w )
|
||||||
@ -847,7 +847,7 @@ static ADDRESS_MAP_START( goldnaxe_b1_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0xc42000, 0xc42001) AM_READ_PORT("DSW2")
|
AM_RANGE(0xc42000, 0xc42001) AM_READ_PORT("DSW2")
|
||||||
AM_RANGE(0xc42006, 0xc42007) AM_WRITE(SMH_NOP) // sound related?
|
AM_RANGE(0xc42006, 0xc42007) AM_WRITE(SMH_NOP) // sound related?
|
||||||
AM_RANGE(0xc43000, 0xc43001) AM_WRITE(SMH_NOP)
|
AM_RANGE(0xc43000, 0xc43001) AM_WRITE(SMH_NOP)
|
||||||
AM_RANGE(0xc43034, 0xc43035) AM_WRITE(SMH_NOP)
|
AM_RANGE(0xc43034, 0xc43035) AM_WRITE(SMH_NOP)
|
||||||
AM_RANGE(0xc80000, 0xc80001) AM_WRITE(SMH_NOP)
|
AM_RANGE(0xc80000, 0xc80001) AM_WRITE(SMH_NOP)
|
||||||
AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
|
AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
@ -878,21 +878,21 @@ static UINT16 datsu_page[4];
|
|||||||
void datsu_set_pages(void)
|
void datsu_set_pages(void)
|
||||||
{
|
{
|
||||||
UINT16 page;
|
UINT16 page;
|
||||||
|
|
||||||
page = ((datsu_page[0] & 0x00f0) >>0) |
|
page = ((datsu_page[0] & 0x00f0) >>0) |
|
||||||
((datsu_page[1] & 0x00f0) >>4) |
|
((datsu_page[1] & 0x00f0) >>4) |
|
||||||
((datsu_page[2] & 0x00f0) <<8) |
|
((datsu_page[2] & 0x00f0) <<8) |
|
||||||
((datsu_page[3] & 0x00f0) <<4);
|
((datsu_page[3] & 0x00f0) <<4);
|
||||||
|
|
||||||
|
|
||||||
set_fg_page( page );
|
set_fg_page( page );
|
||||||
|
|
||||||
page = ((datsu_page[0] & 0x000f) <<4) |
|
page = ((datsu_page[0] & 0x000f) <<4) |
|
||||||
((datsu_page[1] & 0x000f) <<0) |
|
((datsu_page[1] & 0x000f) <<0) |
|
||||||
((datsu_page[2] & 0x000f) <<12) |
|
((datsu_page[2] & 0x000f) <<12) |
|
||||||
((datsu_page[3] & 0x000f) <<8);
|
((datsu_page[3] & 0x000f) <<8);
|
||||||
|
|
||||||
set_bg_page( page );
|
set_bg_page( page );
|
||||||
}
|
}
|
||||||
|
|
||||||
static WRITE16_HANDLER( datsu_page0_w )
|
static WRITE16_HANDLER( datsu_page0_w )
|
||||||
@ -933,7 +933,7 @@ static ADDRESS_MAP_START( bayroute_b2_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0x718022, 0x718023) AM_WRITE(datsu_page1_w)
|
AM_RANGE(0x718022, 0x718023) AM_WRITE(datsu_page1_w)
|
||||||
AM_RANGE(0x718024, 0x718025) AM_WRITE(datsu_page2_w)
|
AM_RANGE(0x718024, 0x718025) AM_WRITE(datsu_page2_w)
|
||||||
AM_RANGE(0x718026, 0x718027) AM_WRITE(datsu_page3_w)
|
AM_RANGE(0x718026, 0x718027) AM_WRITE(datsu_page3_w)
|
||||||
|
|
||||||
AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
||||||
AM_RANGE(0x900000, 0x900001) AM_READ_PORT("DSW1")
|
AM_RANGE(0x900000, 0x900001) AM_READ_PORT("DSW1")
|
||||||
AM_RANGE(0x900002, 0x900003) AM_READ_PORT("DSW2")
|
AM_RANGE(0x900002, 0x900003) AM_READ_PORT("DSW2")
|
||||||
@ -956,7 +956,7 @@ static ADDRESS_MAP_START( dduxbl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0xc41000, 0xc41001) AM_READ_PORT("SERVICE")
|
AM_RANGE(0xc41000, 0xc41001) AM_READ_PORT("SERVICE")
|
||||||
AM_RANGE(0xc42002, 0xc42003) AM_READ_PORT("DSW1")
|
AM_RANGE(0xc42002, 0xc42003) AM_READ_PORT("DSW1")
|
||||||
AM_RANGE(0xc42000, 0xc42001) AM_READ_PORT("DSW2")
|
AM_RANGE(0xc42000, 0xc42001) AM_READ_PORT("DSW2")
|
||||||
|
|
||||||
AM_RANGE(0xC46000, 0xC46001) AM_WRITE(sys16bootleg_fgscrolly_w)
|
AM_RANGE(0xC46000, 0xC46001) AM_WRITE(sys16bootleg_fgscrolly_w)
|
||||||
AM_RANGE(0xC46008, 0xC46009) AM_WRITE(sys16bootleg_fgscrollx_w)
|
AM_RANGE(0xC46008, 0xC46009) AM_WRITE(sys16bootleg_fgscrollx_w)
|
||||||
AM_RANGE(0xC46010, 0xC46011) AM_WRITE(sys16bootleg_bgscrolly_w)
|
AM_RANGE(0xC46010, 0xC46011) AM_WRITE(sys16bootleg_bgscrolly_w)
|
||||||
@ -965,7 +965,7 @@ static ADDRESS_MAP_START( dduxbl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0xC46022, 0xC46023) AM_WRITE(datsu_page1_w)
|
AM_RANGE(0xC46022, 0xC46023) AM_WRITE(datsu_page1_w)
|
||||||
AM_RANGE(0xC46024, 0xC46025) AM_WRITE(datsu_page2_w)
|
AM_RANGE(0xC46024, 0xC46025) AM_WRITE(datsu_page2_w)
|
||||||
AM_RANGE(0xC46026, 0xC46027) AM_WRITE(datsu_page3_w)
|
AM_RANGE(0xC46026, 0xC46027) AM_WRITE(datsu_page3_w)
|
||||||
|
|
||||||
AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
|
AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
@ -976,7 +976,7 @@ static WRITE16_HANDLER( goldnax_b2_fgscrollx_w )
|
|||||||
{
|
{
|
||||||
int scroll = data & 0x1ff;
|
int scroll = data & 0x1ff;
|
||||||
int bank = (data&0xc000)>>14;
|
int bank = (data&0xc000)>>14;
|
||||||
set_tile_bank( bank );
|
set_tile_bank( bank );
|
||||||
scroll +=0x1f6;
|
scroll +=0x1f6;
|
||||||
scroll &= 0x3ff;
|
scroll &= 0x3ff;
|
||||||
sys16_fg_scrollx = -scroll;
|
sys16_fg_scrollx = -scroll;
|
||||||
@ -987,7 +987,7 @@ static WRITE16_HANDLER( goldnax_b2_bgscrollx_w )
|
|||||||
int scroll = data & 0x1ff;
|
int scroll = data & 0x1ff;
|
||||||
scroll +=0x1f4;
|
scroll +=0x1f4;
|
||||||
scroll &= 0x3ff;
|
scroll &= 0x3ff;
|
||||||
sys16_bg_scrollx = -scroll;
|
sys16_bg_scrollx = -scroll;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -1007,15 +1007,15 @@ static WRITE16_HANDLER( goldnax_b2_bgscrolly_w )
|
|||||||
}
|
}
|
||||||
|
|
||||||
static WRITE16_HANDLER( goldnax_b2_fgpage_w )
|
static WRITE16_HANDLER( goldnax_b2_fgpage_w )
|
||||||
{
|
{
|
||||||
UINT16 page;
|
UINT16 page;
|
||||||
COMBINE_DATA(&goldnax_b2_fgpage[offset]);
|
COMBINE_DATA(&goldnax_b2_fgpage[offset]);
|
||||||
|
|
||||||
page = ((goldnax_b2_fgpage[1] & 0xf) << 0) |
|
page = ((goldnax_b2_fgpage[1] & 0xf) << 0) |
|
||||||
((goldnax_b2_fgpage[0] & 0xf) << 4) |
|
((goldnax_b2_fgpage[0] & 0xf) << 4) |
|
||||||
((goldnax_b2_fgpage[3] & 0xf) << 8) |
|
((goldnax_b2_fgpage[3] & 0xf) << 8) |
|
||||||
((goldnax_b2_fgpage[2] & 0xf) << 12);
|
((goldnax_b2_fgpage[2] & 0xf) << 12);
|
||||||
|
|
||||||
set_fg_page( page^0xffff );
|
set_fg_page( page^0xffff );
|
||||||
|
|
||||||
}
|
}
|
||||||
@ -1026,10 +1026,10 @@ static WRITE16_HANDLER( goldnax_b2_bgpage_w )
|
|||||||
COMBINE_DATA(&goldnax_b2_bgpage[offset]);
|
COMBINE_DATA(&goldnax_b2_bgpage[offset]);
|
||||||
|
|
||||||
page = ((goldnax_b2_bgpage[1] & 0xf) << 0) |
|
page = ((goldnax_b2_bgpage[1] & 0xf) << 0) |
|
||||||
((goldnax_b2_bgpage[0] & 0xf) << 4) |
|
((goldnax_b2_bgpage[0] & 0xf) << 4) |
|
||||||
((goldnax_b2_bgpage[3] & 0xf) << 8) |
|
((goldnax_b2_bgpage[3] & 0xf) << 8) |
|
||||||
((goldnax_b2_bgpage[2] & 0xf) << 12);
|
((goldnax_b2_bgpage[2] & 0xf) << 12);
|
||||||
|
|
||||||
set_bg_page( page^0xffff );
|
set_bg_page( page^0xffff );
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1179,7 +1179,7 @@ static ADDRESS_MAP_START( fpointbl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0x400000, 0x40ffff) AM_RAM_WRITE( sys16_tileram_w ) AM_BASE(&sys16_tileram)
|
AM_RANGE(0x400000, 0x40ffff) AM_RAM_WRITE( sys16_tileram_w ) AM_BASE(&sys16_tileram)
|
||||||
AM_RANGE(0x410000, 0x410fff) AM_RAM_WRITE( sys16_textram_w ) AM_BASE(&sys16_textram)
|
AM_RANGE(0x410000, 0x410fff) AM_RAM_WRITE( sys16_textram_w ) AM_BASE(&sys16_textram)
|
||||||
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
||||||
|
|
||||||
AM_RANGE(0x600006, 0x600007) AM_WRITE(sound_command_w)
|
AM_RANGE(0x600006, 0x600007) AM_WRITE(sound_command_w)
|
||||||
AM_RANGE(0x601000, 0x601001) AM_READ_PORT("SERVICE")
|
AM_RANGE(0x601000, 0x601001) AM_READ_PORT("SERVICE")
|
||||||
AM_RANGE(0x601002, 0x601003) AM_READ_PORT("P1")
|
AM_RANGE(0x601002, 0x601003) AM_READ_PORT("P1")
|
||||||
@ -1194,12 +1194,12 @@ static ADDRESS_MAP_START( fpointbl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0xC46008, 0xC46009) AM_WRITE(sys16bootleg_fgscrollx_w)
|
AM_RANGE(0xC46008, 0xC46009) AM_WRITE(sys16bootleg_fgscrollx_w)
|
||||||
AM_RANGE(0xC46010, 0xC46011) AM_WRITE(sys16bootleg_bgscrolly_w)
|
AM_RANGE(0xC46010, 0xC46011) AM_WRITE(sys16bootleg_bgscrolly_w)
|
||||||
AM_RANGE(0xC46018, 0xC46019) AM_WRITE(sys16bootleg_bgscrollx_w)
|
AM_RANGE(0xC46018, 0xC46019) AM_WRITE(sys16bootleg_bgscrollx_w)
|
||||||
|
|
||||||
AM_RANGE(0xC46020, 0xC46021) AM_WRITE(datsu_page0_w)
|
AM_RANGE(0xC46020, 0xC46021) AM_WRITE(datsu_page0_w)
|
||||||
AM_RANGE(0xc46022, 0xc46023) AM_WRITE(datsu_page1_w)
|
AM_RANGE(0xc46022, 0xc46023) AM_WRITE(datsu_page1_w)
|
||||||
AM_RANGE(0xC46024, 0xC46025) AM_WRITE(datsu_page2_w)
|
AM_RANGE(0xC46024, 0xC46025) AM_WRITE(datsu_page2_w)
|
||||||
AM_RANGE(0xC46026, 0xC46027) AM_WRITE(datsu_page3_w)
|
AM_RANGE(0xC46026, 0xC46027) AM_WRITE(datsu_page3_w)
|
||||||
|
|
||||||
AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
|
AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
@ -1243,8 +1243,8 @@ static ADDRESS_MAP_START( eswatbl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0x418010, 0x418011) AM_WRITE(sys16bootleg_fgscrolly_w)
|
AM_RANGE(0x418010, 0x418011) AM_WRITE(sys16bootleg_fgscrolly_w)
|
||||||
AM_RANGE(0x418018, 0x418019) AM_WRITE(sys16bootleg_fgscrollx_bank_w)
|
AM_RANGE(0x418018, 0x418019) AM_WRITE(sys16bootleg_fgscrollx_bank_w)
|
||||||
AM_RANGE(0x418020, 0x418021) AM_WRITE(sys16bootleg_bgpage_w)
|
AM_RANGE(0x418020, 0x418021) AM_WRITE(sys16bootleg_bgpage_w)
|
||||||
AM_RANGE(0x418028, 0x418029) AM_WRITE(sys16bootleg_fgpage_w)
|
AM_RANGE(0x418028, 0x418029) AM_WRITE(sys16bootleg_fgpage_w)
|
||||||
|
|
||||||
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
||||||
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
||||||
AM_RANGE(0xc40000, 0xc40001) AM_WRITE(sys16_coinctrl_w)
|
AM_RANGE(0xc40000, 0xc40001) AM_WRITE(sys16_coinctrl_w)
|
||||||
@ -1278,12 +1278,12 @@ MACHINE_DRIVER_END
|
|||||||
|
|
||||||
static ADDRESS_MAP_START( system16a_bootleg_passsht_map, ADDRESS_SPACE_PROGRAM, 16 )
|
static ADDRESS_MAP_START( system16a_bootleg_passsht_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||||
AM_RANGE(0x000000, 0x01ffff) AM_ROM
|
AM_RANGE(0x000000, 0x01ffff) AM_ROM
|
||||||
|
|
||||||
AM_RANGE(0x400000, 0x407fff) AM_RAM // tilemap ram on original, buffer on bootleg
|
AM_RANGE(0x400000, 0x407fff) AM_RAM // tilemap ram on original, buffer on bootleg
|
||||||
AM_RANGE(0x409000, 0x409fff) AM_RAM AM_BASE(&system16a_bootleg_bg0_tileram)
|
AM_RANGE(0x409000, 0x409fff) AM_RAM AM_BASE(&system16a_bootleg_bg0_tileram)
|
||||||
AM_RANGE(0x40a000, 0x40afff) AM_RAM AM_BASE(&system16a_bootleg_bg1_tileram)
|
AM_RANGE(0x40a000, 0x40afff) AM_RAM AM_BASE(&system16a_bootleg_bg1_tileram)
|
||||||
AM_RANGE(0x410000, 0x410fff) AM_RAM AM_BASE(&sys16_textram)
|
AM_RANGE(0x410000, 0x410fff) AM_RAM AM_BASE(&sys16_textram)
|
||||||
|
|
||||||
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
||||||
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
||||||
AM_RANGE(0xc40000, 0xc40001) AM_WRITE(sys16_coinctrl_w)
|
AM_RANGE(0xc40000, 0xc40001) AM_WRITE(sys16_coinctrl_w)
|
||||||
@ -1360,8 +1360,8 @@ static READ16_HANDLER( passht4b_io3_r )
|
|||||||
static ADDRESS_MAP_START( system16a_bootleg_passht4b_map, ADDRESS_SPACE_PROGRAM, 16 )
|
static ADDRESS_MAP_START( system16a_bootleg_passht4b_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||||
AM_RANGE(0x000000, 0x01ffff) AM_ROM
|
AM_RANGE(0x000000, 0x01ffff) AM_ROM
|
||||||
AM_RANGE(0x400000, 0x407fff) AM_RAM // tilemap ram on original, buffer on bootleg
|
AM_RANGE(0x400000, 0x407fff) AM_RAM // tilemap ram on original, buffer on bootleg
|
||||||
AM_RANGE(0x409000, 0x40afff) AM_RAM AM_BASE(&system16a_bootleg_bg0_tileram)
|
AM_RANGE(0x409000, 0x40afff) AM_RAM AM_BASE(&system16a_bootleg_bg0_tileram)
|
||||||
AM_RANGE(0x40a000, 0x40bfff) AM_RAM AM_BASE(&system16a_bootleg_bg1_tileram)
|
AM_RANGE(0x40a000, 0x40bfff) AM_RAM AM_BASE(&system16a_bootleg_bg1_tileram)
|
||||||
AM_RANGE(0x410000, 0x410fff) AM_RAM AM_BASE(&sys16_textram)
|
AM_RANGE(0x410000, 0x410fff) AM_RAM AM_BASE(&sys16_textram)
|
||||||
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
||||||
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
||||||
@ -1382,7 +1382,7 @@ static ADDRESS_MAP_START( system16a_bootleg_passht4b_map, ADDRESS_SPACE_PROGRAM,
|
|||||||
AM_RANGE(0xc46004, 0xc46005) AM_WRITE(system16a_bootleg_fgscrolly_w)
|
AM_RANGE(0xc46004, 0xc46005) AM_WRITE(system16a_bootleg_fgscrolly_w)
|
||||||
AM_RANGE(0xc46006, 0xc46007) AM_WRITE(system16a_bootleg_fgscrollx_w)
|
AM_RANGE(0xc46006, 0xc46007) AM_WRITE(system16a_bootleg_fgscrollx_w)
|
||||||
AM_RANGE(0xc46008, 0xc46009) AM_WRITE(system16a_bootleg_tilemapselect_w)
|
AM_RANGE(0xc46008, 0xc46009) AM_WRITE(system16a_bootleg_tilemapselect_w)
|
||||||
|
|
||||||
AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
|
AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
@ -1503,8 +1503,8 @@ static MACHINE_DRIVER_START( passsht )
|
|||||||
MDRV_CPU_PROGRAM_MAP(system16a_bootleg_passsht_map)
|
MDRV_CPU_PROGRAM_MAP(system16a_bootleg_passsht_map)
|
||||||
|
|
||||||
MDRV_VIDEO_START( system16a_bootleg )
|
MDRV_VIDEO_START( system16a_bootleg )
|
||||||
MDRV_VIDEO_UPDATE( system16a_bootleg )
|
MDRV_VIDEO_UPDATE( system16a_bootleg )
|
||||||
|
|
||||||
MDRV_MACHINE_RESET(passsht)
|
MDRV_MACHINE_RESET(passsht)
|
||||||
MACHINE_DRIVER_END
|
MACHINE_DRIVER_END
|
||||||
|
|
||||||
@ -1518,7 +1518,7 @@ static MACHINE_DRIVER_START( passht4b )
|
|||||||
|
|
||||||
MDRV_VIDEO_START( system16a_bootleg )
|
MDRV_VIDEO_START( system16a_bootleg )
|
||||||
MDRV_VIDEO_UPDATE( system16a_bootleg_passht4b )
|
MDRV_VIDEO_UPDATE( system16a_bootleg_passht4b )
|
||||||
|
|
||||||
MDRV_MACHINE_RESET(passht4b)
|
MDRV_MACHINE_RESET(passht4b)
|
||||||
MACHINE_DRIVER_END
|
MACHINE_DRIVER_END
|
||||||
|
|
||||||
@ -1558,8 +1558,8 @@ static ADDRESS_MAP_START( system16a_bootleg_shinobi_map, ADDRESS_SPACE_PROGRAM,
|
|||||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||||
AM_RANGE(0x400000, 0x40ffff) AM_RAM // tilemap ram on the original, used as a buffer on the bootlegs
|
AM_RANGE(0x400000, 0x40ffff) AM_RAM // tilemap ram on the original, used as a buffer on the bootlegs
|
||||||
AM_RANGE(0x410000, 0x410fff) AM_RAM AM_BASE(&sys16_textram)
|
AM_RANGE(0x410000, 0x410fff) AM_RAM AM_BASE(&sys16_textram)
|
||||||
AM_RANGE(0x411000, 0x411fff) AM_RAM AM_BASE(&system16a_bootleg_bg0_tileram)
|
AM_RANGE(0x411000, 0x411fff) AM_RAM AM_BASE(&system16a_bootleg_bg0_tileram)
|
||||||
AM_RANGE(0x412000, 0x412fff) AM_RAM AM_BASE(&system16a_bootleg_bg1_tileram)
|
AM_RANGE(0x412000, 0x412fff) AM_RAM AM_BASE(&system16a_bootleg_bg1_tileram)
|
||||||
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
||||||
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
||||||
AM_RANGE(0xc40000, 0xc40001) AM_WRITE(sound_command_nmi_w)
|
AM_RANGE(0xc40000, 0xc40001) AM_WRITE(sound_command_nmi_w)
|
||||||
@ -1574,8 +1574,8 @@ static ADDRESS_MAP_START( system16a_bootleg_shinobi_map, ADDRESS_SPACE_PROGRAM,
|
|||||||
AM_RANGE(0xc46002, 0xc46003) AM_WRITE(system16a_bootleg_bgscrollx_w)
|
AM_RANGE(0xc46002, 0xc46003) AM_WRITE(system16a_bootleg_bgscrollx_w)
|
||||||
AM_RANGE(0xc46004, 0xc46005) AM_WRITE(system16a_bootleg_fgscrolly_w)
|
AM_RANGE(0xc46004, 0xc46005) AM_WRITE(system16a_bootleg_fgscrolly_w)
|
||||||
AM_RANGE(0xc46006, 0xc46007) AM_WRITE(system16a_bootleg_fgscrollx_w)
|
AM_RANGE(0xc46006, 0xc46007) AM_WRITE(system16a_bootleg_fgscrollx_w)
|
||||||
AM_RANGE(0xc46008, 0xc46009) AM_WRITE(system16a_bootleg_tilemapselect_w)
|
AM_RANGE(0xc46008, 0xc46009) AM_WRITE(system16a_bootleg_tilemapselect_w)
|
||||||
AM_RANGE(0xC60000, 0xC60001) AM_READNOP
|
AM_RANGE(0xC60000, 0xC60001) AM_READNOP
|
||||||
AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
|
AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
@ -1613,7 +1613,7 @@ static MACHINE_DRIVER_START( system16a_bootleg_shinobi )
|
|||||||
|
|
||||||
MDRV_VIDEO_START( system16a_bootleg )
|
MDRV_VIDEO_START( system16a_bootleg )
|
||||||
MDRV_VIDEO_UPDATE( system16a_bootleg )
|
MDRV_VIDEO_UPDATE( system16a_bootleg )
|
||||||
|
|
||||||
MDRV_MACHINE_RESET(shinobl)
|
MDRV_MACHINE_RESET(shinobl)
|
||||||
MACHINE_DRIVER_END
|
MACHINE_DRIVER_END
|
||||||
|
|
||||||
@ -1630,7 +1630,7 @@ static ADDRESS_MAP_START( tetrisbl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0x418010, 0x418011) AM_WRITE(sys16bootleg_bgscrolly_w)
|
AM_RANGE(0x418010, 0x418011) AM_WRITE(sys16bootleg_bgscrolly_w)
|
||||||
AM_RANGE(0x418018, 0x418019) AM_WRITE(sys16bootleg_bgscrollx_w)
|
AM_RANGE(0x418018, 0x418019) AM_WRITE(sys16bootleg_bgscrollx_w)
|
||||||
AM_RANGE(0x418020, 0x418021) AM_WRITE(sys16bootleg_fgpage_w)
|
AM_RANGE(0x418020, 0x418021) AM_WRITE(sys16bootleg_fgpage_w)
|
||||||
AM_RANGE(0x418028, 0x418029) AM_WRITE(sys16bootleg_bgpage_w)
|
AM_RANGE(0x418028, 0x418029) AM_WRITE(sys16bootleg_bgpage_w)
|
||||||
|
|
||||||
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
||||||
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
||||||
@ -1670,8 +1670,8 @@ static ADDRESS_MAP_START( beautyb_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0x418010, 0x418011) AM_WRITE(sys16bootleg_fgscrolly_w)
|
AM_RANGE(0x418010, 0x418011) AM_WRITE(sys16bootleg_fgscrolly_w)
|
||||||
AM_RANGE(0x418018, 0x418019) AM_WRITE(sys16bootleg_fgscrollx_w)
|
AM_RANGE(0x418018, 0x418019) AM_WRITE(sys16bootleg_fgscrollx_w)
|
||||||
AM_RANGE(0x418020, 0x418021) AM_WRITE(sys16bootleg_bgpage_w)
|
AM_RANGE(0x418020, 0x418021) AM_WRITE(sys16bootleg_bgpage_w)
|
||||||
AM_RANGE(0x418028, 0x418029) AM_WRITE(sys16bootleg_fgpage_w)
|
AM_RANGE(0x418028, 0x418029) AM_WRITE(sys16bootleg_fgpage_w)
|
||||||
|
|
||||||
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
||||||
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
||||||
|
|
||||||
@ -1884,8 +1884,8 @@ static ADDRESS_MAP_START( wb3bbl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||||
AM_RANGE(0x3f0000, 0x3fffff) AM_WRITE(sys16_tilebank_w)
|
AM_RANGE(0x3f0000, 0x3fffff) AM_WRITE(sys16_tilebank_w)
|
||||||
AM_RANGE(0x400000, 0x407fff) AM_RAM // tilemap ram on the original, used as a buffer on the bootlegs
|
AM_RANGE(0x400000, 0x407fff) AM_RAM // tilemap ram on the original, used as a buffer on the bootlegs
|
||||||
AM_RANGE(0x409000, 0x40afff) AM_RAM AM_BASE(&system16a_bootleg_bg0_tileram)
|
AM_RANGE(0x409000, 0x40afff) AM_RAM AM_BASE(&system16a_bootleg_bg0_tileram)
|
||||||
AM_RANGE(0x40a000, 0x40bfff) AM_RAM AM_BASE(&system16a_bootleg_bg1_tileram)
|
AM_RANGE(0x40a000, 0x40bfff) AM_RAM AM_BASE(&system16a_bootleg_bg1_tileram)
|
||||||
AM_RANGE(0x410000, 0x410fff) AM_RAM AM_BASE(&sys16_textram)
|
AM_RANGE(0x410000, 0x410fff) AM_RAM AM_BASE(&sys16_textram)
|
||||||
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&sys16_spriteram)
|
||||||
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
AM_RANGE(0x840000, 0x840fff) AM_RAM_WRITE( sys16_paletteram_w ) AM_BASE(&paletteram16)
|
||||||
@ -1901,7 +1901,7 @@ static ADDRESS_MAP_START( wb3bbl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0xc46002, 0xc46003) AM_WRITE(system16a_bootleg_bgscrollx_w)
|
AM_RANGE(0xc46002, 0xc46003) AM_WRITE(system16a_bootleg_bgscrollx_w)
|
||||||
AM_RANGE(0xc46004, 0xc46005) AM_WRITE(system16a_bootleg_fgscrolly_w)
|
AM_RANGE(0xc46004, 0xc46005) AM_WRITE(system16a_bootleg_fgscrolly_w)
|
||||||
AM_RANGE(0xc46006, 0xc46007) AM_WRITE(system16a_bootleg_fgscrollx_w)
|
AM_RANGE(0xc46006, 0xc46007) AM_WRITE(system16a_bootleg_fgscrollx_w)
|
||||||
AM_RANGE(0xc46008, 0xc46009) AM_WRITE(system16a_bootleg_tilemapselect_w)
|
AM_RANGE(0xc46008, 0xc46009) AM_WRITE(system16a_bootleg_tilemapselect_w)
|
||||||
AM_RANGE(0xff0000, 0xffffff) AM_RAM // work ram
|
AM_RANGE(0xff0000, 0xffffff) AM_RAM // work ram
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
@ -1939,7 +1939,7 @@ static MACHINE_DRIVER_START( system16a_bootleg_wb3 )
|
|||||||
|
|
||||||
MDRV_VIDEO_START( system16a_bootleg )
|
MDRV_VIDEO_START( system16a_bootleg )
|
||||||
MDRV_VIDEO_UPDATE( system16a_bootleg )
|
MDRV_VIDEO_UPDATE( system16a_bootleg )
|
||||||
|
|
||||||
MDRV_MACHINE_RESET(wb3bbl)
|
MDRV_MACHINE_RESET(wb3bbl)
|
||||||
MACHINE_DRIVER_END
|
MACHINE_DRIVER_END
|
||||||
|
|
||||||
@ -1955,16 +1955,16 @@ ROM_START( bayrouteb1 )
|
|||||||
ROM_LOAD16_BYTE( "br.2a", 0x080001, 0x10000, CRC(5ca1e3d2) SHA1(51ce67ed0a0054f9c9c4ac56c5775716c44d74b1) )
|
ROM_LOAD16_BYTE( "br.2a", 0x080001, 0x10000, CRC(5ca1e3d2) SHA1(51ce67ed0a0054f9c9c4ac56c5775716c44d74b1) )
|
||||||
ROM_LOAD16_BYTE( "b8.bin", 0x0a0000, 0x10000, CRC(e7ca0331) SHA1(b255939576a84f4d266f31a7fde818e04ff35b24) )
|
ROM_LOAD16_BYTE( "b8.bin", 0x0a0000, 0x10000, CRC(e7ca0331) SHA1(b255939576a84f4d266f31a7fde818e04ff35b24) )
|
||||||
ROM_LOAD16_BYTE( "b6.bin", 0x0a0001, 0x10000, CRC(2bc748a6) SHA1(9ab760377fde24cecb703726ee3e59ee23d60a3a) )
|
ROM_LOAD16_BYTE( "b6.bin", 0x0a0001, 0x10000, CRC(2bc748a6) SHA1(9ab760377fde24cecb703726ee3e59ee23d60a3a) )
|
||||||
|
|
||||||
// interrupt code, taken from the other bootleg set(!)
|
// interrupt code, taken from the other bootleg set(!)
|
||||||
ROM_LOAD( "protdata", 0x0bf000, 0x01000, BAD_DUMP CRC(5474fd95) SHA1(1cbd47aa8f8b9641ba81942bcaae0bc768fd33fd) )
|
ROM_LOAD( "protdata", 0x0bf000, 0x01000, BAD_DUMP CRC(5474fd95) SHA1(1cbd47aa8f8b9641ba81942bcaae0bc768fd33fd) )
|
||||||
|
|
||||||
// there clearly should be some kind of MCU on this bootleg to put the interrupt code in RAM
|
// there clearly should be some kind of MCU on this bootleg to put the interrupt code in RAM
|
||||||
// as the game code waits for this to happen, and the interrupt points there
|
// as the game code waits for this to happen, and the interrupt points there
|
||||||
ROM_REGION( 0xc0000, "mcu", 0 ) /* MCU code */
|
ROM_REGION( 0xc0000, "mcu", 0 ) /* MCU code */
|
||||||
ROM_LOAD( "unknown.mcu", 0x0000, 0x1000, NO_DUMP )
|
ROM_LOAD( "unknown.mcu", 0x0000, 0x1000, NO_DUMP )
|
||||||
|
|
||||||
|
|
||||||
ROM_REGION( 0x30000, "gfx1", ROMREGION_DISPOSE |ROMREGION_INVERT) /* tiles */
|
ROM_REGION( 0x30000, "gfx1", ROMREGION_DISPOSE |ROMREGION_INVERT) /* tiles */
|
||||||
ROM_LOAD( "bs16.bin", 0x00000, 0x10000, CRC(a8a5b310) SHA1(8883e1ed48a3e0f7b4c36d83579f93e84e28568c) )
|
ROM_LOAD( "bs16.bin", 0x00000, 0x10000, CRC(a8a5b310) SHA1(8883e1ed48a3e0f7b4c36d83579f93e84e28568c) )
|
||||||
ROM_LOAD( "bs14.bin", 0x10000, 0x10000, CRC(6bc4d0a8) SHA1(90b9a61c7a140291d72554857ce26d54ebf03fc2) )
|
ROM_LOAD( "bs14.bin", 0x10000, 0x10000, CRC(6bc4d0a8) SHA1(90b9a61c7a140291d72554857ce26d54ebf03fc2) )
|
||||||
@ -2126,7 +2126,7 @@ ROM_START( fpointbj )
|
|||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
static UINT8 *decrypted_region;
|
static UINT8 *decrypted_region;
|
||||||
|
|
||||||
DRIVER_INIT( goldnabl )
|
DRIVER_INIT( goldnabl )
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
@ -2134,29 +2134,29 @@ DRIVER_INIT( goldnabl )
|
|||||||
UINT8* KEY = memory_region(machine, "decryption");
|
UINT8* KEY = memory_region(machine, "decryption");
|
||||||
const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
|
const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
|
||||||
UINT8 data[0x1000];
|
UINT8 data[0x1000];
|
||||||
|
|
||||||
// the decryption key is in a rom (part of an MSDOS executable...)
|
// the decryption key is in a rom (part of an MSDOS executable...)
|
||||||
for (i=0;i<0x800;i++)
|
for (i=0;i<0x800;i++)
|
||||||
{
|
{
|
||||||
KEY[i] = KEY[i] ^ 0xff;
|
KEY[i] = KEY[i] ^ 0xff;
|
||||||
data[(i*2)+0] = ((KEY[i] & 0x80) >> 1) | ((KEY[i] & 0x40) >> 2) | ((KEY[i] & 0x20) >> 3) | ((KEY[i] & 0x10) >> 4);
|
data[(i*2)+0] = ((KEY[i] & 0x80) >> 1) | ((KEY[i] & 0x40) >> 2) | ((KEY[i] & 0x20) >> 3) | ((KEY[i] & 0x10) >> 4);
|
||||||
data[(i*2)+1] = ((KEY[i] & 0x08) << 3) | ((KEY[i] & 0x04) << 2) | ((KEY[i] & 0x02) << 1) | ((KEY[i] & 0x01) << 0);
|
data[(i*2)+1] = ((KEY[i] & 0x08) << 3) | ((KEY[i] & 0x04) << 2) | ((KEY[i] & 0x02) << 1) | ((KEY[i] & 0x01) << 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
decrypted_region = auto_alloc_array(machine, UINT8, 0xc0000);
|
decrypted_region = auto_alloc_array(machine, UINT8, 0xc0000);
|
||||||
memcpy (decrypted_region, ROM, 0xc0000);
|
memcpy (decrypted_region, ROM, 0xc0000);
|
||||||
|
|
||||||
for (i = 0;i < 0x40000;i++)
|
for (i = 0;i < 0x40000;i++)
|
||||||
{
|
{
|
||||||
decrypted_region[i] = ROM[i] ^ data[(i&0xfff)^1];
|
decrypted_region[i] = ROM[i] ^ data[(i&0xfff)^1];
|
||||||
}
|
}
|
||||||
|
|
||||||
memory_set_decrypted_region(space, 0x00000, 0xbffff, decrypted_region);
|
memory_set_decrypted_region(space, 0x00000, 0xbffff, decrypted_region);
|
||||||
|
|
||||||
MACHINE_RESET_CALL(sys16_onetime);
|
MACHINE_RESET_CALL(sys16_onetime);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
DRIVER_INIT( bayrouteb1 )
|
DRIVER_INIT( bayrouteb1 )
|
||||||
{
|
{
|
||||||
// it has the same encryption as the golden axe bootleg!
|
// it has the same encryption as the golden axe bootleg!
|
||||||
@ -2173,7 +2173,7 @@ DRIVER_INIT( bayrouteb1 )
|
|||||||
|
|
||||||
ROM2 = (UINT16*)memory_region(machine, "maincpu");
|
ROM2 = (UINT16*)memory_region(machine, "maincpu");
|
||||||
decrypted_region2 = (UINT16*)decrypted_region;
|
decrypted_region2 = (UINT16*)decrypted_region;
|
||||||
|
|
||||||
// patch interrupt vector
|
// patch interrupt vector
|
||||||
ROM2[0x0070/2] = 0x000b;
|
ROM2[0x0070/2] = 0x000b;
|
||||||
ROM2[0x0072/2] = 0xf000;
|
ROM2[0x0072/2] = 0xf000;
|
||||||
@ -2181,8 +2181,8 @@ DRIVER_INIT( bayrouteb1 )
|
|||||||
// patch check for code in RAM
|
// patch check for code in RAM
|
||||||
decrypted_region2[0x107e/2] = 0x48e7;
|
decrypted_region2[0x107e/2] = 0x48e7;
|
||||||
decrypted_region2[0x1080/2] = 0x000b;
|
decrypted_region2[0x1080/2] = 0x000b;
|
||||||
decrypted_region2[0x1082/2] = 0xf000;
|
decrypted_region2[0x1082/2] = 0xf000;
|
||||||
}
|
}
|
||||||
|
|
||||||
static DRIVER_INIT( bayrouteb2 )
|
static DRIVER_INIT( bayrouteb2 )
|
||||||
{
|
{
|
||||||
@ -2193,12 +2193,12 @@ static DRIVER_INIT( bayrouteb2 )
|
|||||||
|
|
||||||
this is a more complete dump of the old encrypted bootleg set
|
this is a more complete dump of the old encrypted bootleg set
|
||||||
|
|
||||||
Golden Axe (different HW bottleg)
|
Golden Axe (different HW bottleg)
|
||||||
|
|
||||||
Anno 1989
|
Anno 1989
|
||||||
Produttore
|
Produttore
|
||||||
N.revisione
|
N.revisione
|
||||||
CPU main PCB:
|
CPU main PCB:
|
||||||
1x 68000 (main)(missing)
|
1x 68000 (main)(missing)
|
||||||
1x LH0080B-Z80B-CPU (sound)
|
1x LH0080B-Z80B-CPU (sound)
|
||||||
1x D7759C (sound)
|
1x D7759C (sound)
|
||||||
@ -2207,8 +2207,8 @@ CPU main PCB:
|
|||||||
1x UPC1241H (sound)
|
1x UPC1241H (sound)
|
||||||
1x oscillator 20.000 (close to main)
|
1x oscillator 20.000 (close to main)
|
||||||
1x oscillator 24.000MHz (close to sound)
|
1x oscillator 24.000MHz (close to sound)
|
||||||
1x blue resonator 655K (close to sound)
|
1x blue resonator 655K (close to sound)
|
||||||
ROMs main PCB:
|
ROMs main PCB:
|
||||||
2x NMC27C512 (1,3)
|
2x NMC27C512 (1,3)
|
||||||
2x NMC27C256 (2,12)
|
2x NMC27C256 (2,12)
|
||||||
8x TMS27PC512 (4,5,6,7,8,9,10,11)
|
8x TMS27PC512 (4,5,6,7,8,9,10,11)
|
||||||
@ -2235,15 +2235,15 @@ main PCB:
|
|||||||
3x PAL16L8ACN (not dumped)
|
3x PAL16L8ACN (not dumped)
|
||||||
|
|
||||||
roms PCB:
|
roms PCB:
|
||||||
1x PEEL18CV8P (not dumped)
|
1x PEEL18CV8P (not dumped)
|
||||||
Note main PCB:
|
Note main PCB:
|
||||||
1x JAMMA edge connector
|
1x JAMMA edge connector
|
||||||
2x 50 pins flat cable connector to roms PCB
|
2x 50 pins flat cable connector to roms PCB
|
||||||
1x trimmer (volume)
|
1x trimmer (volume)
|
||||||
2x 8x2 switches dip
|
2x 8x2 switches dip
|
||||||
|
|
||||||
roms PCB:
|
roms PCB:
|
||||||
2x 50 pins flat cable connector to roms PCB
|
2x 50 pins flat cable connector to roms PCB
|
||||||
*/
|
*/
|
||||||
|
|
||||||
ROM_START( goldnaxeb1 )
|
ROM_START( goldnaxeb1 )
|
||||||
@ -2259,7 +2259,7 @@ ROM_START( goldnaxeb1 )
|
|||||||
ROM_LOAD16_BYTE( "10.10", 0xa0000, 0x10000, CRC(b69ab892) SHA1(9b426058a80abb8dd3d6c0c55574fdc841889a72) )
|
ROM_LOAD16_BYTE( "10.10", 0xa0000, 0x10000, CRC(b69ab892) SHA1(9b426058a80abb8dd3d6c0c55574fdc841889a72) )
|
||||||
ROM_LOAD16_BYTE( "9.9", 0xa0001, 0x10000, CRC(3cf2f725) SHA1(1f620fcebe8533cba50736ae1d97c095abf1bc25) )
|
ROM_LOAD16_BYTE( "9.9", 0xa0001, 0x10000, CRC(3cf2f725) SHA1(1f620fcebe8533cba50736ae1d97c095abf1bc25) )
|
||||||
|
|
||||||
|
|
||||||
ROM_REGION( 0x60000, "gfx1", ROMREGION_DISPOSE | ROMREGION_INVERT ) /* tiles */
|
ROM_REGION( 0x60000, "gfx1", ROMREGION_DISPOSE | ROMREGION_INVERT ) /* tiles */
|
||||||
ROM_LOAD( "32.16", 0x00000, 0x10000, CRC(84587263) SHA1(3a88c8578a477a487a0a214a367042b9739f39eb) )
|
ROM_LOAD( "32.16", 0x00000, 0x10000, CRC(84587263) SHA1(3a88c8578a477a487a0a214a367042b9739f39eb) )
|
||||||
ROM_LOAD( "31.15", 0x10000, 0x10000, CRC(63d72388) SHA1(ba0a582b1daf3a1e316237efbad17fcc0381643f) )
|
ROM_LOAD( "31.15", 0x10000, 0x10000, CRC(63d72388) SHA1(ba0a582b1daf3a1e316237efbad17fcc0381643f) )
|
||||||
@ -2274,7 +2274,7 @@ ROM_START( goldnaxeb1 )
|
|||||||
ROM_LOAD16_BYTE( "37.bin", 0x100001, 0x10000, CRC(84dccc5b) SHA1(10263d98d663f1170c3203066f391075a1d64ff5) )
|
ROM_LOAD16_BYTE( "37.bin", 0x100001, 0x10000, CRC(84dccc5b) SHA1(10263d98d663f1170c3203066f391075a1d64ff5) )
|
||||||
ROM_LOAD16_BYTE( "13.bin", 0x120001, 0x10000, CRC(3d41b995) SHA1(913d2a0c9a2ac6d36589966d7eb5537120ea6ff0) )
|
ROM_LOAD16_BYTE( "13.bin", 0x120001, 0x10000, CRC(3d41b995) SHA1(913d2a0c9a2ac6d36589966d7eb5537120ea6ff0) )
|
||||||
//ROM_LOAD16_BYTE( "ga18.a9", 0x120001, 0x10000, CRC(de346006) SHA1(65aa489373b6d2cccbb024f13fc190a7cae86274) ) // the old set had this rom, with most of the data blanked out.. why? logo removed? bad?
|
//ROM_LOAD16_BYTE( "ga18.a9", 0x120001, 0x10000, CRC(de346006) SHA1(65aa489373b6d2cccbb024f13fc190a7cae86274) ) // the old set had this rom, with most of the data blanked out.. why? logo removed? bad?
|
||||||
|
|
||||||
ROM_LOAD16_BYTE( "21.7", 0x000000, 0x10000, CRC(ede51fe0) SHA1(c05a2b51095a322bac5a67ee8886aecc186cbdfe) )
|
ROM_LOAD16_BYTE( "21.7", 0x000000, 0x10000, CRC(ede51fe0) SHA1(c05a2b51095a322bac5a67ee8886aecc186cbdfe) )
|
||||||
ROM_LOAD16_BYTE( "22.8", 0x020000, 0x10000, CRC(30989141) SHA1(f6e7ae258deedec11b1f80c19575c884aac26c56) )
|
ROM_LOAD16_BYTE( "22.8", 0x020000, 0x10000, CRC(30989141) SHA1(f6e7ae258deedec11b1f80c19575c884aac26c56) )
|
||||||
ROM_LOAD16_BYTE( "38.bin", 0x100000, 0x10000, CRC(38e4c92a) SHA1(8b8a596da0726bc02c412a68e5163770fe3e62e4) )
|
ROM_LOAD16_BYTE( "38.bin", 0x100000, 0x10000, CRC(38e4c92a) SHA1(8b8a596da0726bc02c412a68e5163770fe3e62e4) )
|
||||||
@ -2304,7 +2304,7 @@ ROM_START( goldnaxeb1 )
|
|||||||
ROM_LOAD( "2.3", 0x00000, 0x08000, CRC(399fc5f5) SHA1(6f290b36dc71ff4759598e2a9c185a8945a3c9e7) )
|
ROM_LOAD( "2.3", 0x00000, 0x08000, CRC(399fc5f5) SHA1(6f290b36dc71ff4759598e2a9c185a8945a3c9e7) )
|
||||||
ROM_LOAD( "3.1", 0x10000, 0x10000, CRC(50eb5a56) SHA1(d59ba04254000de5577e8a58d0b51c73112a4c80) )
|
ROM_LOAD( "3.1", 0x10000, 0x10000, CRC(50eb5a56) SHA1(d59ba04254000de5577e8a58d0b51c73112a4c80) )
|
||||||
ROM_LOAD( "1.2", 0x20000, 0x10000, CRC(b372eb94) SHA1(8f82530633589de003a5462b227335526a6a61a6) )
|
ROM_LOAD( "1.2", 0x20000, 0x10000, CRC(b372eb94) SHA1(8f82530633589de003a5462b227335526a6a61a6) )
|
||||||
|
|
||||||
ROM_REGION( 0x30000, "decryption", 0 ) // a 0x800 byte repeating rom containing part of an MS-DOS executable, used as the decryption key
|
ROM_REGION( 0x30000, "decryption", 0 ) // a 0x800 byte repeating rom containing part of an MS-DOS executable, used as the decryption key
|
||||||
ROM_LOAD( "12.12", 0x00000, 0x08000, CRC(81ce4576) SHA1(84eea0ab8d8ea8869c12f0b603b91b1188d0e288) )
|
ROM_LOAD( "12.12", 0x00000, 0x08000, CRC(81ce4576) SHA1(84eea0ab8d8ea8869c12f0b603b91b1188d0e288) )
|
||||||
|
|
||||||
@ -2346,7 +2346,7 @@ ROM_START( goldnaxeb2 )
|
|||||||
ROM_LOAD16_BYTE( "ic36.4", 0xa0000, 0x10000, CRC(b69ab892) SHA1(9b426058a80abb8dd3d6c0c55574fdc841889a72) )
|
ROM_LOAD16_BYTE( "ic36.4", 0xa0000, 0x10000, CRC(b69ab892) SHA1(9b426058a80abb8dd3d6c0c55574fdc841889a72) )
|
||||||
ROM_LOAD16_BYTE( "ic50.8", 0xa0001, 0x10000, CRC(3cf2f725) SHA1(1f620fcebe8533cba50736ae1d97c095abf1bc25) )
|
ROM_LOAD16_BYTE( "ic50.8", 0xa0001, 0x10000, CRC(3cf2f725) SHA1(1f620fcebe8533cba50736ae1d97c095abf1bc25) )
|
||||||
|
|
||||||
|
|
||||||
ROM_REGION( 0x60000, "gfx1", ROMREGION_DISPOSE | ROMREGION_INVERT ) /* tiles */
|
ROM_REGION( 0x60000, "gfx1", ROMREGION_DISPOSE | ROMREGION_INVERT ) /* tiles */
|
||||||
ROM_LOAD( "ic4.35", 0x00000, 0x10000, CRC(84587263) SHA1(3a88c8578a477a487a0a214a367042b9739f39eb) )
|
ROM_LOAD( "ic4.35", 0x00000, 0x10000, CRC(84587263) SHA1(3a88c8578a477a487a0a214a367042b9739f39eb) )
|
||||||
ROM_LOAD( "ic18.38", 0x10000, 0x10000, CRC(63d72388) SHA1(ba0a582b1daf3a1e316237efbad17fcc0381643f) )
|
ROM_LOAD( "ic18.38", 0x10000, 0x10000, CRC(63d72388) SHA1(ba0a582b1daf3a1e316237efbad17fcc0381643f) )
|
||||||
@ -2506,7 +2506,7 @@ ROM_START( tturfbl )
|
|||||||
ROM_LOAD( "tt1574b3.rom", 0x00000, 0x10000, CRC(e9e630da) SHA1(e8471dedbb25475e4814d78b56f579fe9110461e) )
|
ROM_LOAD( "tt1574b3.rom", 0x00000, 0x10000, CRC(e9e630da) SHA1(e8471dedbb25475e4814d78b56f579fe9110461e) )
|
||||||
ROM_LOAD( "tt16cf44.rom", 0x10000, 0x10000, CRC(4c467735) SHA1(8338b6605cbe2e076da0b3e3a47630409a79f002) )
|
ROM_LOAD( "tt16cf44.rom", 0x10000, 0x10000, CRC(4c467735) SHA1(8338b6605cbe2e076da0b3e3a47630409a79f002) )
|
||||||
ROM_LOAD( "tt17d59e.rom", 0x20000, 0x10000, CRC(60c0f2fe) SHA1(3fea4ed757d47628f59ff940e40cb86b3b5b443b) )
|
ROM_LOAD( "tt17d59e.rom", 0x20000, 0x10000, CRC(60c0f2fe) SHA1(3fea4ed757d47628f59ff940e40cb86b3b5b443b) )
|
||||||
|
|
||||||
ROM_REGION( 0x80000, "gfx2", 0 ) /* sprites */
|
ROM_REGION( 0x80000, "gfx2", 0 ) /* sprites */
|
||||||
ROM_LOAD16_BYTE( "12279.1b", 0x00001, 0x10000, CRC(7a169fb1) SHA1(1ec6da0d2cfcf727e61f61c847fd8b975b64f944) )
|
ROM_LOAD16_BYTE( "12279.1b", 0x00001, 0x10000, CRC(7a169fb1) SHA1(1ec6da0d2cfcf727e61f61c847fd8b975b64f944) )
|
||||||
ROM_LOAD16_BYTE( "12283.5b", 0x00000, 0x10000, CRC(ae0fa085) SHA1(ae9af92d4dd0c8a0f064d24e647522b588fbd7f7) )
|
ROM_LOAD16_BYTE( "12283.5b", 0x00000, 0x10000, CRC(ae0fa085) SHA1(ae9af92d4dd0c8a0f064d24e647522b588fbd7f7) )
|
||||||
@ -3148,16 +3148,16 @@ static ADDRESS_MAP_START( mwalkbl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
|
|
||||||
/* bootleg video regs */
|
/* bootleg video regs */
|
||||||
/*AM_RANGE(0xc00000, 0xc00001) AM_NOP
|
/*AM_RANGE(0xc00000, 0xc00001) AM_NOP
|
||||||
AM_RANGE(0xc00002, 0xc00003) AM_NOP
|
AM_RANGE(0xc00002, 0xc00003) AM_NOP
|
||||||
AM_RANGE(0xc00004, 0xc00005) AM_NOP // tile bank?
|
AM_RANGE(0xc00004, 0xc00005) AM_NOP // tile bank?
|
||||||
AM_RANGE(0xc00006, 0xc00007) AM_NOP
|
AM_RANGE(0xc00006, 0xc00007) AM_NOP
|
||||||
AM_RANGE(0xc44000, 0xc44001) AM_NOP
|
AM_RANGE(0xc44000, 0xc44001) AM_NOP
|
||||||
AM_RANGE(0xc46000, 0xc46001) AM_NOP
|
AM_RANGE(0xc46000, 0xc46001) AM_NOP
|
||||||
AM_RANGE(0xc46200, 0xc46201) AM_NOP
|
AM_RANGE(0xc46200, 0xc46201) AM_NOP
|
||||||
AM_RANGE(0xc46400, 0xc464ff) AM_NOP // scroll?
|
AM_RANGE(0xc46400, 0xc464ff) AM_NOP // scroll?
|
||||||
AM_RANGE(0xc46500, 0xc465ff) AM_NOP // scroll?
|
AM_RANGE(0xc46500, 0xc465ff) AM_NOP // scroll?
|
||||||
*/
|
*/
|
||||||
|
|
||||||
AM_RANGE(0xc40000, 0xc40001) AM_READ_PORT("COINAGE")
|
AM_RANGE(0xc40000, 0xc40001) AM_READ_PORT("COINAGE")
|
||||||
AM_RANGE(0xc40002, 0xc40003) AM_READ_PORT("DSW1")
|
AM_RANGE(0xc40002, 0xc40003) AM_READ_PORT("DSW1")
|
||||||
AM_RANGE(0xc40006, 0xc40007) AM_WRITE(sound_command_nmi_w)
|
AM_RANGE(0xc40006, 0xc40007) AM_WRITE(sound_command_nmi_w)
|
||||||
@ -3220,18 +3220,18 @@ static ADDRESS_MAP_START( astormbl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
|||||||
AM_RANGE(0xa02100, 0xa02101) AM_NOP
|
AM_RANGE(0xa02100, 0xa02101) AM_NOP
|
||||||
AM_RANGE(0xa03000, 0xa03001) AM_NOP
|
AM_RANGE(0xa03000, 0xa03001) AM_NOP
|
||||||
AM_RANGE(0xa03034, 0xa03035) AM_NOP
|
AM_RANGE(0xa03034, 0xa03035) AM_NOP
|
||||||
|
|
||||||
/* bootleg video regs */
|
/* bootleg video regs */
|
||||||
AM_RANGE(0xc00000, 0xc00001) AM_NOP
|
AM_RANGE(0xc00000, 0xc00001) AM_NOP
|
||||||
AM_RANGE(0xc00002, 0xc00003) AM_NOP
|
AM_RANGE(0xc00002, 0xc00003) AM_NOP
|
||||||
AM_RANGE(0xc00004, 0xc00005) AM_NOP // tile bank?
|
AM_RANGE(0xc00004, 0xc00005) AM_NOP // tile bank?
|
||||||
AM_RANGE(0xc00006, 0xc00007) AM_NOP
|
AM_RANGE(0xc00006, 0xc00007) AM_NOP
|
||||||
AM_RANGE(0xc44000, 0xc44001) AM_NOP
|
AM_RANGE(0xc44000, 0xc44001) AM_NOP
|
||||||
AM_RANGE(0xc46000, 0xc46001) AM_NOP
|
AM_RANGE(0xc46000, 0xc46001) AM_NOP
|
||||||
AM_RANGE(0xc46200, 0xc46201) AM_NOP
|
AM_RANGE(0xc46200, 0xc46201) AM_NOP
|
||||||
AM_RANGE(0xc46400, 0xc464ff) AM_NOP // scroll?
|
AM_RANGE(0xc46400, 0xc464ff) AM_NOP // scroll?
|
||||||
AM_RANGE(0xc46500, 0xc465ff) AM_NOP // scroll?
|
AM_RANGE(0xc46500, 0xc465ff) AM_NOP // scroll?
|
||||||
|
|
||||||
AM_RANGE(0xc46600, 0xc46601) AM_WRITE(sys18_refreshenable_w)
|
AM_RANGE(0xc46600, 0xc46601) AM_WRITE(sys18_refreshenable_w)
|
||||||
AM_RANGE(0xfe0020, 0xfe003f) AM_WRITENOP
|
AM_RANGE(0xfe0020, 0xfe003f) AM_WRITENOP
|
||||||
AM_RANGE(0xffc000, 0xffffff) AM_RAM
|
AM_RANGE(0xffc000, 0xffffff) AM_RAM
|
||||||
|
|||||||
@ -1,8 +1,8 @@
|
|||||||
/*
|
/*
|
||||||
|
|
||||||
SYstem 18 bootlegs
|
SYstem 18 bootlegs
|
||||||
|
|
||||||
The system 18 bootlegs lack the VDP
|
The system 18 bootlegs lack the VDP
|
||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|||||||
@ -545,12 +545,12 @@ INPUT_PORTS_END
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
static INPUT_PORTS_START( thndrxja ) // for Japanese later revision (not dumped yet)
|
static INPUT_PORTS_START( thndrxja ) // for Japanese later revision (not dumped yet)
|
||||||
PORT_INCLUDE( thnderxj )
|
PORT_INCLUDE( thnderxj )
|
||||||
|
|
||||||
PORT_MODIFY("DSW3")
|
PORT_MODIFY("DSW3")
|
||||||
PORT_DIPNAME( 0x08, 0x08, "All Stage Clear Loop" ) PORT_DIPLOCATION("SW3:4")
|
PORT_DIPNAME( 0x08, 0x08, "All Stage Clear Loop" ) PORT_DIPLOCATION("SW3:4")
|
||||||
PORT_DIPSETTING( 0x08, "Game ends after 3 loops" ) // factory default
|
PORT_DIPSETTING( 0x08, "Game ends after 3 loops" ) // factory default
|
||||||
PORT_DIPSETTING( 0x00, "Endless" )
|
PORT_DIPSETTING( 0x00, "Endless" )
|
||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|||||||
@ -187,16 +187,16 @@ Notes:
|
|||||||
PIC16C621 - DIP18 socket and 4MHz OSC on a 90-degrees-mounted small PCB for
|
PIC16C621 - DIP18 socket and 4MHz OSC on a 90-degrees-mounted small PCB for
|
||||||
Microchip PIC16C621A protection key chip
|
Microchip PIC16C621A protection key chip
|
||||||
|
|
||||||
Usage:
|
? ? ? ? ? ? ? ? ?Usage:
|
||||||
+-----------------------+-----------------+----------------+
|
? ? ? ? ? ? ? ? ?+-----------------------+-----------------+----------------+
|
||||||
| | | Sega Security |
|
? ? ? ? ? ? ? ? ?| ? ? ? ? ? ? ? ? ? ? ? | ? ? ? ? ? ? ? ? | Sega Security ?|
|
||||||
| Game | Sticker | Part Number |
|
? ? ? ? ? ? ? ? ?| Game ? ? ? ? ? ? ? ? ?| Sticker ? ? ? ? | Part Number ? ?|
|
||||||
+-----------------------+-----------------+----------------+
|
? ? ? ? ? ? ? ? ?+-----------------------+-----------------+----------------+
|
||||||
| Mario Kart Arcade GP | 253-5509-5109 | 317-5109-COM |
|
? ? ? ? ? ? ? ? ?| Mario Kart Arcade GP ?| 253-5509-5109 ? | 317-5109-COM ? |
|
||||||
| Nintendo/Namco, 2005 | | |
|
? ? ? ? ? ? ? ? ?| Nintendo/Namco, 2005 ?| ? ? ? ? ? ? ? ? | ? ? ? ? ? ? ? ?|
|
||||||
| | | |
|
? ? ? ? ? ? ? ? ?| ? ? ? ? ? ? ? ? ? ? ? | ? ? ? ? ? ? ? ? | ? ? ? ? ? ? ? ?|
|
||||||
| Namco Code: MKA2Ver.B | | |
|
? ? ? ? ? ? ? ? ?| Namco Code: MKA2Ver.B | ? ? ? ? ? ? ? ? | ? ? ? ? ? ? ? ?|
|
||||||
+-----------------------+-----------------+----------------+
|
? ? ? ? ? ? ? ? ?+-----------------------+-----------------+----------------+
|
||||||
|
|
||||||
ROM Board (attached to CN3 of Media Board, ONLY for use with Namco ROM cart version of the Media Board)
|
ROM Board (attached to CN3 of Media Board, ONLY for use with Namco ROM cart version of the Media Board)
|
||||||
---------
|
---------
|
||||||
@ -288,7 +288,7 @@ Notes:
|
|||||||
1-T SRAM: 13.5 x12 = 162MHz
|
1-T SRAM: 13.5 x12 = 162MHz
|
||||||
16M ARAM: 13.5 x6 = 81MHz
|
16M ARAM: 13.5 x6 = 81MHz
|
||||||
P1 - Motherboard Power Connector (located under the PCB)
|
P1 - Motherboard Power Connector (located under the PCB)
|
||||||
P2 - Digital Video Output Connector (not used)
|
P2 - Digital Video Output Connector (not used)
|
||||||
P3 - Controller Pad Board Connector (tied to lower PCB to J8 with a small flat cable)
|
P3 - Controller Pad Board Connector (tied to lower PCB to J8 with a small flat cable)
|
||||||
P4 - Memory Card Slot Connector A \ (not used)
|
P4 - Memory Card Slot Connector A \ (not used)
|
||||||
P5 - Memory Card Slot Connector B /
|
P5 - Memory Card Slot Connector B /
|
||||||
|
|||||||
@ -258,7 +258,7 @@ static UINT32 twinkle_unknown;
|
|||||||
|
|
||||||
static WRITE32_HANDLER( twinkle_unknown_w )
|
static WRITE32_HANDLER( twinkle_unknown_w )
|
||||||
{
|
{
|
||||||
/* printf( "set unknown data=%08x\n", data ); */
|
/* printf( "set unknown data=%08x\n", data ); */
|
||||||
|
|
||||||
twinkle_unknown = data;
|
twinkle_unknown = data;
|
||||||
}
|
}
|
||||||
@ -267,7 +267,7 @@ static READ32_HANDLER( twinkle_unknown_r )
|
|||||||
{
|
{
|
||||||
UINT32 data = twinkle_unknown;
|
UINT32 data = twinkle_unknown;
|
||||||
|
|
||||||
/* printf( "get unknown data=%08x\n", data ); */
|
/* printf( "get unknown data=%08x\n", data ); */
|
||||||
|
|
||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
@ -293,7 +293,7 @@ static int last_io_offset;
|
|||||||
#define LED_L 0x0800
|
#define LED_L 0x0800
|
||||||
#define LED_M 0x1000
|
#define LED_M 0x1000
|
||||||
|
|
||||||
// A1 A2
|
// A1 A2
|
||||||
// F H I J B
|
// F H I J B
|
||||||
// G1 G2
|
// G1 G2
|
||||||
// E M L K C
|
// E M L K C
|
||||||
@ -584,11 +584,11 @@ static WRITE32_HANDLER(twinkle_output_w)
|
|||||||
static WRITE32_HANDLER(serial_w)
|
static WRITE32_HANDLER(serial_w)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
int _do = ( data >> 4 ) & 1;
|
int _do = ( data >> 4 ) & 1;
|
||||||
int clock = ( data >> 5 ) & 1;
|
int clock = ( data >> 5 ) & 1;
|
||||||
int reset = ( data >> 6 ) & 1;
|
int reset = ( data >> 6 ) & 1;
|
||||||
|
|
||||||
printf( "serial_w do=%d clock=%d reset=%d\n", _do, clock, reset );
|
printf( "serial_w do=%d clock=%d reset=%d\n", _do, clock, reset );
|
||||||
*/
|
*/
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -614,7 +614,7 @@ printf( "xx %08x %08x %08x\n", offset, mem_mask, data );
|
|||||||
static READ32_HANDLER(xx_r)
|
static READ32_HANDLER(xx_r)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
printf( "xx %08x %08x\n", offset, mem_mask );
|
printf( "xx %08x %08x\n", offset, mem_mask );
|
||||||
*/
|
*/
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@ -622,7 +622,7 @@ static READ32_HANDLER(xx_r)
|
|||||||
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
|
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
|
||||||
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE(1) AM_BASE(&g_p_n_psxram) AM_SIZE(&g_n_psxramsize) /* ram */
|
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE(1) AM_BASE(&g_p_n_psxram) AM_SIZE(&g_n_psxramsize) /* ram */
|
||||||
AM_RANGE(0x1f000000, 0x1f0007ff) AM_READWRITE(xx_r, xx_w)
|
AM_RANGE(0x1f000000, 0x1f0007ff) AM_READWRITE(xx_r, xx_w)
|
||||||
// AM_RANGE(0x1f000400, 0x1f0007ff) AM_RAM AM_SHARE(3) /* shared ram */
|
// AM_RANGE(0x1f000400, 0x1f0007ff) AM_RAM AM_SHARE(3) /* shared ram */
|
||||||
AM_RANGE(0x1f200000, 0x1f20001f) AM_READWRITE(am53cf96_r, am53cf96_w)
|
AM_RANGE(0x1f200000, 0x1f20001f) AM_READWRITE(am53cf96_r, am53cf96_w)
|
||||||
AM_RANGE(0x1f20a01c, 0x1f20a01f) AM_WRITENOP /* scsi? */
|
AM_RANGE(0x1f20a01c, 0x1f20a01f) AM_WRITENOP /* scsi? */
|
||||||
AM_RANGE(0x1f210400, 0x1f2107ff) AM_READNOP
|
AM_RANGE(0x1f210400, 0x1f2107ff) AM_READNOP
|
||||||
@ -674,7 +674,7 @@ static READ32_HANDLER(yy_r)
|
|||||||
|
|
||||||
static READ32_HANDLER(zz_r)
|
static READ32_HANDLER(zz_r)
|
||||||
{
|
{
|
||||||
// printf( "zz %08x %08x\n", offset, mem_mask );
|
// printf( "zz %08x %08x\n", offset, mem_mask );
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -697,7 +697,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 32 )
|
|||||||
AM_RANGE(0x220000, 0x220003) AM_WRITENOP
|
AM_RANGE(0x220000, 0x220003) AM_WRITENOP
|
||||||
AM_RANGE(0x230000, 0x230003) AM_WRITENOP
|
AM_RANGE(0x230000, 0x230003) AM_WRITENOP
|
||||||
AM_RANGE(0x280400, 0x2807ff) AM_READWRITE( ww_r, ww_w )
|
AM_RANGE(0x280400, 0x2807ff) AM_READWRITE( ww_r, ww_w )
|
||||||
// AM_RANGE(0x280400, 0x2807ff) AM_RAM AM_SHARE(3) /* shared ram? */
|
// AM_RANGE(0x280400, 0x2807ff) AM_RAM AM_SHARE(3) /* shared ram? */
|
||||||
AM_RANGE(0x30000c, 0x30000f) AM_READ( zz_r )
|
AM_RANGE(0x30000c, 0x30000f) AM_READ( zz_r )
|
||||||
AM_RANGE(0x400000, 0x400fff) AM_WRITENOP /* ide? */
|
AM_RANGE(0x400000, 0x400fff) AM_WRITENOP /* ide? */
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
@ -944,8 +944,8 @@ ROM_START( bmiidx4 )
|
|||||||
|
|
||||||
DISK_REGION( "cdrom0" )
|
DISK_REGION( "cdrom0" )
|
||||||
DISK_IMAGE_READONLY( "a03jaa01", 0, BAD_DUMP MD5(dccbe0158236453c27a9768d185ee275) SHA1(ee0f5989ed2bec3d174150a072e188bc10c15dcb) )
|
DISK_IMAGE_READONLY( "a03jaa01", 0, BAD_DUMP MD5(dccbe0158236453c27a9768d185ee275) SHA1(ee0f5989ed2bec3d174150a072e188bc10c15dcb) )
|
||||||
// DISK_IMAGE_READONLY( "a03jaahd", 1, NO_DUMP )
|
// DISK_IMAGE_READONLY( "a03jaahd", 1, NO_DUMP )
|
||||||
// DISK_IMAGE_READONLY( "a03jaa02", 2, NO_DUMP )
|
// DISK_IMAGE_READONLY( "a03jaa02", 2, NO_DUMP )
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
ROM_START( bmiidx6 )
|
ROM_START( bmiidx6 )
|
||||||
@ -956,8 +956,8 @@ ROM_START( bmiidx6 )
|
|||||||
|
|
||||||
DISK_REGION( "cdrom0" )
|
DISK_REGION( "cdrom0" )
|
||||||
DISK_IMAGE_READONLY( "b4ujaa01", 0, BAD_DUMP MD5(c9397ff1399b268ceac98732e4d7b16d) SHA1(1e723c74fd93140881c00c5af402249e0a8b3f2f) )
|
DISK_IMAGE_READONLY( "b4ujaa01", 0, BAD_DUMP MD5(c9397ff1399b268ceac98732e4d7b16d) SHA1(1e723c74fd93140881c00c5af402249e0a8b3f2f) )
|
||||||
// DISK_IMAGE_READONLY( "b4ujaahd", 1, NO_DUMP )
|
// DISK_IMAGE_READONLY( "b4ujaahd", 1, NO_DUMP )
|
||||||
// DISK_IMAGE_READONLY( "b4ujaa02", 2, NO_DUMP )
|
// DISK_IMAGE_READONLY( "b4ujaa02", 2, NO_DUMP )
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
ROM_START( bmiidx7 )
|
ROM_START( bmiidx7 )
|
||||||
@ -968,8 +968,8 @@ ROM_START( bmiidx7 )
|
|||||||
|
|
||||||
DISK_REGION( "cdrom0" )
|
DISK_REGION( "cdrom0" )
|
||||||
DISK_IMAGE_READONLY( "b44jaa01", 0, BAD_DUMP MD5(3078c73d050bb6a513b329f3844e1208) SHA1(5910e557816ced2c5162c5458b5ccf6f8e6839f0) )
|
DISK_IMAGE_READONLY( "b44jaa01", 0, BAD_DUMP MD5(3078c73d050bb6a513b329f3844e1208) SHA1(5910e557816ced2c5162c5458b5ccf6f8e6839f0) )
|
||||||
// DISK_IMAGE_READONLY( "b44jaahd", 1, NO_DUMP )
|
// DISK_IMAGE_READONLY( "b44jaahd", 1, NO_DUMP )
|
||||||
// DISK_IMAGE_READONLY( "b44jaa02", 2, NO_DUMP )
|
// DISK_IMAGE_READONLY( "b44jaa02", 2, NO_DUMP )
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
ROM_START( bmiidx8 )
|
ROM_START( bmiidx8 )
|
||||||
@ -980,8 +980,8 @@ ROM_START( bmiidx8 )
|
|||||||
|
|
||||||
DISK_REGION( "cdrom0" )
|
DISK_REGION( "cdrom0" )
|
||||||
DISK_IMAGE_READONLY( "c44jaa01", 0, BAD_DUMP MD5(43ae8f40ba8974d7d135e83c8e09112a) SHA1(b116775e47c7d5e2578b92811dccdc84f1cafe43) )
|
DISK_IMAGE_READONLY( "c44jaa01", 0, BAD_DUMP MD5(43ae8f40ba8974d7d135e83c8e09112a) SHA1(b116775e47c7d5e2578b92811dccdc84f1cafe43) )
|
||||||
// DISK_IMAGE_READONLY( "c44jaahd", 1, NO_DUMP )
|
// DISK_IMAGE_READONLY( "c44jaahd", 1, NO_DUMP )
|
||||||
// DISK_IMAGE_READONLY( "c44jaa02", 2, NO_DUMP )
|
// DISK_IMAGE_READONLY( "c44jaa02", 2, NO_DUMP )
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
ROM_START( bmiidxc )
|
ROM_START( bmiidxc )
|
||||||
@ -992,8 +992,8 @@ ROM_START( bmiidxc )
|
|||||||
|
|
||||||
DISK_REGION( "cdrom0" )
|
DISK_REGION( "cdrom0" )
|
||||||
DISK_IMAGE_READONLY( "896jaabm", 0, MD5(f842277762e330d500fa3eb6755c1547) SHA1(965772160177df43ce7a94f0e12d8cf676e57228) )
|
DISK_IMAGE_READONLY( "896jaabm", 0, MD5(f842277762e330d500fa3eb6755c1547) SHA1(965772160177df43ce7a94f0e12d8cf676e57228) )
|
||||||
// DISK_IMAGE_READONLY( "abmjaahd", 1, NO_DUMP )
|
// DISK_IMAGE_READONLY( "abmjaahd", 1, NO_DUMP )
|
||||||
// DISK_IMAGE_READONLY( "abmjaa02", 2, NO_DUMP )
|
// DISK_IMAGE_READONLY( "abmjaa02", 2, NO_DUMP )
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
ROM_START( bmiidxc2 )
|
ROM_START( bmiidxc2 )
|
||||||
@ -1004,8 +1004,8 @@ ROM_START( bmiidxc2 )
|
|||||||
|
|
||||||
DISK_REGION( "cdrom0" )
|
DISK_REGION( "cdrom0" )
|
||||||
DISK_IMAGE_READONLY( "984a01bm", 0, MD5(61ada5db9fcbfa01971c5f06253ab5e1) SHA1(98d5e120d0cd08e8598bfde75b16ba62bf67a15b) )
|
DISK_IMAGE_READONLY( "984a01bm", 0, MD5(61ada5db9fcbfa01971c5f06253ab5e1) SHA1(98d5e120d0cd08e8598bfde75b16ba62bf67a15b) )
|
||||||
// DISK_IMAGE_READONLY( "abmjaahd", 1, NO_DUMP )
|
// DISK_IMAGE_READONLY( "abmjaahd", 1, NO_DUMP )
|
||||||
// DISK_IMAGE_READONLY( "abmjaa02", 2, NO_DUMP )
|
// DISK_IMAGE_READONLY( "abmjaa02", 2, NO_DUMP )
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
ROM_START( bmiidxca )
|
ROM_START( bmiidxca )
|
||||||
@ -1016,8 +1016,8 @@ ROM_START( bmiidxca )
|
|||||||
|
|
||||||
DISK_REGION( "cdrom0" )
|
DISK_REGION( "cdrom0" )
|
||||||
DISK_IMAGE_READONLY( "896jabbm", 0, MD5(46f8bd83e8fbe527f6e4512804b2ce1e) SHA1(b7fcf3e6b9c1cebedacbc65c77aa3509c66984a9) )
|
DISK_IMAGE_READONLY( "896jabbm", 0, MD5(46f8bd83e8fbe527f6e4512804b2ce1e) SHA1(b7fcf3e6b9c1cebedacbc65c77aa3509c66984a9) )
|
||||||
// DISK_IMAGE_READONLY( "abmjaahd", 1, NO_DUMP )
|
// DISK_IMAGE_READONLY( "abmjaahd", 1, NO_DUMP )
|
||||||
// DISK_IMAGE_READONLY( "abmjaa02", 2, NO_DUMP )
|
// DISK_IMAGE_READONLY( "abmjaa02", 2, NO_DUMP )
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
GAME( 1999, gq863, 0, twinkle, twinkle, twinkle, ROT0, "Konami", "Twinkle System", GAME_IS_BIOS_ROOT )
|
GAME( 1999, gq863, 0, twinkle, twinkle, twinkle, ROT0, "Konami", "Twinkle System", GAME_IS_BIOS_ROOT )
|
||||||
|
|||||||
@ -1086,7 +1086,7 @@ WRITE8_HANDLER( balsente_chip_select_w )
|
|||||||
double temp = 0;
|
double temp = 0;
|
||||||
|
|
||||||
/* remember the previous value */
|
/* remember the previous value */
|
||||||
temp =
|
temp =
|
||||||
#endif
|
#endif
|
||||||
cem3394_get_parameter(cem_device[i], reg);
|
cem3394_get_parameter(cem_device[i], reg);
|
||||||
|
|
||||||
|
|||||||
@ -108,7 +108,7 @@ void decoprot_reset(running_machine *machine)
|
|||||||
|
|
||||||
WRITE16_HANDLER( deco16_104_prot_w ) /* Wizard Fire */
|
WRITE16_HANDLER( deco16_104_prot_w ) /* Wizard Fire */
|
||||||
{
|
{
|
||||||
if (offset == (0x150 / 2))
|
if (offset == (0x150 / 2))
|
||||||
{
|
{
|
||||||
soundlatch_w(space, 0, data & 0xff);
|
soundlatch_w(space, 0, data & 0xff);
|
||||||
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
||||||
@ -227,7 +227,7 @@ READ16_HANDLER( deco16_104_prot_r ) /* Wizard Fire */
|
|||||||
|
|
||||||
WRITE16_HANDLER( deco16_60_prot_w ) /* Edward Randy */
|
WRITE16_HANDLER( deco16_60_prot_w ) /* Edward Randy */
|
||||||
{
|
{
|
||||||
if (offset == (0x64 / 2))
|
if (offset == (0x64 / 2))
|
||||||
{
|
{
|
||||||
soundlatch_w(space, 0, data & 0xff);
|
soundlatch_w(space, 0, data & 0xff);
|
||||||
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
||||||
@ -417,7 +417,7 @@ static int mutantf_port_0e_hack=0, mutantf_port_6a_hack=0,mutantf_port_e8_hack=0
|
|||||||
|
|
||||||
WRITE16_HANDLER( deco16_66_prot_w ) /* Mutant Fighter */
|
WRITE16_HANDLER( deco16_66_prot_w ) /* Mutant Fighter */
|
||||||
{
|
{
|
||||||
if (offset == (0x64 / 2))
|
if (offset == (0x64 / 2))
|
||||||
{
|
{
|
||||||
soundlatch_w(space, 0, data & 0xff);
|
soundlatch_w(space, 0, data & 0xff);
|
||||||
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
||||||
@ -604,7 +604,7 @@ READ16_HANDLER( deco16_66_prot_r ) /* Mutant Fighter */
|
|||||||
|
|
||||||
WRITE16_HANDLER( deco16_104_cninja_prot_w )
|
WRITE16_HANDLER( deco16_104_cninja_prot_w )
|
||||||
{
|
{
|
||||||
if (offset == (0xa8 / 2))
|
if (offset == (0xa8 / 2))
|
||||||
{
|
{
|
||||||
soundlatch_w(space, 0, data & 0xff);
|
soundlatch_w(space, 0, data & 0xff);
|
||||||
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
||||||
@ -667,7 +667,7 @@ WRITE16_HANDLER( deco16_146_funkyjet_prot_w )
|
|||||||
{
|
{
|
||||||
COMBINE_DATA(&deco16_prot_ram[offset]);
|
COMBINE_DATA(&deco16_prot_ram[offset]);
|
||||||
|
|
||||||
if (offset == (0x10a >> 1))
|
if (offset == (0x10a >> 1))
|
||||||
{
|
{
|
||||||
soundlatch_w(space, 0, data & 0xff);
|
soundlatch_w(space, 0, data & 0xff);
|
||||||
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
||||||
@ -787,7 +787,7 @@ WRITE16_HANDLER( deco16_104_rohga_prot_w )
|
|||||||
else
|
else
|
||||||
COMBINE_DATA(&deco16_prot_ram[offset]);
|
COMBINE_DATA(&deco16_prot_ram[offset]);
|
||||||
|
|
||||||
if (offset == (0xa8 / 2))
|
if (offset == (0xa8 / 2))
|
||||||
{
|
{
|
||||||
soundlatch_w(space, 0, data & 0xff);
|
soundlatch_w(space, 0, data & 0xff);
|
||||||
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
||||||
@ -1217,7 +1217,7 @@ static WRITE16_HANDLER( deco16_146_core_prot_w )
|
|||||||
const int sndport=0x260;
|
const int sndport=0x260;
|
||||||
const int xorport=0x340;
|
const int xorport=0x340;
|
||||||
const int maskport=0x6c0;
|
const int maskport=0x6c0;
|
||||||
if (writeport == sndport)
|
if (writeport == sndport)
|
||||||
{
|
{
|
||||||
soundlatch_w(space, 0, data & 0xff);
|
soundlatch_w(space, 0, data & 0xff);
|
||||||
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
||||||
@ -1746,7 +1746,7 @@ READ16_HANDLER( dietgo_104_prot_r )
|
|||||||
|
|
||||||
WRITE16_HANDLER( dietgo_104_prot_w )
|
WRITE16_HANDLER( dietgo_104_prot_w )
|
||||||
{
|
{
|
||||||
if (offset == (0x380 / 2))
|
if (offset == (0x380 / 2))
|
||||||
{
|
{
|
||||||
soundlatch_w(space, 0, data & 0xff);
|
soundlatch_w(space, 0, data & 0xff);
|
||||||
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
||||||
|
|||||||
@ -121,7 +121,7 @@ static TIMER_CALLBACK( nmi_generate )
|
|||||||
READ8_DEVICE_HANDLER( namco_06xx_data_r )
|
READ8_DEVICE_HANDLER( namco_06xx_data_r )
|
||||||
{
|
{
|
||||||
namco_06xx_state *state = get_safe_token(device);
|
namco_06xx_state *state = get_safe_token(device);
|
||||||
|
|
||||||
LOG(("%s: 06XX '%s' read offset %d\n",cpuexec_describe_context(device->machine),device->tag,offset));
|
LOG(("%s: 06XX '%s' read offset %d\n",cpuexec_describe_context(device->machine),device->tag,offset));
|
||||||
|
|
||||||
if (!(state->command & 0x10))
|
if (!(state->command & 0x10))
|
||||||
@ -227,13 +227,13 @@ static DEVICE_START( namco_06xx )
|
|||||||
const namco_06xx_interface *config = (const namco_06xx_interface *)device->inline_config;
|
const namco_06xx_interface *config = (const namco_06xx_interface *)device->inline_config;
|
||||||
namco_06xx_state *state = get_safe_token(device);
|
namco_06xx_state *state = get_safe_token(device);
|
||||||
int devnum;
|
int devnum;
|
||||||
|
|
||||||
assert(config != NULL);
|
assert(config != NULL);
|
||||||
|
|
||||||
/* resolve our CPU */
|
/* resolve our CPU */
|
||||||
state->nmicpu = cputag_get_cpu(device->machine, config->nmicpu);
|
state->nmicpu = cputag_get_cpu(device->machine, config->nmicpu);
|
||||||
assert(state->nmicpu != NULL);
|
assert(state->nmicpu != NULL);
|
||||||
|
|
||||||
/* resolve our devices */
|
/* resolve our devices */
|
||||||
state->device[0] = (config->chip0 != NULL) ? devtag_get_device(device->machine, config->chip0) : NULL;
|
state->device[0] = (config->chip0 != NULL) ? devtag_get_device(device->machine, config->chip0) : NULL;
|
||||||
assert(state->device[0] != NULL || config->chip0 == NULL);
|
assert(state->device[0] != NULL || config->chip0 == NULL);
|
||||||
@ -243,13 +243,13 @@ static DEVICE_START( namco_06xx )
|
|||||||
assert(state->device[2] != NULL || config->chip2 == NULL);
|
assert(state->device[2] != NULL || config->chip2 == NULL);
|
||||||
state->device[3] = (config->chip3 != NULL) ? devtag_get_device(device->machine, config->chip3) : NULL;
|
state->device[3] = (config->chip3 != NULL) ? devtag_get_device(device->machine, config->chip3) : NULL;
|
||||||
assert(state->device[3] != NULL || config->chip3 == NULL);
|
assert(state->device[3] != NULL || config->chip3 == NULL);
|
||||||
|
|
||||||
/* loop over devices and set their read/write handlers */
|
/* loop over devices and set their read/write handlers */
|
||||||
for (devnum = 0; devnum < 4; devnum++)
|
for (devnum = 0; devnum < 4; devnum++)
|
||||||
if (state->device[devnum] != NULL)
|
if (state->device[devnum] != NULL)
|
||||||
{
|
{
|
||||||
device_type type = state->device[devnum]->type;
|
device_type type = state->device[devnum]->type;
|
||||||
|
|
||||||
if (type == NAMCO_50XX)
|
if (type == NAMCO_50XX)
|
||||||
{
|
{
|
||||||
state->read[devnum] = namco_50xx_read;
|
state->read[devnum] = namco_50xx_read;
|
||||||
@ -274,7 +274,7 @@ static DEVICE_START( namco_06xx )
|
|||||||
fatalerror("Unknown device type %s connected to Namco 06xx", devtype_get_name(type));
|
fatalerror("Unknown device type %s connected to Namco 06xx", devtype_get_name(type));
|
||||||
}
|
}
|
||||||
|
|
||||||
/* allocate a timer */
|
/* allocate a timer */
|
||||||
state->nmi_timer = timer_alloc(device->machine, nmi_generate, (void *)device);
|
state->nmi_timer = timer_alloc(device->machine, nmi_generate, (void *)device);
|
||||||
|
|
||||||
state_save_register_device_item(device, 0, state->command);
|
state_save_register_device_item(device, 0, state->command);
|
||||||
|
|||||||
@ -295,7 +295,7 @@ static DEVICE_START( namco_50xx )
|
|||||||
|
|
||||||
static DEVICE_RESET( namco_50xx )
|
static DEVICE_RESET( namco_50xx )
|
||||||
{
|
{
|
||||||
// namco_50xx_state *state = get_safe_token(device);
|
// namco_50xx_state *state = get_safe_token(device);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -353,10 +353,10 @@ READ8_DEVICE_HANDLER( namco_51xx_read )
|
|||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
|
|
||||||
ADDRESS_MAP_START( namco_51xx_map_io, ADDRESS_SPACE_IO, 8 )
|
ADDRESS_MAP_START( namco_51xx_map_io, ADDRESS_SPACE_IO, 8 )
|
||||||
// AM_RANGE(MB88_PORTK, MB88_PORTK) AM_READ(namco_51xx_K_r)
|
// AM_RANGE(MB88_PORTK, MB88_PORTK) AM_READ(namco_51xx_K_r)
|
||||||
// AM_RANGE(MB88_PORTO, MB88_PORTO) AM_WRITE(namco_51xx_O_w)
|
// AM_RANGE(MB88_PORTO, MB88_PORTO) AM_WRITE(namco_51xx_O_w)
|
||||||
// AM_RANGE(MB88_PORTR0, MB88_PORTR0) AM_READ(namco_51xx_R0_r)
|
// AM_RANGE(MB88_PORTR0, MB88_PORTR0) AM_READ(namco_51xx_R0_r)
|
||||||
// AM_RANGE(MB88_PORTR2, MB88_PORTR2) AM_READ(namco_51xx_R2_r)
|
// AM_RANGE(MB88_PORTR2, MB88_PORTR2) AM_READ(namco_51xx_R2_r)
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
|
|
||||||
@ -382,7 +382,7 @@ static DEVICE_START( namco_51xx )
|
|||||||
const namco_51xx_interface *config = (const namco_51xx_interface *)device->static_config;
|
const namco_51xx_interface *config = (const namco_51xx_interface *)device->static_config;
|
||||||
namco_51xx_state *state = get_safe_token(device);
|
namco_51xx_state *state = get_safe_token(device);
|
||||||
astring *tempstring = astring_alloc();
|
astring *tempstring = astring_alloc();
|
||||||
|
|
||||||
assert(config != NULL);
|
assert(config != NULL);
|
||||||
|
|
||||||
/* find our CPU */
|
/* find our CPU */
|
||||||
|
|||||||
@ -121,9 +121,9 @@ READ8_DEVICE_HANDLER( namco_53xx_read )
|
|||||||
{
|
{
|
||||||
namco_53xx_state *state = get_safe_token(device);
|
namco_53xx_state *state = get_safe_token(device);
|
||||||
UINT8 res = state->portO;
|
UINT8 res = state->portO;
|
||||||
|
|
||||||
namco_53xx_read_request(device);
|
namco_53xx_read_request(device);
|
||||||
|
|
||||||
return res;
|
return res;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -161,7 +161,7 @@ static DEVICE_START( namco_53xx )
|
|||||||
const namco_53xx_interface *config = (const namco_53xx_interface *)device->static_config;
|
const namco_53xx_interface *config = (const namco_53xx_interface *)device->static_config;
|
||||||
namco_53xx_state *state = get_safe_token(device);
|
namco_53xx_state *state = get_safe_token(device);
|
||||||
astring *tempstring = astring_alloc();
|
astring *tempstring = astring_alloc();
|
||||||
|
|
||||||
assert(config != NULL);
|
assert(config != NULL);
|
||||||
|
|
||||||
/* find our CPU */
|
/* find our CPU */
|
||||||
@ -185,7 +185,7 @@ static DEVICE_START( namco_53xx )
|
|||||||
|
|
||||||
static DEVICE_RESET( namco_53xx )
|
static DEVICE_RESET( namco_53xx )
|
||||||
{
|
{
|
||||||
// namco_53xx_state *state = get_safe_token(device);
|
// namco_53xx_state *state = get_safe_token(device);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -60,7 +60,7 @@ VIDEO_START( artmagic )
|
|||||||
{
|
{
|
||||||
blitter_base = (UINT16 *)memory_region(machine, "gfx1");
|
blitter_base = (UINT16 *)memory_region(machine, "gfx1");
|
||||||
blitter_mask = memory_region_length(machine, "gfx1")/2 - 1;
|
blitter_mask = memory_region_length(machine, "gfx1")/2 - 1;
|
||||||
|
|
||||||
state_save_register_global_array(machine, artmagic_xor);
|
state_save_register_global_array(machine, artmagic_xor);
|
||||||
state_save_register_global(machine, artmagic_is_stoneball);
|
state_save_register_global(machine, artmagic_is_stoneball);
|
||||||
state_save_register_global_array(machine, blitter_data);
|
state_save_register_global_array(machine, blitter_data);
|
||||||
|
|||||||
@ -104,7 +104,7 @@ VIDEO_START( cheekyms )
|
|||||||
width = video_screen_get_width(machine->primary_screen);
|
width = video_screen_get_width(machine->primary_screen);
|
||||||
height = video_screen_get_height(machine->primary_screen);
|
height = video_screen_get_height(machine->primary_screen);
|
||||||
bitmap_buffer = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
|
bitmap_buffer = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
|
||||||
|
|
||||||
cheekyms_tilemap = tilemap_create(machine, cheekyms_get_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
|
cheekyms_tilemap = tilemap_create(machine, cheekyms_get_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
|
||||||
tilemap_set_transparent_pen(cheekyms_tilemap, 0);
|
tilemap_set_transparent_pen(cheekyms_tilemap, 0);
|
||||||
}
|
}
|
||||||
@ -166,14 +166,14 @@ VIDEO_UPDATE( cheekyms )
|
|||||||
|
|
||||||
/* draw the tilemap to a temp bitmap */
|
/* draw the tilemap to a temp bitmap */
|
||||||
tilemap_draw(bitmap_buffer, cliprect, cheekyms_tilemap, 0, 0);
|
tilemap_draw(bitmap_buffer, cliprect, cheekyms_tilemap, 0, 0);
|
||||||
|
|
||||||
/* draw the tilemap to the final bitmap applying the scroll to the man character */
|
/* draw the tilemap to the final bitmap applying the scroll to the man character */
|
||||||
for(y = cliprect->min_y; y <= cliprect->max_y; y++)
|
for(y = cliprect->min_y; y <= cliprect->max_y; y++)
|
||||||
{
|
{
|
||||||
for(x = cliprect->min_x; x <= cliprect->max_x; x++)
|
for(x = cliprect->min_x; x <= cliprect->max_x; x++)
|
||||||
{
|
{
|
||||||
int in_man_area;
|
int in_man_area;
|
||||||
|
|
||||||
if(flip)
|
if(flip)
|
||||||
{
|
{
|
||||||
in_man_area = (x >= (32-12-1)*8 && x < (32-8)*8 && y > 5*8 && y < 27*8);
|
in_man_area = (x >= (32-12-1)*8 && x < (32-8)*8 && y > 5*8 && y < 27*8);
|
||||||
@ -182,7 +182,7 @@ VIDEO_UPDATE( cheekyms )
|
|||||||
{
|
{
|
||||||
in_man_area = (x >= 8*8 && x < 12*8 && y > 5*8 && y < 27*8);
|
in_man_area = (x >= 8*8 && x < 12*8 && y > 5*8 && y < 27*8);
|
||||||
}
|
}
|
||||||
|
|
||||||
if(in_man_area)
|
if(in_man_area)
|
||||||
{
|
{
|
||||||
if ((y + scrolly) < 27*8 && *BITMAP_ADDR16(bitmap_buffer, y + scrolly, x) != 0)
|
if ((y + scrolly) < 27*8 && *BITMAP_ADDR16(bitmap_buffer, y + scrolly, x) != 0)
|
||||||
@ -195,7 +195,7 @@ VIDEO_UPDATE( cheekyms )
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -972,7 +972,7 @@ WRITE64_HANDLER( pvr_ctrl_w )
|
|||||||
mame_printf_verbose("PVRCTRL: [%08x=%x] write %llx to %x (reg %x), mask %llx\n", 0x5f7c00+reg*4, dat, data>>shift, offset, reg, mem_mask);
|
mame_printf_verbose("PVRCTRL: [%08x=%x] write %llx to %x (reg %x), mask %llx\n", 0x5f7c00+reg*4, dat, data>>shift, offset, reg, mem_mask);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// pvrctrl_regs[reg] |= dat;
|
// pvrctrl_regs[reg] |= dat;
|
||||||
pvrctrl_regs[reg] = dat;
|
pvrctrl_regs[reg] = dat;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|||||||
@ -2345,7 +2345,7 @@ static void triangle(UINT32 w1, UINT32 w2, int shade, int texture, int zbuffer)
|
|||||||
tile = (w1 >> 16) & 0x7;
|
tile = (w1 >> 16) & 0x7;
|
||||||
|
|
||||||
r = 0xff; g = 0xff; b = 0xff; a = 0xff; z = 0; s = 0; t = 0; w = 0;
|
r = 0xff; g = 0xff; b = 0xff; a = 0xff; z = 0; s = 0; t = 0; w = 0;
|
||||||
//dr = 0; dg = 0; db = 0; da = 0;
|
//dr = 0; dg = 0; db = 0; da = 0;
|
||||||
|
|
||||||
if (shade)
|
if (shade)
|
||||||
{
|
{
|
||||||
@ -2378,7 +2378,7 @@ static void triangle(UINT32 w1, UINT32 w2, int shade, int texture, int zbuffer)
|
|||||||
dtde = ((rdp_cmd_data[texture_base+8 ] << 16) & 0xffff0000) | (rdp_cmd_data[texture_base+12] & 0x0000ffff);
|
dtde = ((rdp_cmd_data[texture_base+8 ] << 16) & 0xffff0000) | (rdp_cmd_data[texture_base+12] & 0x0000ffff);
|
||||||
dwde = (rdp_cmd_data[texture_base+9 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+13] >> 16) & 0x0000ffff);
|
dwde = (rdp_cmd_data[texture_base+9 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+13] >> 16) & 0x0000ffff);
|
||||||
//dsdy = (rdp_cmd_data[texture_base+10] & 0xffff0000) | ((rdp_cmd_data[texture_base+14] >> 16) & 0x0000ffff);
|
//dsdy = (rdp_cmd_data[texture_base+10] & 0xffff0000) | ((rdp_cmd_data[texture_base+14] >> 16) & 0x0000ffff);
|
||||||
//dtdy = ((rdp_cmd_data[texture_base+10] << 16) & 0xffff0000) | (rdp_cmd_data[texture_base+14] & 0x0000ffff);
|
//dtdy = ((rdp_cmd_data[texture_base+10] << 16) & 0xffff0000) | (rdp_cmd_data[texture_base+14] & 0x0000ffff);
|
||||||
//dwdy = (rdp_cmd_data[texture_base+11] & 0xffff0000) | ((rdp_cmd_data[texture_base+15] >> 16) & 0x0000ffff);
|
//dwdy = (rdp_cmd_data[texture_base+11] & 0xffff0000) | ((rdp_cmd_data[texture_base+15] >> 16) & 0x0000ffff);
|
||||||
}
|
}
|
||||||
if (zbuffer)
|
if (zbuffer)
|
||||||
|
|||||||
@ -1315,8 +1315,8 @@ DrawSpritesHelper(
|
|||||||
{
|
{
|
||||||
struct SceneNode *node = NewSceneNode(machine, zcoord,eSCENENODE_SPRITE);
|
struct SceneNode *node = NewSceneNode(machine, zcoord,eSCENENODE_SPRITE);
|
||||||
|
|
||||||
// printf("[%02d]: tile %x pri %x color %x flipX %d flipY %d cols %d rows %d link %d X %d Y %d sX %d sY %d trans %d cz %d\n",
|
// printf("[%02d]: tile %x pri %x color %x flipX %d flipY %d cols %d rows %d link %d X %d Y %d sX %d sY %d trans %d cz %d\n",
|
||||||
// i, tile, cz&0x80, color&0x7f, flipx, flipy, numcols, numrows, linkType, xpos, ypos, sizex, sizey, translucency, cz);
|
// i, tile, cz&0x80, color&0x7f, flipx, flipy, numcols, numrows, linkType, xpos, ypos, sizex, sizey, translucency, cz);
|
||||||
|
|
||||||
if (color == 0) color = 0x67; // extreme hack for Tokyo Wars
|
if (color == 0) color = 0x67; // extreme hack for Tokyo Wars
|
||||||
|
|
||||||
@ -1422,7 +1422,7 @@ DrawSprites( running_machine *machine, bitmap_t *bitmap, const rectangle *clipre
|
|||||||
|
|
||||||
/* HACK for Tokyo Wars */
|
/* HACK for Tokyo Wars */
|
||||||
if (deltax == 0 && deltay == 0)
|
if (deltax == 0 && deltay == 0)
|
||||||
{
|
{
|
||||||
deltax = 190;
|
deltax = 190;
|
||||||
deltay = 250;
|
deltay = 250;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -200,22 +200,22 @@ void ppu2c0x_init_palette(running_machine *machine, int first_entry )
|
|||||||
for (colorEmphasis = 0; colorEmphasis < 8; colorEmphasis ++)
|
for (colorEmphasis = 0; colorEmphasis < 8; colorEmphasis ++)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
double r_mod = 0.0;
|
double r_mod = 0.0;
|
||||||
double g_mod = 0.0;
|
double g_mod = 0.0;
|
||||||
double b_mod = 0.0;
|
double b_mod = 0.0;
|
||||||
|
|
||||||
switch (colorEmphasis)
|
switch (colorEmphasis)
|
||||||
{
|
{
|
||||||
case 0: r_mod = 1.0; g_mod = 1.0; b_mod = 1.0; break;
|
case 0: r_mod = 1.0; g_mod = 1.0; b_mod = 1.0; break;
|
||||||
case 1: r_mod = 1.24; g_mod = .915; b_mod = .743; break;
|
case 1: r_mod = 1.24; g_mod = .915; b_mod = .743; break;
|
||||||
case 2: r_mod = .794; g_mod = 1.09; b_mod = .882; break;
|
case 2: r_mod = .794; g_mod = 1.09; b_mod = .882; break;
|
||||||
case 3: r_mod = .905; g_mod = 1.03; b_mod = 1.28; break;
|
case 3: r_mod = .905; g_mod = 1.03; b_mod = 1.28; break;
|
||||||
case 4: r_mod = .741; g_mod = .987; b_mod = 1.0; break;
|
case 4: r_mod = .741; g_mod = .987; b_mod = 1.0; break;
|
||||||
case 5: r_mod = 1.02; g_mod = .908; b_mod = .979; break;
|
case 5: r_mod = 1.02; g_mod = .908; b_mod = .979; break;
|
||||||
case 6: r_mod = 1.02; g_mod = .98; b_mod = .653; break;
|
case 6: r_mod = 1.02; g_mod = .98; b_mod = .653; break;
|
||||||
case 7: r_mod = .75; g_mod = .75; b_mod = .75; break;
|
case 7: r_mod = .75; g_mod = .75; b_mod = .75; break;
|
||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* loop through the 4 intensities */
|
/* loop through the 4 intensities */
|
||||||
for (colorIntensity = 0; colorIntensity < 4; colorIntensity++)
|
for (colorIntensity = 0; colorIntensity < 4; colorIntensity++)
|
||||||
|
|||||||
@ -77,7 +77,7 @@ static TILE_GET_INFO( qwak_get_tile_info )
|
|||||||
VIDEO_START( runaway )
|
VIDEO_START( runaway )
|
||||||
{
|
{
|
||||||
bg_tilemap = tilemap_create(machine, runaway_get_tile_info, tilemap_scan_rows, 8, 8, 32, 30);
|
bg_tilemap = tilemap_create(machine, runaway_get_tile_info, tilemap_scan_rows, 8, 8, 32, 30);
|
||||||
|
|
||||||
state_save_register_global(machine, tile_bank);
|
state_save_register_global(machine, tile_bank);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -85,7 +85,7 @@ VIDEO_START( runaway )
|
|||||||
VIDEO_START( qwak )
|
VIDEO_START( qwak )
|
||||||
{
|
{
|
||||||
bg_tilemap = tilemap_create(machine, qwak_get_tile_info, tilemap_scan_rows, 8, 8, 32, 30);
|
bg_tilemap = tilemap_create(machine, qwak_get_tile_info, tilemap_scan_rows, 8, 8, 32, 30);
|
||||||
|
|
||||||
state_save_register_global(machine, tile_bank);
|
state_save_register_global(machine, tile_bank);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -5303,9 +5303,9 @@ UINT8 stv_get_vblank(running_machine *machine)
|
|||||||
static int get_vblank_duration(running_machine *machine)
|
static int get_vblank_duration(running_machine *machine)
|
||||||
{
|
{
|
||||||
/* TODO: +64 is probably due of missing pixel clock/screen raw params hook-up.
|
/* TODO: +64 is probably due of missing pixel clock/screen raw params hook-up.
|
||||||
Problem is, I don't know if it's possible to handle that in MAME with
|
Problem is, I don't know if it's possible to handle that in MAME with
|
||||||
all this dynamic resolution babblecrap...
|
all this dynamic resolution babblecrap...
|
||||||
*/
|
*/
|
||||||
|
|
||||||
if(STV_VDP2_HRES & 4)
|
if(STV_VDP2_HRES & 4)
|
||||||
{
|
{
|
||||||
|
|||||||
@ -1,28 +1,28 @@
|
|||||||
/***************************************************************************
|
/***************************************************************************
|
||||||
|
|
||||||
System 16 / 18 bootleg video
|
System 16 / 18 bootleg video
|
||||||
|
|
||||||
Bugs to check against real HW
|
Bugs to check against real HW
|
||||||
|
|
||||||
System16A Tilemap bootlegs
|
System16A Tilemap bootlegs
|
||||||
|
|
||||||
- Shinobi (Datsu bootleg) has a black bar down the right hand side,
|
- Shinobi (Datsu bootleg) has a black bar down the right hand side,
|
||||||
which turns red on the high score table. This is in the Text layer.
|
which turns red on the high score table. This is in the Text layer.
|
||||||
According to other games this should be the correct alignment for
|
According to other games this should be the correct alignment for
|
||||||
this bootleg HW.
|
this bootleg HW.
|
||||||
|
|
||||||
- After inserting a coin in Passing Shot (2p version) the layers are
|
- After inserting a coin in Passing Shot (2p version) the layers are
|
||||||
misaligned by 1 pixel (happens on non-bootlegs too)
|
misaligned by 1 pixel (happens on non-bootlegs too)
|
||||||
|
|
||||||
- Causing a 'fault' in the Passing Shot 2p bootleg (not hitting the ball
|
- Causing a 'fault' in the Passing Shot 2p bootleg (not hitting the ball
|
||||||
on your serve) causes the tilemaps to be erased and not updated
|
on your serve) causes the tilemaps to be erased and not updated
|
||||||
properly (mirroring?, bootleg protection?, missed case in bootleg?)
|
properly (mirroring?, bootleg protection?, missed case in bootleg?)
|
||||||
|
|
||||||
|
System18 Tilemap bootlegs
|
||||||
|
|
||||||
System18 Tilemap bootlegs
|
|
||||||
|
|
||||||
- Alien Storm Credit text for Player 1 is not displayed after inserting
|
- Alien Storm Credit text for Player 1 is not displayed after inserting
|
||||||
a coin.
|
a coin.
|
||||||
|
|
||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
#include "driver.h"
|
#include "driver.h"
|
||||||
#include "system16.h"
|
#include "system16.h"
|
||||||
@ -112,16 +112,16 @@ static TILE_GET_INFO( get_system16b_bootleg_tile_info0 )
|
|||||||
/* TILEMAP_MAPPER can't be dynamic, so we do the page lookup here */
|
/* TILEMAP_MAPPER can't be dynamic, so we do the page lookup here */
|
||||||
int data, tile_number;
|
int data, tile_number;
|
||||||
int page = 0;
|
int page = 0;
|
||||||
|
|
||||||
if (tile_index & 0x0040)
|
if (tile_index & 0x0040)
|
||||||
page+=1;
|
page+=1;
|
||||||
|
|
||||||
if (tile_index & 0x1000)
|
if (tile_index & 0x1000)
|
||||||
page+=2;
|
page+=2;
|
||||||
|
|
||||||
tile_index = ((tile_index & 0x03f) >> 0) |
|
tile_index = ((tile_index & 0x03f) >> 0) |
|
||||||
((tile_index & 0xf80) >> 1);
|
((tile_index & 0xf80) >> 1);
|
||||||
|
|
||||||
tile_index += bg0_page[page] * 0x800;
|
tile_index += bg0_page[page] * 0x800;
|
||||||
|
|
||||||
data = sys16_tileram[tile_index];
|
data = sys16_tileram[tile_index];
|
||||||
@ -139,16 +139,16 @@ static TILE_GET_INFO( get_system16b_bootleg_tile_info1 )
|
|||||||
/* TILEMAP_MAPPER can't be dynamic, so we do the page lookup here */
|
/* TILEMAP_MAPPER can't be dynamic, so we do the page lookup here */
|
||||||
int data, tile_number;
|
int data, tile_number;
|
||||||
int page = 0;
|
int page = 0;
|
||||||
|
|
||||||
if (tile_index & 0x0040)
|
if (tile_index & 0x0040)
|
||||||
page+=1;
|
page+=1;
|
||||||
|
|
||||||
if (tile_index & 0x1000)
|
if (tile_index & 0x1000)
|
||||||
page+=2;
|
page+=2;
|
||||||
|
|
||||||
tile_index = ((tile_index & 0x03f) >> 0) |
|
tile_index = ((tile_index & 0x03f) >> 0) |
|
||||||
((tile_index & 0xf80) >> 1);
|
((tile_index & 0xf80) >> 1);
|
||||||
|
|
||||||
tile_index += bg1_page[page] * 0x800;
|
tile_index += bg1_page[page] * 0x800;
|
||||||
|
|
||||||
data = sys16_tileram[tile_index];
|
data = sys16_tileram[tile_index];
|
||||||
@ -463,7 +463,7 @@ WRITE16_HANDLER( sys16_paletteram_w )
|
|||||||
UINT16 newword;
|
UINT16 newword;
|
||||||
COMBINE_DATA( &paletteram16[offset] );
|
COMBINE_DATA( &paletteram16[offset] );
|
||||||
newword = paletteram16[offset];
|
newword = paletteram16[offset];
|
||||||
|
|
||||||
/* sBGR BBBB GGGG RRRR */
|
/* sBGR BBBB GGGG RRRR */
|
||||||
/* x000 4321 4321 4321 */
|
/* x000 4321 4321 4321 */
|
||||||
{
|
{
|
||||||
@ -871,19 +871,19 @@ VIDEO_START( system18old )
|
|||||||
|
|
||||||
/*****************************************************************************************
|
/*****************************************************************************************
|
||||||
System 16A bootleg video
|
System 16A bootleg video
|
||||||
|
|
||||||
The System16A bootlegs have extra RAM for 2 tilemaps. The game code copies data from
|
The System16A bootlegs have extra RAM for 2 tilemaps. The game code copies data from
|
||||||
the usual 'tilemap ram' area to this new RAM and sets scroll registers as appropriate
|
the usual 'tilemap ram' area to this new RAM and sets scroll registers as appropriate
|
||||||
using additional registers not present on the original System 16A hardware.
|
using additional registers not present on the original System 16A hardware.
|
||||||
|
|
||||||
For some unknown reason the 2p Passing Shot bootleg end up blanking this area at times,
|
For some unknown reason the 2p Passing Shot bootleg end up blanking this area at times,
|
||||||
this could be an emulation flaw or a problem with the original bootlegs. Inserting a
|
this could be an emulation flaw or a problem with the original bootlegs. Inserting a
|
||||||
coin at the incorrect time can also cause missing graphics on the initial entry screen.
|
coin at the incorrect time can also cause missing graphics on the initial entry screen.
|
||||||
See note at top of driver
|
See note at top of driver
|
||||||
|
|
||||||
Sprites:
|
Sprites:
|
||||||
ToDo
|
ToDo
|
||||||
|
|
||||||
*****************************************************************************************/
|
*****************************************************************************************/
|
||||||
|
|
||||||
static tilemap *system16a_bootleg_bg_tilemaps[2];
|
static tilemap *system16a_bootleg_bg_tilemaps[2];
|
||||||
@ -899,13 +899,13 @@ int system16a_bootleg_fgscrollx;
|
|||||||
static TILE_GET_INFO( get_system16a_bootleg_tile_infotxt )
|
static TILE_GET_INFO( get_system16a_bootleg_tile_infotxt )
|
||||||
{
|
{
|
||||||
int data, tile_number;
|
int data, tile_number;
|
||||||
|
|
||||||
data = sys16_textram[tile_index];
|
data = sys16_textram[tile_index];
|
||||||
tile_number = data&0x1ff;
|
tile_number = data&0x1ff;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
SET_TILE_INFO(
|
SET_TILE_INFO(
|
||||||
0,
|
0,
|
||||||
tile_number,
|
tile_number,
|
||||||
@ -916,7 +916,7 @@ static TILE_GET_INFO( get_system16a_bootleg_tile_infotxt )
|
|||||||
static TILE_GET_INFO( get_system16a_bootleg_tile_info0 )
|
static TILE_GET_INFO( get_system16a_bootleg_tile_info0 )
|
||||||
{
|
{
|
||||||
int data, tile_number;
|
int data, tile_number;
|
||||||
|
|
||||||
data = system16a_bootleg_bg0_tileram[tile_index];
|
data = system16a_bootleg_bg0_tileram[tile_index];
|
||||||
tile_number = data&0x1fff;
|
tile_number = data&0x1fff;
|
||||||
|
|
||||||
@ -969,7 +969,7 @@ WRITE16_HANDLER( system16a_bootleg_tilemapselect_w )
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
VIDEO_START( system16a_bootleg )
|
VIDEO_START( system16a_bootleg )
|
||||||
{
|
{
|
||||||
/* Normal colors */
|
/* Normal colors */
|
||||||
@ -986,26 +986,26 @@ VIDEO_START( system16a_bootleg )
|
|||||||
6, resistances_sh, weights[1][2], 0, 0
|
6, resistances_sh, weights[1][2], 0, 0
|
||||||
);
|
);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
system16a_bootleg_text_tilemap = tilemap_create(machine, get_system16a_bootleg_tile_infotxt, tilemap_scan_rows, 8,8, 64,32 );
|
system16a_bootleg_text_tilemap = tilemap_create(machine, get_system16a_bootleg_tile_infotxt, tilemap_scan_rows, 8,8, 64,32 );
|
||||||
|
|
||||||
// the system16a bootlegs have simple tilemaps instead of the paged system
|
// the system16a bootlegs have simple tilemaps instead of the paged system
|
||||||
system16a_bootleg_bg_tilemaps[0] = tilemap_create(machine, get_system16a_bootleg_tile_info0, tilemap_scan_rows, 8,8, 64,32 );
|
system16a_bootleg_bg_tilemaps[0] = tilemap_create(machine, get_system16a_bootleg_tile_info0, tilemap_scan_rows, 8,8, 64,32 );
|
||||||
system16a_bootleg_bg_tilemaps[1] = tilemap_create(machine, get_system16a_bootleg_tile_info1, tilemap_scan_rows, 8,8, 64,32 );
|
system16a_bootleg_bg_tilemaps[1] = tilemap_create(machine, get_system16a_bootleg_tile_info1, tilemap_scan_rows, 8,8, 64,32 );
|
||||||
|
|
||||||
tilemap_set_transparent_pen( system16a_bootleg_text_tilemap, 0 );
|
tilemap_set_transparent_pen( system16a_bootleg_text_tilemap, 0 );
|
||||||
tilemap_set_transparent_pen( system16a_bootleg_bg_tilemaps[0], 0 );
|
tilemap_set_transparent_pen( system16a_bootleg_bg_tilemaps[0], 0 );
|
||||||
tilemap_set_transparent_pen( system16a_bootleg_bg_tilemaps[1], 0 );
|
tilemap_set_transparent_pen( system16a_bootleg_bg_tilemaps[1], 0 );
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
// Passing Shot (2 player), Shinobi (Datsu), Wonderboy 3
|
// Passing Shot (2 player), Shinobi (Datsu), Wonderboy 3
|
||||||
VIDEO_UPDATE( system16a_bootleg )
|
VIDEO_UPDATE( system16a_bootleg )
|
||||||
{
|
{
|
||||||
int offset_txtx, offset_txty, offset_bg1x, offset_bg1y, offset_bg0x, offset_bg0y;
|
int offset_txtx, offset_txty, offset_bg1x, offset_bg1y, offset_bg0x, offset_bg0y;
|
||||||
|
|
||||||
// passing shot
|
// passing shot
|
||||||
offset_txtx = 192;
|
offset_txtx = 192;
|
||||||
offset_txty = 0;
|
offset_txty = 0;
|
||||||
@ -1013,17 +1013,17 @@ VIDEO_UPDATE( system16a_bootleg )
|
|||||||
offset_bg1y = 0;
|
offset_bg1y = 0;
|
||||||
offset_bg0x = 187;
|
offset_bg0x = 187;
|
||||||
offset_bg0y = 0;
|
offset_bg0y = 0;
|
||||||
|
|
||||||
bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
|
bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
|
||||||
|
|
||||||
// I can't bring myself to care about dirty tile marking on something which runs at a bazillion % speed anyway, clean code is better
|
// I can't bring myself to care about dirty tile marking on something which runs at a bazillion % speed anyway, clean code is better
|
||||||
tilemap_mark_all_tiles_dirty (system16a_bootleg_bg_tilemaps[0]);
|
tilemap_mark_all_tiles_dirty (system16a_bootleg_bg_tilemaps[0]);
|
||||||
tilemap_mark_all_tiles_dirty (system16a_bootleg_bg_tilemaps[1]);
|
tilemap_mark_all_tiles_dirty (system16a_bootleg_bg_tilemaps[1]);
|
||||||
tilemap_mark_all_tiles_dirty (system16a_bootleg_text_tilemap);
|
tilemap_mark_all_tiles_dirty (system16a_bootleg_text_tilemap);
|
||||||
|
|
||||||
tilemap_set_scrollx( system16a_bootleg_text_tilemap, 0, offset_txtx );
|
tilemap_set_scrollx( system16a_bootleg_text_tilemap, 0, offset_txtx );
|
||||||
tilemap_set_scrolly( system16a_bootleg_text_tilemap, 0, offset_txty );
|
tilemap_set_scrolly( system16a_bootleg_text_tilemap, 0, offset_txty );
|
||||||
|
|
||||||
if ((system16a_bootleg_tilemapselect&0xff) == 0x12)
|
if ((system16a_bootleg_tilemapselect&0xff) == 0x12)
|
||||||
{
|
{
|
||||||
tilemap_set_scrollx( system16a_bootleg_bg_tilemaps[1], 0, system16a_bootleg_bgscrollx+offset_bg1x );
|
tilemap_set_scrollx( system16a_bootleg_bg_tilemaps[1], 0, system16a_bootleg_bgscrollx+offset_bg1x );
|
||||||
@ -1033,7 +1033,7 @@ VIDEO_UPDATE( system16a_bootleg )
|
|||||||
|
|
||||||
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[0], TILEMAP_DRAW_OPAQUE, 0 );
|
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[0], TILEMAP_DRAW_OPAQUE, 0 );
|
||||||
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[1], 0, 0 );
|
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[1], 0, 0 );
|
||||||
tilemap_draw( bitmap,cliprect, system16a_bootleg_text_tilemap, 0, 0 );
|
tilemap_draw( bitmap,cliprect, system16a_bootleg_text_tilemap, 0, 0 );
|
||||||
}
|
}
|
||||||
else if ((system16a_bootleg_tilemapselect&0xff) == 0x21)
|
else if ((system16a_bootleg_tilemapselect&0xff) == 0x21)
|
||||||
{
|
{
|
||||||
@ -1044,7 +1044,7 @@ VIDEO_UPDATE( system16a_bootleg )
|
|||||||
|
|
||||||
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[1], TILEMAP_DRAW_OPAQUE, 0 );
|
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[1], TILEMAP_DRAW_OPAQUE, 0 );
|
||||||
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[0], 0, 0 );
|
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[0], 0, 0 );
|
||||||
tilemap_draw( bitmap,cliprect, system16a_bootleg_text_tilemap, 0, 0 );
|
tilemap_draw( bitmap,cliprect, system16a_bootleg_text_tilemap, 0, 0 );
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
@ -1054,7 +1054,7 @@ VIDEO_UPDATE( system16a_bootleg )
|
|||||||
VIDEO_UPDATE( system16a_bootleg_passht4b )
|
VIDEO_UPDATE( system16a_bootleg_passht4b )
|
||||||
{
|
{
|
||||||
int offset_txtx, offset_txty, offset_bg1x, offset_bg1y, offset_bg0x, offset_bg0y;
|
int offset_txtx, offset_txty, offset_bg1x, offset_bg1y, offset_bg0x, offset_bg0y;
|
||||||
|
|
||||||
// passing shot
|
// passing shot
|
||||||
offset_txtx = 192;
|
offset_txtx = 192;
|
||||||
offset_txty = 0;
|
offset_txty = 0;
|
||||||
@ -1062,17 +1062,17 @@ VIDEO_UPDATE( system16a_bootleg_passht4b )
|
|||||||
offset_bg1y = 32;
|
offset_bg1y = 32;
|
||||||
offset_bg0x = 5;
|
offset_bg0x = 5;
|
||||||
offset_bg0y = 32;
|
offset_bg0y = 32;
|
||||||
|
|
||||||
bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
|
bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
|
||||||
|
|
||||||
// I can't bring myself to care about dirty tile marking on something which runs at a bazillion % speed anyway, clean code is better
|
// I can't bring myself to care about dirty tile marking on something which runs at a bazillion % speed anyway, clean code is better
|
||||||
tilemap_mark_all_tiles_dirty (system16a_bootleg_bg_tilemaps[0]);
|
tilemap_mark_all_tiles_dirty (system16a_bootleg_bg_tilemaps[0]);
|
||||||
tilemap_mark_all_tiles_dirty (system16a_bootleg_bg_tilemaps[1]);
|
tilemap_mark_all_tiles_dirty (system16a_bootleg_bg_tilemaps[1]);
|
||||||
tilemap_mark_all_tiles_dirty (system16a_bootleg_text_tilemap);
|
tilemap_mark_all_tiles_dirty (system16a_bootleg_text_tilemap);
|
||||||
|
|
||||||
tilemap_set_scrollx( system16a_bootleg_text_tilemap, 0, offset_txtx );
|
tilemap_set_scrollx( system16a_bootleg_text_tilemap, 0, offset_txtx );
|
||||||
tilemap_set_scrolly( system16a_bootleg_text_tilemap, 0, offset_txty );
|
tilemap_set_scrolly( system16a_bootleg_text_tilemap, 0, offset_txty );
|
||||||
|
|
||||||
if ((system16a_bootleg_tilemapselect&0xff) == 0x12)
|
if ((system16a_bootleg_tilemapselect&0xff) == 0x12)
|
||||||
{
|
{
|
||||||
tilemap_set_scrollx( system16a_bootleg_bg_tilemaps[1], 0, (system16a_bootleg_bgscrollx^0x7)+offset_bg1x );
|
tilemap_set_scrollx( system16a_bootleg_bg_tilemaps[1], 0, (system16a_bootleg_bgscrollx^0x7)+offset_bg1x );
|
||||||
@ -1082,7 +1082,7 @@ VIDEO_UPDATE( system16a_bootleg_passht4b )
|
|||||||
|
|
||||||
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[0], TILEMAP_DRAW_OPAQUE, 0 );
|
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[0], TILEMAP_DRAW_OPAQUE, 0 );
|
||||||
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[1], 0, 0 );
|
tilemap_draw( bitmap,cliprect, system16a_bootleg_bg_tilemaps[1], 0, 0 );
|
||||||
tilemap_draw( bitmap,cliprect, system16a_bootleg_text_tilemap, 0, 0 );
|
tilemap_draw( bitmap,cliprect, system16a_bootleg_text_tilemap, 0, 0 );
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
@ -1107,7 +1107,7 @@ VIDEO_UPDATE( system16 )
|
|||||||
{
|
{
|
||||||
tilemap_set_scrollx( background, 0, -320-sys16_bg_scrollx+sys16_bgxoffset );
|
tilemap_set_scrollx( background, 0, -320-sys16_bg_scrollx+sys16_bgxoffset );
|
||||||
tilemap_set_scrolly( background, 0, -256+sys16_bg_scrolly );
|
tilemap_set_scrolly( background, 0, -256+sys16_bg_scrolly );
|
||||||
|
|
||||||
tilemap_draw( bitmap,cliprect, background, TILEMAP_DRAW_OPAQUE, 0x00 );
|
tilemap_draw( bitmap,cliprect, background, TILEMAP_DRAW_OPAQUE, 0x00 );
|
||||||
|
|
||||||
if(sys16_bg_priority_mode)
|
if(sys16_bg_priority_mode)
|
||||||
@ -1124,7 +1124,7 @@ VIDEO_UPDATE( system16 )
|
|||||||
tilemap_draw( bitmap,cliprect, background, 1, 0x03 );// alien syndrome / aurail
|
tilemap_draw( bitmap,cliprect, background, 1, 0x03 );// alien syndrome / aurail
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// draw fg
|
// draw fg
|
||||||
{
|
{
|
||||||
tilemap_set_scrollx( foreground, 0, -320-sys16_fg_scrollx+sys16_fgxoffset );
|
tilemap_set_scrollx( foreground, 0, -320-sys16_fg_scrollx+sys16_fgxoffset );
|
||||||
@ -1133,8 +1133,8 @@ VIDEO_UPDATE( system16 )
|
|||||||
tilemap_draw( bitmap,cliprect, foreground, 0, 0x03 );
|
tilemap_draw( bitmap,cliprect, foreground, 0, 0x03 );
|
||||||
tilemap_draw( bitmap,cliprect, foreground, 1, 0x07 );
|
tilemap_draw( bitmap,cliprect, foreground, 1, 0x07 );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
if( sys16_textlayer_lo_max!=0 )
|
if( sys16_textlayer_lo_max!=0 )
|
||||||
{
|
{
|
||||||
tilemap_draw( bitmap,cliprect, text_layer, 1, 7 );// needed for Body Slam
|
tilemap_draw( bitmap,cliprect, text_layer, 1, 7 );// needed for Body Slam
|
||||||
@ -1173,14 +1173,14 @@ VIDEO_UPDATE( system18old )
|
|||||||
{
|
{
|
||||||
tilemap_draw( bitmap,cliprect, foreground2, 0, 0x3 );
|
tilemap_draw( bitmap,cliprect, foreground2, 0, 0x3 );
|
||||||
}
|
}
|
||||||
|
|
||||||
tilemap_draw( bitmap,cliprect, foreground, 0, 0x3 );
|
tilemap_draw( bitmap,cliprect, foreground, 0, 0x3 );
|
||||||
|
|
||||||
if(sys18_fg2_active)
|
if(sys18_fg2_active)
|
||||||
{
|
{
|
||||||
tilemap_draw( bitmap,cliprect, foreground2, 1, 0x7 );
|
tilemap_draw( bitmap,cliprect, foreground2, 1, 0x7 );
|
||||||
}
|
}
|
||||||
|
|
||||||
tilemap_draw( bitmap,cliprect, foreground, 1, 0x7 );
|
tilemap_draw( bitmap,cliprect, foreground, 1, 0x7 );
|
||||||
|
|
||||||
tilemap_draw( bitmap,cliprect, text_layer, 1, 0x7 );
|
tilemap_draw( bitmap,cliprect, text_layer, 1, 0x7 );
|
||||||
|
|||||||
@ -256,6 +256,6 @@ VIDEO_UPDATE( tryout )
|
|||||||
draw_sprites(screen->machine, bitmap,cliprect);
|
draw_sprites(screen->machine, bitmap,cliprect);
|
||||||
}
|
}
|
||||||
|
|
||||||
// popmessage("%02x %02x %02x %02x",tryout_gfx_control[0],tryout_gfx_control[1],tryout_gfx_control[2],scrollx);
|
// popmessage("%02x %02x %02x %02x",tryout_gfx_control[0],tryout_gfx_control[1],tryout_gfx_control[2],scrollx);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -252,10 +252,10 @@ PALETTE_INIT( tubep )
|
|||||||
|
|
||||||
/* calculate and store the scaler */
|
/* calculate and store the scaler */
|
||||||
/*
|
/*
|
||||||
output_scaler = compute_resistor_weights(0, 255, -1.0,
|
output_scaler = compute_resistor_weights(0, 255, -1.0,
|
||||||
3*6, active_resistors_r, weights_r, 470, 0,
|
3*6, active_resistors_r, weights_r, 470, 0,
|
||||||
3*6, active_resistors_g, weights_g, 470, 0,
|
3*6, active_resistors_g, weights_g, 470, 0,
|
||||||
2*6, active_resistors_b, weights_b, 470, 0);
|
2*6, active_resistors_b, weights_b, 470, 0);
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* compute_resistor_weights(0, 255, output_scaler,
|
/* compute_resistor_weights(0, 255, output_scaler,
|
||||||
|
|||||||
@ -10,4 +10,4 @@
|
|||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
|
|
||||||
extern const char build_version[];
|
extern const char build_version[];
|
||||||
const char build_version[] = "0.131u2 ("__DATE__")";
|
const char build_version[] = "0.131u3 ("__DATE__")";
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user