vp415 updates, now actually starts proper testing loop, nw

This commit is contained in:
mooglyguy 2018-04-15 11:48:15 +02:00
parent 6528bb5451
commit abe1af5882
3 changed files with 90 additions and 8 deletions

View File

@ -1858,6 +1858,7 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
{
//External Interrupt 0
case MCS51_INT0_LINE:
SET_P3((P3 &~ 4) | (state << 2));
//Line Asserted?
if (state != CLEAR_LINE) {
//Need cleared->active line transition? (Logical 1-0 Pulse on the line) - CLEAR->ASSERT Transition since INT0 active lo!
@ -1866,7 +1867,9 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
SET_IE0(1);
}
else
{
SET_IE0(1); //Nope, just set it..
}
}
else
{
@ -1878,7 +1881,7 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
//External Interrupt 1
case MCS51_INT1_LINE:
SET_P3((P3 &~ 8) | (state << 3));
//Line Asserted?
if (state != CLEAR_LINE) {
//Need cleared->active line transition? (Logical 1-0 Pulse on the line) - CLEAR->ASSERT Transition since INT1 active lo!

View File

@ -27,7 +27,7 @@ saa1043_device::saa1043_device(const machine_config &mconfig, const char *tag, d
void saa1043_device::device_start()
{
m_h = attotime::from_ticks(320, clock());
m_h = attotime::from_ticks(320, clock() * 2);
m_line_count = s_line_counts[m_type];
// resolve callbacks
@ -57,6 +57,7 @@ void saa1043_device::device_reset()
{
m_outputs[i](CLEAR_LINE);
}
m_outputs[V2](ASSERT_LINE);
}
void saa1043_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
@ -64,7 +65,7 @@ void saa1043_device::device_timer(emu_timer &timer, device_timer_id id, int para
switch (id)
{
case V2:
m_outputs[id](1 - param);
m_outputs[V2](1 - param);
if (param)
m_timers[V2]->adjust(m_h * (m_line_count - 9), 0);
else

View File

@ -79,8 +79,13 @@ public:
DECLARE_READ8_MEMBER(ncr5385_r);
DECLARE_WRITE8_MEMBER(sel34_w);
DECLARE_READ8_MEMBER(sel37_r);
DECLARE_WRITE8_MEMBER(ctrl_regs_w);
DECLARE_READ8_MEMBER(ctrl_regs_r);
DECLARE_WRITE8_MEMBER(ctrl_cpu_port1_w);
DECLARE_READ8_MEMBER(ctrl_cpu_port1_r);
DECLARE_WRITE8_MEMBER(ctrl_cpu_port3_w);
DECLARE_READ8_MEMBER(ctrl_cpu_port3_r);
DECLARE_READ8_MEMBER(drive_i8155_pb_r);
DECLARE_READ8_MEMBER(drive_i8155_pc_r);
@ -188,6 +193,12 @@ protected:
CTRL_PARITY_BIT = 2,
};
enum
{
I8255PC_NOT_FOCUSED = 0x02,
I8255PC_DISC_REFLECTION = 0x10,
};
enum
{
I8255PB_COMM1 = 0x01,
@ -241,6 +252,12 @@ protected:
uint8_t m_intn_lines[2];
uint8_t m_refv;
uint8_t m_ctrl_p1;
uint8_t m_ctrl_p3;
uint8_t m_drive_p1;
uint8_t m_drive_pc_bits;
};
/*static*/ const char* vp415_state::Z80CPU_TAG = "z80cpu";
@ -270,6 +287,13 @@ void vp415_state::machine_reset()
m_sel37 = SEL37_BRD | SEL37_MON_N | SEL37_SK1c | SEL37_SK1d;
m_intn_lines[0] = 1;
m_intn_lines[1] = 1;
m_ctrl_p1 = 0;
m_ctrl_p3 = 0;
m_drive_p1 = 0;
m_drive_pc_bits = I8255PC_DISC_REFLECTION | I8255PC_NOT_FOCUSED;
}
void vp415_state::machine_start()
@ -279,7 +303,8 @@ void vp415_state::machine_start()
WRITE_LINE_MEMBER(vp415_state::refv_w)
{
m_refv = state;
m_drivecpu->set_input_line(MCS51_INT0_LINE, m_refv ? ASSERT_LINE : CLEAR_LINE);
m_drivecpu->set_input_line(MCS51_INT0_LINE, m_refv ? CLEAR_LINE : ASSERT_LINE);
//printf("Current time in ms: %f\n", machine().scheduler().time().as_double() * 1000.0D);
}
// CPU Datagrabber Module (W)
@ -468,6 +493,38 @@ READ8_MEMBER(vp415_state::ctrl_regs_r)
return value;
}
WRITE8_MEMBER(vp415_state::ctrl_cpu_port1_w)
{
uint8_t old = m_ctrl_p1;
m_ctrl_p1 = data;
if ((m_ctrl_p1 ^ old) & 0xdf) // Ignore petting the watchdog (bit 5)
{
logerror("%s: ctrl_cpu_port1_w: %02x\n", machine().describe_context(), data);
}
}
READ8_MEMBER(vp415_state::ctrl_cpu_port1_r)
{
uint8_t ret = m_ctrl_p1;
m_ctrl_p1 ^= 0x10;
logerror("%s: ctrl_cpu_port1_r (%02x)\n", machine().describe_context(), ret);
return ret;// | (m_refv << 4);
}
WRITE8_MEMBER(vp415_state::ctrl_cpu_port3_w)
{
m_ctrl_p3 = data;
logerror("%s: ctrl_cpu_port3_w: %02x\n", machine().describe_context(), data);
}
READ8_MEMBER(vp415_state::ctrl_cpu_port3_r)
{
uint8_t ret = m_ctrl_p3;
logerror("%s: ctrl_cpu_port3_r (%02x)\n", machine().describe_context(), ret);
return ret;
}
uint8_t vp415_state::sd_r()
{
return 0;
@ -519,17 +576,34 @@ WRITE8_MEMBER(vp415_state::drive_i8255_pb_w)
, BIT(data, I8255PB_SL_PWR_BIT)
, BIT(data, I8255PB_RAD_FS_N_BIT)
, BIT(data, I8255PB_STR1_BIT));
if (BIT(data, I8255PB_RLS_N_BIT))
{
}
}
READ8_MEMBER(vp415_state::drive_i8255_pc_r)
{
logerror("%s: drive_i8255_pc_r: %02x\n", machine().describe_context(), 0);
return 0;
static int focus_kludge = 250;
logerror("%s: drive_i8255_pc_r: %02x\n", machine().describe_context(), m_drive_pc_bits);
if (focus_kludge > 0)
{
focus_kludge--;
}
else
{
m_drive_pc_bits &= ~I8255PC_NOT_FOCUSED;
}
return m_drive_pc_bits;
}
WRITE8_MEMBER(vp415_state::drive_cpu_port1_w)
{
//logerror("%s: drive_cpu_port1_w: %02x\n", machine().describe_context(), data);
uint8_t old = m_drive_p1;
m_drive_p1 = data;
if ((m_drive_p1 ^ old) & 0xfb) // Ignore bit 2 when logging (LDI)
{
logerror("%s: drive_cpu_port1_w: %02x\n", machine().describe_context(), data);
}
m_chargen->ldi_w(BIT(data, 2));
}
@ -583,7 +657,11 @@ MACHINE_CONFIG_START(vp415_state::vp415)
MCFG_CPU_PROGRAM_MAP(z80_program_map)
MCFG_CPU_IO_MAP(z80_io_map)
MCFG_CPU_ADD(CTRLCPU_TAG, I8031, XTAL(11'059'200)) // 12MHz, per schematic
MCFG_CPU_ADD(CTRLCPU_TAG, I8031, XTAL(11'059'200)) // 11.059MHz, per schematic
MCFG_MCS51_PORT_P1_OUT_CB(WRITE8(vp415_state, ctrl_cpu_port1_w));
MCFG_MCS51_PORT_P1_IN_CB(READ8(vp415_state, ctrl_cpu_port1_r));
MCFG_MCS51_PORT_P3_OUT_CB(WRITE8(vp415_state, ctrl_cpu_port1_w));
MCFG_MCS51_PORT_P3_IN_CB(READ8(vp415_state, ctrl_cpu_port1_r));
MCFG_CPU_PROGRAM_MAP(ctrl_program_map)
MCFG_CPU_IO_MAP(ctrl_io_map)