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m6809: Partially qualify the dummy cycles

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This commit is contained in:
Olivier Galibert 2021-02-07 22:49:05 +01:00
parent 3126350d35
commit ac0c0344f5
3 changed files with 184 additions and 59 deletions
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198
src/devices/cpu/m6809/base6x09.ops
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@ -51,7 +51,10 @@ INTERRUPT_VECTOR:
NEG8: NEG8:
@m_temp.b.l = read_operand(); @m_temp.b.l = read_operand();
m_temp.b.l = set_flags(CC_NZVC, (uint8_t)0, m_temp.b.l, -m_temp.b.l); m_temp.b.l = set_flags(CC_NZVC, (uint8_t)0, m_temp.b.l, -m_temp.b.l);
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(m_temp.b.l); @write_operand(m_temp.b.l);
return; return;
@ -60,7 +63,10 @@ COM8:
m_cc &= ~CC_V; m_cc &= ~CC_V;
m_cc |= CC_C; m_cc |= CC_C;
m_temp.b.l = set_flags(CC_NZ, (uint8_t) ~m_temp.b.l); m_temp.b.l = set_flags(CC_NZ, (uint8_t) ~m_temp.b.l);
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(m_temp.b.l); @write_operand(m_temp.b.l);
return; return;
@ -69,14 +75,20 @@ LSR8:
m_cc &= ~CC_C; m_cc &= ~CC_C;
m_cc |= (m_temp.b.l & 1) ? CC_C : 0; m_cc |= (m_temp.b.l & 1) ? CC_C : 0;
m_temp.b.l = set_flags<uint8_t>(CC_NZ, m_temp.b.l >> 1); m_temp.b.l = set_flags<uint8_t>(CC_NZ, m_temp.b.l >> 1);
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(m_temp.b.l); @write_operand(m_temp.b.l);
return; return;
ROR8: ROR8:
@m_temp.b.l = read_operand(); @m_temp.b.l = read_operand();
m_temp.b.l = set_flags<uint8_t>(CC_NZ, rotate_right(m_temp.b.l)); m_temp.b.l = set_flags<uint8_t>(CC_NZ, rotate_right(m_temp.b.l));
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(m_temp.b.l); @write_operand(m_temp.b.l);
return; return;
@ -85,43 +97,64 @@ ASR8:
m_cc &= ~CC_C; m_cc &= ~CC_C;
m_cc |= (m_temp.b.l & 1) ? CC_C : 0; m_cc |= (m_temp.b.l & 1) ? CC_C : 0;
m_temp.b.l = set_flags<uint8_t>(CC_NZ, ((int8_t) m_temp.b.l) >> 1); m_temp.b.l = set_flags<uint8_t>(CC_NZ, ((int8_t) m_temp.b.l) >> 1);
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(m_temp.b.l); @write_operand(m_temp.b.l);
return; return;
ASL8: ASL8:
@m_temp.b.l = read_operand(); @m_temp.b.l = read_operand();
m_temp.b.l = set_flags<uint8_t>(CC_NZVC, m_temp.b.l, m_temp.b.l, m_temp.b.l << 1); m_temp.b.l = set_flags<uint8_t>(CC_NZVC, m_temp.b.l, m_temp.b.l, m_temp.b.l << 1);
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(m_temp.b.l); @write_operand(m_temp.b.l);
return; return;
ROL8: ROL8:
@m_temp.b.l = read_operand(); @m_temp.b.l = read_operand();
m_temp.b.l = set_flags<uint8_t>(CC_NZV, m_temp.b.l, m_temp.b.l, rotate_left(m_temp.b.l)); m_temp.b.l = set_flags<uint8_t>(CC_NZV, m_temp.b.l, m_temp.b.l, rotate_left(m_temp.b.l));
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(m_temp.b.l); @write_operand(m_temp.b.l);
return; return;
DEC8: DEC8:
@m_temp.b.l = read_operand(); @m_temp.b.l = read_operand();
m_temp.b.l = set_flags<uint8_t>(CC_NZV, m_temp.b.l, 1, m_temp.b.l - 1); m_temp.b.l = set_flags<uint8_t>(CC_NZV, m_temp.b.l, 1, m_temp.b.l - 1);
@eat(hd6309_native_mode() && is_register_addressing_mode() ? 0 : 1); if(!hd6309_native_mode() || !is_register_addressing_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(m_temp.b.l); @write_operand(m_temp.b.l);
return; return;
INC8: INC8:
@m_temp.b.l = read_operand(); @m_temp.b.l = read_operand();
m_temp.b.l = set_flags<uint8_t>(CC_NZV, m_temp.b.l, 1, m_temp.b.l + 1); m_temp.b.l = set_flags<uint8_t>(CC_NZV, m_temp.b.l, 1, m_temp.b.l + 1);
@eat(hd6309_native_mode() && is_register_addressing_mode() ? 0 : 1); if(!hd6309_native_mode() || !is_register_addressing_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(m_temp.b.l); @write_operand(m_temp.b.l);
return; return;
TST8: TST8:
@m_temp.b.l = read_operand(); @m_temp.b.l = read_operand();
set_flags(CC_NZV, m_temp.b.l); set_flags(CC_NZV, m_temp.b.l);
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
eat(is_register_addressing_mode() ? 0 : 1); @dummy_vma(1);
;
}
if(!is_register_addressing_mode()) {
@dummy_vma(1);
;
}
return; return;
JMP: JMP:
@ -132,7 +165,10 @@ CLR8:
@read_operand(); @read_operand();
m_cc &= ~CC_NZVC; m_cc &= ~CC_NZVC;
m_cc |= CC_Z; m_cc |= CC_Z;
@eat(hd6309_native_mode() && is_register_addressing_mode() ? 0 : 1); if(!hd6309_native_mode() || !is_register_addressing_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(0); @write_operand(0);
return; return;
@ -140,7 +176,10 @@ NEG16:
m_temp.b.h = read_operand(0); m_temp.b.h = read_operand(0);
m_temp.b.l = read_operand(1); m_temp.b.l = read_operand(1);
m_temp.w = set_flags(CC_NZVC, (uint16_t)0, m_temp.w, -m_temp.w); m_temp.w = set_flags(CC_NZVC, (uint16_t)0, m_temp.w, -m_temp.w);
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
write_operand(0, m_temp.b.h); write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l); write_operand(1, m_temp.b.l);
return; return;
@ -151,7 +190,10 @@ LSR16:
m_cc &= ~CC_C; m_cc &= ~CC_C;
m_cc |= (m_temp.w & 1) ? CC_C : 0; m_cc |= (m_temp.w & 1) ? CC_C : 0;
m_temp.w = set_flags<uint16_t>(CC_NZ, m_temp.w >> 1); m_temp.w = set_flags<uint16_t>(CC_NZ, m_temp.w >> 1);
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(0, m_temp.b.h); @write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l); write_operand(1, m_temp.b.l);
return; return;
@ -160,7 +202,10 @@ ROR16:
@m_temp.b.h = read_operand(0); @m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1); @m_temp.b.l = read_operand(1);
m_temp.w = set_flags<uint16_t>(CC_NZ, rotate_right(m_temp.w)); m_temp.w = set_flags<uint16_t>(CC_NZ, rotate_right(m_temp.w));
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(0, m_temp.b.h); @write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l); write_operand(1, m_temp.b.l);
return; return;
@ -171,7 +216,10 @@ ASR16:
m_cc &= ~CC_C; m_cc &= ~CC_C;
m_cc |= (m_temp.w & 1) ? CC_C : 0; m_cc |= (m_temp.w & 1) ? CC_C : 0;
m_temp.w = set_flags<uint16_t>(CC_NZ, ((int16_t) m_temp.w) >> 1); m_temp.w = set_flags<uint16_t>(CC_NZ, ((int16_t) m_temp.w) >> 1);
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(0, m_temp.b.h); @write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l); write_operand(1, m_temp.b.l);
return; return;
@ -180,7 +228,10 @@ ASL16:
@m_temp.b.h = read_operand(0); @m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1); @m_temp.b.l = read_operand(1);
m_temp.w = set_flags<uint16_t>(CC_NZVC, m_temp.w, m_temp.w, m_temp.w << 1); m_temp.w = set_flags<uint16_t>(CC_NZVC, m_temp.w, m_temp.w, m_temp.w << 1);
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(0, m_temp.b.h); @write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l); write_operand(1, m_temp.b.l);
return; return;
@ -189,7 +240,10 @@ ROL16:
@m_temp.b.h = read_operand(0); @m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1); @m_temp.b.l = read_operand(1);
m_temp.w = set_flags<uint16_t>(CC_NZV, rotate_left(m_temp.w)); m_temp.w = set_flags<uint16_t>(CC_NZV, rotate_left(m_temp.w));
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
@write_operand(0, m_temp.b.h); @write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l); write_operand(1, m_temp.b.l);
return; return;
@ -198,7 +252,10 @@ DEC16:
m_temp.b.h = read_operand(0); m_temp.b.h = read_operand(0);
m_temp.b.l = read_operand(1); m_temp.b.l = read_operand(1);
m_temp.w = set_flags<uint16_t>(CC_NZVC, m_temp.w, 1, m_temp.w - 1); m_temp.w = set_flags<uint16_t>(CC_NZVC, m_temp.w, 1, m_temp.w - 1);
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
write_operand(0, m_temp.b.h); write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l); write_operand(1, m_temp.b.l);
return; return;
@ -207,7 +264,10 @@ INC16:
m_temp.b.h = read_operand(0); m_temp.b.h = read_operand(0);
m_temp.b.l = read_operand(1); m_temp.b.l = read_operand(1);
m_temp.w = set_flags<uint16_t>(CC_NZVC, m_temp.w, 1, m_temp.w + 1); m_temp.w = set_flags<uint16_t>(CC_NZVC, m_temp.w, 1, m_temp.w + 1);
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
write_operand(0, m_temp.b.h); write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l); write_operand(1, m_temp.b.l);
return; return;
@ -216,12 +276,21 @@ TST16:
m_temp.b.h = read_operand(0); m_temp.b.h = read_operand(0);
m_temp.b.l = read_operand(1); m_temp.b.l = read_operand(1);
set_flags(CC_NZV, m_temp.w); set_flags(CC_NZV, m_temp.w);
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
eat(is_register_addressing_mode() ? 0 : 1); @dummy_vma(1);
;
}
if(!is_register_addressing_mode()) {
@dummy_vma(1);
;
}
return; return;
CLR16: CLR16:
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
m_cc &= ~CC_NZVC; m_cc &= ~CC_NZVC;
m_cc |= CC_Z; m_cc |= CC_Z;
write_operand(0, 0x00); write_operand(0, 0x00);
@ -277,21 +346,30 @@ ADD16:
@m_temp.b.h = read_operand(0); @m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1); @m_temp.b.l = read_operand(1);
regop16().w = set_flags(CC_NZVC, regop16().w, m_temp.w, regop16().w + m_temp.w); regop16().w = set_flags(CC_NZVC, regop16().w, m_temp.w, regop16().w + m_temp.w);
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
return; return;
SUB16: SUB16:
@m_temp.b.h = read_operand(0); @m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1); @m_temp.b.l = read_operand(1);
regop16().w = set_flags(CC_NZVC, regop16().w, m_temp.w, regop16().w - m_temp.w); regop16().w = set_flags(CC_NZVC, regop16().w, m_temp.w, regop16().w - m_temp.w);
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
return; return;
CMP16: CMP16:
@m_temp.b.h = read_operand(0); @m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1); @m_temp.b.l = read_operand(1);
set_flags(CC_NZVC, regop16().w, m_temp.w, regop16().w - m_temp.w); set_flags(CC_NZVC, regop16().w, m_temp.w, regop16().w - m_temp.w);
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
return; return;
LD8: LD8:
@ -318,7 +396,10 @@ ST16:
return; return;
NOP: NOP:
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
return; return;
SYNC: SYNC:
@ -342,12 +423,18 @@ SYNC:
DAA: DAA:
daa(); daa();
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
return; return;
ORCC: ORCC:
m_cc |= read_operand(); m_cc |= read_operand();
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
return; return;
ANDCC: ANDCC:
@ -357,12 +444,18 @@ ANDCC:
SEX: SEX:
m_q.r.d = set_flags<uint16_t>(CC_NZ, (int8_t) m_q.r.b); m_q.r.d = set_flags<uint16_t>(CC_NZ, (int8_t) m_q.r.b);
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
;
}
return; return;
BRANCH: BRANCH:
@m_temp.b.l = read_opcode_arg(); @m_temp.b.l = read_opcode_arg();
eat(1); if(!hd6309_native_mode()) {
@dummy_vma(1);
;
}
if (branch_taken()) if (branch_taken())
{ {
m_pc.w += (int8_t) m_temp.b.l; m_pc.w += (int8_t) m_temp.b.l;
@ -372,29 +465,36 @@ BRANCH:
LBRANCH: LBRANCH:
@m_temp.b.h = read_opcode_arg(); @m_temp.b.h = read_opcode_arg();
@m_temp.b.l = read_opcode_arg(); @m_temp.b.l = read_opcode_arg();
eat(1); if(!hd6309_native_mode()) {
@dummy_vma(1);
;
}
if (branch_taken()) if (branch_taken())
{ {
m_pc.w += m_temp.w; m_pc.w += m_temp.w;
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_vma(1);
;
}
} }
return; return;
BSR: BSR:
@m_temp.b.l = read_opcode_arg(); @m_temp.b.l = read_opcode_arg();
m_ea.w = m_pc.w + (int8_t) m_temp.b.l; m_ea.w = m_pc.w + (int8_t) m_temp.b.l;
@eat(hd6309_native_mode() ? 2 : 3); @dummy_vma(hd6309_native_mode() ? 2 : 3);
goto GOTO_SUBROUTINE; goto GOTO_SUBROUTINE;
LBSR: LBSR:
@m_temp.b.h = read_opcode_arg(); @m_temp.b.h = read_opcode_arg();
@m_temp.b.l = read_opcode_arg(); @m_temp.b.l = read_opcode_arg();
m_ea.w = m_pc.w + (int16_t) m_temp.w; m_ea.w = m_pc.w + (int16_t) m_temp.w;
@eat(hd6309_native_mode() ? 2 : 4); @dummy_vma(hd6309_native_mode() ? 2 : 4);
goto GOTO_SUBROUTINE; goto GOTO_SUBROUTINE;
JSR: JSR:
@eat(2); @dummy_read_opcode_arg(0);
@dummy_vma(1);
goto GOTO_SUBROUTINE; goto GOTO_SUBROUTINE;
GOTO_SUBROUTINE: GOTO_SUBROUTINE:
@ -405,18 +505,26 @@ GOTO_SUBROUTINE:
RTS: RTS:
m_temp.w = 0x80; // RTS is equivalent to "PULS PC" m_temp.w = 0x80; // RTS is equivalent to "PULS PC"
eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_vma(1);
;
}
set_regop16(m_s); set_regop16(m_s);
goto PULL_REGISTERS; goto PULL_REGISTERS;
ABX: ABX:
m_x.w += m_q.r.b; m_x.w += m_q.r.b;
eat(hd6309_native_mode() ? 0 : 2); if(!hd6309_native_mode()) {
@dummy_read_opcode_arg(0);
@dummy_vma(1);
;
}
return; return;
MUL: MUL:
mul(); mul();
eat(hd6309_native_mode() ? 9 : 10); @dummy_read_opcode_arg(0);
@dummy_vma(hd6309_native_mode() ? 8 : 9);
return; return;
RTI: RTI:
@ -428,7 +536,8 @@ RTI:
CWAI: CWAI:
@m_cc &= read_opcode_arg(); @m_cc &= read_opcode_arg();
@eat(2); @dummy_read_opcode_arg(0);
@dummy_vma(1);
m_cc |= CC_E; m_cc |= CC_E;
set_regop16(m_s); set_regop16(m_s);
@ -466,14 +575,14 @@ CWAI:
LEA_xy: LEA_xy:
regop16().w = set_flags(CC_Z, m_ea.w); regop16().w = set_flags(CC_Z, m_ea.w);
eat(1); @dummy_vma(1);
return; return;
LEA_us: LEA_us:
if (&regop16() == &m_s) if (&regop16() == &m_s)
m_lds_encountered = true; m_lds_encountered = true;
regop16().w = m_ea.w; regop16().w = m_ea.w;
eat(1); @dummy_vma(1);
return; return;
PSHS: PSHS:
@ -532,7 +641,10 @@ SOFTWARE_INTERRUPT:
DIRECT: DIRECT:
@set_ea(((uint16_t)m_dp << 8) | read_opcode_arg()); @set_ea(((uint16_t)m_dp << 8) | read_opcode_arg());
@eat(hd6309_native_mode() ? 0 : 1); if(!hd6309_native_mode()) {
@dummy_vma(1);
;
}
return; return;
EXTENDED: EXTENDED:

6
src/devices/cpu/m6809/m6809.h
View File

@ -207,10 +207,12 @@ protected:
// read_opcode() and bump the program counter // read_opcode() and bump the program counter
inline uint8_t read_opcode() { return read_opcode(m_pc.w++); } inline uint8_t read_opcode() { return read_opcode(m_pc.w++); }
inline uint8_t read_opcode_arg() { return read_opcode_arg(m_pc.w++); } inline uint8_t read_opcode_arg() { return read_opcode_arg(m_pc.w++); }
inline void dummy_read_opcode_arg(uint16_t delta) { read_opcode_arg(m_pc.w + delta); }
inline void dummy_vma(int count) { for(int i=0; i != count; i++) { read_opcode_arg(0xffff); } }
// state stack - implemented as a uint32_t // state stack - implemented as a uint32_t
void push_state(uint8_t state) { m_state = (m_state << 8) | state; } void push_state(uint16_t state) { m_state = (m_state << 9) | state; }
uint8_t pop_state() { uint8_t result = (uint8_t) m_state; m_state >>= 8; return result; } uint16_t pop_state() { uint16_t result = m_state & 0x1ff; m_state >>= 9; return result; }
void reset_state() { m_state = 0; } void reset_state() { m_state = 0; }
// effective address reading/writing // effective address reading/writing

39
src/devices/cpu/m6809/m6809.ops
View File

@ -447,52 +447,58 @@ INDEXED:
case 0x10: case 0x30: case 0x50: case 0x70: case 0x10: case 0x30: case 0x50: case 0x70:
m_temp.w = ireg(); m_temp.w = ireg();
ireg()++; ireg()++;
eat(3); @dummy_read_opcode_arg(0);
@dummy_vma(2);
break; break;
case 0x01: case 0x21: case 0x41: case 0x61: case 0x01: case 0x21: case 0x41: case 0x61:
case 0x11: case 0x31: case 0x51: case 0x71: case 0x11: case 0x31: case 0x51: case 0x71:
m_temp.w = ireg(); m_temp.w = ireg();
ireg() += 2; ireg() += 2;
eat(4); @dummy_read_opcode_arg(0);
@dummy_vma(3);
break; break;
case 0x02: case 0x22: case 0x42: case 0x62: case 0x02: case 0x22: case 0x42: case 0x62:
case 0x12: case 0x32: case 0x52: case 0x72: case 0x12: case 0x32: case 0x52: case 0x72:
ireg()--; ireg()--;
m_temp.w = ireg(); m_temp.w = ireg();
eat(3); @dummy_read_opcode_arg(0);
@dummy_vma(2);
break; break;
case 0x03: case 0x23: case 0x43: case 0x63: case 0x03: case 0x23: case 0x43: case 0x63:
case 0x13: case 0x33: case 0x53: case 0x73: case 0x13: case 0x33: case 0x53: case 0x73:
ireg() -= 2; ireg() -= 2;
m_temp.w = ireg(); m_temp.w = ireg();
eat(4); @dummy_read_opcode_arg(0);
@dummy_vma(3);
break; break;
case 0x04: case 0x24: case 0x44: case 0x64: case 0x04: case 0x24: case 0x44: case 0x64:
case 0x14: case 0x34: case 0x54: case 0x74: case 0x14: case 0x34: case 0x54: case 0x74:
m_temp.w = ireg(); m_temp.w = ireg();
eat(1); @dummy_read_opcode_arg(0);
break; break;
case 0x05: case 0x25: case 0x45: case 0x65: case 0x05: case 0x25: case 0x45: case 0x65:
case 0x15: case 0x35: case 0x55: case 0x75: case 0x15: case 0x35: case 0x55: case 0x75:
m_temp.w = ireg() + (int8_t) m_q.r.b; m_temp.w = ireg() + (int8_t) m_q.r.b;
eat(2); @dummy_read_opcode_arg(0);
@dummy_vma(1);
break; break;
case 0x06: case 0x26: case 0x46: case 0x66: case 0x06: case 0x26: case 0x46: case 0x66:
case 0x16: case 0x36: case 0x56: case 0x76: case 0x16: case 0x36: case 0x56: case 0x76:
m_temp.w = ireg() + (int8_t) m_q.r.a; m_temp.w = ireg() + (int8_t) m_q.r.a;
eat(2); @dummy_read_opcode_arg(0);
@dummy_vma(1);
break; break;
case 0x08: case 0x28: case 0x48: case 0x68: case 0x08: case 0x28: case 0x48: case 0x68:
case 0x18: case 0x38: case 0x58: case 0x78: case 0x18: case 0x38: case 0x58: case 0x78:
@m_temp.w = ireg() + (int8_t) read_opcode_arg(); @m_temp.w = ireg() + (int8_t) read_opcode_arg();
eat(1); @dummy_read_opcode_arg(0);
break; break;
case 0x09: case 0x29: case 0x49: case 0x69: case 0x09: case 0x29: case 0x49: case 0x69:
@ -500,20 +506,22 @@ INDEXED:
@m_temp.b.h = read_opcode_arg(); @m_temp.b.h = read_opcode_arg();
@m_temp.b.l = read_opcode_arg(); @m_temp.b.l = read_opcode_arg();
m_temp.w = ireg() + m_temp.w; m_temp.w = ireg() + m_temp.w;
eat(3); @dummy_read_opcode_arg(0);
@dummy_vma(2);
break; break;
case 0x0B: case 0x2B: case 0x4B: case 0x6B: case 0x0B: case 0x2B: case 0x4B: case 0x6B:
case 0x1B: case 0x3B: case 0x5B: case 0x7B: case 0x1B: case 0x3B: case 0x5B: case 0x7B:
m_temp.w = ireg() + m_q.r.d; m_temp.w = ireg() + m_q.r.d;
eat(5); @dummy_read_opcode_arg(0);
@dummy_vma(4);
break; break;
case 0x0C: case 0x2C: case 0x4C: case 0x6C: case 0x0C: case 0x2C: case 0x4C: case 0x6C:
case 0x1C: case 0x3C: case 0x5C: case 0x7C: case 0x1C: case 0x3C: case 0x5C: case 0x7C:
@m_temp.b.l = read_opcode_arg(); @m_temp.b.l = read_opcode_arg();
m_temp.w = m_pc.w + (int8_t) m_temp.b.l; m_temp.w = m_pc.w + (int8_t) m_temp.b.l;
eat(1); @dummy_read_opcode_arg(0);
break; break;
case 0x0D: case 0x2D: case 0x4D: case 0x6D: case 0x0D: case 0x2D: case 0x4D: case 0x6D:
@ -521,14 +529,15 @@ INDEXED:
@m_temp.b.h = read_opcode_arg(); @m_temp.b.h = read_opcode_arg();
@m_temp.b.l = read_opcode_arg(); @m_temp.b.l = read_opcode_arg();
m_temp.w = m_pc.w + (int16_t) m_temp.w; m_temp.w = m_pc.w + (int16_t) m_temp.w;
eat(4); @dummy_read_opcode_arg(0);
@dummy_vma(3);
break; break;
case 0x0F: case 0x2F: case 0x4F: case 0x6F: case 0x0F: case 0x2F: case 0x4F: case 0x6F:
case 0x1F: case 0x3F: case 0x5F: case 0x7F: case 0x1F: case 0x3F: case 0x5F: case 0x7F:
@m_temp.b.h = read_opcode_arg(); @m_temp.b.h = read_opcode_arg();
@m_temp.b.l = read_opcode_arg(); @m_temp.b.l = read_opcode_arg();
eat(1); @dummy_read_opcode_arg(0);
break; break;
default: default:
@ -549,7 +558,9 @@ INDEXED:
{ {
// 5-bit offset // 5-bit offset
m_temp.w = ireg() + (int8_t) ((m_opcode & 0x0F) | (m_opcode & 0x10 ? 0xF0 : 0x00)); m_temp.w = ireg() + (int8_t) ((m_opcode & 0x0F) | (m_opcode & 0x10 ? 0xF0 : 0x00));
eat(2); @dummy_read_opcode_arg(0);
@dummy_vma(1);
;
} }
@set_ea(m_temp.w); @set_ea(m_temp.w);
return; return;