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Merge pull request #5492 from 68bit/ss30-dc5
SS-30 DC5 floppy disk interface
This commit is contained in:
R. Belmont
GitHub
commit
ac4b1cb27f
@ -1728,6 +1728,8 @@ if (BUSES["SS50"]~=null) then
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files {
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MAME_DIR .. "src/devices/bus/ss50/interface.cpp",
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MAME_DIR .. "src/devices/bus/ss50/interface.h",
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MAME_DIR .. "src/devices/bus/ss50/dc5.cpp",
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MAME_DIR .. "src/devices/bus/ss50/dc5.h",
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MAME_DIR .. "src/devices/bus/ss50/mpc.cpp",
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MAME_DIR .. "src/devices/bus/ss50/mpc.h",
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MAME_DIR .. "src/devices/bus/ss50/mps.cpp",
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521
src/devices/bus/ss50/dc5.cpp
Normal file
521
src/devices/bus/ss50/dc5.cpp
Normal file
@ -0,0 +1,521 @@
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// license:BSD-3-Clause
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// copyright-holders:68bit
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/**********************************************************************
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SWTPC SS30 DC5 Floppy Disk Controller
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See: http://www.swtpc.com/mholley/DC_5/DC5_Index.htm
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**********************************************************************/
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#include "emu.h"
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#include "dc5.h"
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#include "machine/wd_fdc.h"
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#include "imagedev/floppy.h"
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#include "formats/flex_dsk.h"
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class ss50_dc5_device : public device_t, public ss50_card_interface
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{
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public:
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ss50_dc5_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: device_t(mconfig, SS50_DC5, tag, owner, clock)
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, ss50_card_interface(mconfig, *this)
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, m_fdc(*this, "fdc")
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, m_floppy0(*this, "fdc:0")
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, m_floppy1(*this, "fdc:1")
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, m_floppy2(*this, "fdc:2")
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, m_floppy3(*this, "fdc:3")
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, m_clock(*this, "clock")
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, m_interrupt_select(*this, "interrupt_select")
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, m_address_mode(*this, "address_mode")
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, m_two_control_regs(*this, "two_control_regs")
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, m_expected_density(*this, "expected_density")
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, m_expected_sectors(*this, "expected_sectors")
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, m_track_zero_expected_sectors(*this, "track_zero_expected_sectors")
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{
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}
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protected:
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virtual ioport_constructor device_input_ports() const override;
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virtual void device_add_mconfig(machine_config &config) override;
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual uint8_t register_read(offs_t offset) override;
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virtual void register_write(offs_t offset, uint8_t data) override;
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private:
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DECLARE_WRITE_LINE_MEMBER( fdc_intrq_w );
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DECLARE_WRITE_LINE_MEMBER( fdc_drq_w );
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DECLARE_WRITE_LINE_MEMBER( fdc_sso_w );
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DECLARE_FLOPPY_FORMATS(floppy_formats);
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uint8_t m_fdc_status; // for floppy controller
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int m_floppy_motor_on;
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emu_timer *m_floppy_motor_timer;
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floppy_image_device *m_fdc_floppy; // Current selected floppy.
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uint8_t m_fdc_side; // Current floppy side.
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uint32_t m_fdc_clock; // Current clock frequency.
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TIMER_CALLBACK_MEMBER(floppy_motor_callback);
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void floppy_motor_trigger();
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void validate_floppy_side(uint8_t cmd);
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uint8_t validate_fdc_sector_size(uint8_t cmd);
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required_device<wd2797_device> m_fdc;
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required_device<floppy_connector> m_floppy0;
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required_device<floppy_connector> m_floppy1;
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required_device<floppy_connector> m_floppy2;
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required_device<floppy_connector> m_floppy3;
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required_ioport m_clock;
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required_ioport m_interrupt_select;
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required_ioport m_address_mode;
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required_ioport m_two_control_regs;
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required_ioport m_expected_density;
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required_ioport m_expected_sectors;
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required_ioport m_track_zero_expected_sectors;
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};
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static INPUT_PORTS_START( dc5 )
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PORT_START("interrupt_select")
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PORT_DIPNAME(0xf, 0, "Interrupt select")
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PORT_DIPSETTING(0, "N/C")
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PORT_DIPSETTING(1, "IRQ")
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PORT_DIPSETTING(2, "NMI/FIRQ")
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PORT_START("address_mode")
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PORT_DIPNAME(0xf, 1, "Address mode")
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PORT_DIPSETTING(0, "4 address")
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PORT_DIPSETTING(1, "16 address")
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PORT_START("two_control_regs")
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PORT_DIPNAME(0xf, 0, "Two control registers")
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PORT_DIPSETTING(0, "No, DC4 compatible")
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PORT_DIPSETTING(1, "Yes, DC5 extension")
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// single or double density 5.24" - 1.0MHz
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// 'standard' 3.5" - 1.2MHz
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// 3.5" hd - 2.0MHz
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// 8" 360rpm - 2.4MHz
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PORT_START("clock")
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PORT_DIPNAME(0xffffff, 1000000, "FDC clock")
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PORT_DIPSETTING(1000000, "1.0 MHz")
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PORT_DIPSETTING(1200000, "1.2 MHz")
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PORT_DIPSETTING(2000000, "2.0 MHz")
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PORT_DIPSETTING(2400000, "2.4 MHz")
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// Debug aid to hard code the density. The FLEX format uses single
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// density for track zero. Many virtual disks 'fix' the format to be
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// purely double density and often without properly implement driver
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// support for that. This setting is an aid to report unexpected
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// usage, and it attempts to correct that.
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PORT_START("expected_density")
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PORT_CONFNAME(0xff, 0, "Expected density")
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PORT_CONFSETTING(0, "-")
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PORT_CONFSETTING(1, "single density") // Purely single density.
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PORT_CONFSETTING(2, "double density, with single density track zero") // The default FLEX double density format.
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PORT_CONFSETTING(3, "double density") // Purely double density.
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// Debug aid, to check that the sector head or side is set as expected
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// for the sector ID being read for the FLEX floppy disk format. Many
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// FLEX disk images were developed for vitural machines that have
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// little regard for the actual head and can work off the sector ID
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// and their drivers can set the head incorrectly. E.g. a disk with 18
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// sectors per side might have a drive set to switch heads for sectors
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// above 10. Another issue is that double density disk images are
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// often 'fixed' so that they are pure double density without being
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// single density onthe first track, and the drivers might still set
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// the head based track zero being single density. This aid is not
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// intended to be a substitute for fixing the drivers but it does help
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// work through the issues while patching the disks.
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PORT_START("expected_sectors")
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PORT_CONFNAME(0xff, 0, "Expected sectors per side")
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PORT_CONFSETTING(0, "-")
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PORT_CONFSETTING(10, "10") // 5 1/4" single density 256B
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PORT_CONFSETTING(15, "15") // 8" single density 256B
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PORT_CONFSETTING(18, "18") // 5 1/4" double density 256B
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PORT_CONFSETTING(26, "26") // 8" double density 256B
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PORT_CONFSETTING(36, "36") // 3.5" 1.4M QD 256B
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// The track zero expected sectors if different from the above. FLEX
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// 6800 disks did format track zero in single density and if the
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// driver sticks to that and if using a double density disk then set a
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// single density size here.
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PORT_START("track_zero_expected_sectors")
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PORT_CONFNAME(0xff, 0, "Track zero expected sectors per side")
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PORT_CONFSETTING(0, "-")
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PORT_CONFSETTING(10, "10") // 5 1/4" single density 256B
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PORT_CONFSETTING(15, "15") // 8" single density 256B
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PORT_CONFSETTING(18, "18") // 5 1/4" double density 256B
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PORT_CONFSETTING(26, "26") // 8" double density 256B
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PORT_CONFSETTING(36, "36") // 3.5" 1.4M QD 256B
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INPUT_PORTS_END
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//-------------------------------------------------
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// input_ports - device-specific input ports
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//-------------------------------------------------
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ioport_constructor ss50_dc5_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME(dc5);
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}
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//-------------------------------------------------
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// device_add_mconfig - add device-specific
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// machine configuration
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//-------------------------------------------------
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FLOPPY_FORMATS_MEMBER( ss50_dc5_device::floppy_formats )
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FLOPPY_FLEX_FORMAT
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FLOPPY_FORMATS_END
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// todo: implement floppy controller cards as slot devices and do this properly
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static void flex_floppies(device_slot_interface &device)
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{
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device.option_add("sssd35", FLOPPY_525_SSSD_35T); // 35 trks ss sd 5.25
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device.option_add("sssd", FLOPPY_525_SSSD); // 40 trks ss sd 5.25
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device.option_add("dssd35", FLOPPY_525_SD_35T); // 35 trks ds sd 5.25
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device.option_add("dssd", FLOPPY_525_SD); // 40 trks ds sd 5.25
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device.option_add("ssdd", FLOPPY_525_SSDD); // 40 trks ss dd 5.25
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device.option_add("dd", FLOPPY_525_DD); // 40 trks ds dd 5.25
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device.option_add("ssqd", FLOPPY_525_SSQD); // 80 trks ss dd 5.25
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device.option_add("qd", FLOPPY_525_QD); // 80 trks ds dd 5.25
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device.option_add("8sssd", FLOPPY_8_SSSD); // 77 trks ss sd 8"
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device.option_add("8dssd", FLOPPY_8_DSSD); // 77 trks ds sd 8"
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device.option_add("8ssdd", FLOPPY_8_SSDD); // 77 trks ss dd 8"
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device.option_add("8dsdd", FLOPPY_8_DSDD); // 77 trks ds dd 8"
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device.option_add("35hd", FLOPPY_35_HD); // 1.44mb disk from swtpc emu (emulator only?)
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}
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void ss50_dc5_device::device_add_mconfig(machine_config &config)
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{
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WD2797(config, m_fdc, 1_MHz_XTAL);
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FLOPPY_CONNECTOR(config, "fdc:0", flex_floppies, "sssd35", ss50_dc5_device::floppy_formats).enable_sound(true);
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FLOPPY_CONNECTOR(config, "fdc:1", flex_floppies, "sssd35", ss50_dc5_device::floppy_formats).enable_sound(true);
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FLOPPY_CONNECTOR(config, "fdc:2", flex_floppies, "sssd35", ss50_dc5_device::floppy_formats).enable_sound(true);
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FLOPPY_CONNECTOR(config, "fdc:3", flex_floppies, "sssd35", ss50_dc5_device::floppy_formats).enable_sound(true);
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m_fdc->intrq_wr_callback().set(FUNC(ss50_dc5_device::fdc_intrq_w));
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m_fdc->drq_wr_callback().set(FUNC(ss50_dc5_device::fdc_drq_w));
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m_fdc->sso_wr_callback().set(FUNC(ss50_dc5_device::fdc_sso_w));
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}
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void ss50_dc5_device::device_reset()
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{
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uint32_t clock = m_clock->read();
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m_fdc->set_unscaled_clock(clock);
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m_fdc_clock = clock;
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}
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void ss50_dc5_device::device_start()
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{
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m_fdc_status = 0;
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m_fdc_side = 0;
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m_floppy_motor_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(ss50_dc5_device::floppy_motor_callback),this));
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m_floppy_motor_on = 0;
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}
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/* Shared floppy support. */
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void ss50_dc5_device::floppy_motor_trigger()
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{
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m_floppy0->get_device()->mon_w(CLEAR_LINE);
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m_floppy1->get_device()->mon_w(CLEAR_LINE);
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m_floppy2->get_device()->mon_w(CLEAR_LINE);
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m_floppy3->get_device()->mon_w(CLEAR_LINE);
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m_floppy_motor_timer->adjust(attotime::from_msec(30000));
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m_floppy_motor_on = 1;
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}
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TIMER_CALLBACK_MEMBER(ss50_dc5_device::floppy_motor_callback)
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{
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m_floppy0->get_device()->mon_w(ASSERT_LINE);
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m_floppy1->get_device()->mon_w(ASSERT_LINE);
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m_floppy2->get_device()->mon_w(ASSERT_LINE);
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m_floppy3->get_device()->mon_w(ASSERT_LINE);
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m_floppy_motor_on = 0;
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}
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// On a FDC command write, check that the floppy side is as expected given
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// the track and sector. This check is performed for the type II and III
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// commands. The floppy side is modified if necessary.
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void ss50_dc5_device::validate_floppy_side(uint8_t cmd)
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{
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if ((cmd & 0xe1) == 0x80 || (cmd & 0xe0) == 0xa0 ||
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(cmd & 0xf9) == 0xc0 || (cmd & 0xf9) == 0xe0 ||
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(cmd & 0xf9) == 0xf0)
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{
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uint32_t expected_sectors = m_expected_sectors->read();
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uint32_t track_zero_expected_sectors = m_track_zero_expected_sectors->read();
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uint8_t sector = m_fdc->sector_r();
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uint8_t track = m_fdc->track_r();
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if (track_zero_expected_sectors && track == 0)
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{
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uint8_t expected_side = sector > track_zero_expected_sectors ? 1 : 0;
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if (m_fdc_side != expected_side)
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{
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if (m_fdc_floppy)
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{
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m_fdc_floppy->ss_w(expected_side);
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m_fdc_side = expected_side;
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}
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}
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}
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if (expected_sectors)
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{
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uint8_t expected_side = sector > expected_sectors ? 1 : 0;
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if (m_fdc_side != expected_side)
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{
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if (m_fdc_floppy)
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{
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m_fdc_floppy->ss_w(expected_side);
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m_fdc_side = expected_side;
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}
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}
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}
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}
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}
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// The WD2797 supports an alternate interpretation of the sector size. Check
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// that the flag is as expected and return the corrected command if necessary.
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uint8_t ss50_dc5_device::validate_fdc_sector_size(uint8_t cmd)
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{
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if ((cmd & 0xe1) == 0x80 || (cmd & 0xe0) == 0xa0)
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{
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// Check that the sector size L flag is set, as expected.
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uint8_t sector_length_default = cmd & 0x08;
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if (!sector_length_default)
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{
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cmd |= 0x08;
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}
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}
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return cmd;
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}
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WRITE_LINE_MEMBER( ss50_dc5_device::fdc_intrq_w )
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{
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if (state)
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m_fdc_status |= 0x40;
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else
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m_fdc_status &= ~0x40;
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uint8_t selection = m_interrupt_select->read();
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if (selection == 1)
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{
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write_irq(state);
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}
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else if (selection == 2)
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{
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write_firq(state);
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}
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}
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WRITE_LINE_MEMBER( ss50_dc5_device::fdc_drq_w )
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{
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if (state)
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m_fdc_status |= 0x80;
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else
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m_fdc_status &= 0x7f;
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}
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WRITE_LINE_MEMBER( ss50_dc5_device::fdc_sso_w )
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{
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// The DC4 and DC5 invert the SSO output and wire it to the
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// DDEN input to allow selection of single or double density.
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// A DC5 extension. In two-register mode the SSO pin does not
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// control DDEN.
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uint32_t two_regs = m_two_control_regs->read();
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if (two_regs)
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return;
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// However there are a lot of boot loaders that will
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// not work properly with this, so allow other options.
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uint8_t expected_density = m_expected_density->read();
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switch (expected_density)
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{
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case 1:
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// Single density.
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m_fdc->dden_w(1);
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break;
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case 2:
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{
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// Double density with track zero single density.
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uint8_t track = m_fdc->track_r();
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if (track == 0)
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{
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m_fdc->dden_w(1);
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}
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else
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{
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m_fdc->dden_w(0);
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}
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break;
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}
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case 3:
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// Pure double density.
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m_fdc->dden_w(0);
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break;
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default:
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m_fdc->dden_w(!state);
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break;
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}
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}
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//-------------------------------------------------
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// register_read - read from a port register
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//-------------------------------------------------
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uint8_t ss50_dc5_device::register_read(offs_t offset)
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{
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uint8_t address_mode = m_address_mode->read();
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// If the address mode is 16 bytes then subtract 4 and handle it as a
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// 4 byte address base.
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if (address_mode == 1) {
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if (offset < 4)
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return 0;
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offset -= 4;
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}
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if (offset > 7)
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return 0;
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if ((offset & 0x4) == 0x0)
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{
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uint32_t two_regs = m_two_control_regs->read();
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if (!two_regs || (offset & 2) == 0)
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{
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// Control register 8014 / e014 read.
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return m_fdc_status;
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}
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else
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{
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// DC5 extension, reads a version number.
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return 0x02;
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}
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}
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else
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{
|
||||
// FDC 8018-801b / e018-e01b
|
||||
offset &= 3;
|
||||
// Access to the FDC triggers the motor timer.
|
||||
if (!machine().side_effects_disabled())
|
||||
floppy_motor_trigger();
|
||||
|
||||
uint8_t data = m_fdc->wd2797_device::read(offset);
|
||||
return data;
|
||||
}
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// register_write - write to a port register
|
||||
//-------------------------------------------------
|
||||
|
||||
void ss50_dc5_device::register_write(offs_t offset, uint8_t data)
|
||||
{
|
||||
uint8_t address_mode = m_address_mode->read();
|
||||
|
||||
// If the address mode is 16 bytes then subtract 4 and handle it as a
|
||||
// 4 byte address base.
|
||||
if (address_mode == 1) {
|
||||
if (offset < 4)
|
||||
return;
|
||||
offset -= 4;
|
||||
}
|
||||
|
||||
if (offset > 7)
|
||||
return;
|
||||
|
||||
if ((offset & 0x4) == 0x0)
|
||||
{
|
||||
// Control register(s) 8014-8017 E014-E017
|
||||
uint32_t two_regs = m_two_control_regs->read();
|
||||
|
||||
if (!two_regs || (offset & 2) == 0)
|
||||
{
|
||||
// Control register 8014 / e014 write.
|
||||
floppy_image_device *floppy = nullptr;
|
||||
uint8_t drive = data & 3;
|
||||
|
||||
// The DC2, DC3, DC4, DC5 have a drive inhibit feature
|
||||
// controlled by bit 7. Have not seen software use that?
|
||||
|
||||
if (drive == 0) floppy = m_floppy0->get_device();
|
||||
if (drive == 1) floppy = m_floppy1->get_device();
|
||||
if (drive == 2) floppy = m_floppy2->get_device();
|
||||
if (drive == 3) floppy = m_floppy3->get_device();
|
||||
|
||||
if (floppy != m_fdc_floppy)
|
||||
{
|
||||
m_fdc->set_floppy(floppy);
|
||||
m_fdc_floppy = floppy;
|
||||
}
|
||||
|
||||
if (floppy)
|
||||
{
|
||||
// The DC3, DC4, DC5 have a side select feature that
|
||||
// is controlled by bit 6. The DC1 and DC2 do not have
|
||||
// a floppy side output.
|
||||
uint8_t side = BIT(data, 6);
|
||||
floppy->ss_w(side);
|
||||
m_fdc_side = side;
|
||||
}
|
||||
}
|
||||
|
||||
if (two_regs && (offset & 2) == 2)
|
||||
{
|
||||
// DC5 extended control register 8016 / E016.
|
||||
#if 0
|
||||
// TODO DC5 clocking extensions.
|
||||
// Osc20 and osc12 control a clock divider.
|
||||
uint8_t osc12 = BIT(data, 2);
|
||||
uint8_t osc20 = BIT(data, 3);
|
||||
uint32_t clock = 1000000;
|
||||
if (osc20)
|
||||
clock = 2000000;
|
||||
else if (osc12)
|
||||
clock = 1200000;
|
||||
m_fdc->set_unscaled_clock(clock);
|
||||
m_fdc_clock = clock;
|
||||
|
||||
// Connects to the WD2979 5/8 pin.
|
||||
// TODO is this needed for the emulator?
|
||||
uint8_t five_or_eight = BIT(data, 4);
|
||||
#endif
|
||||
// In this two-register mode the FDC SSO output pin
|
||||
// does not control DDEN.
|
||||
uint8_t dden = BIT(data, 5);
|
||||
m_fdc->dden_w(dden);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// FDC 8018-801b / e018-e01b
|
||||
offset &= 3;
|
||||
// Access to the FDC triggers the motor timer.
|
||||
floppy_motor_trigger();
|
||||
|
||||
if (offset == 0) {
|
||||
validate_floppy_side(data);
|
||||
data = validate_fdc_sector_size(data);
|
||||
}
|
||||
|
||||
m_fdc->wd2797_device::write(offset, data);
|
||||
}
|
||||
}
|
||||
|
||||
// device type definition
|
||||
DEFINE_DEVICE_TYPE_PRIVATE(SS50_DC5, ss50_card_interface, ss50_dc5_device, "ss50_dc5", "DC5 Floppy Disk Controller")
|
||||
15
src/devices/bus/ss50/dc5.h
Normal file
15
src/devices/bus/ss50/dc5.h
Normal file
@ -0,0 +1,15 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:68bit
|
||||
/**********************************************************************
|
||||
|
||||
SWTPC SS30 DC5 Floppy Disk Controller
|
||||
|
||||
**********************************************************************/
|
||||
#ifndef MAME_DEVICE_BUS_SS50_DC5_H
|
||||
#define MAME_DEVICE_BUS_SS50_DC5_H
|
||||
|
||||
#include "interface.h"
|
||||
|
||||
DECLARE_DEVICE_TYPE(SS50_DC5, ss50_card_interface)
|
||||
|
||||
#endif // MAME_DEVICE_BUS_SS50_DC5_H
|
||||
@ -79,6 +79,7 @@
|
||||
#include "emu.h"
|
||||
#include "bus/ss50/interface.h"
|
||||
|
||||
#include "bus/ss50/dc5.h"
|
||||
#include "bus/ss50/mpc.h"
|
||||
//#include "bus/ss50/mpl.h"
|
||||
//#include "bus/ss50/mpr.h"
|
||||
@ -220,6 +221,7 @@ ss50_card_interface::ss50_card_interface(const machine_config &mconfig, device_t
|
||||
|
||||
void ss50_default_2rs_devices(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("dc5", SS50_DC5);
|
||||
device.option_add("mpc", SS50_MPC);
|
||||
//device.option_add("mpl", SS50_MPL);
|
||||
//device.option_add("mpn", SS50_MPN);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user