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System ROM up and running, ROM/RAM adress map ok, started to add PIT

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This commit is contained in:
Joakim Larsson Edstrom 2015-08-31 23:15:51 +02:00
parent 00bfb01e9b
commit ac9da1ef31
1 changed files with 22 additions and 52 deletions
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64
src/mess/drivers/mvme350.c
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@ -71,18 +71,16 @@
*--------------------------------- *---------------------------------
* TBD * TBD
* *
* Misc links about Motorola VME division and this board: * Misc links about Motorola VME division and this board: TBD
* *
* Address Map * Address Map
* -------------------------------------------------------------------------- * --------------------------------------------------------------------------
* Local to VME Decscription * Local to VME Decscription
* -------------------------------------------------------------------------- * --------------------------------------------------------------------------
* 0xffffff To of A24 * 0x000000 Up to 128Kb System ROM with RESET vector
* 0xfc0000 * 0x020000 RAM with vectors
* 0x200000 (top of 2 meg RAM) * 0x020500 RAM Top of stack
* 0x100000 (top of 1 meg RAM) * 0x040000 PIT device
* Exception Vectors
* 0x000000 (bottom of memory)
* -------------------------------------------------------------------------- * --------------------------------------------------------------------------
* *
* Interrupt sources MVME * Interrupt sources MVME
@ -114,6 +112,7 @@
#include "emu.h" #include "emu.h"
#include "cpu/m68000/m68000.h" #include "cpu/m68000/m68000.h"
#include "machine/68230pit.h"
#define LOG(x) x #define LOG(x) x
@ -122,12 +121,11 @@ class mvme350_state : public driver_device
public: public:
mvme350_state(const machine_config &mconfig, device_type type, const char *tag) : mvme350_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device (mconfig, type, tag), driver_device (mconfig, type, tag),
m_maincpu (*this, "maincpu") m_maincpu (*this, "maincpu"),
m_pit(*this, "pit")
{ {
} }
//DECLARE_READ16_MEMBER (bootvect_r);
//DECLARE_WRITE16_MEMBER (bootvect_w);
DECLARE_READ16_MEMBER (vme_a24_r); DECLARE_READ16_MEMBER (vme_a24_r);
DECLARE_WRITE16_MEMBER (vme_a24_w); DECLARE_WRITE16_MEMBER (vme_a24_w);
DECLARE_READ16_MEMBER (vme_a16_r); DECLARE_READ16_MEMBER (vme_a16_r);
@ -138,19 +136,15 @@ protected:
private: private:
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<pit68230_device> m_pit;
// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
// UINT16 *m_sysrom;
// UINT16 m_sysram[4];
}; };
static ADDRESS_MAP_START (mvme350_mem, AS_PROGRAM, 16, mvme350_state) static ADDRESS_MAP_START (mvme350_mem, AS_PROGRAM, 16, mvme350_state)
ADDRESS_MAP_UNMAP_HIGH ADDRESS_MAP_UNMAP_HIGH
//AM_RANGE (0x000000, 0x000007) AM_ROM AM_READ (bootvect_r) /* ROM mirror just durin reset */
//AM_RANGE (0x000000, 0x000007) AM_RAM AM_WRITE (bootvect_w) /* After first write we act as RAM */
//AM_RANGE (0x000008, 0x0fffff) AM_RAM /* 1 Mb RAM */
AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */ AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */
AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */ AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */
//AM_RANGE(0x060000, 0x060035) AM_DEVREADWRITE8("pit", pit68230_device, data_r, data_w, 0x00ff)
//AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */ //AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */
//AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */ //AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */
ADDRESS_MAP_END ADDRESS_MAP_END
@ -163,40 +157,14 @@ INPUT_PORTS_END
void mvme350_state::machine_start () void mvme350_state::machine_start ()
{ {
LOG (logerror ("machine_start\n")); LOG (logerror ("machine_start\n"));
/* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */
// m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x0fc0000);
} }
/* Support CPU resets
TODO: Investigate why the user need two 'softreset' commands for the below to work.
If only one 'softreset' is given the reset PC gets the RAM content, not the intended ROM vector.
Race conditions? Wrong call order in memory system? Debugger prefetch accesses?
*/
void mvme350_state::machine_reset () void mvme350_state::machine_reset ()
{ {
LOG (logerror ("machine_reset\n")); LOG (logerror ("machine_reset\n"));
/* Reset pointer to bootvector in ROM for bootvector handler bootvect_r */
// if (m_sysrom == &m_sysram[0]) /* Condition needed because memory map is not setup first time */
// m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x0fc0000);
} }
#if 0 #if 0
/* Boot vector handler, the PCB hardwires the first 8 bytes from 0xfc0000 to 0x0 at reset*/
READ16_MEMBER (mvme350_state::bootvect_r){
//LOG (logerror ("bootvect_r %s\n", m_sysrom != &m_sysram[0] ? "as reset" : "as swapped"));
return m_sysrom [offset];
}
WRITE16_MEMBER (mvme350_state::bootvect_w){
LOG (logerror("bootvect_w offset %08x, mask %08x, data %04x\n", offset, mem_mask, data));
m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset.
}
/* Dummy VME access methods until the VME bus device is ready for use */ /* Dummy VME access methods until the VME bus device is ready for use */
READ16_MEMBER (mvme350_state::vme_a24_r){ READ16_MEMBER (mvme350_state::vme_a24_r){
LOG (logerror ("vme_a24_r\n")); LOG (logerror ("vme_a24_r\n"));
@ -224,8 +192,8 @@ static MACHINE_CONFIG_START (mvme350, mvme350_state)
/* basic machine hardware */ /* basic machine hardware */
MCFG_CPU_ADD ("maincpu", M68010, XTAL_10MHz) MCFG_CPU_ADD ("maincpu", M68010, XTAL_10MHz)
MCFG_CPU_PROGRAM_MAP (mvme350_mem) MCFG_CPU_PROGRAM_MAP (mvme350_mem)
/* PIT Parallel Interface and Timer device, assuming strapped for on board clock */
/* Terminal Port config */ MCFG_DEVICE_ADD("pit", PIT68230, XTAL_16MHz / 2)
MACHINE_CONFIG_END MACHINE_CONFIG_END
@ -233,16 +201,18 @@ MACHINE_CONFIG_END
ROM_START (mvme350) ROM_START (mvme350)
ROM_REGION (0x1000000, "maincpu", 0) ROM_REGION (0x1000000, "maincpu", 0)
ROM_LOAD16_BYTE ("hk68kv10U23.bin", 0xFC0001, 0x2000, CRC (632aa026) SHA1 (f2b1ed0cc38dfbeb1602c013e00757015400720d)) ROM_LOAD16_BYTE ("mvme350U40v2.3.bin", 0x0000, 0x4000, CRC (bcef82ef) SHA1 (e6fdf26e4714cbaeb3e97d7b5acf02d64d8ad744))
ROM_LOAD16_BYTE ("hk68kv10U12.bin", 0xFC0000, 0x2000, CRC (f2d688e9) SHA1 (e68699965645f0ce53de47625163c3eb02c8b727)) ROM_LOAD16_BYTE ("mvme350U47v2.3.bin", 0x0001, 0x4000, CRC (582ce095) SHA1 (d0929dbfeb0cfda63df6b5bc29ee27fbf665def7))
/* /*
* System ROM information * System ROM information
* *
* The ROMs known commands from different sources: * The ROMs known commands from different sources:
* *
* TBD * NONE
* *
* This is controller board which sets up the board and then executes a STOP instruction
* awaiting a CPU on the VME bus to request its services.
*/ */
ROM_END ROM_END