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sm510: use 1 callback for lcd segments output (nw)

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This commit is contained in:
hap 2018-12-07 16:48:50 +01:00
parent f9c694b236
commit acf2db87c4
9 changed files with 159 additions and 186 deletions
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6
src/devices/cpu/sm510/sm500.h
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@ -70,11 +70,6 @@ class sm500_device : public sm510_base_device
public: public:
sm500_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 32768); sm500_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 32768);
// see sm510.h for ACL, K, R, alpha, beta
// LCD segment outputs: H1/2 as a0, O group as a1-a4, O data as d0-d3
auto write_o() { return m_write_o.bind(); }
protected: protected:
sm500_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int o_pins, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data); sm500_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int o_pins, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
@ -92,7 +87,6 @@ protected:
virtual void wakeup_vector() override { do_branch(0, 0, 0); } virtual void wakeup_vector() override { do_branch(0, 0, 0); }
// lcd driver // lcd driver
devcb_write8 m_write_o;
virtual void lcd_update() override; virtual void lcd_update() override;
int m_o_pins; // number of 4-bit O pins int m_o_pins; // number of 4-bit O pins

8
src/devices/cpu/sm510/sm500core.cpp
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@ -43,7 +43,6 @@ sm500_device::sm500_device(const machine_config &mconfig, const char *tag, devic
sm500_device::sm500_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int o_pins, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data) sm500_device::sm500_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int o_pins, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data)
: sm510_base_device(mconfig, type, tag, owner, clock, stack_levels, prgwidth, program, datawidth, data), : sm510_base_device(mconfig, type, tag, owner, clock, stack_levels, prgwidth, program, datawidth, data),
m_write_o(*this),
m_o_pins(o_pins) m_o_pins(o_pins)
{ {
} }
@ -65,9 +64,6 @@ void sm500_device::device_start()
// common init (not everything is used though) // common init (not everything is used though)
sm510_base_device::device_start(); sm510_base_device::device_start();
// resolve callbacks
m_write_o.resolve_safe();
// init/zerofill // init/zerofill
memset(m_ox, 0, sizeof(m_ox)); memset(m_ox, 0, sizeof(m_ox));
memset(m_o, 0, sizeof(m_o)); memset(m_o, 0, sizeof(m_o));
@ -122,7 +118,7 @@ void sm500_device::lcd_update()
{ {
// 4 segments per group // 4 segments per group
u8 seg = h ? m_ox[o] : m_o[o]; u8 seg = h ? m_ox[o] : m_o[o];
m_write_o(o << 1 | h, m_bp ? seg : 0, 0xff); m_write_segs(o << 1 | h, m_bp ? seg : 0, 0xffff);
} }
} }
} }
@ -136,7 +132,7 @@ void sm500_device::lcd_update()
void sm500_device::clock_melody() void sm500_device::clock_melody()
{ {
// R1 from divider or direct control, R2-R4 generic outputs // R1 from divider or direct control, R2-R4 generic outputs
u8 mask = (m_r_mask_option == SM510_R_CONTROL_OUTPUT) ? 1 : (m_div >> m_r_mask_option & 1); u8 mask = (m_r_mask_option == RMASK_DIRECT) ? 1 : (m_div >> m_r_mask_option & 1);
u8 out = (mask & ~m_r) | (~m_r & 0xe); u8 out = (mask & ~m_r) | (~m_r & 0xe);
// output to R pins // output to R pins

22
src/devices/cpu/sm510/sm510.h
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@ -17,8 +17,6 @@
// driver is required to use set_input_line(SM510_INPUT_LINE_K, state) // driver is required to use set_input_line(SM510_INPUT_LINE_K, state)
#define SM510_INPUT_LINE_K 0 #define SM510_INPUT_LINE_K 0
#define SM510_R_CONTROL_OUTPUT -1
// ACL input pin // ACL input pin
#define SM510_INPUT_LINE_ACL INPUT_LINE_RESET #define SM510_INPUT_LINE_ACL INPUT_LINE_RESET
@ -72,9 +70,9 @@ public:
, m_prgwidth(prgwidth) , m_prgwidth(prgwidth)
, m_datawidth(datawidth) , m_datawidth(datawidth)
, m_stack_levels(stack_levels) , m_stack_levels(stack_levels)
, m_r_mask_option(SM510_R_CONTROL_OUTPUT) , m_r_mask_option(RMASK_DIRECT)
, m_lcd_ram_a(*this, "lcd_ram_a"), m_lcd_ram_b(*this, "lcd_ram_b"), m_lcd_ram_c(*this, "lcd_ram_c") , m_lcd_ram_a(*this, "lcd_ram_a"), m_lcd_ram_b(*this, "lcd_ram_b"), m_lcd_ram_c(*this, "lcd_ram_c")
, m_write_sega(*this), m_write_segb(*this), m_write_segc(*this), m_write_segbs(*this) , m_write_segs(*this)
, m_melody_rom(*this, "melody") , m_melody_rom(*this, "melody")
, m_read_k(*this) , m_read_k(*this)
, m_read_ba(*this), m_read_b(*this) , m_read_ba(*this), m_read_b(*this)
@ -84,9 +82,10 @@ public:
// For SM510, SM500, SM5A, R port output is selected with a mask option, // For SM510, SM500, SM5A, R port output is selected with a mask option,
// either from the divider or direct contol. Documented options are: // either from the divider or direct contol. Documented options are:
// SM510/SM5A: control, 2(4096Hz meant for alarm sound) // SM510/SM5A: direct control, 2(4096Hz meant for alarm sound)
// SM500: 14, 11, 3 (divider f1, f4, f12) // SM500: 14, 11, 3 (divider f1, f4, f12)
void set_r_mask_option(int bit) { m_r_mask_option = bit; } void set_r_mask_option(int bit) { m_r_mask_option = bit; }
static constexpr int RMASK_DIRECT = -1;
// 4-bit K input port (pull-down) // 4-bit K input port (pull-down)
auto read_k() { return m_read_k.bind(); } auto read_k() { return m_read_k.bind(); }
@ -103,13 +102,10 @@ public:
// 1/2/4-bit R (buzzer/melody) output port // 1/2/4-bit R (buzzer/melody) output port
auto write_r() { return m_write_r.bind(); } auto write_r() { return m_write_r.bind(); }
// LCD segment outputs: H1-4 as offset(low), a/b/c 1-16 as data d0-d15 // LCD segment outputs, SM51X: H1-4 as offset(low), a/b/c 1-16 as data d0-d15,
auto write_sega() { return m_write_sega.bind(); } // bs output is same as above, but only up to 2 bits used.
auto write_segb() { return m_write_segb.bind(); } // SM500/SM5A: H1/2 as a0, O group as a1-a4, O data as d0-d3
auto write_segc() { return m_write_segc.bind(); } auto write_segs() { return m_write_segs.bind(); }
// LCD bs output: same as above, but only up to 2 bits used
auto write_segbs() { return m_write_segbs.bind(); }
protected: protected:
// device-level overrides // device-level overrides
@ -164,7 +160,7 @@ protected:
// lcd driver // lcd driver
optional_shared_ptr<u8> m_lcd_ram_a, m_lcd_ram_b, m_lcd_ram_c; optional_shared_ptr<u8> m_lcd_ram_a, m_lcd_ram_b, m_lcd_ram_c;
devcb_write16 m_write_sega, m_write_segb, m_write_segc, m_write_segbs; devcb_write16 m_write_segs;
emu_timer *m_lcd_timer; emu_timer *m_lcd_timer;
u8 m_l, m_x; u8 m_l, m_x;
u8 m_y; u8 m_y;

14
src/devices/cpu/sm510/sm510base.cpp
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@ -50,11 +50,7 @@ void sm510_base_device::device_start()
m_read_b.resolve_safe(1); m_read_b.resolve_safe(1);
m_write_s.resolve_safe(); m_write_s.resolve_safe();
m_write_r.resolve_safe(); m_write_r.resolve_safe();
m_write_segs.resolve_safe();
m_write_sega.resolve_safe();
m_write_segb.resolve_safe();
m_write_segbs.resolve_safe();
m_write_segc.resolve_safe();
// init/zerofill // init/zerofill
memset(m_stack, 0, sizeof(m_stack)); memset(m_stack, 0, sizeof(m_stack));
@ -199,13 +195,13 @@ void sm510_base_device::lcd_update()
for (int h = 0; h < 4; h++) for (int h = 0; h < 4; h++)
{ {
// 16 segments per row from upper part of RAM // 16 segments per row from upper part of RAM
m_write_sega(h | SM510_PORT_SEGA, get_lcd_row(h, m_lcd_ram_a), 0xffff); m_write_segs(h | SM510_PORT_SEGA, get_lcd_row(h, m_lcd_ram_a), 0xffff);
m_write_segb(h | SM510_PORT_SEGB, get_lcd_row(h, m_lcd_ram_b), 0xffff); m_write_segs(h | SM510_PORT_SEGB, get_lcd_row(h, m_lcd_ram_b), 0xffff);
m_write_segc(h | SM510_PORT_SEGC, get_lcd_row(h, m_lcd_ram_c), 0xffff); m_write_segs(h | SM510_PORT_SEGC, get_lcd_row(h, m_lcd_ram_c), 0xffff);
// bs output from L/X and Y regs // bs output from L/X and Y regs
u8 bs = (m_l >> h & 1) | ((m_x*2) >> h & 2); u8 bs = (m_l >> h & 1) | ((m_x*2) >> h & 2);
m_write_segbs(h | SM510_PORT_SEGBS, (m_bc || !m_bp) ? 0 : bs, 0xffff); m_write_segs(h | SM510_PORT_SEGBS, (m_bc || !m_bp) ? 0 : bs, 0xffff);
} }
} }

2
src/devices/cpu/sm510/sm510core.cpp
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@ -59,7 +59,7 @@ void sm510_device::clock_melody()
{ {
u8 out = 0; u8 out = 0;
if (m_r_mask_option == SM510_R_CONTROL_OUTPUT) if (m_r_mask_option == RMASK_DIRECT)
{ {
// direct output // direct output
out = m_r & 3; out = m_r & 3;

20
src/mame/drivers/eva.cpp
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@ -32,10 +32,10 @@
class eva_base_state : public driver_device class eva_base_state : public driver_device
{ {
public: public:
eva_base_state(const machine_config &mconfig, device_type type, const char *tag) eva_base_state(const machine_config &mconfig, device_type type, const char *tag) :
: driver_device(mconfig, type, tag) driver_device(mconfig, type, tag),
, m_tms5100(*this, "tms5100") m_tms5100(*this, "tms5100"),
, m_tms6100(*this, "tms6100") m_tms6100(*this, "tms6100")
{ } { }
void eva_sound(machine_config &config); void eva_sound(machine_config &config);
@ -49,9 +49,9 @@ protected:
class eva11_state : public eva_base_state class eva11_state : public eva_base_state
{ {
public: public:
eva11_state(const machine_config &mconfig, device_type type, const char *tag) eva11_state(const machine_config &mconfig, device_type type, const char *tag) :
: eva_base_state(mconfig, type, tag) eva_base_state(mconfig, type, tag),
, m_maincpu(*this, "maincpu") m_maincpu(*this, "maincpu")
{ } { }
void eva(machine_config &config); void eva(machine_config &config);
@ -68,9 +68,9 @@ private:
class eva24_state : public eva_base_state class eva24_state : public eva_base_state
{ {
public: public:
eva24_state(const machine_config &mconfig, device_type type, const char *tag) eva24_state(const machine_config &mconfig, device_type type, const char *tag) :
: eva_base_state(mconfig, type, tag) eva_base_state(mconfig, type, tag),
, m_maincpu(*this, "maincpu") m_maincpu(*this, "maincpu")
{ } { }
void eva(machine_config &config); void eva(machine_config &config);

261
src/mame/drivers/hh_sm510.cpp
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@ -221,13 +221,6 @@ WRITE8_MEMBER(hh_sm510_state::piezo2bit_input_w)
input_w(space, 0, data >> 1); input_w(space, 0, data >> 1);
} }
void hh_sm510_state::write_segs(machine_config &config)
{
m_maincpu->write_sega().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->write_segb().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->write_segc().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->write_segbs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
}
@ -291,7 +284,7 @@ MACHINE_CONFIG_START(kdribble_state::kdribble)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -363,7 +356,7 @@ MACHINE_CONFIG_START(ktopgun_state::ktopgun)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -436,7 +429,7 @@ MACHINE_CONFIG_START(kcontra_state::kcontra)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -508,7 +501,7 @@ MACHINE_CONFIG_START(ktmnt_state::ktmnt)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -577,7 +570,7 @@ MACHINE_CONFIG_START(kgradius_state::kgradius)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -644,7 +637,7 @@ MACHINE_CONFIG_START(kloneran_state::kloneran)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -715,7 +708,7 @@ MACHINE_CONFIG_START(kblades_state::kblades)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -787,7 +780,7 @@ MACHINE_CONFIG_START(knfl_state::knfl)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -858,7 +851,7 @@ MACHINE_CONFIG_START(kbilly_state::kbilly)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -923,7 +916,7 @@ MACHINE_CONFIG_START(kbucky_state::kbucky)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -992,7 +985,7 @@ MACHINE_CONFIG_START(kgarfld_state::kgarfld)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -1083,12 +1076,12 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(gnw_mmouse_state::gnw_mmouse) MACHINE_CONFIG_START(gnw_mmouse_state::gnw_mmouse)
/* basic machine hardware */ /* basic machine hardware */
sm5a_device &sm5a(SM5A(config, m_maincpu)); SM5A(config, m_maincpu);
sm5a.set_r_mask_option(SM510_R_CONTROL_OUTPUT); // ? m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT); // ?
sm5a.write_o().set(FUNC(hh_sm510_state::sm500_lcd_segment_w)); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm500_lcd_segment_w));
sm5a.read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
sm5a.write_r().set(FUNC(hh_sm510_state::piezo_input_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_input_w));
sm5a.read_ba().set_ioport("BA"); m_maincpu->read_ba().set_ioport("BA");
/* video hardware */ /* video hardware */
MCFG_SCREEN_SVG_ADD("screen", "svg") MCFG_SCREEN_SVG_ADD("screen", "svg")
@ -1117,12 +1110,12 @@ MACHINE_CONFIG_START(gnw_mmouse_state::nupogodi)
gnw_mmouse(config); gnw_mmouse(config);
/* basic machine hardware */ /* basic machine hardware */
kb1013vk12_device &sm5a(KB1013VK12(config.replace(), m_maincpu)); KB1013VK12(config.replace(), m_maincpu);
sm5a.set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT); // ?
sm5a.write_o().set(FUNC(hh_sm510_state::sm500_lcd_segment_w)); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm500_lcd_segment_w));
sm5a.read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
sm5a.write_r().set(FUNC(hh_sm510_state::piezo_input_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_input_w));
sm5a.read_ba().set_ioport("BA"); m_maincpu->read_ba().set_ioport("BA");
/* video hardware */ /* video hardware */
MCFG_SCREEN_MODIFY("screen") MCFG_SCREEN_MODIFY("screen")
@ -1198,7 +1191,7 @@ MACHINE_CONFIG_START(gnw_opanic_state::gnw_opanic)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -1283,7 +1276,7 @@ MACHINE_CONFIG_START(gnw_dkong_state::gnw_dkong)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -1363,7 +1356,7 @@ MACHINE_CONFIG_START(gnw_mickdon_state::gnw_mickdon)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r2_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r2_w));
@ -1452,7 +1445,7 @@ MACHINE_CONFIG_START(gnw_ghouse_state::gnw_ghouse)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -1537,7 +1530,7 @@ MACHINE_CONFIG_START(gnw_dkong2_state::gnw_dkong2)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -1622,7 +1615,7 @@ MACHINE_CONFIG_START(gnw_mario_state::gnw_mario)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -1714,7 +1707,7 @@ MACHINE_CONFIG_START(gnw_dkjr_state::gnw_dkjr)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -1795,7 +1788,7 @@ MACHINE_CONFIG_START(gnw_mariocm_state::gnw_mariocm)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -1870,7 +1863,7 @@ MACHINE_CONFIG_START(gnw_tfish_state::gnw_tfish)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -1952,7 +1945,7 @@ MACHINE_CONFIG_START(gnw_smb_state::gnw_smb)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -2033,7 +2026,7 @@ MACHINE_CONFIG_START(gnw_climber_state::gnw_climber)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -2134,7 +2127,7 @@ MACHINE_CONFIG_START(gnw_boxing_state::gnw_boxing)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -2243,8 +2236,8 @@ MACHINE_CONFIG_START(tgaunt_state::tgaunt)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -2345,8 +2338,8 @@ MACHINE_CONFIG_START(tddragon_state::tddragon)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); // confirmed m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -2439,8 +2432,8 @@ MACHINE_CONFIG_START(tkarnov_state::tkarnov)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -2532,8 +2525,8 @@ MACHINE_CONFIG_START(tvindictr_state::tvindictr)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -2648,8 +2641,8 @@ MACHINE_CONFIG_START(tgaiden_state::tgaiden)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(tgaiden_state::write_r)); m_maincpu->write_r().set(FUNC(tgaiden_state::write_r));
@ -2737,8 +2730,8 @@ MACHINE_CONFIG_START(tbatman_state::tbatman)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -2830,8 +2823,8 @@ MACHINE_CONFIG_START(tsharr2_state::tsharr2)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); // confirmed m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -2920,8 +2913,8 @@ MACHINE_CONFIG_START(tstrider_state::tstrider)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -3014,8 +3007,8 @@ MACHINE_CONFIG_START(tgoldnaxe_state::tgoldnaxe)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -3125,8 +3118,8 @@ MACHINE_CONFIG_START(trobocop2_state::trobocop2)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -3232,8 +3225,8 @@ MACHINE_CONFIG_START(taltbeast_state::taltbeast)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); // confirmed m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -3326,8 +3319,8 @@ MACHINE_CONFIG_START(tsf2010_state::tsf2010)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -3416,8 +3409,8 @@ MACHINE_CONFIG_START(tswampt_state::tswampt)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -3510,8 +3503,8 @@ MACHINE_CONFIG_START(tspidman_state::tspidman)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -3604,8 +3597,8 @@ MACHINE_CONFIG_START(txmen_state::txmen)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -3698,8 +3691,8 @@ MACHINE_CONFIG_START(tddragon3_state::tddragon3)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -3792,8 +3785,8 @@ MACHINE_CONFIG_START(tflash_state::tflash)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -3887,7 +3880,7 @@ MACHINE_CONFIG_START(tmchammer_state::tmchammer)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -3980,8 +3973,8 @@ MACHINE_CONFIG_START(tbtoads_state::tbtoads)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -4074,8 +4067,8 @@ MACHINE_CONFIG_START(thook_state::thook)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -4167,8 +4160,8 @@ MACHINE_CONFIG_START(tbttf_state::tbttf)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -4263,8 +4256,8 @@ MACHINE_CONFIG_START(taddams_state::taddams)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -4357,8 +4350,8 @@ MACHINE_CONFIG_START(thalone_state::thalone)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -4447,8 +4440,8 @@ MACHINE_CONFIG_START(txmenpx_state::txmenpx)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -4541,8 +4534,8 @@ MACHINE_CONFIG_START(thalone2_state::thalone2)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -4630,7 +4623,7 @@ MACHINE_CONFIG_START(tsonic_state::tsonic)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::piezo2bit_input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::piezo2bit_input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo2bit_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo2bit_r1_w));
@ -4723,8 +4716,8 @@ MACHINE_CONFIG_START(trobocop3_state::trobocop3)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -4813,8 +4806,8 @@ MACHINE_CONFIG_START(tdummies_state::tdummies)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -4907,8 +4900,8 @@ MACHINE_CONFIG_START(tsfight2_state::tsfight2)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -5001,8 +4994,8 @@ MACHINE_CONFIG_START(twworld_state::twworld)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -5091,8 +5084,8 @@ MACHINE_CONFIG_START(tjpark_state::tjpark)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -5180,7 +5173,7 @@ MACHINE_CONFIG_START(tsonic2_state::tsonic2)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::piezo2bit_input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::piezo2bit_input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo2bit_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo2bit_r1_w));
@ -5278,8 +5271,8 @@ MACHINE_CONFIG_START(tsddragon_state::tsddragon)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -5373,8 +5366,8 @@ MACHINE_CONFIG_START(tdennis_state::tdennis)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -5471,8 +5464,8 @@ MACHINE_CONFIG_START(tnmarebc_state::tnmarebc)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(tnmarebc_state::input_w)); m_maincpu->write_s().set(FUNC(tnmarebc_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -5565,8 +5558,8 @@ MACHINE_CONFIG_START(ttransf2_state::ttransf2)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -5655,8 +5648,8 @@ MACHINE_CONFIG_START(topaliens_state::topaliens)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -5750,8 +5743,8 @@ MACHINE_CONFIG_START(tmkombat_state::tmkombat)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -5844,8 +5837,8 @@ MACHINE_CONFIG_START(tshadow_state::tshadow)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -5938,8 +5931,8 @@ MACHINE_CONFIG_START(tskelwarr_state::tskelwarr)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -6033,8 +6026,8 @@ MACHINE_CONFIG_START(tbatfor_state::tbatfor)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -6128,8 +6121,8 @@ MACHINE_CONFIG_START(tjdredd_state::tjdredd)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -6223,8 +6216,8 @@ MACHINE_CONFIG_START(tapollo13_state::tapollo13)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -6318,8 +6311,8 @@ MACHINE_CONFIG_START(tgoldeye_state::tgoldeye)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -6408,8 +6401,8 @@ MACHINE_CONFIG_START(tinday_state::tinday)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -6498,8 +6491,8 @@ MACHINE_CONFIG_START(tsjam_state::tsjam)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); // no external XTAL SM510(config, m_maincpu); // no external XTAL
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -6588,7 +6581,7 @@ MACHINE_CONFIG_START(tbatmana_state::tbatmana)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::piezo2bit_input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::piezo2bit_input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo2bit_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo2bit_r1_w));
@ -6692,7 +6685,7 @@ MACHINE_CONFIG_START(tigarden_state::tigarden)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(2); // confirmed m_maincpu->set_r_mask_option(2); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));
@ -6791,7 +6784,7 @@ MACHINE_CONFIG_START(nummunch_state::nummunch)
/* basic machine hardware */ /* basic machine hardware */
SM511(config, m_maincpu); SM511(config, m_maincpu);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r)); m_maincpu->read_k().set(FUNC(hh_sm510_state::input_r));
m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w)); m_maincpu->write_s().set(FUNC(hh_sm510_state::input_w));
m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w)); m_maincpu->write_r().set(FUNC(hh_sm510_state::piezo_r1_w));

10
src/mame/drivers/rzone.cpp
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@ -246,7 +246,7 @@ MACHINE_CONFIG_START(rzone_state::rzbatfor)
/* basic machine hardware */ /* basic machine hardware */
SM512(config, m_maincpu); // no external XTAL SM512(config, m_maincpu); // no external XTAL
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(rzone_state::input_r)); m_maincpu->read_k().set(FUNC(rzone_state::input_r));
m_maincpu->write_s().set(FUNC(rzone_state::t2_write_s)); m_maincpu->write_s().set(FUNC(rzone_state::t2_write_s));
m_maincpu->write_r().set(FUNC(rzone_state::t2_write_r)); m_maincpu->write_r().set(FUNC(rzone_state::t2_write_r));
@ -271,8 +271,8 @@ MACHINE_CONFIG_START(rzone_state::rztoshden)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(rzone_state::input_r)); m_maincpu->read_k().set(FUNC(rzone_state::input_r));
m_maincpu->write_s().set(FUNC(rzone_state::t1_write_s)); m_maincpu->write_s().set(FUNC(rzone_state::t1_write_s));
m_maincpu->write_r().set(FUNC(rzone_state::t1_write_r)); m_maincpu->write_r().set(FUNC(rzone_state::t1_write_r));
@ -297,8 +297,8 @@ MACHINE_CONFIG_START(rzone_state::rzindy500)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); // no external XTAL SM510(config, m_maincpu); // no external XTAL
m_maincpu->set_r_mask_option(SM510_R_CONTROL_OUTPUT); // confirmed m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT); // confirmed
write_segs(config); m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(rzone_state::input_r)); m_maincpu->read_k().set(FUNC(rzone_state::input_r));
m_maincpu->write_s().set(FUNC(rzone_state::t1_write_s)); m_maincpu->write_s().set(FUNC(rzone_state::t1_write_s));
m_maincpu->write_r().set(FUNC(rzone_state::t1_write_r)); m_maincpu->write_r().set(FUNC(rzone_state::t1_write_r));

2
src/mame/includes/hh_sm510.h
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@ -71,8 +71,6 @@ public:
protected: protected:
virtual void machine_start() override; virtual void machine_start() override;
virtual void machine_reset() override; virtual void machine_reset() override;
void write_segs(machine_config &config);
}; };