mirror of
https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
hp9k_3xx: add HP98620 DMA controller (#4094)
* hp9k_3xx: add HP98620 DMA controller * hp98620: remove unused defines (nw)
This commit is contained in:
dxl
R. Belmont
parent
98e4553718
commit
ad3ad560a6
@ -891,6 +891,8 @@ if (BUSES["HPDIO"]~=null) then
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MAME_DIR .. "src/devices/bus/hp_dio/hp98603a.h",
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MAME_DIR .. "src/devices/bus/hp_dio/hp98603b.cpp",
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MAME_DIR .. "src/devices/bus/hp_dio/hp98603b.h",
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MAME_DIR .. "src/devices/bus/hp_dio/hp98620.cpp",
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MAME_DIR .. "src/devices/bus/hp_dio/hp98620.h",
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MAME_DIR .. "src/devices/bus/hp_dio/hp98644.cpp",
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MAME_DIR .. "src/devices/bus/hp_dio/hp98644.h",
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MAME_DIR .. "src/devices/bus/hp_dio/human_interface.cpp",
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383
src/devices/bus/hp_dio/hp98620.cpp
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383
src/devices/bus/hp_dio/hp98620.cpp
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@ -0,0 +1,383 @@
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// license:BSD-3-Clause
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// copyright-holders:Sven Schnelle
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/***************************************************************************
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HP98620 DMA controller
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***************************************************************************/
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#include "emu.h"
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#define VERBOSE 0
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#include "logmacro.h"
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#include "hp98620.h"
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DEFINE_DEVICE_TYPE_NS(HPDIO_98620, bus::hp_dio, dio16_98620_device, "hp98620", "HP98620 DMA Controller")
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namespace bus {
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namespace hp_dio {
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dio16_98620_device::dio16_98620_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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dio16_98620_device(mconfig, HPDIO_98620, tag, owner, clock)
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{
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}
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dio16_98620_device::dio16_98620_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
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device_t(mconfig, type, tag, owner, clock),
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device_dio32_card_interface(mconfig, *this),
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m_irq_state(false)
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{
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}
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static INPUT_PORTS_START(hp98620_port)
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INPUT_PORTS_END
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ioport_constructor dio16_98620_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME(hp98620_port);
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}
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void dio16_98620_device::device_start()
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{
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m_installed_io = false;
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save_item(NAME(m_regs[0].address));
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save_item(NAME(m_regs[0].tc));
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save_item(NAME(m_regs[0].control));
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save_item(NAME(m_regs[0].irq_level));
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save_item(NAME(m_regs[0].tsz));
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save_item(NAME(m_regs[0].subcount));
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save_item(NAME(m_regs[0].irq));
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save_item(NAME(m_regs[0].ie));
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save_item(NAME(m_regs[0].armed));
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save_item(NAME(m_regs[0].dma_out));
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save_item(NAME(m_regs[0].dma_pri));
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save_item(NAME(m_regs[0].lword));
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save_item(NAME(m_regs[0].word));
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save_item(NAME(m_regs[1].address));
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save_item(NAME(m_regs[1].tc));
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save_item(NAME(m_regs[1].control));
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save_item(NAME(m_regs[1].irq_level));
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save_item(NAME(m_regs[1].tsz));
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save_item(NAME(m_regs[1].subcount));
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save_item(NAME(m_regs[1].irq));
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save_item(NAME(m_regs[1].ie));
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save_item(NAME(m_regs[1].armed));
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save_item(NAME(m_regs[1].dma_out));
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save_item(NAME(m_regs[1].dma_pri));
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save_item(NAME(m_regs[1].lword));
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save_item(NAME(m_regs[1].word));
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save_item(NAME(m_installed_io));
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save_item(NAME(m_control));
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save_item(NAME(m_data));
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save_item(NAME(m_irq_state));
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save_item(NAME(dmar));
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}
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void dio16_98620_device::map(address_map &map)
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{
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}
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void dio16_98620_device::device_reset()
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{
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if (!m_installed_io)
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{
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program_space()->install_readwrite_handler(0x500000, 0x50020f,
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read16_delegate(FUNC(dio16_98620_device::dma_r), this),
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write16_delegate(FUNC(dio16_98620_device::dma_w), this));
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m_installed_io = true;
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}
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m_control = 0;
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m_irq_state = false;
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}
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uint16_t dio16_98620_device::get_ctrl(const int channel)
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{
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uint16_t ret = 0;
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if (m_regs[channel].ie)
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ret |= REG_CONTROL_IE;
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if (m_regs[channel].tsz == 2)
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ret |= REG_CONTROL_WORD;
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if (m_regs[channel].tsz == 4)
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ret |= REG_1TQ4_CONTROL_LWORD;
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if (m_regs[channel].dma_out)
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ret |= REG_CONTROL_OUT;
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if (m_regs[channel].dma_pri)
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ret |= REG_CONTROL_PRI;
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ret |= ((m_regs[channel].irq_level-3) & REG_CONTROL_INT_MASK) << REG_CONTROL_INT_SHIFT;
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return ret;
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}
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READ16_MEMBER(dio16_98620_device::dma_r)
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{
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uint16_t ret = 0;
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switch(offset << 1) {
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case REG0_RESET_ARM_INT:
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m_regs[0].irq = false;
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m_regs[0].armed = false;
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update_irq();
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ret = 0x00;
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break;
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case REG1_RESET_ARM_INT:
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m_regs[1].irq = false;
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m_regs[1].armed = false;
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update_irq();
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ret = 0x00;
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break;
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case REG0_TRANSFER_COUNT:
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ret = m_regs[0].tc & 0xffff;
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break;
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case REG1_TRANSFER_COUNT:
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ret = m_regs[1].tc & 0xffff;
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break;
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case REG0_STATUS:
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ret = 0;
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if (m_regs[0].armed)
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ret |= REG_STATUS_ARMED;
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if (m_regs[0].irq)
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ret |= REG_STATUS_INT;
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break;
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case REG1_STATUS:
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ret = 0;
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if (m_regs[1].armed)
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ret |= REG_STATUS_ARMED;
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if (m_regs[1].irq)
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ret |= REG_STATUS_INT;
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break;
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case REG_1TQ4_ID_LOW:
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ret = 0x3230;
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break;
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case REG_1TQ4_ID_HIGH:
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ret = 0x4330;
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break;
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case REG0_1TQ4_ADDRESS_LOW:
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ret = m_regs[0].address & 0xffff;
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break;
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case REG0_1TQ4_ADDRESS_HIGH:
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ret = m_regs[0].address >> 16;
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break;
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case REG1_1TQ4_ADDRESS_LOW:
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ret = m_regs[1].address & 0xffff;
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break;
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case REG1_1TQ4_ADDRESS_HIGH:
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ret = m_regs[1].address >> 16;
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break;
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case REG0_1TQ4_TRANSFER_COUNT_LOW:
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ret = m_regs[0].tc & 0xffff;
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break;
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case REG0_1TQ4_TRANSFER_COUNT_HIGH:
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ret = m_regs[0].tc >> 16;
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break;
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case REG1_1TQ4_TRANSFER_COUNT_LOW:
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ret = m_regs[1].tc & 0xffff;
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break;
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case REG1_1TQ4_TRANSFER_COUNT_HIGH:
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ret = m_regs[1].tc >> 16;
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break;
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case REG0_1TQ4_CONTROL:
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ret = m_regs[0].control;
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break;
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case REG1_1TQ4_CONTROL:
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ret = m_regs[1].control;
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break;
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case REG0_1TQ4_STATUS:
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ret = 0;
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break;
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case REG1_1TQ4_STATUS:
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ret = 0;
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break;
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default:
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LOG("%s: unknown register read: %02X\n", __FUNCTION__, offset << 1);
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break;
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}
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LOG("dma_r: offset=%02X ret=%02X\n", offset << 1, ret);
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return ret;
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}
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void dio16_98620_device::update_ctrl(const int channel, const uint16_t data, const bool is_1tq4)
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{
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assert(channel < 2);
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m_regs[channel].control = data;
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m_regs[channel].ie = data & REG_CONTROL_IE;
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m_regs[channel].irq_level = 3 + ((data >> REG_CONTROL_INT_SHIFT) & REG_CONTROL_INT_MASK);
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m_regs[channel].lword = (data & REG_1TQ4_CONTROL_LWORD) && is_1tq4;
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m_regs[channel].word = data & REG_CONTROL_WORD;
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m_regs[channel].dma_out = data & REG_CONTROL_OUT;
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if (data & REG_1TQ4_CONTROL_LWORD)
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m_regs[channel].tsz = 4;
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else if (data & REG_CONTROL_WORD)
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m_regs[channel].tsz = 2;
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else
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m_regs[channel].tsz = 1;
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if ((data & REG_1TQ4_CONTROL_START) || !is_1tq4) {
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LOG("DMA Channel %d: addr %08x, tc %d, size %d, int %sabled on IRQ %d\n", channel,
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m_regs[channel].address,
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(m_regs[channel].tc+1)*m_regs[channel].tsz,
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m_regs[channel].tsz,
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m_regs[channel].ie ? "en" : "dis",
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m_regs[channel].irq_level);
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m_regs[channel].subcount = m_regs[channel].tsz-1;
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m_regs[channel].armed = true;
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m_regs[channel].irq = false;
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if (dmar[channel])
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dma_transfer(channel);
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}
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}
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WRITE16_MEMBER(dio16_98620_device::dma_w)
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{
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LOG("dma_w: offset=%02X, data=%02X\n", offset << 1, data);
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switch(offset << 1) {
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case REG0_1TQ4_ADDRESS_HIGH:
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case REG0_ADDRESS_HIGH:
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m_regs[0].address &= 0xffff;
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m_regs[0].address |= (data << 16);
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break;
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case REG0_1TQ4_ADDRESS_LOW:
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case REG0_ADDRESS_LOW:
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m_regs[0].address &= 0xffff0000;
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m_regs[0].address |= data;
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break;
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case REG1_1TQ4_ADDRESS_HIGH:
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case REG1_ADDRESS_HIGH:
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m_regs[1].address &= 0xffff;
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m_regs[1].address |= (data << 16);
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break;
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case REG1_1TQ4_ADDRESS_LOW:
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case REG1_ADDRESS_LOW:
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m_regs[1].address &= 0xffff0000;
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m_regs[1].address |= data;
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break;
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case REG0_TRANSFER_COUNT:
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m_regs[0].tc = data;
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break;
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case REG0_1TQ4_TRANSFER_COUNT_HIGH:
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m_regs[0].tc &= 0xffff;
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m_regs[0].tc |= (data << 16);
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break;
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case REG0_1TQ4_TRANSFER_COUNT_LOW:
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m_regs[0].tc &= 0xffff0000;
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m_regs[0].tc |= data;
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break;
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case REG1_1TQ4_TRANSFER_COUNT_HIGH:
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m_regs[1].tc &= 0xffff;
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m_regs[1].tc |= (data << 16);
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break;
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case REG1_1TQ4_TRANSFER_COUNT_LOW:
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m_regs[1].tc &= 0xffff0000;
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m_regs[1].tc |= data;
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break;
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case REG1_TRANSFER_COUNT:
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m_regs[1].tc = data;
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break;
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case REG0_CONTROL_ARM:
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update_ctrl(0, data, false);
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break;
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case REG1_CONTROL_ARM:
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update_ctrl(1, data, false);
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break;
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case REG0_1TQ4_CONTROL:
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update_ctrl(0, data, true);
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break;
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case REG1_1TQ4_CONTROL:
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update_ctrl(1, data, true);
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break;
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default:
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LOG("%s: unknown register write: %02X\n", __FUNCTION__, offset << 1);
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break;
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}
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}
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void dio16_98620_device::update_irq()
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{
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irq3_out((m_regs[0].irq_level == 3 && m_regs[0].irq && m_regs[0].ie) ||
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(m_regs[1].irq_level == 3 && m_regs[1].irq && m_regs[1].ie));
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irq4_out((m_regs[0].irq_level == 4 && m_regs[0].irq && m_regs[0].ie) ||
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(m_regs[1].irq_level == 4 && m_regs[1].irq && m_regs[1].ie));
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irq5_out((m_regs[0].irq_level == 5 && m_regs[0].irq && m_regs[0].ie) ||
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(m_regs[1].irq_level == 5 && m_regs[1].irq && m_regs[1].ie));
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irq6_out((m_regs[0].irq_level == 6 && m_regs[0].irq && m_regs[0].ie) ||
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(m_regs[1].irq_level == 6 && m_regs[1].irq && m_regs[1].ie));
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irq7_out((m_regs[0].irq_level == 7 && m_regs[0].irq && m_regs[0].ie) ||
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(m_regs[1].irq_level == 7 && m_regs[1].irq && m_regs[1].ie));
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}
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void dio16_98620_device::dma_transfer(int channel)
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{
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assert(channel < 2);
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if (!(m_regs[channel].armed))
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return;
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LOG("dma_transfer %s: tc %d/%d\n", m_regs[channel].dma_out ? "out" : "in",
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m_regs[channel].tc, m_regs[channel].subcount);
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if (m_regs[channel].dma_out) {
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dmack_w_out(channel, program_space()->read_byte(m_regs[channel].address++));
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} else {
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program_space()->write_byte(m_regs[channel].address++, dmack_r_out(channel));
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}
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if (m_regs[channel].subcount == 0) {
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if (m_regs[channel].tc-- == 0) {
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LOG("DMA%d done\n", channel);
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m_regs[channel].armed = false;
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m_regs[channel].irq = true;
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update_irq();
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return;
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}
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m_regs[channel].subcount = m_regs[channel].tsz;
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}
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m_regs[channel].subcount--;
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}
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WRITE_LINE_MEMBER(dio16_98620_device::dmar0_in)
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{
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LOG("%s: %d\n", __FUNCTION__, state);
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dmar[0] = state;
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if (!state)
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return;
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dma_transfer(0);
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}
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WRITE_LINE_MEMBER(dio16_98620_device::dmar1_in)
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{
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LOG("%s: %d\n", __FUNCTION__, state);
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dmar[1] = state;
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if (!state)
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return;
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dma_transfer(1);
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}
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} // namespace bus::hp_dio
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} // namespace bus
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128
src/devices/bus/hp_dio/hp98620.h
Normal file
128
src/devices/bus/hp_dio/hp98620.h
Normal file
@ -0,0 +1,128 @@
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// license:BSD-3-Clause
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// copyright-holders:Sven Schnelle
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#ifndef MAME_BUS_HPDIO_98620_H
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#define MAME_BUS_HPDIO_98620_H
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#pragma once
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#include "hp_dio.h"
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namespace bus {
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namespace hp_dio {
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class dio16_98620_device :
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public device_t,
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public device_dio32_card_interface
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{
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public:
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// construction/destruction
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dio16_98620_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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void map(address_map &map);
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protected:
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dio16_98620_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual ioport_constructor device_input_ports() const override;
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DECLARE_READ16_MEMBER(dma_r);
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DECLARE_WRITE16_MEMBER(dma_w);
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DECLARE_WRITE_LINE_MEMBER(irq_w);
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private:
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static constexpr int REG0_RESET_ARM_INT = 0x00;
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static constexpr int REG0_ADDRESS_HIGH = 0x00;
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static constexpr int REG0_ADDRESS_LOW = 0x02;
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static constexpr int REG0_TRANSFER_COUNT = 0x04;
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static constexpr int REG0_CONTROL_ARM = 0x06;
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static constexpr int REG0_STATUS = 0x06;
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static constexpr int REG1_RESET_ARM_INT = 0x08;
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static constexpr int REG1_ADDRESS_HIGH = 0x08;
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static constexpr int REG1_ADDRESS_LOW = 0x0a;
|
||||
static constexpr int REG1_TRANSFER_COUNT = 0x0c;
|
||||
static constexpr int REG1_CONTROL_ARM = 0x0e;
|
||||
static constexpr int REG1_STATUS = 0x0e;
|
||||
|
||||
static constexpr uint8_t REG_CONTROL_IE = 1 << 0;
|
||||
static constexpr uint8_t REG_CONTROL_WORD = 1 << 1;
|
||||
static constexpr uint8_t REG_CONTROL_OUT = 1 << 2;
|
||||
static constexpr uint8_t REG_CONTROL_PRI = 1 << 3;
|
||||
static constexpr uint8_t REG_CONTROL_INT_MASK = 0x7;
|
||||
static constexpr int REG_CONTROL_INT_SHIFT = 4;
|
||||
|
||||
|
||||
static constexpr uint8_t REG_STATUS_ARMED = 1 << 0;
|
||||
static constexpr uint8_t REG_STATUS_INT = 1 << 1;
|
||||
|
||||
/* general control registers */
|
||||
static constexpr int REG_1TQ4_ID_LOW = 0x10;
|
||||
static constexpr int REG_1TQ4_ID_HIGH = 0x12;
|
||||
|
||||
/* channel specific registers */
|
||||
static constexpr int REG0_1TQ4_ADDRESS_LOW = 0x100;
|
||||
static constexpr int REG0_1TQ4_ADDRESS_HIGH = 0x102;
|
||||
static constexpr int REG0_1TQ4_TRANSFER_COUNT_LOW = 0x104;
|
||||
static constexpr int REG0_1TQ4_TRANSFER_COUNT_HIGH = 0x106;
|
||||
static constexpr int REG0_1TQ4_CONTROL = 0x108;
|
||||
static constexpr int REG0_1TQ4_STATUS = 0x10a;
|
||||
|
||||
static constexpr uint16_t REG_1TQ4_CONTROL_LWORD = 1 << 8;
|
||||
static constexpr uint16_t REG_1TQ4_CONTROL_START = 1 << 15;
|
||||
|
||||
/* registers */
|
||||
static constexpr int REG1_1TQ4_ADDRESS_HIGH = 0x200;
|
||||
static constexpr int REG1_1TQ4_ADDRESS_LOW = 0x202;
|
||||
static constexpr int REG1_1TQ4_TRANSFER_COUNT_HIGH = 0x204;
|
||||
static constexpr int REG1_1TQ4_TRANSFER_COUNT_LOW = 0x206;
|
||||
static constexpr int REG1_1TQ4_CONTROL = 0x208;
|
||||
static constexpr int REG1_1TQ4_STATUS = 0x20a;
|
||||
|
||||
WRITE_LINE_MEMBER(dmar0_in) override;
|
||||
WRITE_LINE_MEMBER(dmar1_in) override;
|
||||
|
||||
void dma_transfer(int channel);
|
||||
void update_irq();
|
||||
void update_ctrl(const int channel, const uint16_t data, const bool is_1tq4);
|
||||
uint16_t get_ctrl(const int channel);
|
||||
|
||||
bool m_installed_io;
|
||||
uint8_t m_control;
|
||||
uint8_t m_data;
|
||||
bool m_irq_state;
|
||||
|
||||
struct dma_regs {
|
||||
uint32_t address;
|
||||
uint32_t tc;
|
||||
uint32_t control;
|
||||
/* control register */
|
||||
int irq_level;
|
||||
int tsz;
|
||||
int subcount;
|
||||
|
||||
bool irq;
|
||||
bool ie;
|
||||
bool armed;
|
||||
|
||||
bool dma_out;
|
||||
bool dma_pri; // TODO
|
||||
bool lword;
|
||||
bool word;
|
||||
} m_regs[2];
|
||||
|
||||
bool dmar[2];
|
||||
};
|
||||
}
|
||||
}
|
||||
|
||||
DECLARE_DEVICE_TYPE_NS(HPDIO_98620, bus::hp_dio, dio16_98620_device)
|
||||
|
||||
#endif // MAME_BUS_HPDIO_98620_H
|
||||
@ -12,7 +12,9 @@
|
||||
#include "hp98544.h"
|
||||
#include "hp98603a.h"
|
||||
#include "hp98603b.h"
|
||||
#include "hp98620.h"
|
||||
#include "hp98644.h"
|
||||
#include "human_interface.h"
|
||||
|
||||
//**************************************************************************
|
||||
// GLOBAL VARIABLES
|
||||
@ -350,11 +352,17 @@ void device_dio32_card_interface::interface_pre_start()
|
||||
} // namespace bus::hp_dio
|
||||
} // namespace bus
|
||||
|
||||
void hpdio_cards(device_slot_interface & device)
|
||||
void dio16_cards(device_slot_interface & device)
|
||||
{
|
||||
device.option_add("hp98543", HPDIO_98543);
|
||||
device.option_add("hp98544", HPDIO_98544);
|
||||
device.option_add("hp98603a", HPDIO_98603A);
|
||||
device.option_add("hp98603b", HPDIO_98603B);
|
||||
device.option_add("hp98644", HPDIO_98644);
|
||||
device.option_add("98543", HPDIO_98543);
|
||||
device.option_add("98544", HPDIO_98544);
|
||||
device.option_add("98603a", HPDIO_98603A);
|
||||
device.option_add("98603b", HPDIO_98603B);
|
||||
device.option_add("98644", HPDIO_98644);
|
||||
device.option_add("human_interface", HPDIO_HUMAN_INTERFACE);
|
||||
}
|
||||
|
||||
void dio32_cards(device_slot_interface & device)
|
||||
{
|
||||
device.option_add("98620", HPDIO_98620);
|
||||
}
|
||||
|
||||
@ -290,6 +290,7 @@ DECLARE_DEVICE_TYPE_NS(DIO32, bus::hp_dio, dio32_device)
|
||||
DECLARE_DEVICE_TYPE_NS(DIO32_SLOT, bus::hp_dio, dio32_slot_device)
|
||||
DECLARE_DEVICE_TYPE_NS(DIO16, bus::hp_dio, dio16_device)
|
||||
|
||||
void hpdio_cards(device_slot_interface &device);
|
||||
void dio16_cards(device_slot_interface &device);
|
||||
void dio32_cards(device_slot_interface &device);
|
||||
|
||||
#endif // MAME_BUS_HPDIO_HPDIO_H
|
||||
|
||||
@ -58,14 +58,7 @@
|
||||
#include "logmacro.h"
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "machine/6840ptm.h"
|
||||
#include "sound/sn76496.h"
|
||||
#include "bus/hp_dio/hp_dio.h"
|
||||
#include "bus/hp_dio/hp98543.h"
|
||||
#include "bus/hp_dio/hp98544.h"
|
||||
#include "bus/hp_dio/hp98603a.h"
|
||||
#include "bus/hp_dio/hp98603b.h"
|
||||
#include "bus/hp_dio/hp98644.h"
|
||||
#include "bus/hp_dio/human_interface.h"
|
||||
|
||||
#include "screen.h"
|
||||
#include "softlist_dev.h"
|
||||
@ -324,16 +317,6 @@ WRITE32_MEMBER(hp9k3xx_state::buserror_w)
|
||||
m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
|
||||
}
|
||||
|
||||
static void dio16_cards(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("98543", HPDIO_98543); /* 98543 Medium Resolution Color Card */
|
||||
device.option_add("98544", HPDIO_98544); /* 98544 High Resolution Monochrome Card */
|
||||
device.option_add("98603a", HPDIO_98603A); /* 98603A ROM BASIC (4.0) */
|
||||
device.option_add("98603b", HPDIO_98603B); /* 98603B ROM BASIC (5.1) */
|
||||
device.option_add("98644", HPDIO_98644); /* 98644 Async serial interface */
|
||||
device.option_add("human_interface", HPDIO_HUMAN_INTERFACE);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(hp9k3xx_state::hp9k300)
|
||||
ptm6840_device &ptm(PTM6840(config, PTM6840_TAG, 250000)); // from oscillator module next to the 6840
|
||||
ptm.set_external_clocks(250000.0f, 0.0f, 250000.0f);
|
||||
@ -387,7 +370,8 @@ MACHINE_CONFIG_START(hp9k3xx_state::hp9k320)
|
||||
DIO32_SLOT(config, "sl1", 0, "diobus", dio16_cards, "98544", false);
|
||||
DIO32_SLOT(config, "sl2", 0, "diobus", dio16_cards, "98603b", false);
|
||||
DIO32_SLOT(config, "sl3", 0, "diobus", dio16_cards, "98644", false);
|
||||
DIO32_SLOT(config, "sl4", 0, "diobus", dio16_cards, nullptr, false);
|
||||
DIO32_SLOT(config, "sl4", 0, "diobus", dio32_cards, "98620", false);
|
||||
DIO32_SLOT(config, "sl5", 0, "diobus", dio16_cards, nullptr, false);
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_START(hp9k3xx_state::hp9k330)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user