Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-23 00:39:36 +03:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

Merge branch 'master' of https://github.com/mamedev/mame

Browse Source
This commit is contained in:
Robbbert 2017-11-09 17:07:46 +11:00
commit ad477488f1
2 changed files with 45 additions and 73 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

103
src/mame/drivers/gladiatr.cpp
View File

@ -273,7 +273,6 @@ WRITE_LINE_MEMBER(gladiatr_state_base::flipscreen_w)
flip_screen_set(state);
}
#if 1
/* !!!!! patch to IRQ timing for 2nd CPU !!!!! */
WRITE8_MEMBER(gladiatr_state::gladiatr_irq_patch_w)
@ -441,8 +440,6 @@ inline void ppking_state::mcu_input_check()
}
}
/**/
READ8_MEMBER(ppking_state::ppking_qx0_r)
{
// status
@ -464,26 +461,23 @@ READ8_MEMBER(ppking_state::ppking_qx0_r)
else
{
m_mcu[0].rxd = ((ioport("SYSTEM")->read()) & 0x9f);
}
//printf("%02x\n",m_mcu[0].rxd);
}
break;
}
case 2:
{
//m_mcu[0].packet_type^=1;
//if(m_mcu[0].packet_type & 1)
//{
// m_mcu[0].rxd = ((ioport("P2")->read()) & 0x9f);
//}
//else
m_mcu[0].packet_type^=1;
if(m_mcu[0].packet_type & 1)
{
// Host wants this from time to time, otherwise huge input lag happens periodically (protection?)
m_mcu[0].rxd = 0x17;
}
else
{
m_mcu[0].rxd = ((ioport("P1")->read()) & 0x3f);
m_mcu[0].rxd |= ((ioport("SYSTEM")->read()) & 0x80);
}
break;
@ -491,12 +485,13 @@ READ8_MEMBER(ppking_state::ppking_qx0_r)
case 3:
{
//m_mcu[0].packet_type^=1;
//if(m_mcu[0].packet_type & 1)
//{
// m_mcu[0].rxd = ((ioport("P2")->read()) & 0x9f);
//}
//else
m_mcu[0].packet_type^=1;
if(m_mcu[0].packet_type & 1)
{
// same as above for player 2
m_mcu[0].rxd = 0x17;
}
else
{
m_mcu[0].rxd = ((ioport("P2")->read()) & 0x3f);
m_mcu[0].rxd |= ((ioport("SYSTEM")->read()) & 0x80);
@ -539,21 +534,14 @@ WRITE8_MEMBER(ppking_state::ppking_qx0_w)
*/
m_mcu[0].rxd = 0x40;
m_mcu[0].rst = 0;
//m_mcu[0].state = 0;
break;
case 2:
m_mcu[0].rxd = 0;
//m_mcu[0].rxd = ((ioport("DSW2")->read() & 0x1f) << 2);
//m_mcu[0].rxd|= mcu_parity_check() == true ? 0 : 1;
m_mcu[0].rxd = ((ioport("DSW2")->read() & 0x1f) << 2);
m_mcu[0].rst = 0;
//m_mcu[0].state = 0;
break;
case 3:
mcu_input_check();
//m_mcu[0].rxd = (ioport("DSW1")->read() & 0x1f) << 2;
m_mcu[0].rst = 1;
//m_mcu[0].txd = 0;
//m_mcu[0].state = 0;
break;
default:
@ -613,8 +601,8 @@ READ8_MEMBER(ppking_state::ppking_qx3_r)
return machine().rand()&0xf;
}
// a mirror of any of above?
READ8_MEMBER(ppking_state::ppking_qxunk_r)
// serial communication with another board
READ8_MEMBER(ppking_state::ppking_qxcomu_r)
{
if(offset == 1)
return 1;
@ -622,16 +610,13 @@ READ8_MEMBER(ppking_state::ppking_qxunk_r)
return 0;
}
WRITE8_MEMBER(ppking_state::ppking_qxunk_w)
WRITE8_MEMBER(ppking_state::ppking_qxcomu_w)
{
// ...
}
MACHINE_RESET_MEMBER(ppking_state, ppking)
{
m_data1 = m_data2 = 0;
m_flag1 = m_flag2 = 1;
{
// yes, it expects to read DSW1 without sending commands first ...
m_mcu[0].rxd = (ioport("DSW1")->read() & 0x1f) << 2;;
m_mcu[0].rst = 0;
@ -661,8 +646,8 @@ static ADDRESS_MAP_START( ppking_cpu1_io, AS_IO, 8, ppking_state )
AM_RANGE(0xc000, 0xc007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
// AM_RANGE(0xc004, 0xc004) AM_NOP // WRITE(ppking_irq_patch_w)
AM_RANGE(0xc09e, 0xc09f) AM_READ(ppking_qx0_r) AM_WRITE(ppking_qx0_w)
AM_RANGE(0xc0bf, 0xc0bf) AM_NOP
AM_RANGE(0xc0c0, 0xc0c1) AM_READ(ppking_qxunk_r) AM_WRITE(ppking_qxunk_w)
AM_RANGE(0xc0bf, 0xc0bf) AM_NOP // watchdog
AM_RANGE(0xc0c0, 0xc0c1) AM_READ(ppking_qxcomu_r) AM_WRITE(ppking_qxcomu_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ppking_cpu2_io, AS_IO, 8, ppking_state )
@ -765,28 +750,26 @@ static INPUT_PORTS_START( ppking )
PORT_DIPNAME( 0x08, 0x08, "VS Mode (link)" ) PORT_DIPLOCATION("SW1:4") // unemulated
PORT_DIPSETTING( 0x08, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x10, DEF_STR( Yes ) )
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
PORT_DIPSETTING( 0x10, DEF_STR( No ) )
PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
// cabinet (upright/cocktail) & coinage, not currently working (see above)
PORT_START("DSW2")
PORT_DIPNAME( 0x01, 0x00, "DSW2" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
// TODO: coinage not working (controlled by MCU)
PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:8,7")
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_5C ) )
PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:6,5")
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 5C_1C ) )
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x10, DEF_STR( Cocktail ) )
PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("DSW3")
@ -799,7 +782,7 @@ static INPUT_PORTS_START( ppking )
PORT_DIPNAME( 0x04, 0x00, "Backup Clear" ) PORT_DIPLOCATION("SW3:3")
PORT_DIPSETTING( 0x04, DEF_STR( Yes ) )
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW3:4" )
PORT_DIPUNUSED_DIPLOC( 0x08, 0x00, "SW3:4" )
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:5")
PORT_DIPSETTING( 0x10, DEF_STR( Yes ) )
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
@ -978,6 +961,7 @@ static MACHINE_CONFIG_START( ppking )
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(ppking_state, spritebuffer_w))
// MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gladiatr_state, spritebank_w))
// MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(MEMBANK("bank1"))
// MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(ppking_state, nmi_mask_w))
// MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) // shadowed by aforementioned hack
// Q6 used
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(ppking_state, flipscreen_w))
@ -1006,7 +990,7 @@ static MACHINE_CONFIG_START( ppking )
MCFG_SOUND_ADD("ymsnd", YM2203, XTAL_12MHz/8) /* verified on pcb */
MCFG_YM2203_IRQ_HANDLER(WRITELINE(gladiatr_state_base, ym_irq))
MCFG_AY8910_PORT_A_READ_CB(READ8(ppking_state, ppking_f1_r))
MCFG_AY8910_PORT_B_READ_CB(READ8(ppking_state, ppking_f1_r))
MCFG_AY8910_PORT_B_READ_CB(IOPORT("DSW3")) /* port B read */
MCFG_SOUND_ROUTE(0, "mono", 0.60)
MCFG_SOUND_ROUTE(1, "mono", 0.60)
MCFG_SOUND_ROUTE(2, "mono", 0.60)
@ -1482,9 +1466,6 @@ DRIVER_INIT_MEMBER(ppking_state, ppking)
rom[0x845] = 0x00;
rom[0x846] = 0x00;
rom[0x847] = 0x00;
save_item(NAME(m_data1));
save_item(NAME(m_data2));
}

15
src/mame/includes/gladiatr.h
View File

@ -160,10 +160,6 @@ public:
: gladiatr_state_base(mconfig, type, tag)
, m_nvram(*this, "nvram")
, m_soundlatch2(*this, "soundlatch2")
, m_data1(0)
, m_data2(0)
, m_flag1(0)
, m_flag2(0)
{
}
@ -176,12 +172,12 @@ public:
DECLARE_READ8_MEMBER(ppking_qx3_r);
DECLARE_READ8_MEMBER(ppking_qx0_r);
DECLARE_READ8_MEMBER(ppking_qx1_r);
DECLARE_READ8_MEMBER(ppking_qxunk_r);
DECLARE_WRITE8_MEMBER(ppking_qxunk_w);
DECLARE_READ8_MEMBER(ppking_qxcomu_r);
DECLARE_WRITE8_MEMBER(ppking_qxcomu_w);
DECLARE_WRITE8_MEMBER(ppking_video_registers_w);
DECLARE_WRITE8_MEMBER(ppking_adpcm_w);
DECLARE_WRITE8_MEMBER(cpu2_irq_ack_w);
DECLARE_DRIVER_INIT(ppking);
DECLARE_MACHINE_RESET(ppking);
@ -192,11 +188,6 @@ public:
private:
required_shared_ptr<uint8_t> m_nvram;
required_device<generic_latch_8_device> m_soundlatch2;
u8 m_data1;
u8 m_data2;
u8 m_flag1;
u8 m_flag2;
struct
{