mirror of
https://github.com/holub/mame
synced 2025-07-04 09:28:51 +03:00
ncr53c90: More updates
- Eliminate unnecessary command length counter - In 16-bit bus mode, only enable DRQ for transferring one byte to memory when TC0 is set and config flag to save it is not - Restrict 24-bit extension of transfer counter and config4 & ID registers to NCR53CF94/96
This commit is contained in:
AJR
parent
f7e62a2f2b
commit
ad701c0caf
@ -104,8 +104,6 @@ void ncr53c94_device::map(address_map &map)
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ncr53c90a_device::map(map);
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map(0xc, 0xc).rw(FUNC(ncr53c94_device::conf3_r), FUNC(ncr53c94_device::conf3_w));
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map(0xd, 0xd).rw(FUNC(ncr53c94_device::conf4_r), FUNC(ncr53c94_device::conf4_w));
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map(0xe, 0xe).rw(FUNC(ncr53c94_device::tcounter_hi2_r), FUNC(ncr53c94_device::tcount_hi2_w));
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map(0xf, 0xf).w(FUNC(ncr53c94_device::fifo_align_w));
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}
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@ -113,10 +111,6 @@ uint8_t ncr53c94_device::read(offs_t offset)
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{
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if (offset == 12)
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return conf3_r();
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else if (offset == 13)
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return conf4_r();
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else if (offset == 14)
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return tcounter_hi2_r();
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return ncr53c90a_device::read(offset);
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}
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@ -124,21 +118,44 @@ void ncr53c94_device::write(offs_t offset, uint8_t data)
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{
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if (offset == 12)
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conf3_w(data);
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else if (offset == 13)
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conf4_w(data);
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else if (offset == 14)
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tcount_hi2_w(data);
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else if (offset == 15)
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fifo_align_w(data);
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else
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ncr53c90a_device::write(offset, data);
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}
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void ncr53cf94_device::map(address_map &map)
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{
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ncr53c94_device::map(map);
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map(0xd, 0xd).rw(FUNC(ncr53cf94_device::conf4_r), FUNC(ncr53cf94_device::conf4_w));
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map(0xe, 0xe).rw(FUNC(ncr53cf94_device::tcounter_hi2_r), FUNC(ncr53cf94_device::tcount_hi2_w));
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}
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uint8_t ncr53cf94_device::read(offs_t offset)
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{
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if (offset == 13)
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return conf4_r();
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else if (offset == 14)
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return tcounter_hi2_r();
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return ncr53c94_device::read(offset);
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}
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void ncr53cf94_device::write(offs_t offset, uint8_t data)
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{
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if (offset == 13)
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conf4_w(data);
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else if (offset == 14)
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tcount_hi2_w(data);
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else
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ncr53c94_device::write(offset, data);
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}
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ncr53c90_device::ncr53c90_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
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: nscsi_device(mconfig, type, tag, owner, clock)
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, nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF)
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, tm(nullptr), config(0), status(0), istatus(0), clock_conv(0), sync_offset(0), sync_period(0), bus_id(0)
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, select_timeout(0), seq(0), tcount(0), tcounter(0), tcounter_mask(0xffff), mode(0), fifo_pos(0), command_pos(0), state(0), xfr_phase(0), command_length(0), dma_dir(0), irq(false), drq(false), test_mode(false), stepping(0)
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, select_timeout(0), seq(0), tcount(0), tcounter(0), tcounter_mask(0xffff), mode(0), fifo_pos(0), command_pos(0), state(0), xfr_phase(0), dma_dir(0), irq(false), drq(false), test_mode(false), stepping(0)
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, m_irq_handler(*this)
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, m_drq_handler(*this)
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{
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@ -168,9 +185,6 @@ ncr53c94_device::ncr53c94_device(const machine_config &mconfig, const char *tag,
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ncr53c94_device::ncr53c94_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
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: ncr53c90a_device(mconfig, type, tag, owner, clock)
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, config3(0)
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, config4(0)
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, family_id(0x02)
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, revision_level(0x02)
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, m_busmd(BUSMD_0)
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{
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}
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@ -180,13 +194,21 @@ ncr53c96_device::ncr53c96_device(const machine_config &mconfig, const char *tag,
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{
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}
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ncr53cf94_device::ncr53cf94_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
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: ncr53c94_device(mconfig, type, tag, owner, clock)
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, config4(0)
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, family_id(0x02)
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, revision_level(0x02)
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{
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}
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ncr53cf94_device::ncr53cf94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: ncr53c94_device(mconfig, NCR53CF94, tag, owner, clock)
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: ncr53cf94_device(mconfig, NCR53CF94, tag, owner, clock)
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{
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}
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ncr53cf96_device::ncr53cf96_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: ncr53c94_device(mconfig, NCR53CF96, tag, owner, clock)
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: ncr53cf94_device(mconfig, NCR53CF96, tag, owner, clock)
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{
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}
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@ -213,7 +235,6 @@ void ncr53c90_device::device_start()
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save_item(NAME(command_pos));
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save_item(NAME(state));
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save_item(NAME(xfr_phase));
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save_item(NAME(command_length));
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save_item(NAME(dma_dir));
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save_item(NAME(irq));
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save_item(NAME(drq));
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@ -239,7 +260,6 @@ void ncr53c90_device::device_reset()
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seq = 0;
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config &= 7;
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status = 0;
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command_length = 0;
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istatus = 0;
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irq = false;
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m_irq_handler(irq);
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@ -263,7 +283,6 @@ void ncr53c90_device::reset_disconnect()
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scsi_bus->ctrl_w(scsi_refid, 0, ~S_RST);
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command_pos = 0;
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command_length = 0;
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memset(command, 0, sizeof(command));
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mode = MODE_D;
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}
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@ -458,7 +477,7 @@ void ncr53c90_device::step(bool timeout)
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// in async mode data in phase in initiator mode, tcount is decremented on ACKO, not DACK
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if ((mode == MODE_I) && (sync_offset == 0) && ((ctrl & S_PHASE_MASK) == S_PHASE_DATA_IN))
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{
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LOGMASKED(LOG_FIFO, "decrement_tcounter data in async, phase %02x\n", (ctrl & S_PHASE_MASK));
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LOGMASKED(LOG_FIFO, "decrement_tcounter data in async, phase %02x (tcounter=%d)\n", (ctrl & S_PHASE_MASK), tcounter);
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decrement_tcounter();
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check_drq();
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}
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@ -518,8 +537,6 @@ void ncr53c90_device::step(bool timeout)
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break;
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case DISC_SEL_ATN_SEND_BYTE:
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if(command_length)
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command_length--;
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if(c == CD_SELECT_ATN_STOP) {
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seq = 2;
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function_bus_complete();
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@ -533,7 +550,7 @@ void ncr53c90_device::step(bool timeout)
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if(!(ctrl & S_REQ))
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break;
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if((ctrl & S_PHASE_MASK) != S_PHASE_COMMAND) {
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if(dma_command ? (status & S_TC0) && !command_length : !fifo_pos)
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if((!dma_command || (status & S_TC0)) && !fifo_pos)
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seq = 4;
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else
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seq = 2;
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@ -550,13 +567,8 @@ void ncr53c90_device::step(bool timeout)
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break;
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case DISC_SEL_SEND_BYTE:
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if(!dma_command && !fifo_pos)
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if((!dma_command || (status & S_TC0)) && !fifo_pos)
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seq = 4;
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else if(dma_command && (status & S_TC0) && command_length) {
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command_length--;
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if(!command_length)
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seq = 4;
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}
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state = DISC_SEL_WAIT_REQ;
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step(false);
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@ -692,8 +704,6 @@ void ncr53c90_device::step(bool timeout)
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command_pos = 0;
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bus_complete();
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} else {
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if(!fifo_pos)
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break;
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state = INIT_XFR_SEND_PAD;
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send_byte();
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}
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@ -743,14 +753,12 @@ void ncr53c90_device::step(bool timeout)
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void ncr53c90_device::send_byte()
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{
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if(!fifo_pos)
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fatalerror("ncr53c90_device::send_byte - !fifo_pos\n");
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state = (state & STATE_MASK) | (SEND_WAIT_SETTLE << SUB_SHIFT);
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if((state & STATE_MASK) != INIT_XFR_SEND_PAD /*&&
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((state & STATE_MASK) != DISC_SEL_SEND_BYTE ||
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!(status & S_TC0) || command_length)*/)
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if((state & STATE_MASK) != INIT_XFR_SEND_PAD) {
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if(!fifo_pos)
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fatalerror("ncr53c90_device::send_byte - !fifo_pos\n");
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scsi_bus->data_w(scsi_refid, fifo_pop());
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}
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else
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scsi_bus->data_w(scsi_refid, 0);
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@ -1243,11 +1251,8 @@ void ncr53c90_device::decrement_tcounter(int count)
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else
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tcounter = 0;
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if (tcounter == 0 && !(status & S_TC0))
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{
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if (tcounter == 0)
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status |= S_TC0;
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command_length = fifo_pos;
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}
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check_drq();
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}
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@ -1312,10 +1317,8 @@ bool ncr53c90a_device::check_valid_command(uint8_t cmd)
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void ncr53c94_device::device_start()
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{
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save_item(NAME(config3));
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save_item(NAME(config4));
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config3 = 0;
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config4 = 0;
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ncr53c90a_device::device_start();
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}
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@ -1323,7 +1326,6 @@ void ncr53c94_device::device_start()
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void ncr53c94_device::device_reset()
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{
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config3 = 0;
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config4 = 0;
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ncr53c90a_device::device_reset();
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}
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@ -1387,9 +1389,9 @@ void ncr53c94_device::check_drq()
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case DMA_IN: // device to memory (optionally save last remaining byte for processor)
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if (sync_offset == 0)
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drq_state = fifo_pos > (BIT(config3, 2) ? 1 : 0);
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drq_state = fifo_pos > (BIT(config3, 2) || !(status & S_TC0) ? 1 : 0);
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else
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drq_state = !(status & S_TC0) && fifo_pos > (BIT(config3, 2) ? 1 : 0);
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drq_state = !(status & S_TC0) && fifo_pos > 1;
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break;
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case DMA_OUT: // memory to device
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@ -1406,13 +1408,29 @@ void ncr53c94_device::check_drq()
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ncr53c90_device::check_drq();
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}
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void ncr53c94_device::conf2_w(uint8_t data)
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void ncr53cf94_device::device_start()
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{
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save_item(NAME(config4));
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config4 = 0;
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ncr53c94_device::device_start();
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}
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void ncr53cf94_device::device_reset()
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{
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config4 = 0;
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ncr53c94_device::device_reset();
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}
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void ncr53cf94_device::conf2_w(uint8_t data)
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{
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tcounter_mask = (data & S2FE) ? 0xffffff : 0xffff;
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config2 = data;
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}
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uint8_t ncr53c94_device::tcounter_hi2_r()
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uint8_t ncr53cf94_device::tcounter_hi2_r()
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{
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// tcounter is 24-bit when the features bit is set, otherwise it returns the ID
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if ((config2 & S2FE) == 0)
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@ -1422,7 +1440,7 @@ uint8_t ncr53c94_device::tcounter_hi2_r()
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return tcounter >> 16;
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}
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void ncr53c94_device::tcount_hi2_w(uint8_t data)
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void ncr53cf94_device::tcount_hi2_w(uint8_t data)
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{
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tcount = (tcount & ~uint32_t(0xff0000)) | (uint32_t(data) << 16);
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LOG("tcount_hi2_w %02x (%s)\n", data, machine().describe_context());
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@ -199,7 +199,6 @@ protected:
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uint32_t tcounter, tcounter_mask;
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int mode, fifo_pos, command_pos;
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int state, xfr_phase;
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int command_length;
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int dma_dir;
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@ -298,17 +297,9 @@ public:
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virtual void map(address_map &map) override;
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virtual void conf2_w(uint8_t data) override;
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uint8_t conf3_r() { return config3; }
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void conf3_w(uint8_t data) { config3 = data; }
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uint8_t conf4_r() { return config4; }
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void conf4_w(uint8_t data) { config4 = data; }
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uint8_t tcounter_hi2_r();
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void tcount_hi2_w(uint8_t data);
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void fifo_align_w(uint8_t data) { fifo_align = data; }
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virtual uint8_t read(offs_t offset) override;
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@ -336,10 +327,7 @@ protected:
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private:
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u8 config3;
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u8 config4;
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u8 fifo_align;
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u8 family_id;
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u8 revision_level;
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busmd_t m_busmd;
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};
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@ -353,9 +341,33 @@ class ncr53cf94_device : public ncr53c94_device
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{
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public:
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ncr53cf94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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virtual void map(address_map &map) override;
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virtual void conf2_w(uint8_t data) override;
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uint8_t conf4_r() { return config4; }
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void conf4_w(uint8_t data) { config4 = data; }
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uint8_t tcounter_hi2_r();
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void tcount_hi2_w(uint8_t data);
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virtual uint8_t read(offs_t offset) override;
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virtual void write(offs_t offset, uint8_t data) override;
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protected:
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ncr53cf94_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
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virtual void device_start() override;
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virtual void device_reset() override;
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private:
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u8 config4;
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u8 family_id;
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u8 revision_level;
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};
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class ncr53cf96_device : public ncr53c94_device
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class ncr53cf96_device : public ncr53cf94_device
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{
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public:
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ncr53cf96_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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