also untangle the skeleton 68340. where the code ends up is TBD.

the actual core type of the 68340 is CPU32, so it is now derived from that.
This commit is contained in:
David Haywood 2013-07-05 14:32:16 +00:00
parent 1300de18e0
commit ada9617e4d
26 changed files with 333 additions and 232 deletions

18
.gitattributes vendored
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@ -629,14 +629,6 @@ src/emu/cpu/m6800/6800ops.c svneol=native#text/plain
src/emu/cpu/m6800/6800tbl.c svneol=native#text/plain
src/emu/cpu/m6800/m6800.c svneol=native#text/plain
src/emu/cpu/m6800/m6800.h svneol=native#text/plain
src/emu/cpu/m68000/68340dma.c svneol=native#text/plain
src/emu/cpu/m68000/68340dma.h svneol=native#text/plain
src/emu/cpu/m68000/68340ser.c svneol=native#text/plain
src/emu/cpu/m68000/68340ser.h svneol=native#text/plain
src/emu/cpu/m68000/68340sim.c svneol=native#text/plain
src/emu/cpu/m68000/68340sim.h svneol=native#text/plain
src/emu/cpu/m68000/68340tmu.c svneol=native#text/plain
src/emu/cpu/m68000/68340tmu.h svneol=native#text/plain
src/emu/cpu/m68000/m68000.h svneol=native#text/plain
src/emu/cpu/m68000/m68k_in.c svneol=native#text/plain
src/emu/cpu/m68000/m68kcpu.c svneol=native#text/plain
@ -1154,6 +1146,16 @@ src/emu/machine/68307sim.c svneol=native#text/plain
src/emu/machine/68307sim.h svneol=native#text/plain
src/emu/machine/68307tmu.c svneol=native#text/plain
src/emu/machine/68307tmu.h svneol=native#text/plain
src/emu/machine/68340.c svneol=native#text/plain
src/emu/machine/68340.h svneol=native#text/plain
src/emu/machine/68340dma.c svneol=native#text/plain
src/emu/machine/68340dma.h svneol=native#text/plain
src/emu/machine/68340ser.c svneol=native#text/plain
src/emu/machine/68340ser.h svneol=native#text/plain
src/emu/machine/68340sim.c svneol=native#text/plain
src/emu/machine/68340sim.h svneol=native#text/plain
src/emu/machine/68340tmu.c svneol=native#text/plain
src/emu/machine/68340tmu.h svneol=native#text/plain
src/emu/machine/6840ptm.c svneol=native#text/plain
src/emu/machine/6840ptm.h svneol=native#text/plain
src/emu/machine/6850acia.c svneol=native#text/plain

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@ -1354,10 +1354,6 @@ $(CPUOBJ)/mc68hc11/mc68hc11.o: $(CPUSRC)/mc68hc11/mc68hc11.c \
ifneq ($(filter M680X0,$(CPUS)),)
OBJDIRS += $(CPUOBJ)/m68000
CPUOBJS += $(CPUOBJ)/m68000/m68kcpu.o $(CPUOBJ)/m68000/m68kops.o \
$(CPUOBJ)/m68000/68340sim.o \
$(CPUOBJ)/m68000/68340dma.o \
$(CPUOBJ)/m68000/68340ser.o \
$(CPUOBJ)/m68000/68340tmu.o \
DASMOBJS += $(CPUOBJ)/m68000/m68kdasm.o
ifndef M68KMAKE
@ -1396,12 +1392,7 @@ $(CPUOBJ)/m68000/m68kcpu.o: $(CPUOBJ)/m68000/m68kops.c \
# m68kcpu.h now includes m68kops.h; m68kops.h won't exist until m68kops.c has been made
$(CPUSRC)/m68000/m68kcpu.h: $(CPUOBJ)/m68000/m68kops.c
$(CPUSRC)/m68000/68340sim.c: $(CPUOBJ)/m68000/m68kops.c
$(CPUSRC)/m68000/68340dma.c: $(CPUOBJ)/m68000/m68kops.c
$(CPUSRC)/m68000/68340ser.c: $(CPUOBJ)/m68000/m68kops.c
$(CPUSRC)/m68000/68340tmu.c: $(CPUOBJ)/m68000/m68kops.c
#-------------------------------------------------

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@ -5,10 +5,6 @@
#include "68340sim.h"
#include "68340dma.h"
#include "68340ser.h"
#include "68340tmu.h"
#include "../../../lib/softfloat/milieu.h"
#include "../../../lib/softfloat/softfloat.h"
@ -64,7 +60,7 @@ enum
M68K_CPU_TYPE_68LC040,
M68K_CPU_TYPE_68040,
M68K_CPU_TYPE_SCC68070,
M68K_CPU_TYPE_68340,
M68K_CPU_TYPE_FSCPU32,
M68K_CPU_TYPE_COLDFIRE
};
@ -130,7 +126,6 @@ unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, const unsigne
class m68000_base_device;
extern UINT16 m68340_get_cs(m68000_base_device *device, offs_t address);
typedef int (*instruction_hook_t)(m68000_base_device *device, offs_t curpc);
@ -361,32 +356,6 @@ public:
UINT16 ic_data[M68K_IC_SIZE]; /* instruction cache content data */
int m68340_currentcs;
/* 68340 peripheral modules */
m68340_sim* m68340SIM;
m68340_dma* m68340DMA;
m68340_serial* m68340SERIAL;
m68340_timer* m68340TIMER;
UINT32 m68340_base;
READ32_MEMBER( m68340_internal_base_r );
WRITE32_MEMBER( m68340_internal_base_w );
READ32_MEMBER( m68340_internal_dma_r );
WRITE32_MEMBER( m68340_internal_dma_w );
READ32_HANDLER( m68340_internal_serial_r );
WRITE32_MEMBER( m68340_internal_serial_w );
READ16_MEMBER( m68340_internal_sim_r );
READ8_MEMBER( m68340_internal_sim_ports_r );
READ32_MEMBER( m68340_internal_sim_cs_r );
WRITE16_MEMBER( m68340_internal_sim_w );
WRITE8_MEMBER( m68340_internal_sim_ports_w );
WRITE32_MEMBER( m68340_internal_sim_cs_w );
READ32_MEMBER( m68340_internal_timer_r );
WRITE32_MEMBER( m68340_internal_timer_w );
/* 68307 / 68340 internal address map */
@ -412,7 +381,7 @@ public:
void init_cpu_m68040(void);
void init_cpu_m68ec040(void);
void init_cpu_m68lc040(void);
void init_cpu_m68340(void);
void init_cpu_fscpu32(void);
void init_cpu_scc68070(void);
void init_cpu_coldfire(void);
@ -746,12 +715,15 @@ protected:
class m68340_device : public m68000_base_device
class fscpu32_device : public m68000_base_device
{
public:
// construction/destruction
m68340_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
fscpu32_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source);
virtual UINT32 disasm_min_opcode_bytes() const { return 2; };
virtual UINT32 disasm_max_opcode_bytes() const { return 20; };
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
@ -805,7 +777,7 @@ extern const device_type M68EC040;
extern const device_type M68LC040;
extern const device_type M68040;
extern const device_type SCC68070;
extern const device_type M68340;
extern const device_type FSCPU32;
extern const device_type MCF5206E;
extern void m68k_set_reset_callback(m68000_base_device *device, m68k_reset_func callback);

View File

@ -456,7 +456,7 @@ const UINT8 m68ki_exception_cycle_table[7][256] =
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
},
{ /* 68340 */
{ /* CPU32 */
4, /* 0: Reset - Initial Stack Pointer */
4, /* 1: Reset - Initial Program Counter */
50, /* 2: Bus Error (unemulated) */
@ -630,11 +630,11 @@ const UINT8 m68ki_ea_idx_cycle_table[64] =
CPU STATE DESCRIPTION
***************************************************************************/
#define MASK_ALL (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_68340 )
#define MASK_ALL (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_FSCPU32 )
#define MASK_24BIT_SPACE (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020)
#define MASK_32BIT_SPACE (CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_68340 )
#define MASK_010_OR_LATER (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_68340)
#define MASK_020_OR_LATER (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_68340)
#define MASK_32BIT_SPACE (CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_FSCPU32 )
#define MASK_010_OR_LATER (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 )
#define MASK_020_OR_LATER (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_FSCPU32 )
#define MASK_030_OR_LATER (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040)
#define MASK_040_OR_LATER (CPU_TYPE_040 | CPU_TYPE_EC040)
@ -1229,30 +1229,6 @@ void m68000_base_device::init16(address_space &space)
}
int m68340_calc_cs(m68000_base_device *m68k, offs_t address)
{
m68340_sim* sim = m68k->m68340SIM;
if ( !(sim->m_ba[0] & 1) ) return 1;
for (int i=0;i<4;i++)
{
if (sim->m_ba[i] & 1)
{
int mask = ((sim->m_am[i]&0xffffff00) | 0xff);
int base = sim->m_ba[i] & 0xffffff00;
int fcmask = (sim->m_am[i] & 0xf0);
int fcbase = (sim->m_ba[i] & 0xf0) & ~(sim->m_am[i] & 0xf0);
int fc = m68k->mmu_tmp_fc;
if ((address & ~mask) == base && ((fc << 4) & ~fcmask ) == fcbase ) return i+1;
}
}
return 0;
}
@ -1645,12 +1621,7 @@ UINT16 m68k_get_fc(m68000_base_device *device)
}
UINT16 m68340_get_cs(m68000_base_device *device, offs_t address)
{
device->m68340_currentcs = m68340_calc_cs(device, address);
return device->m68340_currentcs;
}
/****************************************************************************
* State definition
@ -1704,70 +1675,6 @@ void m68000_base_device::define_state(void)
}
/* 68340 specifics - MOVE */
READ32_MEMBER( m68000_base_device::m68340_internal_base_r )
{
m68000_base_device *m68k = this;
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_base_r %08x, (%08x)\n", pc, offset*4,mem_mask);
return m68k->m68340_base;
}
WRITE32_MEMBER( m68000_base_device::m68340_internal_base_w )
{
m68000_base_device *m68k = this;
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
// other conditions?
if (m68k->dfc==0x7)
{
// unmap old modules
if (m68k->m68340_base&1)
{
int base = m68k->m68340_base & 0xfffff000;
m68k->internal->unmap_readwrite(base + 0x000, base + 0x05f);
m68k->internal->unmap_readwrite(base + 0x600, base + 0x67f);
m68k->internal->unmap_readwrite(base + 0x700, base + 0x723);
m68k->internal->unmap_readwrite(base + 0x780, base + 0x7bf);
}
COMBINE_DATA(&m68k->m68340_base);
logerror("%08x m68340_internal_base_w %08x, %08x (%08x) (m68340_base write)\n", pc, offset*4,data,mem_mask);
// map new modules
if (m68k->m68340_base&1)
{
int base = m68k->m68340_base & 0xfffff000;
m68k->internal->install_readwrite_handler(base + 0x000, base + 0x03f, read16_delegate(FUNC(m68000_base_device::m68340_internal_sim_r),this), write16_delegate(FUNC(m68000_base_device::m68340_internal_sim_w),this),0xffffffff);
m68k->internal->install_readwrite_handler(base + 0x010, base + 0x01f, read8_delegate(FUNC(m68000_base_device::m68340_internal_sim_ports_r),this),write8_delegate(FUNC(m68000_base_device::m68340_internal_sim_ports_w),this),0xffffffff);
m68k->internal->install_readwrite_handler(base + 0x040, base + 0x05f, read32_delegate(FUNC(m68000_base_device::m68340_internal_sim_cs_r),this), write32_delegate(FUNC(m68000_base_device::m68340_internal_sim_cs_w),this));
m68k->internal->install_readwrite_handler(base + 0x600, base + 0x67f, read32_delegate(FUNC(m68000_base_device::m68340_internal_timer_r),this), write32_delegate(FUNC(m68000_base_device::m68340_internal_timer_w),this));
m68k->internal->install_readwrite_handler(base + 0x700, base + 0x723, read32_delegate(FUNC(m68000_base_device::m68340_internal_serial_r),this), write32_delegate(FUNC(m68000_base_device::m68340_internal_serial_w),this));
m68k->internal->install_readwrite_handler(base + 0x780, base + 0x7bf, read32_delegate(FUNC(m68000_base_device::m68340_internal_dma_r),this), write32_delegate(FUNC(m68000_base_device::m68340_internal_dma_w),this));
}
}
else
{
logerror("%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc, offset*4,data,mem_mask);
}
}
static ADDRESS_MAP_START( m68340_internal_map, AS_PROGRAM, 32, m68000_base_device )
AM_RANGE(0x0003ff00, 0x0003ff03) AM_READWRITE( m68340_internal_base_r, m68340_internal_base_w)
ADDRESS_MAP_END
/****************
CPU Inits
@ -2094,12 +2001,12 @@ void m68000_base_device::init_cpu_scc68070(void)
}
void m68000_base_device::init_cpu_m68340(void)
void m68000_base_device::init_cpu_fscpu32(void)
{
init_cpu_common();
cpu_type = CPU_TYPE_68340;
// dasm_type = M68K_CPU_TYPE_68340;
cpu_type = CPU_TYPE_FSCPU32;
// dasm_type = M68K_CPU_TYPE_FSCPU32;
init32(*program);
@ -2117,20 +2024,6 @@ void m68000_base_device::init_cpu_m68340(void)
cyc_shift = 0;
cyc_reset = 518;
m68340SIM = new m68340_sim();
m68340DMA = new m68340_dma();
m68340SERIAL = new m68340_serial();
m68340TIMER = new m68340_timer();
m68340SIM->reset();
m68340DMA->reset();
m68340SERIAL->reset();
m68340TIMER->reset();
m68340_base = 0x00000000;
internal = &this->space(AS_PROGRAM);
define_state();
}
@ -2240,9 +2133,9 @@ CPU_DISASSEMBLE( dasm_m68lc040 )
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_68LC040);
}
CPU_DISASSEMBLE( dasm_m68340 )
CPU_DISASSEMBLE( dasm_fscpu32 )
{
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_68340);
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_FSCPU32);
}
CPU_DISASSEMBLE( dasm_coldfire )
@ -2266,7 +2159,7 @@ offs_t m68ec040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
offs_t m68lc040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68lc040)(this, buffer, pc, oprom, opram, options); };
offs_t m68040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68040)(this, buffer, pc, oprom, opram, options); };
offs_t scc68070_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); };
offs_t m68340_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68340)(this, buffer, pc, oprom, opram, options); };
offs_t fscpu32_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_fscpu32)(this, buffer, pc, oprom, opram, options); };
offs_t mcf5206e_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_coldfire)(this, buffer, pc, oprom, opram, options); };
@ -2497,11 +2390,6 @@ void m68000_base_device::clear_all()
for (int i=0;i<M68K_IC_SIZE;i++)
ic_data[i] = 0;
m68340SIM = 0;
m68340DMA = 0;
m68340SERIAL = 0;
m68340TIMER = 0;
m68340_base = 0;
internal = 0;
instruction_hook = 0;
@ -2585,7 +2473,7 @@ const device_type M68EC040 = &device_creator<m68ec040_device>;
const device_type M68LC040 = &device_creator<m68lc040_device>;
const device_type M68040 = &device_creator<m68040_device>;
const device_type SCC68070 = &device_creator<scc68070_device>;
const device_type M68340 = &device_creator<m68340_device>;
const device_type FSCPU32 = &device_creator<fscpu32_device>;
const device_type MCF5206E = &device_creator<mcf5206e_device>;
m68000_device::m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
@ -2802,15 +2690,23 @@ void scc68070_device::device_start()
}
m68340_device::m68340_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68340", tag, owner, clock, M68340, 32,32, ADDRESS_MAP_NAME(m68340_internal_map), "m68340", __FILE__)
fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "Freescale CPU32 Core", tag, owner, clock, FSCPU32, 32,32, "fscpu32", __FILE__)
{
}
void m68340_device::device_start()
fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source)
: m68000_base_device(mconfig, name, tag, owner, clock, type, prg_data_width, prg_address_bits, internal_map, shortname, source)
{
init_cpu_m68340();
}
void fscpu32_device::device_start()
{
init_cpu_fscpu32();
}

View File

@ -84,7 +84,7 @@ class m68000_base_device;
#define CPU_TYPE_LC040 (0x00000100)
#define CPU_TYPE_040 (0x00000200)
#define CPU_TYPE_SCC070 (0x00000400)
#define CPU_TYPE_68340 (0x00000800)
#define CPU_TYPE_FSCPU32 (0x00000800)
#define CPU_TYPE_COLDFIRE (0x00001000)
/* Different ways to stop the CPU */
@ -237,16 +237,16 @@ class m68000_base_device;
#define CPU_TYPE_IS_030_PLUS(A) ((A) & (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040))
#define CPU_TYPE_IS_030_LESS(A) 1
#define CPU_TYPE_IS_020_PLUS(A) ((A) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_68340 | CPU_TYPE_COLDFIRE))
#define CPU_TYPE_IS_020_PLUS(A) ((A) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE))
#define CPU_TYPE_IS_020_LESS(A) 1
#define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_68340))
#define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_FSCPU32))
#define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_68340 | CPU_TYPE_COLDFIRE))
#define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE))
#define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020))
#define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010)
#define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_68340 | CPU_TYPE_COLDFIRE))
#define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE))
#define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010))
#define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000 || (A) == CPU_TYPE_008)

View File

@ -3821,7 +3821,7 @@ static unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned i
case M68K_CPU_TYPE_68LC040:
g_cpu_type = TYPE_68040;
break;
case M68K_CPU_TYPE_68340:
case M68K_CPU_TYPE_FSCPU32:
g_cpu_type = TYPE_68340;
break;
case M68K_CPU_TYPE_COLDFIRE:
@ -4018,7 +4018,7 @@ unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cp
case M68K_CPU_TYPE_68020:
case M68K_CPU_TYPE_68030:
case M68K_CPU_TYPE_68EC030:
case M68K_CPU_TYPE_68340:
case M68K_CPU_TYPE_FSCPU32:
case M68K_CPU_TYPE_COLDFIRE:
if(g_instruction_table[instruction] == d68040_cinv)
return 0;
@ -4101,7 +4101,7 @@ CPU_DISASSEMBLE( m68040 )
CPU_DISASSEMBLE( m68340 )
{
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_68340);
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_FSCPU32);
}
CPU_DISASSEMBLE( coldfire )

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@ -136,7 +136,7 @@ enum
CPU_TYPE_020, // 2
CPU_TYPE_030, // 3
CPU_TYPE_040, // 4
CPU_TYPE_68340, // 5
CPU_TYPE_FSCPU32, // 5
CPU_TYPE_COLDFIRE, // 6
NUM_CPUS
};

150
src/emu/machine/68340.c Normal file
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@ -0,0 +1,150 @@
/* 68340 */
#include "68340.h"
int m68340_calc_cs(m68340cpu_device *m68k, offs_t address)
{
m68340_sim* sim = m68k->m68340SIM;
if ( !(sim->m_ba[0] & 1) ) return 1;
for (int i=0;i<4;i++)
{
if (sim->m_ba[i] & 1)
{
int mask = ((sim->m_am[i]&0xffffff00) | 0xff);
int base = sim->m_ba[i] & 0xffffff00;
int fcmask = (sim->m_am[i] & 0xf0);
int fcbase = (sim->m_ba[i] & 0xf0) & ~(sim->m_am[i] & 0xf0);
int fc = m68k->mmu_tmp_fc;
if ((address & ~mask) == base && ((fc << 4) & ~fcmask ) == fcbase ) return i+1;
}
}
return 0;
}
UINT16 m68340_get_cs(m68340cpu_device *device, offs_t address)
{
device->m68340_currentcs = m68340_calc_cs(device, address);
return device->m68340_currentcs;
}
/* 68340 specifics - MOVE */
READ32_MEMBER( m68340cpu_device::m68340_internal_base_r )
{
m68340cpu_device *m68k = this;
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_base_r %08x, (%08x)\n", pc, offset*4,mem_mask);
return m68k->m68340_base;
}
WRITE32_MEMBER( m68340cpu_device::m68340_internal_base_w )
{
m68340cpu_device *m68k = this;
int pc = space.device().safe_pc();
logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
// other conditions?
if (m68k->dfc==0x7)
{
// unmap old modules
if (m68k->m68340_base&1)
{
int base = m68k->m68340_base & 0xfffff000;
m68k->internal->unmap_readwrite(base + 0x000, base + 0x05f);
m68k->internal->unmap_readwrite(base + 0x600, base + 0x67f);
m68k->internal->unmap_readwrite(base + 0x700, base + 0x723);
m68k->internal->unmap_readwrite(base + 0x780, base + 0x7bf);
}
COMBINE_DATA(&m68k->m68340_base);
logerror("%08x m68340_internal_base_w %08x, %08x (%08x) (m68340_base write)\n", pc, offset*4,data,mem_mask);
// map new modules
if (m68k->m68340_base&1)
{
int base = m68k->m68340_base & 0xfffff000;
m68k->internal->install_readwrite_handler(base + 0x000, base + 0x03f, read16_delegate(FUNC(m68340cpu_device::m68340_internal_sim_r),this), write16_delegate(FUNC(m68340cpu_device::m68340_internal_sim_w),this),0xffffffff);
m68k->internal->install_readwrite_handler(base + 0x010, base + 0x01f, read8_delegate(FUNC(m68340cpu_device::m68340_internal_sim_ports_r),this),write8_delegate(FUNC(m68340cpu_device::m68340_internal_sim_ports_w),this),0xffffffff);
m68k->internal->install_readwrite_handler(base + 0x040, base + 0x05f, read32_delegate(FUNC(m68340cpu_device::m68340_internal_sim_cs_r),this), write32_delegate(FUNC(m68340cpu_device::m68340_internal_sim_cs_w),this));
m68k->internal->install_readwrite_handler(base + 0x600, base + 0x67f, read32_delegate(FUNC(m68340cpu_device::m68340_internal_timer_r),this), write32_delegate(FUNC(m68340cpu_device::m68340_internal_timer_w),this));
m68k->internal->install_readwrite_handler(base + 0x700, base + 0x723, read32_delegate(FUNC(m68340cpu_device::m68340_internal_serial_r),this), write32_delegate(FUNC(m68340cpu_device::m68340_internal_serial_w),this));
m68k->internal->install_readwrite_handler(base + 0x780, base + 0x7bf, read32_delegate(FUNC(m68340cpu_device::m68340_internal_dma_r),this), write32_delegate(FUNC(m68340cpu_device::m68340_internal_dma_w),this));
}
}
else
{
logerror("%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc, offset*4,data,mem_mask);
}
}
static ADDRESS_MAP_START( m68340_internal_map, AS_PROGRAM, 32, m68340cpu_device )
AM_RANGE(0x0003ff00, 0x0003ff03) AM_READWRITE( m68340_internal_base_r, m68340_internal_base_w)
ADDRESS_MAP_END
m68340cpu_device::m68340cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: fscpu32_device(mconfig, "MC68340", tag, owner, clock, M68340, 32,32, ADDRESS_MAP_NAME(m68340_internal_map), "mc68340", __FILE__)
{
m68340SIM = 0;
m68340DMA = 0;
m68340SERIAL = 0;
m68340TIMER = 0;
m68340_base = 0;
}
void m68340cpu_device::device_reset()
{
fscpu32_device::device_reset();
}
void m68340cpu_device::device_start()
{
fscpu32_device::device_start();
m68340SIM = new m68340_sim();
m68340DMA = new m68340_dma();
m68340SERIAL = new m68340_serial();
m68340TIMER = new m68340_timer();
m68340SIM->reset();
m68340DMA->reset();
m68340SERIAL->reset();
m68340TIMER->reset();
m68340_base = 0x00000000;
internal = &this->space(AS_PROGRAM);
}

68
src/emu/machine/68340.h Normal file
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@ -0,0 +1,68 @@
/* 68340 */
#pragma once
#ifndef __M68340_H__
#define __M68340_H__
#include "emu.h"
#include "cpu/m68000/m68000.h"
#include "68340sim.h"
#include "68340dma.h"
#include "68340ser.h"
#include "68340tmu.h"
class m68340cpu_device : public fscpu32_device {
public:
m68340cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
int m68340_currentcs;
/* 68340 peripheral modules */
m68340_sim* m68340SIM;
m68340_dma* m68340DMA;
m68340_serial* m68340SERIAL;
m68340_timer* m68340TIMER;
UINT32 m68340_base;
READ32_MEMBER( m68340_internal_base_r );
WRITE32_MEMBER( m68340_internal_base_w );
READ32_MEMBER( m68340_internal_dma_r );
WRITE32_MEMBER( m68340_internal_dma_w );
READ32_HANDLER( m68340_internal_serial_r );
WRITE32_MEMBER( m68340_internal_serial_w );
READ16_MEMBER( m68340_internal_sim_r );
READ8_MEMBER( m68340_internal_sim_ports_r );
READ32_MEMBER( m68340_internal_sim_cs_r );
WRITE16_MEMBER( m68340_internal_sim_w );
WRITE8_MEMBER( m68340_internal_sim_ports_w );
WRITE32_MEMBER( m68340_internal_sim_cs_w );
READ32_MEMBER( m68340_internal_timer_r );
WRITE32_MEMBER( m68340_internal_timer_w );
protected:
virtual void device_start();
virtual void device_reset();
};
static const device_type M68340 = &device_creator<m68340cpu_device>;
extern UINT16 m68340_get_cs(m68340cpu_device *device, offs_t address);
#endif

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@ -1,12 +1,12 @@
/* 68340 DMA module */
#include "emu.h"
#include "m68kcpu.h"
#include "68340.h"
READ32_MEMBER( m68000_base_device::m68340_internal_dma_r )
READ32_MEMBER( m68340cpu_device::m68340_internal_dma_r )
{
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_dma* dma = m68k->m68340DMA;
assert(dma != NULL);
@ -19,9 +19,9 @@ READ32_MEMBER( m68000_base_device::m68340_internal_dma_r )
return 0x00000000;
}
WRITE32_MEMBER( m68000_base_device::m68340_internal_dma_w )
WRITE32_MEMBER( m68340cpu_device::m68340_internal_dma_w )
{
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_dma* dma = m68k->m68340DMA;
assert(dma != NULL);

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@ -1,4 +1,6 @@
#include "cpu/m68000/m68000.h"
class m68340_dma
{
public:

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@ -1,12 +1,12 @@
/* 68340 SERIAL module */
#include "emu.h"
#include "m68kcpu.h"
#include "68340.h"
READ32_HANDLER( m68000_base_device::m68340_internal_serial_r )
READ32_HANDLER( m68340cpu_device::m68340_internal_serial_r )
{
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_serial* serial = m68k->m68340SERIAL;
assert(serial != NULL);
@ -19,9 +19,9 @@ READ32_HANDLER( m68000_base_device::m68340_internal_serial_r )
return 0x00000000;
}
WRITE32_MEMBER( m68000_base_device::m68340_internal_serial_w )
WRITE32_MEMBER( m68340cpu_device::m68340_internal_serial_w )
{
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_serial* serial = m68k->m68340SERIAL;
assert(serial != NULL);

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@ -1,4 +1,6 @@
#include "cpu/m68000/m68000.h"
class m68340_serial
{
public:

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@ -1,12 +1,12 @@
/* 68340 SIM module */
#include "emu.h"
#include "m68kcpu.h"
#include "68340.h"
READ16_MEMBER( m68000_base_device::m68340_internal_sim_r )
READ16_MEMBER( m68340cpu_device::m68340_internal_sim_r )
{
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);
@ -54,10 +54,10 @@ READ16_MEMBER( m68000_base_device::m68340_internal_sim_r )
return 0x0000;
}
READ8_MEMBER( m68000_base_device::m68340_internal_sim_ports_r )
READ8_MEMBER( m68340cpu_device::m68340_internal_sim_ports_r )
{
offset += 0x10;
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);
@ -109,11 +109,11 @@ READ8_MEMBER( m68000_base_device::m68340_internal_sim_ports_r )
return 0x00;
}
READ32_MEMBER( m68000_base_device::m68340_internal_sim_cs_r )
READ32_MEMBER( m68340cpu_device::m68340_internal_sim_cs_r )
{
offset += m68340SIM_AM_CS0>>2;
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);
@ -141,9 +141,9 @@ READ32_MEMBER( m68000_base_device::m68340_internal_sim_cs_r )
return 0x00000000;
}
WRITE16_MEMBER( m68000_base_device::m68340_internal_sim_w )
WRITE16_MEMBER( m68340cpu_device::m68340_internal_sim_w )
{
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);
@ -190,10 +190,10 @@ WRITE16_MEMBER( m68000_base_device::m68340_internal_sim_w )
}
}
WRITE8_MEMBER( m68000_base_device::m68340_internal_sim_ports_w )
WRITE8_MEMBER( m68340cpu_device::m68340_internal_sim_ports_w )
{
offset += 0x10;
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);
@ -243,10 +243,10 @@ WRITE8_MEMBER( m68000_base_device::m68340_internal_sim_ports_w )
}
}
WRITE32_MEMBER( m68000_base_device::m68340_internal_sim_cs_w )
WRITE32_MEMBER( m68340cpu_device::m68340_internal_sim_cs_w )
{
offset += m68340SIM_AM_CS0>>2;
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_sim* sim = m68k->m68340SIM;
assert(sim != NULL);

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@ -1,3 +1,6 @@
#include "cpu/m68000/m68000.h"
#define m68340SIM_MCR (0x00)
// (0x02)
#define m68340SIM_SYNCR (0x04)

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@ -1,13 +1,12 @@
/* 68340 TIMER module */
#include "emu.h"
#include "m68kcpu.h"
#include "68340.h"
READ32_MEMBER( m68000_base_device::m68340_internal_timer_r )
READ32_MEMBER( m68340cpu_device::m68340_internal_timer_r )
{
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_timer* timer = m68k->m68340TIMER;
assert(timer != NULL);
@ -20,9 +19,9 @@ READ32_MEMBER( m68000_base_device::m68340_internal_timer_r )
return 0x00000000;
}
WRITE32_MEMBER( m68000_base_device::m68340_internal_timer_w )
WRITE32_MEMBER( m68340cpu_device::m68340_internal_timer_w )
{
m68000_base_device *m68k = this;
m68340cpu_device *m68k = this;
m68340_timer* timer = m68k->m68340TIMER;
assert(timer != NULL);

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@ -1,3 +1,4 @@
#include "cpu/m68000/m68000.h"
class m68340_timer

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@ -816,6 +816,19 @@ MACHINEOBJS += $(MACHINEOBJ)/68307ser.o
MACHINEOBJS += $(MACHINEOBJ)/68307tmu.o
endif
#-------------------------------------------------
#
#@src/emu/machine/68340.h,MACHINES += M68340
#-------------------------------------------------
ifneq ($(filter M68340,$(MACHINES)),)
MACHINEOBJS += $(MACHINEOBJ)/68340.o
MACHINEOBJS += $(MACHINEOBJ)/68340sim.o
MACHINEOBJS += $(MACHINEOBJ)/68340dma.o
MACHINEOBJS += $(MACHINEOBJ)/68340ser.o
MACHINEOBJS += $(MACHINEOBJ)/68340tmu.o
endif
#-------------------------------------------------
#
#@src/emu/machine/mcf5206e.h,MACHINES += MCF5206E

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@ -11,7 +11,7 @@ Platform also used by Lowen? (at least some of their sets use the same address l
*/
#include "emu.h"
#include "cpu/m68000/m68000.h"
#include "machine/68340.h"
@ -113,8 +113,8 @@ public:
}
// devices
required_device<m68000_base_device> m_maincpu;
optional_device<m68000_base_device> m_slavecpu;
required_device<m68340cpu_device> m_maincpu;
optional_device<m68340cpu_device> m_slavecpu;
DECLARE_DRIVER_INIT(astradec_sml);
DECLARE_DRIVER_INIT(astradec);

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@ -34,6 +34,7 @@
#include "emu.h"
#include "cpu/m68000/m68000.h"
#include "machine/68307.h"
#include "machine/68340.h"
#include "includes/bfm_sc45.h"
#include "bfm_sc4.lh"
#include "video/awpvid.h"

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@ -100,7 +100,7 @@ TEST.TXT - suggests the content of a prototype version, which was expanded to ma
#include "emu.h"
#include "cpu/m68000/m68000.h"
#include "machine/68340.h"
#include "sound/ymz280b.h"
class bfm_swp_state : public driver_device
@ -127,7 +127,7 @@ public:
protected:
// devices
required_device<m68000_base_device> m_maincpu;
required_device<m68340cpu_device> m_maincpu;
virtual void machine_start();
};

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@ -7,7 +7,7 @@
#include "emu.h"
#include "cpu/m68000/m68000.h"
#include "machine/68340.h"
class cupidon_state : public driver_device
{
@ -20,7 +20,7 @@ public:
protected:
// devices
required_device<cpu_device> m_maincpu;
required_device<m68340cpu_device> m_maincpu;
public:
DECLARE_DRIVER_INIT(cupidon);
};

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@ -39,8 +39,7 @@
#include "emu.h"
#include "cpu/m68000/m68000.h"
#include "machine/68340.h"
class mpu5_state : public driver_device
{
@ -58,7 +57,7 @@ public:
protected:
// devices
required_device<m68000_base_device> m_maincpu;
required_device<m68340cpu_device> m_maincpu;
virtual void machine_start();
};

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@ -176,7 +176,7 @@
*/
#include "emu.h"
#include "cpu/m68000/m68000.h"
#include "machine/68340.h"
class pluto5_state : public driver_device
{
@ -195,7 +195,7 @@ public:
protected:
// devices
required_device<m68000_base_device> m_maincpu;
required_device<m68340cpu_device> m_maincpu;
public:
DECLARE_DRIVER_INIT(hb);
virtual void machine_start();

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@ -10,6 +10,7 @@
#include "machine/68681.h"
#include "machine/nvram.h"
#include "machine/68307.h"
#include "machine/68340.h"
// common base class for things shared between sc4 and sc5
class bfm_sc45_state : public driver_device
@ -549,7 +550,7 @@ public:
DECLARE_MACHINE_START(adder4);
// devices
required_device<m68000_base_device> m_adder4cpu;
required_device<m68340cpu_device> m_adder4cpu;
};

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@ -409,6 +409,7 @@ MACHINES += MC6854
MACHINES += MC68901
MACHINES += MCCS1850
MACHINES += M68307
MACHINES += M68340
MACHINES += MCF5206E
MACHINES += MICROTOUCH
MACHINES += MM58274C