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devices/cpu: simplified some handlers (nw)

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This commit is contained in:
Ivan Vangelista 2020-03-31 18:58:53 +02:00
parent 68b4451635
commit ae008b65e0
45 changed files with 340 additions and 340 deletions
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4
src/devices/bus/dmv/k806.cpp
View File

@ -141,7 +141,7 @@ void dmv_k806_device::io_read(int ifsel, offs_t offset, uint8_t &data)
{
uint8_t jumpers = m_jumpers->read();
if (BIT(jumpers, ifsel) && ((!BIT(offset, 3) && BIT(jumpers, 5)) || (BIT(offset, 3) && BIT(jumpers, 6))))
data = m_mcu->upi41_master_r(machine().dummy_space(), offset & 1);
data = m_mcu->upi41_master_r(offset & 1);
}
void dmv_k806_device::io_write(int ifsel, offs_t offset, uint8_t data)
@ -149,7 +149,7 @@ void dmv_k806_device::io_write(int ifsel, offs_t offset, uint8_t data)
uint8_t jumpers = m_jumpers->read();
if (BIT(jumpers, ifsel) && ((!BIT(offset, 3) && BIT(jumpers, 5)) || (BIT(offset, 3) && BIT(jumpers, 6))))
{
m_mcu->upi41_master_w(machine().dummy_space(), offset & 1, data);
m_mcu->upi41_master_w(offset & 1, data);
out_int(CLEAR_LINE);
}
}

4
src/devices/bus/hp_dio/human_interface.cpp
View File

@ -115,8 +115,8 @@ human_interface_device::human_interface_device(const machine_config &mconfig, de
void human_interface_device::device_start()
{
program_space().install_readwrite_handler(0x420000, 0x420003, 0x0003, 0xfffc, 0,
read8_delegate(*m_iocpu, FUNC(upi41_cpu_device::upi41_master_r)),
write8_delegate(*m_iocpu, FUNC(upi41_cpu_device::upi41_master_w)), 0x00ff00ff);
read8sm_delegate(*m_iocpu, FUNC(upi41_cpu_device::upi41_master_r)),
write8sm_delegate(*m_iocpu, FUNC(upi41_cpu_device::upi41_master_w)), 0x00ff00ff);
program_space().install_readwrite_handler(0x470000, 0x47001f, 0x1f, 0xffe0, 0,
read8_delegate(*this, FUNC(human_interface_device::gpib_r)),

4
src/devices/cpu/avr8/avr8.cpp
View File

@ -2154,7 +2154,7 @@ void avr8_device::change_spsr(uint8_t data)
/*****************************************************************************/
WRITE8_MEMBER(avr8_device::regs_w)
void avr8_device::regs_w(offs_t offset, uint8_t data)
{
switch (offset)
{
@ -2755,7 +2755,7 @@ WRITE8_MEMBER(avr8_device::regs_w)
}
}
READ8_MEMBER(avr8_device::regs_r)
uint8_t avr8_device::regs_r(offs_t offset)
{
switch (offset)
{

4
src/devices/cpu/avr8/avr8.h
View File

@ -68,8 +68,8 @@ public:
virtual void update_interrupt(int source);
// register handling
DECLARE_WRITE8_MEMBER(regs_w);
DECLARE_READ8_MEMBER(regs_r);
void regs_w(offs_t offset, uint8_t data);
uint8_t regs_r(offs_t offset);
uint32_t m_shifted_pc;
protected:

2
src/devices/cpu/ccpu/ccpu.cpp
View File

@ -83,7 +83,7 @@ device_memory_interface::space_config_vector ccpu_cpu_device::memory_space_confi
};
}
READ8_MEMBER( ccpu_cpu_device::read_jmi )
uint8_t ccpu_cpu_device::read_jmi()
{
/* this routine is called when there is no external input */
/* and the JMI jumper is present */

2
src/devices/cpu/ccpu/ccpu.h
View File

@ -49,7 +49,7 @@ public:
template <typename... T> void set_vector_func(T &&... args) { m_vector_callback.set(std::forward<T>(args)...); }
DECLARE_READ8_MEMBER( read_jmi );
uint8_t read_jmi();
void wdt_timer_trigger();
protected:

4
src/devices/cpu/cop400/cop400.cpp
View File

@ -1384,14 +1384,14 @@ std::unique_ptr<util::disasm_interface> cop400_cpu_device::create_disassembler()
return std::make_unique<cop410_disassembler>();
}
READ8_MEMBER( cop400_cpu_device::microbus_rd )
uint8_t cop400_cpu_device::microbus_rd()
{
if (LOG_MICROBUS) logerror("%s %s MICROBUS RD %02x\n", machine().time().as_string(), machine().describe_context(), Q);
return Q;
}
WRITE8_MEMBER( cop400_cpu_device::microbus_wr )
void cop400_cpu_device::microbus_wr(uint8_t data)
{
if (LOG_MICROBUS) logerror("%s %s MICROBUS WR %02x\n", machine().time().as_string(), machine().describe_context(), data);

4
src/devices/cpu/cop400/cop400.h
View File

@ -113,8 +113,8 @@ public:
void set_cko(cop400_cko_bond cko) { m_cko = cko; }
void set_microbus(bool has_microbus) { m_has_microbus = has_microbus; }
DECLARE_READ8_MEMBER( microbus_rd );
DECLARE_WRITE8_MEMBER( microbus_wr );
uint8_t microbus_rd();
void microbus_wr(uint8_t data);
void data_128b(address_map &map);
void data_32b(address_map &map);

4
src/devices/cpu/e0c6200/e0c6s46.cpp
View File

@ -603,7 +603,7 @@ u32 e0c6s46_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, c
// internal I/O
//-------------------------------------------------
READ8_MEMBER(e0c6s46_device::io_r)
u8 e0c6s46_device::io_r(offs_t offset)
{
switch (offset)
{
@ -697,7 +697,7 @@ READ8_MEMBER(e0c6s46_device::io_r)
return 0;
}
WRITE8_MEMBER(e0c6s46_device::io_w)
void e0c6s46_device::io_w(offs_t offset, u8 data)
{
switch (offset)
{

4
src/devices/cpu/e0c6200/e0c6s46.h
View File

@ -62,8 +62,8 @@ public:
template <typename... T> void set_pixel_update_cb(T &&... args) { m_pixel_update_cb.set(std::forward<T>(args)...); }
DECLARE_READ8_MEMBER(io_r);
DECLARE_WRITE8_MEMBER(io_w);
u8 io_r(offs_t offset);
void io_w(offs_t offset, u8 data);
u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);

4
src/devices/cpu/es5510/es5510.cpp
View File

@ -355,7 +355,7 @@ static inline char * DESCRIBE_INSTR(char *s, uint64_t instr, uint32_t gpr, const
}
READ8_MEMBER(es5510_device::host_r)
uint8_t es5510_device::host_r(address_space &space, offs_t offset)
{
// printf("%06x: DSP read offset %04x (data is %04x)\n",pc(),offset,dsp_ram[offset]);
@ -402,7 +402,7 @@ READ8_MEMBER(es5510_device::host_r)
return 0x00;
}
WRITE8_MEMBER(es5510_device::host_w)
void es5510_device::host_w(offs_t offset, uint8_t data)
{
#if VERBOSE
static char buf[1024];

4
src/devices/cpu/es5510/es5510.h
View File

@ -21,8 +21,8 @@ public:
es5510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(host_r);
DECLARE_WRITE8_MEMBER(host_w);
uint8_t host_r(address_space &space, offs_t offset);
void host_w(offs_t offset, uint8_t data);
int16_t ser_r(int offset);
void ser_w(int offset, int16_t data);

12
src/devices/cpu/f2mc16/mb9061x.cpp
View File

@ -143,13 +143,13 @@ TIMER_CALLBACK_MEMBER(mb9061x_device::timer1_tick)
}
}
READ8_MEMBER(mb9061x_device::timer_r)
u8 mb9061x_device::timer_r(offs_t offset)
{
//printf("timer_r: offset %d = %02x\n", offset, m_timer_regs[offset]);
return m_timer_regs[offset];
}
WRITE8_MEMBER(mb9061x_device::timer_w)
void mb9061x_device::timer_w(offs_t offset, u8 data)
{
int timer = offset / 4;
int reg = offset % 4;
@ -317,12 +317,12 @@ enum
TBTC_TBC0 = 0x01 // rate select bit 0
};
READ8_MEMBER(mb9061x_device::tbtc_r)
u8 mb9061x_device::tbtc_r()
{
return m_tbtc;
}
WRITE8_MEMBER(mb9061x_device::tbtc_w)
void mb9061x_device::tbtc_w(u8 data)
{
static const float periods[4] = { 1.024f, 4.096f, 16.384f, 131.072f };
@ -357,12 +357,12 @@ TIMER_CALLBACK_MEMBER(mb9061x_device::tbtc_tick)
}
}
READ8_MEMBER(mb9061x_device::intc_r)
u8 mb9061x_device::intc_r(offs_t offset)
{
return m_intc[offset];
}
WRITE8_MEMBER(mb9061x_device::intc_w)
void mb9061x_device::intc_w(offs_t offset, u8 data)
{
//printf("INTC ICR %d to %02x\n", offset, data);
m_intc[offset] = data;

12
src/devices/cpu/f2mc16/mb9061x.h
View File

@ -48,20 +48,20 @@ protected:
private:
// TBC
TIMER_CALLBACK_MEMBER(tbtc_tick);
READ8_MEMBER(tbtc_r);
WRITE8_MEMBER(tbtc_w);
u8 tbtc_r();
void tbtc_w(u8 data);
// INTC
READ8_MEMBER(intc_r);
WRITE8_MEMBER(intc_w);
u8 intc_r(offs_t offset);
void intc_w(offs_t offset, u8 data);
void intc_trigger_irq(int icr, int vector);
void intc_clear_irq(int icr, int vector);
// TIMERS
TIMER_CALLBACK_MEMBER(timer0_tick);
TIMER_CALLBACK_MEMBER(timer1_tick);
READ8_MEMBER(timer_r);
WRITE8_MEMBER(timer_w);
u8 timer_r(offs_t offset);
void timer_w(offs_t offset, u8 data);
void recalc_timer(int tnum);
void tin_common(int timer, int base, int state);

40
src/devices/cpu/g65816/g65816.cpp
View File

@ -1092,29 +1092,29 @@ translation of Breath of Fire 2 to work. More weirdness: we might need to leave
8 CPU cycles for division at first, since using 16 produces bugs (see e.g.
Triforce pieces in Zelda 3 intro) */
WRITE8_MEMBER( _5a22_device::wrmpya_w )
void _5a22_device::wrmpya_w(uint8_t data)
{
m_wrmpya = data;
}
WRITE8_MEMBER( _5a22_device::wrmpyb_w )
void _5a22_device::wrmpyb_w(uint8_t data)
{
m_wrmpyb = data;
m_rdmpy = m_wrmpya * m_wrmpyb;
/* TODO: m_rddiv == 0? */
}
WRITE8_MEMBER( _5a22_device::wrdivl_w )
void _5a22_device::wrdivl_w(uint8_t data)
{
m_wrdiv = (data) | (m_wrdiv & 0xff00);
}
WRITE8_MEMBER( _5a22_device::wrdivh_w )
void _5a22_device::wrdivh_w(uint8_t data)
{
m_wrdiv = (data << 8) | (m_wrdiv & 0xff);
}
WRITE8_MEMBER( _5a22_device::wrdvdd_w )
void _5a22_device::wrdvdd_w(uint8_t data)
{
uint16_t quotient, remainder;
@ -1127,27 +1127,27 @@ WRITE8_MEMBER( _5a22_device::wrdvdd_w )
m_rdmpy = remainder;
}
WRITE8_MEMBER( _5a22_device::memsel_w )
void _5a22_device::memsel_w(uint8_t data)
{
m_fastROM = data & 1;
}
READ8_MEMBER( _5a22_device::rddivl_r )
uint8_t _5a22_device::rddivl_r()
{
return m_rddiv & 0xff;
}
READ8_MEMBER( _5a22_device::rddivh_r )
uint8_t _5a22_device::rddivh_r()
{
return m_rddiv >> 8;
}
READ8_MEMBER( _5a22_device::rdmpyl_r )
uint8_t _5a22_device::rdmpyl_r()
{
return m_rdmpy & 0xff;
}
READ8_MEMBER( _5a22_device::rdmpyh_r )
uint8_t _5a22_device::rdmpyh_r()
{
return m_rdmpy >> 8;
}
@ -1155,16 +1155,16 @@ READ8_MEMBER( _5a22_device::rdmpyh_r )
void _5a22_device::set_5a22_map()
{
space(AS_PROGRAM).install_write_handler(0x4202, 0x4202, 0, 0xbf0000, 0, write8_delegate(*this, FUNC(_5a22_device::wrmpya_w)));
space(AS_PROGRAM).install_write_handler(0x4203, 0x4203, 0, 0xbf0000, 0, write8_delegate(*this, FUNC(_5a22_device::wrmpyb_w)));
space(AS_PROGRAM).install_write_handler(0x4204, 0x4204, 0, 0xbf0000, 0, write8_delegate(*this, FUNC(_5a22_device::wrdivl_w)));
space(AS_PROGRAM).install_write_handler(0x4205, 0x4205, 0, 0xbf0000, 0, write8_delegate(*this, FUNC(_5a22_device::wrdivh_w)));
space(AS_PROGRAM).install_write_handler(0x4206, 0x4206, 0, 0xbf0000, 0, write8_delegate(*this, FUNC(_5a22_device::wrdvdd_w)));
space(AS_PROGRAM).install_write_handler(0x4202, 0x4202, 0, 0xbf0000, 0, write8smo_delegate(*this, FUNC(_5a22_device::wrmpya_w)));
space(AS_PROGRAM).install_write_handler(0x4203, 0x4203, 0, 0xbf0000, 0, write8smo_delegate(*this, FUNC(_5a22_device::wrmpyb_w)));
space(AS_PROGRAM).install_write_handler(0x4204, 0x4204, 0, 0xbf0000, 0, write8smo_delegate(*this, FUNC(_5a22_device::wrdivl_w)));
space(AS_PROGRAM).install_write_handler(0x4205, 0x4205, 0, 0xbf0000, 0, write8smo_delegate(*this, FUNC(_5a22_device::wrdivh_w)));
space(AS_PROGRAM).install_write_handler(0x4206, 0x4206, 0, 0xbf0000, 0, write8smo_delegate(*this, FUNC(_5a22_device::wrdvdd_w)));
space(AS_PROGRAM).install_write_handler(0x420d, 0x420d, 0, 0xbf0000, 0, write8_delegate(*this, FUNC(_5a22_device::memsel_w)));
space(AS_PROGRAM).install_write_handler(0x420d, 0x420d, 0, 0xbf0000, 0, write8smo_delegate(*this, FUNC(_5a22_device::memsel_w)));
space(AS_PROGRAM).install_read_handler(0x4214, 0x4214, 0, 0xbf0000, 0, read8_delegate(*this, FUNC(_5a22_device::rddivl_r)));
space(AS_PROGRAM).install_read_handler(0x4215, 0x4215, 0, 0xbf0000, 0, read8_delegate(*this, FUNC(_5a22_device::rddivh_r)));
space(AS_PROGRAM).install_read_handler(0x4216, 0x4216, 0, 0xbf0000, 0, read8_delegate(*this, FUNC(_5a22_device::rdmpyl_r)));
space(AS_PROGRAM).install_read_handler(0x4217, 0x4217, 0, 0xbf0000, 0, read8_delegate(*this, FUNC(_5a22_device::rdmpyh_r)));
space(AS_PROGRAM).install_read_handler(0x4214, 0x4214, 0, 0xbf0000, 0, read8smo_delegate(*this, FUNC(_5a22_device::rddivl_r)));
space(AS_PROGRAM).install_read_handler(0x4215, 0x4215, 0, 0xbf0000, 0, read8smo_delegate(*this, FUNC(_5a22_device::rddivh_r)));
space(AS_PROGRAM).install_read_handler(0x4216, 0x4216, 0, 0xbf0000, 0, read8smo_delegate(*this, FUNC(_5a22_device::rdmpyl_r)));
space(AS_PROGRAM).install_read_handler(0x4217, 0x4217, 0, 0xbf0000, 0, read8smo_delegate(*this, FUNC(_5a22_device::rdmpyh_r)));
}

20
src/devices/cpu/g65816/g65816.h
View File

@ -1544,16 +1544,16 @@ class _5a22_device : public g65816_device
public:
_5a22_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE8_MEMBER( wrmpya_w );
DECLARE_WRITE8_MEMBER( wrmpyb_w );
DECLARE_WRITE8_MEMBER( wrdivl_w );
DECLARE_WRITE8_MEMBER( wrdivh_w );
DECLARE_WRITE8_MEMBER( wrdvdd_w );
DECLARE_WRITE8_MEMBER( memsel_w );
DECLARE_READ8_MEMBER( rddivl_r );
DECLARE_READ8_MEMBER( rddivh_r );
DECLARE_READ8_MEMBER( rdmpyl_r );
DECLARE_READ8_MEMBER( rdmpyh_r );
void wrmpya_w(uint8_t data);
void wrmpyb_w(uint8_t data);
void wrdivl_w(uint8_t data);
void wrdivh_w(uint8_t data);
void wrdvdd_w(uint8_t data);
void memsel_w(uint8_t data);
uint8_t rddivl_r();
uint8_t rddivh_r();
uint8_t rdmpyl_r();
uint8_t rdmpyh_r();
void set_5a22_map();

16
src/devices/cpu/h6280/h6280.cpp
View File

@ -2510,7 +2510,7 @@ void h6280_device::set_irq_line(int irqline, int state)
// REGISTER HANDLING
//**************************************************************************
READ8_MEMBER( h6280_device::irq_status_r )
uint8_t h6280_device::irq_status_r(offs_t offset)
{
int status;
@ -2534,7 +2534,7 @@ READ8_MEMBER( h6280_device::irq_status_r )
}
}
WRITE8_MEMBER( h6280_device::irq_status_w )
void h6280_device::irq_status_w(offs_t offset, uint8_t data)
{
m_io_buffer = data;
switch (offset & 3)
@ -2554,13 +2554,13 @@ WRITE8_MEMBER( h6280_device::irq_status_w )
}
}
READ8_MEMBER( h6280_device::timer_r )
uint8_t h6280_device::timer_r()
{
/* only returns countdown */
return ((m_timer_value >> 10) & 0x7F) | (m_io_buffer & 0x80);
}
WRITE8_MEMBER( h6280_device::timer_w )
void h6280_device::timer_w(offs_t offset, uint8_t data)
{
m_io_buffer = data;
switch (offset & 1)
@ -2581,7 +2581,7 @@ WRITE8_MEMBER( h6280_device::timer_w )
}
}
READ8_MEMBER( h6280_device::port_r )
uint8_t h6280_device::port_r()
{
if (!m_port_in_cb.isnull())
return m_port_in_cb();
@ -2589,19 +2589,19 @@ READ8_MEMBER( h6280_device::port_r )
return m_io_buffer;
}
WRITE8_MEMBER( h6280_device::port_w )
void h6280_device::port_w(uint8_t data)
{
m_io_buffer = data;
m_port_out_cb(data);
}
READ8_MEMBER( h6280_device::io_buffer_r )
uint8_t h6280_device::io_buffer_r()
{
return m_io_buffer;
}
WRITE8_MEMBER( h6280_device::psg_w )
void h6280_device::psg_w(offs_t offset, uint8_t data)
{
m_io_buffer = data;
m_psg->c6280_w(offset, data);

16
src/devices/cpu/h6280/h6280.h
View File

@ -357,17 +357,17 @@ protected:
// internal registers
void internal_map(address_map &map);
DECLARE_READ8_MEMBER( irq_status_r );
DECLARE_WRITE8_MEMBER( irq_status_w );
uint8_t irq_status_r(offs_t offset);
void irq_status_w(offs_t offset, uint8_t data);
DECLARE_READ8_MEMBER( timer_r );
DECLARE_WRITE8_MEMBER( timer_w );
uint8_t timer_r();
void timer_w(offs_t offset, uint8_t data);
DECLARE_READ8_MEMBER( port_r );
DECLARE_WRITE8_MEMBER( port_w );
uint8_t port_r();
void port_w(uint8_t data);
DECLARE_READ8_MEMBER( io_buffer_r );
DECLARE_WRITE8_MEMBER( psg_w );
uint8_t io_buffer_r();
void psg_w(offs_t offset, uint8_t data);
devcb_read8 m_port_in_cb;
devcb_write8 m_port_out_cb;

12
src/devices/cpu/lc8670/lc8670.cpp
View File

@ -906,17 +906,17 @@ void lc8670_cpu_device::timer1_tick()
// internal map handlers
//**************************************************************************
READ8_MEMBER(lc8670_cpu_device::mram_r)
uint8_t lc8670_cpu_device::mram_r(offs_t offset)
{
return m_mram[BIT(REG_PSW,1)*0x100 + offset];
}
WRITE8_MEMBER(lc8670_cpu_device::mram_w)
void lc8670_cpu_device::mram_w(offs_t offset, uint8_t data)
{
m_mram[BIT(REG_PSW,1)*0x100 + offset] = data;
}
READ8_MEMBER(lc8670_cpu_device::xram_r)
uint8_t lc8670_cpu_device::xram_r(offs_t offset)
{
if (!(REG_VCCR & 0x40) || machine().side_effects_disabled()) // XRAM access enabled
{
@ -939,7 +939,7 @@ READ8_MEMBER(lc8670_cpu_device::xram_r)
return 0xff;
}
WRITE8_MEMBER(lc8670_cpu_device::xram_w)
void lc8670_cpu_device::xram_w(offs_t offset, uint8_t data)
{
if (!(REG_VCCR & 0x40) || machine().side_effects_disabled()) // XRAM access enabled
{
@ -960,7 +960,7 @@ WRITE8_MEMBER(lc8670_cpu_device::xram_w)
}
}
READ8_MEMBER(lc8670_cpu_device::regs_r)
uint8_t lc8670_cpu_device::regs_r(offs_t offset)
{
switch(offset)
{
@ -999,7 +999,7 @@ READ8_MEMBER(lc8670_cpu_device::regs_r)
return m_sfr[offset];
}
WRITE8_MEMBER(lc8670_cpu_device::regs_w)
void lc8670_cpu_device::regs_w(offs_t offset, uint8_t data)
{
switch(offset)
{

12
src/devices/cpu/lc8670/lc8670.h
View File

@ -60,12 +60,12 @@ public:
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
// internal map handlers
DECLARE_READ8_MEMBER(regs_r);
DECLARE_WRITE8_MEMBER(regs_w);
DECLARE_READ8_MEMBER(mram_r);
DECLARE_WRITE8_MEMBER(mram_w);
DECLARE_READ8_MEMBER(xram_r);
DECLARE_WRITE8_MEMBER(xram_w);
uint8_t regs_r(offs_t offset);
void regs_w(offs_t offset, uint8_t data);
uint8_t mram_r(offs_t offset);
void mram_w(offs_t offset, uint8_t data);
uint8_t xram_r(offs_t offset);
void xram_w(offs_t offset, uint8_t data);
// configuration helpers
void set_cpu_clock(clock_source source, uint32_t clock) { m_clocks[unsigned(source)] = clock; }

4
src/devices/cpu/mcs48/mcs48.cpp
View File

@ -1364,7 +1364,7 @@ void mcs48_cpu_device::execute_run()
read
-------------------------------------------------*/
READ8_MEMBER( upi41_cpu_device::upi41_master_r )
uint8_t upi41_cpu_device::upi41_master_r(offs_t offset)
{
/* if just reading the status, return it */
if ((offset & 1) != 0)
@ -1409,7 +1409,7 @@ TIMER_CALLBACK_MEMBER( upi41_cpu_device::master_callback )
m_sts |= STS_F1;
}
WRITE8_MEMBER( upi41_cpu_device::upi41_master_w )
void upi41_cpu_device::upi41_master_w(offs_t offset, uint8_t data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(upi41_cpu_device::master_callback), this), (offset << 8) | data);
}

4
src/devices/cpu/mcs48/mcs48.h
View File

@ -622,8 +622,8 @@ class upi41_cpu_device : public mcs48_cpu_device
{
public:
/* functions for talking to the input/output buffers on the UPI41-class chips */
DECLARE_READ8_MEMBER(upi41_master_r);
DECLARE_WRITE8_MEMBER(upi41_master_w);
uint8_t upi41_master_r(offs_t offset);
void upi41_master_w(offs_t offset, uint8_t data);
protected:
// construction/destruction

4
src/devices/cpu/mn10200/mn10200.cpp
View File

@ -1706,7 +1706,7 @@ void mn10200_device::execute_run()
// internal i/o
//-------------------------------------------------
WRITE8_MEMBER(mn10200_device::io_control_w)
void mn10200_device::io_control_w(offs_t offset, uint8_t data)
{
switch (offset)
{
@ -2109,7 +2109,7 @@ WRITE8_MEMBER(mn10200_device::io_control_w)
}
READ8_MEMBER(mn10200_device::io_control_r)
uint8_t mn10200_device::io_control_r(offs_t offset)
{
switch (offset)
{

4
src/devices/cpu/mn10200/mn10200.h
View File

@ -40,8 +40,8 @@ public:
template <std::size_t Port> auto read_port() { return m_read_port[Port].bind(); }
template <std::size_t Port> auto write_port() { return m_write_port[Port].bind(); }
DECLARE_READ8_MEMBER(io_control_r);
DECLARE_WRITE8_MEMBER(io_control_w);
uint8_t io_control_r(offs_t offset);
void io_control_w(offs_t offset, uint8_t data);
void mn1020012a_internal_map(address_map &map);
protected:

4
src/devices/cpu/powerpc/ppc.h
View File

@ -757,8 +757,8 @@ public:
void ppc4xx_set_dcr_read_handler(read32_delegate dcr_read_func);
void ppc4xx_set_dcr_write_handler(write32_delegate dcr_write_func);
DECLARE_READ8_MEMBER( ppc4xx_spu_r );
DECLARE_WRITE8_MEMBER( ppc4xx_spu_w );
uint8_t ppc4xx_spu_r(offs_t offset);
void ppc4xx_spu_w(offs_t offset, uint8_t data);
void internal_ppc4xx(address_map &map);
protected:

4
src/devices/cpu/powerpc/ppccom.cpp
View File

@ -2772,7 +2772,7 @@ updateirq:
ppc4xx_spu_r - serial port read handler
-------------------------------------------------*/
READ8_MEMBER( ppc4xx_device::ppc4xx_spu_r )
uint8_t ppc4xx_device::ppc4xx_spu_r(offs_t offset)
{
uint8_t result = 0xff;
@ -2798,7 +2798,7 @@ READ8_MEMBER( ppc4xx_device::ppc4xx_spu_r )
ppc4xx_spu_w - serial port write handler
-------------------------------------------------*/
WRITE8_MEMBER( ppc4xx_device::ppc4xx_spu_w )
void ppc4xx_device::ppc4xx_spu_w(offs_t offset, uint8_t data)
{
uint8_t oldstate, newstate;

26
src/devices/cpu/sh/sh7604_sci.cpp
View File

@ -29,12 +29,12 @@ DEFINE_DEVICE_TYPE(SH7604_SCI, sh7604_sci_device, "sh7604sci", "SH7604 SCI Contr
// LIVE DEVICE
//**************************************************************************
READ8_MEMBER(sh7604_sci_device::serial_mode_r)
uint8_t sh7604_sci_device::serial_mode_r()
{
return m_smr;
}
WRITE8_MEMBER(sh7604_sci_device::serial_mode_w)
void sh7604_sci_device::serial_mode_w(uint8_t data)
{
m_smr = data;
@ -48,12 +48,12 @@ WRITE8_MEMBER(sh7604_sci_device::serial_mode_w)
logerror("\tClock select: clock/%d\n",4 << ((data & 0x03)*2));
}
READ8_MEMBER(sh7604_sci_device::serial_control_r)
uint8_t sh7604_sci_device::serial_control_r()
{
return m_scr;
}
WRITE8_MEMBER(sh7604_sci_device::serial_control_w)
void sh7604_sci_device::serial_control_w(uint8_t data)
{
m_scr = data;
@ -61,39 +61,39 @@ WRITE8_MEMBER(sh7604_sci_device::serial_control_w)
throw emu_fatalerror("%s: enabled serial control %02x\n", tag(),data);
}
READ8_MEMBER(sh7604_sci_device::serial_status_r)
uint8_t sh7604_sci_device::serial_status_r()
{
return m_ssr;
}
WRITE8_MEMBER(sh7604_sci_device::serial_ack_w)
void sh7604_sci_device::serial_ack_w(uint8_t data)
{
// TODO: verify this
m_ssr = (m_ssr & 0x06) | (m_ssr & data & 0xf9);
}
READ8_MEMBER(sh7604_sci_device::bitrate_r )
uint8_t sh7604_sci_device::bitrate_r()
{
return m_brr;
}
WRITE8_MEMBER(sh7604_sci_device::bitrate_w )
void sh7604_sci_device::bitrate_w(uint8_t data)
{
m_brr = data;
}
READ8_MEMBER(sh7604_sci_device::transmit_data_r)
uint8_t sh7604_sci_device::transmit_data_r()
{
// ...
return 0;
}
WRITE8_MEMBER(sh7604_sci_device::transmit_data_w)
void sh7604_sci_device::transmit_data_w(uint8_t data)
{
// ...
}
READ8_MEMBER(sh7604_sci_device::receive_data_r)
uint8_t sh7604_sci_device::receive_data_r()
{
// ...
return 0;
@ -146,12 +146,12 @@ void sh7604_sci_device::device_reset()
// READ/WRITE HANDLERS
//**************************************************************************
READ8_MEMBER( sh7604_sci_device::read )
uint8_t sh7604_sci_device::read(address_space &space, offs_t offset)
{
return space.read_byte(offset);
}
WRITE8_MEMBER( sh7604_sci_device::write )
void sh7604_sci_device::write(address_space &space, offs_t offset, uint8_t data)
{
space.write_byte(offset,data);
}

26
src/devices/cpu/sh/sh7604_sci.h
View File

@ -28,21 +28,21 @@ public:
// I/O operations
void sci_regs(address_map &map);
DECLARE_WRITE8_MEMBER( write );
DECLARE_READ8_MEMBER( read );
void write(address_space &space, offs_t offset, uint8_t data);
uint8_t read(address_space &space, offs_t offset);
DECLARE_READ8_MEMBER( serial_mode_r );
DECLARE_WRITE8_MEMBER( serial_mode_w );
DECLARE_READ8_MEMBER( bitrate_r );
DECLARE_WRITE8_MEMBER( bitrate_w );
DECLARE_READ8_MEMBER( serial_control_r );
DECLARE_WRITE8_MEMBER( serial_control_w );
uint8_t serial_mode_r();
void serial_mode_w(uint8_t data);
uint8_t bitrate_r();
void bitrate_w(uint8_t data);
uint8_t serial_control_r();
void serial_control_w(uint8_t data);
DECLARE_READ8_MEMBER( transmit_data_r );
DECLARE_WRITE8_MEMBER( transmit_data_w );
DECLARE_READ8_MEMBER( serial_status_r );
DECLARE_WRITE8_MEMBER( serial_ack_w );
DECLARE_READ8_MEMBER( receive_data_r );
uint8_t transmit_data_r();
void transmit_data_w(uint8_t data);
uint8_t serial_status_r();
void serial_ack_w(uint8_t data);
uint8_t receive_data_r();
protected:
enum {

4
src/devices/cpu/st62xx/st62xx.cpp
View File

@ -252,7 +252,7 @@ void st6228_device::update_port_mode(uint8_t index, uint8_t changed)
}
}
WRITE8_MEMBER(st6228_device::regs_w)
void st6228_device::regs_w(offs_t offset, uint8_t data)
{
offset += 0x80;
@ -365,7 +365,7 @@ WRITE8_MEMBER(st6228_device::regs_w)
}
}
READ8_MEMBER(st6228_device::regs_r)
uint8_t st6228_device::regs_r(offs_t offset)
{
uint8_t ret = 0;
offset += 0x80;

4
src/devices/cpu/st62xx/st62xx.h
View File

@ -108,8 +108,8 @@ protected:
void update_port_mode(uint8_t index, uint8_t changed);
void set_port_output_bit(uint8_t index, uint8_t bit, uint8_t state);
DECLARE_WRITE8_MEMBER(regs_w);
DECLARE_READ8_MEMBER(regs_r);
void regs_w(offs_t offset, uint8_t data);
uint8_t regs_r(offs_t offset);
enum
{

130
src/devices/cpu/tlcs870/tlcs870.cpp
View File

@ -138,7 +138,7 @@ bool tlcs870_device::stream_arg(std::ostream &stream, uint32_t pc, const char *p
}
// NOT using templates here because there are subtle differences in the port behavior (the ports are multi-purpose) that still need implementing
READ8_MEMBER(tlcs870_device::port0_r)
uint8_t tlcs870_device::port0_r()
{
// need to use P0CR (0x000a) to control direction
@ -148,7 +148,7 @@ READ8_MEMBER(tlcs870_device::port0_r)
return m_port_out_latch[0];
}
READ8_MEMBER(tlcs870_device::port1_r)
uint8_t tlcs870_device::port1_r()
{
// need to use P1CR (0x000b) to control direction
@ -158,7 +158,7 @@ READ8_MEMBER(tlcs870_device::port1_r)
return m_port_out_latch[1];
}
READ8_MEMBER(tlcs870_device::port2_r) // 3-bit port
uint8_t tlcs870_device::port2_r() // 3-bit port
{
if (m_read_input_port)
return m_port_in_cb[2]() | 0xf8;
@ -166,7 +166,7 @@ READ8_MEMBER(tlcs870_device::port2_r) // 3-bit port
return m_port_out_latch[2];
}
READ8_MEMBER(tlcs870_device::port3_r)
uint8_t tlcs870_device::port3_r()
{
if (m_read_input_port)
return m_port_in_cb[3]();
@ -174,7 +174,7 @@ READ8_MEMBER(tlcs870_device::port3_r)
return m_port_out_latch[3];
}
READ8_MEMBER(tlcs870_device::port4_r)
uint8_t tlcs870_device::port4_r()
{
if (m_read_input_port)
return m_port_in_cb[4]();
@ -182,7 +182,7 @@ READ8_MEMBER(tlcs870_device::port4_r)
return m_port_out_latch[4];
}
READ8_MEMBER(tlcs870_device::port5_r) // 5-bit port
uint8_t tlcs870_device::port5_r() // 5-bit port
{
if (m_read_input_port)
return m_port_in_cb[5]() | 0xe0;
@ -190,7 +190,7 @@ READ8_MEMBER(tlcs870_device::port5_r) // 5-bit port
return m_port_out_latch[5];
}
READ8_MEMBER(tlcs870_device::port6_r) // doubles up as analog?
uint8_t tlcs870_device::port6_r() // doubles up as analog?
{
// need to use P6CR (0x000c) to control direction
@ -200,7 +200,7 @@ READ8_MEMBER(tlcs870_device::port6_r) // doubles up as analog?
return m_port_out_latch[6];
}
READ8_MEMBER(tlcs870_device::port7_r)
uint8_t tlcs870_device::port7_r()
{
// need to use P7CR (0x000d) to control direction
@ -210,70 +210,70 @@ READ8_MEMBER(tlcs870_device::port7_r)
return m_port_out_latch[7];
}
WRITE8_MEMBER(tlcs870_device::port0_w)
void tlcs870_device::port0_w(uint8_t data)
{
m_port_out_latch[0] = data;
m_port_out_cb[0](data);
}
WRITE8_MEMBER(tlcs870_device::port1_w)
void tlcs870_device::port1_w(uint8_t data)
{
m_port_out_latch[1] = data;
m_port_out_cb[1](data);
}
WRITE8_MEMBER(tlcs870_device::port2_w)
void tlcs870_device::port2_w(uint8_t data)
{
m_port_out_latch[2] = data;
m_port_out_cb[2](data);
}
WRITE8_MEMBER(tlcs870_device::port3_w)
void tlcs870_device::port3_w(uint8_t data)
{
m_port_out_latch[3] = data;
m_port_out_cb[3](data);
}
WRITE8_MEMBER(tlcs870_device::port4_w)
void tlcs870_device::port4_w(uint8_t data)
{
m_port_out_latch[4] = data;
m_port_out_cb[4](data);
}
WRITE8_MEMBER(tlcs870_device::port5_w)
void tlcs870_device::port5_w(uint8_t data)
{
m_port_out_latch[5] = data;
m_port_out_cb[5](data);
}
WRITE8_MEMBER(tlcs870_device::port6_w)
void tlcs870_device::port6_w(uint8_t data)
{
m_port_out_latch[6] = data;
m_port_out_cb[6](data);
}
WRITE8_MEMBER(tlcs870_device::port7_w)
void tlcs870_device::port7_w(uint8_t data)
{
m_port_out_latch[7] = data;
m_port_out_cb[7](data);
}
WRITE8_MEMBER(tlcs870_device::p0cr_w)
void tlcs870_device::p0cr_w(uint8_t data)
{
m_port0_cr = data;
}
WRITE8_MEMBER(tlcs870_device::p1cr_w)
void tlcs870_device::p1cr_w(uint8_t data)
{
m_port1_cr = data;
}
WRITE8_MEMBER(tlcs870_device::p6cr_w)
void tlcs870_device::p6cr_w(uint8_t data)
{
m_port6_cr = data;
}
WRITE8_MEMBER(tlcs870_device::p7cr_w)
void tlcs870_device::p7cr_w(uint8_t data)
{
m_port7_cr = data;
}
@ -287,7 +287,7 @@ TIMER_CALLBACK_MEMBER(tlcs870_device::tc1_cb)
}
WRITE8_MEMBER(tlcs870_device::tc1cr_w)
void tlcs870_device::tc1cr_w(uint8_t data)
{
m_TC1CR = data;
@ -302,32 +302,32 @@ WRITE8_MEMBER(tlcs870_device::tc1cr_w)
LOG("%d: TC1M-0 (TC1 Mode Select)\n", (m_TC1CR & 0x01) ? 1 : 0);
}
WRITE8_MEMBER(tlcs870_device::treg1a_l_w)
void tlcs870_device::treg1a_l_w(uint8_t data)
{
m_TREG1A = (m_TREG1A & 0xff00) | data;
}
WRITE8_MEMBER(tlcs870_device::treg1a_h_w)
void tlcs870_device::treg1a_h_w(uint8_t data)
{
m_TREG1A = (m_TREG1A & 0x00ff) | (data << 8);
}
WRITE8_MEMBER(tlcs870_device::treg1b_l_w)
void tlcs870_device::treg1b_l_w(uint8_t data)
{
m_TREG1B = (m_TREG1B & 0xff00) | data;
}
WRITE8_MEMBER(tlcs870_device::treg1b_h_w)
void tlcs870_device::treg1b_h_w(uint8_t data)
{
m_TREG1B = (m_TREG1B & 0x00ff) | (data << 8);
}
READ8_MEMBER(tlcs870_device::treg1b_l_r)
uint8_t tlcs870_device::treg1b_l_r()
{
return m_TREG1B & 0xff;
}
READ8_MEMBER(tlcs870_device::treg1b_h_r)
uint8_t tlcs870_device::treg1b_h_r()
{
return (m_TREG1B >>8) & 0xff;
}
@ -350,7 +350,7 @@ void tlcs870_device::tc2_cancel()
m_tcx_timer[1]->adjust(attotime::never);
}
WRITE8_MEMBER(tlcs870_device::tc2cr_w)
void tlcs870_device::tc2cr_w(uint8_t data)
{
if (data & 0x20)
{
@ -377,12 +377,12 @@ WRITE8_MEMBER(tlcs870_device::tc2cr_w)
LOG("%d: TC2M (TC2 Mode Select)\n", (m_TC2CR & 0x01) ? 1 : 0);
}
WRITE8_MEMBER(tlcs870_device::treg2_l_w)
void tlcs870_device::treg2_l_w(uint8_t data)
{
m_TREG2 = (m_TREG2 & 0xff00) | data;
}
WRITE8_MEMBER(tlcs870_device::treg2_h_w)
void tlcs870_device::treg2_h_w(uint8_t data)
{
m_TREG2 = (m_TREG2 & 0x00ff) | (data << 8);
}
@ -394,7 +394,7 @@ TIMER_CALLBACK_MEMBER(tlcs870_device::tc3_cb)
}
WRITE8_MEMBER(tlcs870_device::tc3cr_w)
void tlcs870_device::tc3cr_w(uint8_t data)
{
m_TC3CR = data;
@ -409,17 +409,17 @@ WRITE8_MEMBER(tlcs870_device::tc3cr_w)
LOG("%d: TC3M (TC3 Mode Select)\n", (m_TC3CR & 0x01) ? 1 : 0);
}
WRITE8_MEMBER(tlcs870_device::treg3a_w)
void tlcs870_device::treg3a_w(uint8_t data)
{
m_TREG3A = data;
}
READ8_MEMBER(tlcs870_device::treg3a_r)
uint8_t tlcs870_device::treg3a_r()
{
return m_TREG3A;
}
READ8_MEMBER(tlcs870_device::treg3b_r)
uint8_t tlcs870_device::treg3b_r()
{
return m_TREG3B;
}
@ -431,7 +431,7 @@ TIMER_CALLBACK_MEMBER(tlcs870_device::tc4_cb)
}
WRITE8_MEMBER(tlcs870_device::tc4cr_w)
void tlcs870_device::tc4cr_w(uint8_t data)
{
m_TC4CR = data;
@ -446,7 +446,7 @@ WRITE8_MEMBER(tlcs870_device::tc4cr_w)
LOG("%d: TC4M-0 (TC4 Mode Select)\n", (m_TC4CR & 0x01) ? 1 : 0);
}
WRITE8_MEMBER(tlcs870_device::treg4_w)
void tlcs870_device::treg4_w(uint8_t data)
{
m_TREG4 = data;
}
@ -455,7 +455,7 @@ WRITE8_MEMBER(tlcs870_device::treg4_w)
// this is used with TLCS870_IRQ_INTTBT (FFF2 INTTBT) (not used by hng64)
// the divider output makes use of PORT1 bit 3, which must be properly configured
WRITE8_MEMBER(tlcs870_device::tbtcr_w)
void tlcs870_device::tbtcr_w(uint8_t data)
{
m_TBTCR = data;
@ -470,7 +470,7 @@ WRITE8_MEMBER(tlcs870_device::tbtcr_w)
LOG("%d: TBTCK-0 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x01) ? 1 : 0);
}
READ8_MEMBER(tlcs870_device::tbtcr_r)
uint8_t tlcs870_device::tbtcr_r()
{
return m_TBTCR;
}
@ -480,7 +480,7 @@ READ8_MEMBER(tlcs870_device::tbtcr_r)
// TODO: use templates for SIO1/2 ports, as they're the same except for the DBR region they use?
// Serial Port 1
WRITE8_MEMBER(tlcs870_device::sio1cr1_w)
void tlcs870_device::sio1cr1_w(uint8_t data)
{
m_SIOCR1[0] = data;
@ -545,7 +545,7 @@ WRITE8_MEMBER(tlcs870_device::sio1cr1_w)
}
WRITE8_MEMBER(tlcs870_device::sio1cr2_w)
void tlcs870_device::sio1cr2_w(uint8_t data)
{
m_SIOCR2[0] = data;
@ -564,7 +564,7 @@ WRITE8_MEMBER(tlcs870_device::sio1cr2_w)
}
READ8_MEMBER(tlcs870_device::sio1sr_r)
uint8_t tlcs870_device::sio1sr_r()
{
/* TS-- ----
@ -616,7 +616,7 @@ TIMER_CALLBACK_MEMBER(tlcs870_device::sio0_transmit_cb)
}
// Serial Port 2
WRITE8_MEMBER(tlcs870_device::sio2cr1_w)
void tlcs870_device::sio2cr1_w(uint8_t data)
{
m_SIOCR1[1] = data;
@ -631,7 +631,7 @@ WRITE8_MEMBER(tlcs870_device::sio2cr1_w)
LOG("%d: SCK2-0 (Serial Clock)\n", (m_SIOCR1[1] & 0x01) ? 1 : 0);
}
WRITE8_MEMBER(tlcs870_device::sio2cr2_w)
void tlcs870_device::sio2cr2_w(uint8_t data)
{
m_SIOCR2[1] = data;
@ -650,7 +650,7 @@ TIMER_CALLBACK_MEMBER(tlcs870_device::sio1_transmit_cb)
{
}
READ8_MEMBER(tlcs870_device::sio2sr_r)
uint8_t tlcs870_device::sio2sr_r()
{
/* TS-- ----
@ -663,7 +663,7 @@ READ8_MEMBER(tlcs870_device::sio2sr_r)
// WDT emulation (Watchdog Timer)
WRITE8_MEMBER(tlcs870_device::wdtcr1_w)
void tlcs870_device::wdtcr1_w(uint8_t data)
{
m_WDTCR1 = data;
@ -680,7 +680,7 @@ WRITE8_MEMBER(tlcs870_device::wdtcr1_w)
// WDTOUT cannot be set to 1 by software
}
WRITE8_MEMBER(tlcs870_device::wdtcr2_w)
void tlcs870_device::wdtcr2_w(uint8_t data)
{
if (data == 0x4e)
{
@ -699,7 +699,7 @@ WRITE8_MEMBER(tlcs870_device::wdtcr2_w)
// Misc
// not used by hng64
WRITE8_MEMBER(tlcs870_device::syscr1_w)
void tlcs870_device::syscr1_w(uint8_t data)
{
m_SYSCR1 = data;
@ -714,7 +714,7 @@ WRITE8_MEMBER(tlcs870_device::syscr1_w)
LOG("%d: (invalid)\n", (m_SYSCR1 & 0x01) ? 1 : 0);
}
WRITE8_MEMBER(tlcs870_device::syscr2_w)
void tlcs870_device::syscr2_w(uint8_t data)
{
m_SYSCR2 = data;
@ -729,25 +729,25 @@ WRITE8_MEMBER(tlcs870_device::syscr2_w)
LOG("%d: (invalid)\n", (m_SYSCR2 & 0x01) ? 1 : 0);
}
READ8_MEMBER(tlcs870_device::syscr1_r)
uint8_t tlcs870_device::syscr1_r()
{
return m_SYSCR1; // low 2 bits are 'undefined'
}
READ8_MEMBER(tlcs870_device::syscr2_r)
uint8_t tlcs870_device::syscr2_r()
{
return m_SYSCR2 | 0x0f; // low bits always read as 1
}
// RBS / PSW direct access
WRITE8_MEMBER(tlcs870_device::rbs_w)
void tlcs870_device::rbs_w(uint8_t data)
{
// upper bits of PSW (status flags) cannot be written, only the register bank
m_RBS = data & 0x0f;
}
READ8_MEMBER(tlcs870_device::psw_r)
uint8_t tlcs870_device::psw_r()
{
// outside of checking the results of opcodes that use it directly (DAA / DAS) this is the only way to read / check the 'half' flag
return get_PSW();
@ -755,7 +755,7 @@ READ8_MEMBER(tlcs870_device::psw_r)
// ADC emulation
READ8_MEMBER(tlcs870_device::adcdr_r)
uint8_t tlcs870_device::adcdr_r()
{
return m_ADCDR;
}
@ -780,12 +780,12 @@ READ8_MEMBER(tlcs870_device::adcdr_r)
*/
READ8_MEMBER(tlcs870_device::adccr_r)
uint8_t tlcs870_device::adccr_r()
{
return m_ADCCR | 0x80; // return with 'finished' bit set
}
WRITE8_MEMBER(tlcs870_device::adccr_w)
void tlcs870_device::adccr_w(uint8_t data)
{
m_ADCCR = data;
@ -796,12 +796,12 @@ WRITE8_MEMBER(tlcs870_device::adccr_w)
}
READ8_MEMBER(tlcs870_device::eintcr_r)
uint8_t tlcs870_device::eintcr_r()
{
return 0x00;
}
WRITE8_MEMBER(tlcs870_device::eintcr_w)
void tlcs870_device::eintcr_w(uint8_t data)
{
m_EINTCR = data;
@ -822,17 +822,17 @@ WRITE8_MEMBER(tlcs870_device::eintcr_w)
*/
}
READ8_MEMBER(tlcs870_device::eir_l_r)
uint8_t tlcs870_device::eir_l_r()
{
return m_EIR & 0xff;
}
READ8_MEMBER(tlcs870_device::eir_h_r)
uint8_t tlcs870_device::eir_h_r()
{
return (m_EIR >> 8) & 0xff;
}
WRITE8_MEMBER(tlcs870_device::eir_l_w)
void tlcs870_device::eir_l_w(uint8_t data)
{
m_EIR = (m_EIR & 0xff00) | data;
@ -847,7 +847,7 @@ WRITE8_MEMBER(tlcs870_device::eir_l_w)
LOG("%d: IMF\n", (m_EIR & 0x0001) ? 1 : 0); // can't be Reset interrupt (non-maskable)
}
WRITE8_MEMBER(tlcs870_device::eir_h_w)
void tlcs870_device::eir_h_w(uint8_t data)
{
m_EIR = (m_EIR & 0x00ff) | (data << 8);
@ -869,23 +869,23 @@ WRITE8_MEMBER(tlcs870_device::eir_h_w)
by writing 0 to it
*/
READ8_MEMBER(tlcs870_device::il_l_r)
uint8_t tlcs870_device::il_l_r()
{
return m_IL & 0xff;
}
READ8_MEMBER(tlcs870_device::il_h_r)
uint8_t tlcs870_device::il_h_r()
{
return (m_IL >> 8) & 0xff;
}
WRITE8_MEMBER(tlcs870_device::il_l_w)
void tlcs870_device::il_l_w(uint8_t data)
{
// probably not this logic
m_IL = (m_IL & 0xff00) | data;
}
WRITE8_MEMBER(tlcs870_device::il_h_w)
void tlcs870_device::il_h_w(uint8_t data)
{
// probably not this logic
m_IL = (m_EIR & 0x00ff) | (data << 8);

130
src/devices/cpu/tlcs870/tlcs870.h
View File

@ -175,87 +175,87 @@ private:
int m_read_input_port;
uint8_t m_port0_cr, m_port1_cr, m_port6_cr, m_port7_cr;
DECLARE_READ8_MEMBER(port0_r);
DECLARE_READ8_MEMBER(port1_r);
DECLARE_READ8_MEMBER(port2_r);
DECLARE_READ8_MEMBER(port3_r);
DECLARE_READ8_MEMBER(port4_r);
DECLARE_READ8_MEMBER(port5_r);
DECLARE_READ8_MEMBER(port6_r);
DECLARE_READ8_MEMBER(port7_r);
uint8_t port0_r();
uint8_t port1_r();
uint8_t port2_r();
uint8_t port3_r();
uint8_t port4_r();
uint8_t port5_r();
uint8_t port6_r();
uint8_t port7_r();
DECLARE_WRITE8_MEMBER(port0_w);
DECLARE_WRITE8_MEMBER(port1_w);
DECLARE_WRITE8_MEMBER(port2_w);
DECLARE_WRITE8_MEMBER(port3_w);
DECLARE_WRITE8_MEMBER(port4_w);
DECLARE_WRITE8_MEMBER(port5_w);
DECLARE_WRITE8_MEMBER(port6_w);
DECLARE_WRITE8_MEMBER(port7_w);
void port0_w(uint8_t data);
void port1_w(uint8_t data);
void port2_w(uint8_t data);
void port3_w(uint8_t data);
void port4_w(uint8_t data);
void port5_w(uint8_t data);
void port6_w(uint8_t data);
void port7_w(uint8_t data);
DECLARE_WRITE8_MEMBER(p0cr_w);
DECLARE_WRITE8_MEMBER(p1cr_w);
DECLARE_WRITE8_MEMBER(p6cr_w);
DECLARE_WRITE8_MEMBER(p7cr_w);
void p0cr_w(uint8_t data);
void p1cr_w(uint8_t data);
void p6cr_w(uint8_t data);
void p7cr_w(uint8_t data);
DECLARE_READ8_MEMBER(eir_l_r);
DECLARE_READ8_MEMBER(eir_h_r);
DECLARE_READ8_MEMBER(il_l_r);
DECLARE_READ8_MEMBER(il_h_r);
uint8_t eir_l_r();
uint8_t eir_h_r();
uint8_t il_l_r();
uint8_t il_h_r();
DECLARE_WRITE8_MEMBER(eir_l_w);
DECLARE_WRITE8_MEMBER(eir_h_w);
DECLARE_WRITE8_MEMBER(il_l_w);
DECLARE_WRITE8_MEMBER(il_h_w);
void eir_l_w(uint8_t data);
void eir_h_w(uint8_t data);
void il_l_w(uint8_t data);
void il_h_w(uint8_t data);
DECLARE_READ8_MEMBER(eintcr_r);
uint8_t eintcr_r();
DECLARE_WRITE8_MEMBER(eintcr_w);
void eintcr_w(uint8_t data);
DECLARE_WRITE8_MEMBER(treg1a_l_w);
DECLARE_WRITE8_MEMBER(treg1a_h_w);
DECLARE_WRITE8_MEMBER(treg1b_l_w);
DECLARE_WRITE8_MEMBER(treg1b_h_w);
DECLARE_WRITE8_MEMBER(tc1cr_w);
DECLARE_WRITE8_MEMBER(tc2cr_w);
DECLARE_WRITE8_MEMBER(treg2_l_w);
DECLARE_WRITE8_MEMBER(treg2_h_w);
DECLARE_WRITE8_MEMBER(treg3a_w);
DECLARE_WRITE8_MEMBER(tc3cr_w);
DECLARE_WRITE8_MEMBER(tc4cr_w);
void treg1a_l_w(uint8_t data);
void treg1a_h_w(uint8_t data);
void treg1b_l_w(uint8_t data);
void treg1b_h_w(uint8_t data);
void tc1cr_w(uint8_t data);
void tc2cr_w(uint8_t data);
void treg2_l_w(uint8_t data);
void treg2_h_w(uint8_t data);
void treg3a_w(uint8_t data);
void tc3cr_w(uint8_t data);
void tc4cr_w(uint8_t data);
DECLARE_READ8_MEMBER(treg1b_l_r);
DECLARE_READ8_MEMBER(treg1b_h_r);
DECLARE_READ8_MEMBER(treg3a_r);
DECLARE_READ8_MEMBER(treg3b_r);
DECLARE_WRITE8_MEMBER(treg4_w);
uint8_t treg1b_l_r();
uint8_t treg1b_h_r();
uint8_t treg3a_r();
uint8_t treg3b_r();
void treg4_w(uint8_t data);
DECLARE_WRITE8_MEMBER(sio1cr1_w);
DECLARE_WRITE8_MEMBER(sio1cr2_w);
DECLARE_WRITE8_MEMBER(sio2cr1_w);
DECLARE_WRITE8_MEMBER(sio2cr2_w);
DECLARE_READ8_MEMBER(sio2sr_r);
DECLARE_READ8_MEMBER(sio1sr_r);
void sio1cr1_w(uint8_t data);
void sio1cr2_w(uint8_t data);
void sio2cr1_w(uint8_t data);
void sio2cr2_w(uint8_t data);
uint8_t sio2sr_r();
uint8_t sio1sr_r();
DECLARE_WRITE8_MEMBER(wdtcr1_w);
DECLARE_WRITE8_MEMBER(wdtcr2_w);
void wdtcr1_w(uint8_t data);
void wdtcr2_w(uint8_t data);
DECLARE_WRITE8_MEMBER(tbtcr_w);
void tbtcr_w(uint8_t data);
DECLARE_READ8_MEMBER(tbtcr_r);
uint8_t tbtcr_r();
DECLARE_WRITE8_MEMBER(syscr1_w);
DECLARE_WRITE8_MEMBER(syscr2_w);
DECLARE_READ8_MEMBER(syscr1_r);
DECLARE_READ8_MEMBER(syscr2_r);
DECLARE_WRITE8_MEMBER(rbs_w);
DECLARE_READ8_MEMBER(psw_r);
void syscr1_w(uint8_t data);
void syscr2_w(uint8_t data);
uint8_t syscr1_r();
uint8_t syscr2_r();
void rbs_w(uint8_t data);
uint8_t psw_r();
DECLARE_READ8_MEMBER(adccr_r);
DECLARE_READ8_MEMBER(adcdr_r);
uint8_t adccr_r();
uint8_t adcdr_r();
DECLARE_WRITE8_MEMBER(adccr_w);
void adccr_w(uint8_t data);
// Work registers
uint8_t m_cycles;

8
src/devices/cpu/tlcs900/tlcs900.cpp
View File

@ -1156,7 +1156,7 @@ void tmp95c061_device::execute_set_input(int input, int level)
}
READ8_MEMBER( tmp95c061_device::internal_r )
uint8_t tmp95c061_device::internal_r(offs_t offset)
{
switch (offset)
{
@ -1180,7 +1180,7 @@ void tmp95c061_device::update_porta()
m_porta_write(0, ((fc & m_reg[TMP95C061_PAFC]) | (m_reg[TMP95C061_PA] & ~m_reg[TMP95C061_PAFC])) & m_reg[TMP95C061_PACR], 0xff);
}
WRITE8_MEMBER( tmp95c061_device::internal_w )
void tmp95c061_device::internal_w(offs_t offset, uint8_t data)
{
switch ( offset )
{
@ -2012,7 +2012,7 @@ void tmp95c063_device::device_reset()
m_prefetch_clear = true;
}
READ8_MEMBER( tmp95c063_device::internal_r )
uint8_t tmp95c063_device::internal_r(offs_t offset)
{
switch (offset)
{
@ -2032,7 +2032,7 @@ READ8_MEMBER( tmp95c063_device::internal_r )
}
WRITE8_MEMBER( tmp95c063_device::internal_w )
void tmp95c063_device::internal_w(offs_t offset, uint8_t data)
{
switch ( offset )
{

8
src/devices/cpu/tlcs900/tlcs900.h
View File

@ -633,8 +633,8 @@ public:
auto portb_read() { return m_portb_read.bind(); }
auto portb_write() { return m_portb_write.bind(); }
DECLARE_READ8_MEMBER( internal_r );
DECLARE_WRITE8_MEMBER( internal_w );
uint8_t internal_r(offs_t offset);
void internal_w(offs_t offset, uint8_t data);
void tmp95c061_mem16(address_map &map);
void tmp95c061_mem8(address_map &map);
@ -699,8 +699,8 @@ public:
// construction/destruction
tmp95c063_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER( internal_r );
DECLARE_WRITE8_MEMBER( internal_w );
uint8_t internal_r(offs_t offset);
void internal_w(offs_t offset, uint8_t data);
// configuration helpers
auto port1_read() { return m_port1_read.bind(); }

16
src/devices/cpu/tms7000/tms7000.cpp
View File

@ -495,7 +495,7 @@ TIMER_CALLBACK_MEMBER(tms7000_device::simple_timer_cb)
// note: TMS7000 family is from $00 to $0b, TMS7002 family adds $10 to $17
//-------------------------------------------------
READ8_MEMBER(tms7000_device::tms7000_pf_r)
uint8_t tms7000_device::tms7000_pf_r(offs_t offset)
{
switch (offset)
{
@ -536,7 +536,7 @@ READ8_MEMBER(tms7000_device::tms7000_pf_r)
return 0;
}
WRITE8_MEMBER(tms7000_device::tms7000_pf_w)
void tms7000_device::tms7000_pf_w(offs_t offset, uint8_t data)
{
switch (offset)
{
@ -902,12 +902,12 @@ void tms70c46_device::device_reset()
tms7000_device::device_reset();
}
READ8_MEMBER(tms70c46_device::control_r)
uint8_t tms70c46_device::control_r()
{
return m_control;
}
WRITE8_MEMBER(tms70c46_device::control_w)
void tms70c46_device::control_w(uint8_t data)
{
// d5: enable external databus
if (~m_control & data & 0x20)
@ -926,7 +926,7 @@ WRITE8_MEMBER(tms70c46_device::control_w)
// right now pretend that nothing is connected
// external pins are HD0-HD3(data), HSK(handshake), BAV(bus available)
READ8_MEMBER(tms70c46_device::dockbus_status_r)
uint8_t tms70c46_device::dockbus_status_r()
{
// d0: slave _HSK
// d1: slave _BAV
@ -935,18 +935,18 @@ READ8_MEMBER(tms70c46_device::dockbus_status_r)
return 0;
}
WRITE8_MEMBER(tms70c46_device::dockbus_status_w)
void tms70c46_device::dockbus_status_w(uint8_t data)
{
// d0: master _HSK (setting it low(write 1) also clears IRQ)
// d1: master _BAV
// other bits: unused?
}
READ8_MEMBER(tms70c46_device::dockbus_data_r)
uint8_t tms70c46_device::dockbus_data_r()
{
return 0xff;
}
WRITE8_MEMBER(tms70c46_device::dockbus_data_w)
void tms70c46_device::dockbus_data_w(uint8_t data)
{
}

28
src/devices/cpu/tms7000/tms7000.h
View File

@ -49,13 +49,13 @@ public:
void set_divide_by_2() { m_divider = 2; }
void set_divide_by_4() { m_divider = 4; }
DECLARE_READ8_MEMBER(tms7000_unmapped_rf_r) { if (!machine().side_effects_disabled()) logerror("'%s' (%04X): unmapped_rf_r @ $%04x\n", tag(), m_pc, offset + 0x80); return 0; };
DECLARE_WRITE8_MEMBER(tms7000_unmapped_rf_w) { logerror("'%s' (%04X): unmapped_rf_w @ $%04x = $%02x\n", tag(), m_pc, offset + 0x80, data); };
uint8_t tms7000_unmapped_rf_r(offs_t offset) { if (!machine().side_effects_disabled()) logerror("'%s' (%04X): unmapped_rf_r @ $%04x\n", tag(), m_pc, offset + 0x80); return 0; };
void tms7000_unmapped_rf_w(offs_t offset, uint8_t data) { logerror("'%s' (%04X): unmapped_rf_w @ $%04x = $%02x\n", tag(), m_pc, offset + 0x80, data); };
DECLARE_READ8_MEMBER(tms7000_pf_r);
DECLARE_WRITE8_MEMBER(tms7000_pf_w);
DECLARE_READ8_MEMBER(tms7002_pf_r) { return tms7000_pf_r(space, offset + 0x10); }
DECLARE_WRITE8_MEMBER(tms7002_pf_w) { tms7000_pf_w(space, offset + 0x10, data); }
uint8_t tms7000_pf_r(offs_t offset);
void tms7000_pf_w(offs_t offset, uint8_t data);
uint8_t tms7002_pf_r(offs_t offset) { return tms7000_pf_r(offset + 0x10); }
void tms7002_pf_w(offs_t offset, uint8_t data) { tms7000_pf_w(offset + 0x10, data); }
bool chip_is_cmos() const { return (m_info_flags & CHIP_IS_CMOS) ? true : false; }
bool chip_is_family_70x0() const { return chip_get_family() == CHIP_FAMILY_70X0; }
@ -327,17 +327,17 @@ class tms70c46_device : public tms7000_device
public:
tms70c46_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(control_r);
DECLARE_WRITE8_MEMBER(control_w);
uint8_t control_r();
void control_w(uint8_t data);
DECLARE_READ8_MEMBER(dockbus_status_r);
DECLARE_WRITE8_MEMBER(dockbus_status_w);
DECLARE_READ8_MEMBER(dockbus_data_r);
DECLARE_WRITE8_MEMBER(dockbus_data_w);
uint8_t dockbus_status_r();
void dockbus_status_w(uint8_t data);
uint8_t dockbus_data_r();
void dockbus_data_w(uint8_t data);
// access I/O port E if databus is disabled
DECLARE_READ8_MEMBER(e_bus_data_r) { return machine().side_effects_disabled() ? 0xff : ((m_control & 0x20) ? 0xff : m_port_in_cb[4]()); }
DECLARE_WRITE8_MEMBER(e_bus_data_w) { if (~m_control & 0x20) m_port_out_cb[4](data); }
uint8_t e_bus_data_r() { return machine().side_effects_disabled() ? 0xff : ((m_control & 0x20) ? 0xff : m_port_in_cb[4]()); }
void e_bus_data_w(uint8_t data) { if (~m_control & 0x20) m_port_out_cb[4](data); }
void tms70c46_mem(address_map &map);
protected:

10
src/devices/cpu/upd7810/upd7810.cpp
View File

@ -562,27 +562,27 @@ std::unique_ptr<util::disasm_interface> upd78c05_device::create_disassembler()
return std::make_unique<upd78c05_disassembler>();
}
WRITE8_MEMBER(upd7810_device::pa_w)
void upd7810_device::pa_w(uint8_t data, uint8_t mem_mask)
{
COMBINE_DATA(&m_pa_in);
}
WRITE8_MEMBER(upd7810_device::pb_w)
void upd7810_device::pb_w(uint8_t data, uint8_t mem_mask)
{
COMBINE_DATA(&m_pb_in);
}
WRITE8_MEMBER(upd7810_device::pc_w)
void upd7810_device::pc_w(uint8_t data, uint8_t mem_mask)
{
COMBINE_DATA(&m_pc_in);
}
WRITE8_MEMBER(upd7810_device::pd_w)
void upd7810_device::pd_w(uint8_t data, uint8_t mem_mask)
{
COMBINE_DATA(&m_pd_in);
}
WRITE8_MEMBER(upd7810_device::pf_w)
void upd7810_device::pf_w(uint8_t data, uint8_t mem_mask)
{
COMBINE_DATA(&m_pf_in);
}

10
src/devices/cpu/upd7810/upd7810.h
View File

@ -77,11 +77,11 @@ public:
auto pt_in_cb() { return m_pt_in_cb.bind(); }
DECLARE_WRITE8_MEMBER(pa_w);
DECLARE_WRITE8_MEMBER(pb_w);
DECLARE_WRITE8_MEMBER(pc_w);
DECLARE_WRITE8_MEMBER(pd_w);
DECLARE_WRITE8_MEMBER(pf_w);
void pa_w(uint8_t data, uint8_t mem_mask = ~0);
void pb_w(uint8_t data, uint8_t mem_mask = ~0);
void pc_w(uint8_t data, uint8_t mem_mask = ~0);
void pd_w(uint8_t data, uint8_t mem_mask = ~0);
void pf_w(uint8_t data, uint8_t mem_mask = ~0);
protected:
void upd_internal_128_ram_map(address_map &map);

12
src/devices/machine/at_keybc.cpp
View File

@ -147,14 +147,14 @@ DEFINE_DEVICE_TYPE(PS2_KEYBOARD_CONTROLLER, ps2_keyboard_controller_device, "ps2
uint8_t at_kbc_device_base::data_r()
{
u8 const data = m_mcu->upi41_master_r(machine().dummy_space(), 0U);
u8 const data = m_mcu->upi41_master_r(0U);
LOG("data_r 0x%02x (%s)\n", data, machine().describe_context());
return data;
}
uint8_t at_kbc_device_base::status_r()
{
u8 const data = m_mcu->upi41_master_r(machine().dummy_space(), 1U);
u8 const data = m_mcu->upi41_master_r(1U);
LOGMASKED(LOG_STATUS, "status_r 0x%02x%s%s%s%s%s%s%s%s (%s)\n", data,
BIT(data, 7) ? " PER" : "", BIT(data, 6) ? " RTO" : "",
BIT(data, 5) ? " TTO" : "", BIT(data, 4) ? "" : " INH",
@ -358,12 +358,12 @@ inline u8 at_kbc_device_base::kbd_data_r() const
TIMER_CALLBACK_MEMBER(at_kbc_device_base::write_data)
{
m_mcu->upi41_master_w(machine().dummy_space(), 0U, u8(u32(param)));
m_mcu->upi41_master_w(0U, u8(u32(param)));
}
TIMER_CALLBACK_MEMBER(at_kbc_device_base::write_command)
{
m_mcu->upi41_master_w(machine().dummy_space(), 1U, u8(u32(param)));
m_mcu->upi41_master_w(1U, u8(u32(param)));
}
TIMER_CALLBACK_MEMBER(at_kbc_device_base::set_kbd_clk_in)
@ -425,14 +425,14 @@ uint8_t ps2_keyboard_controller_device::data_r()
{
set_kbd_irq(0U);
set_aux_irq(0U);
u8 const data = m_mcu->upi41_master_r(machine().dummy_space(), 0U);
u8 const data = m_mcu->upi41_master_r(0U);
LOG("data_r 0x%02x (%s)\n", data, machine().describe_context());
return data;
}
uint8_t ps2_keyboard_controller_device::status_r()
{
u8 const data = m_mcu->upi41_master_r(machine().dummy_space(), 1U);
u8 const data = m_mcu->upi41_master_r(1U);
LOGMASKED(LOG_STATUS, "status_r 0x%02x%s%s%s%s%s%s%s%s (%s)\n", data,
BIT(data, 7) ? " PER" : "", BIT(data, 6) ? " GTO" : "",
BIT(data, 5) ? " AUX_OBF" : "", BIT(data, 4) ? "" : " INH",

4
src/mame/drivers/newbrain.cpp
View File

@ -172,7 +172,7 @@ READ8_MEMBER( newbrain_state::iorq_r )
break;
case 2: // COP
data = m_cop->microbus_rd(space, 0);
data = m_cop->microbus_rd();
break;
}
break;
@ -215,7 +215,7 @@ WRITE8_MEMBER( newbrain_state::iorq_w )
break;
case 2: // COP
m_cop->microbus_wr(space, offset, data);
m_cop->microbus_wr(data);
break;
case 3: // ENRG1

4
src/mame/drivers/vp415.cpp
View File

@ -222,7 +222,7 @@ WRITE8_MEMBER(vp415_state::ctrl_regs_w)
break;
case 1: // WR3
logerror("%s: ctrl_regs_w: WR3 (UPI-41): %d=%02x\n", machine().describe_context(), (offset >> 9) & 1, data);
m_ctrlmcu->upi41_master_w(space, (offset >> 9) & 1, data);
m_ctrlmcu->upi41_master_w((offset >> 9) & 1, data);
break;
case 2:
logerror("%s: ctrl_regs_w: N.C. write %02x\n", machine().describe_context(), data);
@ -244,7 +244,7 @@ READ8_MEMBER(vp415_state::ctrl_regs_r)
logerror("%s: ctrl_regs_r: RDEN: %02x\n", machine().describe_context(), value);
break;
case 1: // /RD3
value = m_ctrlmcu->upi41_master_r(space, (offset >> 9) & 1);
value = m_ctrlmcu->upi41_master_r((offset >> 9) & 1);
logerror("%s: ctrl_regs_r: RD3 (UPI-41): %d (%02x)\n", machine().describe_context(), (offset >> 9) & 1, value);
break;
case 2: // /RD2

40
src/mame/machine/decocass.cpp
View File

@ -251,7 +251,7 @@ READ8_MEMBER(decocass_type1_state::decocass_type1_r)
if (1 == (offset & 1))
{
if (0 == (offset & E5XX_MASK))
data = m_mcu->upi41_master_r(space,1);
data = m_mcu->upi41_master_r(1);
else
data = 0xff;
@ -281,11 +281,11 @@ READ8_MEMBER(decocass_type1_state::decocass_type1_r)
}
if (0 == (offset & E5XX_MASK))
data = m_mcu->upi41_master_r(space,0);
data = m_mcu->upi41_master_r(0);
else
data = 0xff;
save = data; /* save the unmodifed data for the latch */
save = data; /* save the unmodified data for the latch */
promaddr = 0;
int promshift = 0;
@ -528,7 +528,7 @@ READ8_MEMBER(decocass_type2_state::decocass_type2_r)
else
{
if (0 == (offset & E5XX_MASK))
data = m_mcu->upi41_master_r(space,offset);
data = m_mcu->upi41_master_r(offset);
else
data = offset & 0xff;
@ -565,7 +565,7 @@ WRITE8_MEMBER(decocass_type2_state::decocass_type2_w)
LOG(3,("PROM:%s D2:%d", m_type2_xx_latch ? "on" : "off", m_type2_d2_latch));
}
}
m_mcu->upi41_master_w(space,offset & 1, data);
m_mcu->upi41_master_w(offset & 1, data);
#ifdef MAME_DEBUG
decocass_fno(offset, data);
@ -608,7 +608,7 @@ READ8_MEMBER(decocass_type3_state::decocass_type3_r)
{
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,1);
data = m_mcu->upi41_master_r(1);
LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
@ -629,7 +629,7 @@ READ8_MEMBER(decocass_type3_state::decocass_type3_r)
{
if (0 == (offset & E5XX_MASK))
{
save = m_mcu->upi41_master_r(space,0);
save = m_mcu->upi41_master_r(0);
switch (m_type3_swap)
{
case TYPE3_SWAP_01:
@ -812,7 +812,7 @@ WRITE8_MEMBER(decocass_type3_state::decocass_type3_w)
}
}
LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
m_mcu->upi41_master_w(space,offset, data);
m_mcu->upi41_master_w(offset, data);
}
/***************************************************************************
@ -836,7 +836,7 @@ READ8_MEMBER(decocass_type4_state::decocass_type4_r)
{
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,1);
data = m_mcu->upi41_master_r(1);
LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
@ -859,7 +859,7 @@ READ8_MEMBER(decocass_type4_state::decocass_type4_r)
{
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,0);
data = m_mcu->upi41_master_r(0);
LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.'));
}
else
@ -899,7 +899,7 @@ WRITE8_MEMBER(decocass_type4_state::decocass_type4_w)
}
}
LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
m_mcu->upi41_master_w(space,offset, data);
m_mcu->upi41_master_w(offset, data);
}
/***************************************************************************
@ -919,7 +919,7 @@ READ8_MEMBER(decocass_type5_state::decocass_type5_r)
{
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,1);
data = m_mcu->upi41_master_r(1);
LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
@ -939,7 +939,7 @@ READ8_MEMBER(decocass_type5_state::decocass_type5_r)
{
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,0);
data = m_mcu->upi41_master_r(0);
LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.'));
}
else
@ -976,7 +976,7 @@ WRITE8_MEMBER(decocass_type5_state::decocass_type5_w)
}
}
LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
m_mcu->upi41_master_w(space,offset, data);
m_mcu->upi41_master_w(offset, data);
}
/***************************************************************************
@ -995,7 +995,7 @@ READ8_MEMBER(decocass_nodong_state::decocass_nodong_r)
{
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,1);
data = m_mcu->upi41_master_r(1);
LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
@ -1008,7 +1008,7 @@ READ8_MEMBER(decocass_nodong_state::decocass_nodong_r)
{
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,0);
data = m_mcu->upi41_master_r(0);
LOG(3,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.'));
}
else
@ -1039,7 +1039,7 @@ READ8_MEMBER(decocass_widel_state::decocass_widel_r)
{
if (m_widel_latch && !machine().side_effects_disabled())
m_widel_ctrs = (m_widel_ctrs + 0x100) & 0xfffff;
data = m_mcu->upi41_master_r(space,1);
data = m_mcu->upi41_master_r(1);
LOG(4,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
@ -1064,7 +1064,7 @@ READ8_MEMBER(decocass_widel_state::decocass_widel_r)
{
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,0);
data = m_mcu->upi41_master_r(0);
LOG(3,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.'));
}
else
@ -1108,7 +1108,7 @@ WRITE8_MEMBER(decocass_widel_state::decocass_widel_w)
}
}
LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
m_mcu->upi41_master_w(space,offset, data);
m_mcu->upi41_master_w(offset, data);
}
/***************************************************************************
@ -1170,7 +1170,7 @@ WRITE8_MEMBER(decocass_state::decocass_e5xx_w)
if (0 == (offset & E5XX_MASK))
{
LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
m_mcu->upi41_master_w(space,offset & 1, data);
m_mcu->upi41_master_w(offset & 1, data);
#ifdef MAME_DEBUG
decocass_fno(offset, data);
#endif

2
src/mame/machine/dmv_keyb.cpp
View File

@ -293,7 +293,7 @@ WRITE8_MEMBER( dmv_keyboard_device::port2_w )
DECLARE_WRITE_LINE_MEMBER(dmv_keyboard_device::sd_poll_w)
{
if (m_sd_poll_state && !state)
m_maincpu->upi41_master_w(m_maincpu->space(), 0, 0);
m_maincpu->upi41_master_w(0, 0);
m_sd_poll_state = state;
}

6
src/mame/machine/imds2ioc.cpp
View File

@ -112,7 +112,7 @@ WRITE8_MEMBER(imds2ioc_device::start_timer_w)
READ8_MEMBER(imds2ioc_device::kb_read)
{
return m_kbcpu->upi41_master_r(space, (offset & 2) >> 1);
return m_kbcpu->upi41_master_r((offset & 2) >> 1);
}
READ8_MEMBER(imds2ioc_device::kb_port_p2_r)
@ -399,12 +399,12 @@ I8275_DRAW_CHARACTER_MEMBER(imds2ioc_device::crtc_display_pixels)
READ8_MEMBER(imds2ioc_device::pio_master_r)
{
return m_iocpio->upi41_master_r(space, offset);
return m_iocpio->upi41_master_r(offset);
}
WRITE8_MEMBER(imds2ioc_device::pio_master_w)
{
m_iocpio->upi41_master_w(space, offset, data);
m_iocpio->upi41_master_w(offset, data);
}
void imds2ioc_device::device_resolve_objects()

4
src/mame/machine/tnzs.cpp
View File

@ -20,7 +20,7 @@
READ8_MEMBER(tnzs_mcu_state::mcu_r)
{
uint8_t data = m_mcu->upi41_master_r(space, offset & 1);
uint8_t data = m_mcu->upi41_master_r(offset & 1);
m_subcpu->yield();
// logerror("%s: read %02x from mcu $c00%01x\n", m_maincpu->pcbase(), data, offset);
@ -32,7 +32,7 @@ WRITE8_MEMBER(tnzs_mcu_state::mcu_w)
{
// logerror("%s: write %02x to mcu $c00%01x\n", m_maincpu->pcbase(), data, offset);
m_mcu->upi41_master_w(space, offset & 1, data);
m_mcu->upi41_master_w(offset & 1, data);
}
READ8_MEMBER(tnzs_mcu_state::mcu_port1_r)