diff --git a/src/mame/drivers/clpoker.cpp b/src/mame/drivers/clpoker.cpp index 04b6173e819..204c9084051 100644 --- a/src/mame/drivers/clpoker.cpp +++ b/src/mame/drivers/clpoker.cpp @@ -10,48 +10,139 @@ Main CPU ROM contains the following string: PCB is marked Chain Leisure CL-001 - 1x Z0840004PSC Z80 CPU -- 1x 12.000 X-TAL +- 1x 12.000 XTAL (second XTAL location is unpopulated) - 1x AY38910A/P sound chip - 2x M5L8255AP-5 - 1x HM86171 RAMDAC - 1x GM76C88L-15 SRAM (8,192 x 8 Bit) +- 1x HY6116ALP-12 CMOS SRAM (2,048 x 8 Bit) - 1x MACH110-20JC CMOS - 2x ATV2500H PLDs - 1x PLSI1024-60LJ CPLD - 1x GAL20V8A-15LNC -- 1x bank of 8 dip-switches +- 1x (should be 2x) bank of 8 dip-switches + +There also are unpopulated locations that might fit a YM3812 and YM3014. */ #include "emu.h" #include "screen.h" +#include "speaker.h" #include "cpu/z80/z80.h" #include "machine/i8255.h" +#include "machine/nvram.h" #include "sound/ay8910.h" +#include "video/ramdac.h" class clpoker_state : public driver_device { public: clpoker_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") { } + , m_maincpu(*this, "maincpu") + , m_videoram(*this, "videoram") + { + } - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + DECLARE_WRITE8_MEMBER(output_a_w); + DECLARE_WRITE8_MEMBER(output_b_w); + DECLARE_WRITE8_MEMBER(output_c_w); + + u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); private: required_device m_maincpu; + required_shared_ptr m_videoram; }; static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, clpoker_state ) - AM_RANGE(0x0000, 0x7fff) AM_ROM + AM_RANGE(0x0000, 0xbfff) AM_ROM + AM_RANGE(0xc000, 0xdfff) AM_RAM AM_SHARE("videoram") + AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE("nvram") + AM_RANGE(0xf000, 0xf000) AM_DEVWRITE("ramdac", ramdac_device, index_w) + AM_RANGE(0xf001, 0xf001) AM_DEVWRITE("ramdac", ramdac_device, pal_w) + AM_RANGE(0xf002, 0xf002) AM_DEVWRITE("ramdac", ramdac_device, mask_w) ADDRESS_MAP_END static ADDRESS_MAP_START( io_map, AS_IO, 8, clpoker_state ) + ADDRESS_MAP_GLOBAL_MASK(0xff) + AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("ppi_outputs", i8255_device, read, write) + AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("ppi_inputs", i8255_device, read, write) + AM_RANGE(0x30, 0x30) AM_DEVREAD("aysnd", ay8910_device, data_r) + AM_RANGE(0x32, 0x32) AM_DEVWRITE("aysnd", ay8910_device, data_w) + AM_RANGE(0x34, 0x34) AM_DEVWRITE("aysnd", ay8910_device, address_w) + AM_RANGE(0xc0, 0xc0) AM_READNOP // mystery read at startup ADDRESS_MAP_END +static ADDRESS_MAP_START( ramdac_map, AS_0, 8, clpoker_state ) + AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac", ramdac_device, ramdac_pal_r, ramdac_rgb666_w) +ADDRESS_MAP_END + +WRITE8_MEMBER(clpoker_state::output_a_w) +{ +} + +WRITE8_MEMBER(clpoker_state::output_b_w) +{ +} + +WRITE8_MEMBER(clpoker_state::output_c_w) +{ +} + static INPUT_PORTS_START( clpoker ) + PORT_START("INA") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("INB") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("INC") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("DSW1") + PORT_DIPUNKNOWN( 0x01, 0x01 ) + PORT_DIPUNKNOWN( 0x02, 0x02 ) + PORT_DIPUNKNOWN( 0x04, 0x04 ) + PORT_DIPUNKNOWN( 0x08, 0x08 ) + PORT_DIPUNKNOWN( 0x10, 0x10 ) + PORT_DIPUNKNOWN( 0x20, 0x20 ) + PORT_DIPUNKNOWN( 0x40, 0x40 ) + PORT_DIPUNKNOWN( 0x80, 0x80 ) + + PORT_START("DSW2") + PORT_DIPUNKNOWN( 0x01, 0x01 ) + PORT_DIPUNKNOWN( 0x02, 0x02 ) + PORT_DIPUNKNOWN( 0x04, 0x04 ) + PORT_DIPUNKNOWN( 0x08, 0x08 ) + PORT_DIPUNKNOWN( 0x10, 0x10 ) + PORT_DIPUNKNOWN( 0x20, 0x20 ) + PORT_DIPUNKNOWN( 0x40, 0x40 ) + PORT_DIPUNKNOWN( 0x80, 0x80 ) INPUT_PORTS_END -uint32_t clpoker_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 clpoker_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { return 0; } @@ -62,7 +153,17 @@ static MACHINE_CONFIG_START( clpoker, clpoker_state ) MCFG_CPU_PROGRAM_MAP(prg_map) MCFG_CPU_IO_MAP(io_map) - // 2x M5L8255AP-5 + MCFG_NVRAM_ADD_0FILL("nvram") // HY6116ALP-12 + + MCFG_DEVICE_ADD("ppi_outputs", I8255, 0) // M5L8255AP-5 + MCFG_I8255_OUT_PORTA_CB(WRITE8(clpoker_state, output_a_w)) + MCFG_I8255_OUT_PORTB_CB(WRITE8(clpoker_state, output_b_w)) + MCFG_I8255_OUT_PORTC_CB(WRITE8(clpoker_state, output_c_w)) + + MCFG_DEVICE_ADD("ppi_inputs", I8255, 0) // M5L8255AP-5 + MCFG_I8255_IN_PORTA_CB(IOPORT("INA")) + MCFG_I8255_IN_PORTB_CB(IOPORT("INB")) + MCFG_I8255_IN_PORTC_CB(IOPORT("INC")) MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) // wrong @@ -72,10 +173,15 @@ static MACHINE_CONFIG_START( clpoker, clpoker_state ) MCFG_SCREEN_UPDATE_DRIVER(clpoker_state, screen_update) MCFG_SCREEN_PALETTE("palette") - MCFG_PALETTE_ADD("palette", 0x1000) + MCFG_PALETTE_ADD("palette", 0x100) + MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // HM86171 /* sound hardware */ - // AY38910A/P + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("aysnd", AY8910, XTAL_12MHz / 8) // AY38910A/P, divider not verified + MCFG_AY8910_PORT_A_READ_CB(IOPORT("DSW1")) + MCFG_AY8910_PORT_B_READ_CB(IOPORT("DSW2")) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30) MACHINE_CONFIG_END