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seta2.cpp: upgraded PCB layout (nw)

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braintro 2018-09-12 21:27:55 -05:00
parent 0c3074d912
commit aec4b10df6
1 changed files with 51 additions and 27 deletions
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src/mame/drivers/seta2.cpp
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@ -3132,35 +3132,59 @@ void funcube_state::init_funcube3()
Guardians Guardians
Banpresto, 1995 Banpresto, 1995
This hardware is not common Banpresto hardware. Possibly licensed CPU: Toshiba TMP68301AF-16 (100 Pin PQFP)
to them from another manufacturer? Or an early design that they decided Video: NEC DX-101 (240 Pin PQFP, @ U10)
not to use for future games? Either way, this game is _extremely_ rare :-) NEC DX-102 (52 Pin PQFP x2, @ U28 & U45)
Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26)
OSC: 50MHz
Other: 8 Position Dipswitch x 2
GAL 16V8 at U38
PCB Layout Memory:
---------- M1 are HM628128LFP-10L at U42 & U43
M2 is W2465K-70LL at U27
M3 are LH5168D-10L at U8 & U9
M4 are CXK58257AM-10L at U6, U7, U13 & U14
P-FG01-1 PCB Number: P-FG01-1
------------------------------------------------------ +-----------------------------------------------------------+
| X1-010 6264 U32 CXK581000 | | +------+ U U CN4* |
| CXK581000 U16 | | VOL |Seta | M 5 5 +--------------+|
| | | |X1-010| 2 8 7 +-+ M | U16 ||
| U20 | | +------+ * * | | 1 +--------------+|
| U3 U5 U2 U4 62256 CXK58257 | +-+ |U| +--------------+|
| 62256 CXK58257 U15 | | +-++-++-++-+ |3| | U20 ||
| | +-+ | || || || | M |2| M +--------------+|
|J U19 | | |U| U||U||U| M M 4 | | 1 +--------------+|
|A TMP68301AF-16 | |J |3||5||2||4| 3 3 +-+ | U15 ||
|M U18 | |A | || || || | M +--------------+|
|M NEC | |M +-++-++-++-+ 4 +--------------+|
|A NEC DX-101 U22 | |M | U19 ||
| DX-102 | |A +--------------+|
| U17 | | +--------------+|
| PAL 50MHz | |C | U18 ||
| U21 | |o +----------+ +--------------+|
| DSW1(8) | |n +-------+ | | +--------------+|
| DSW2(8) CXK58257 NEC | |n |Toshiba| | NEC | | U22 ||
| CXK58257 DX-102| |e | TMP | | DX-101 | +--------------+|
------------------------------------------------------ |c | 68301 | | | +--------------+|
|t U +-------+ | | | U17 ||
|e 5 +----------+ +--------------+|
|r 6 +--------------+|
| * | U21 ||
+-+ +---+ U +--------------+|
| |DX | 3 50MHz 32MHz* |
| |102| 8 |
+-+ +---+ M M +---+ |
| D D 4 4 |DX | |
| S S |102| |
| W W +---+ |
| 2 1 |
+-----------------------------------------------------------+
CN4 - 96 pin connector (3 rows by 32 pins)
* Denotes not populated. U56 is unpopulated 93C45 EEPROM
Notes: Notes:
HSync: 15.23kHz HSync: 15.23kHz