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Update psx drivers to use a driver_device.

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---------- Forwarded message ----------
From: Atari Ace <atari_ace@frontier.com>
Date: Sat, Sep 25, 2010 at 7:46 PM
Subject: [patch] Introduce psx_state
To: submit@mamedev.org
Cc: atariace@hotmail.com


Hi mamedev,

This set of patches introduces psx_state.  The first patch introduces
driver_device skeletons, adding psxram to the common psx_state and
makes a variety of minor adjustments to the code to prepare for the
conversion of the remaining static state.  The second patch then does
the heavy lifting to fill in all the skeletons.

~aa
This commit is contained in:
Aaron Giles 2010-10-14 05:01:09 +00:00
parent 3f92039f09
commit aef77af2cf
14 changed files with 3510 additions and 2995 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
src/emu/sound/psx.c
View File

@ -39,7 +39,7 @@ struct psxinfo
const psx_spu_interface *intf;
running_device *device;
UINT32 *g_p_n_psxram;
UINT32 *m_p_n_psxram;
UINT16 m_n_mainvolumeleft;
UINT16 m_n_mainvolumeright;
UINT16 m_n_reverberationdepthleft;
@ -82,6 +82,7 @@ struct psxinfo
sound_stream *stream;
int installHack;
UINT32 m_n_spu_delay;
};
INLINE struct psxinfo *get_safe_token(running_device *device)
@ -241,7 +242,7 @@ static void spu_read( running_machine *machine, UINT32 n_address, INT32 n_size )
while( n_size > 0 )
{
chip->g_p_n_psxram[ n_address / 4 ] =
chip->m_p_n_psxram[ n_address / 4 ] =
( chip->m_p_n_spuram[ chip->m_n_spuoffset + 0 ] << 0 ) |
( chip->m_p_n_spuram[ chip->m_n_spuoffset + 1 ] << 16 );
verboselog( machine, 2, "%08x > %04x\n", chip->m_n_spuoffset + 0, chip->m_p_n_spuram[ chip->m_n_spuoffset + 0 ] );
@ -260,8 +261,8 @@ static void spu_write( running_machine *machine, UINT32 n_address, INT32 n_size
while( n_size > 0 )
{
chip->m_p_n_spuram[ chip->m_n_spuoffset + 0 ] = ( chip->g_p_n_psxram[ n_address / 4 ] >> 0 );
chip->m_p_n_spuram[ chip->m_n_spuoffset + 1 ] = ( chip->g_p_n_psxram[ n_address / 4 ] >> 16 );
chip->m_p_n_spuram[ chip->m_n_spuoffset + 0 ] = ( chip->m_p_n_psxram[ n_address / 4 ] >> 0 );
chip->m_p_n_spuram[ chip->m_n_spuoffset + 1 ] = ( chip->m_p_n_psxram[ n_address / 4 ] >> 16 );
verboselog( machine, 2, "%08x < %04x\n", chip->m_n_spuoffset + 0, chip->m_p_n_spuram[ chip->m_n_spuoffset + 0 ] );
verboselog( machine, 2, "%08x < %04x\n", chip->m_n_spuoffset + 1, chip->m_p_n_spuram[ chip->m_n_spuoffset + 1 ] );
chip->m_n_spuoffset += 2;
@ -279,7 +280,7 @@ static DEVICE_START( psxspu )
chip->intf = (const psx_spu_interface *)device->baseconfig().static_config();
chip->device = device;
chip->g_p_n_psxram = *(chip->intf->p_psxram);
chip->m_p_n_psxram = (UINT32 *)memory_get_shared(*device->machine, "share1");
chip->m_n_mainvolumeleft = 0;
chip->m_n_mainvolumeright = 0;
@ -373,18 +374,20 @@ static DEVICE_START( psxspu )
}
static UINT32 psx_spu_delay = 0;
WRITE32_DEVICE_HANDLER( psx_spu_delay_w )
{
COMBINE_DATA( &psx_spu_delay );
struct psxinfo *chip = get_safe_token(device);
COMBINE_DATA( &chip->m_n_spu_delay );
verboselog( device->machine, 1, "psx_spu_delay_w( %08x %08x )\n", data, mem_mask );
}
READ32_DEVICE_HANDLER( psx_spu_delay_r )
{
struct psxinfo *chip = get_safe_token(device);
verboselog( device->machine, 1, "psx_spu_delay_r( %08x )\n", mem_mask );
return psx_spu_delay;
return chip->m_n_spu_delay;
}
READ32_DEVICE_HANDLER( psx_spu_r )
@ -466,8 +469,8 @@ WRITE32_DEVICE_HANDLER( psx_spu_w )
if( !chip->installHack )
{
chip->intf->spu_install_read_handler( 4, spu_read );
chip->intf->spu_install_write_handler( 4, spu_write );
chip->intf->spu_install_read_handler( device->machine, 4, spu_read );
chip->intf->spu_install_write_handler( device->machine, 4, spu_write );
chip->installHack = 1;
}

5
src/emu/sound/psx.h
View File

@ -23,10 +23,9 @@ typedef void ( *spu_handler )( running_machine *, UINT32, INT32 );
typedef struct _psx_spu_interface psx_spu_interface;
struct _psx_spu_interface
{
UINT32 **p_psxram;
void (*irq_set)(running_device *,UINT32);
void (*spu_install_read_handler)(int,spu_handler);
void (*spu_install_write_handler)(int,spu_handler);
void (*spu_install_read_handler)(running_machine *,int,spu_handler);
void (*spu_install_write_handler)(running_machine *,int,spu_handler);
};
DECLARE_LEGACY_SOUND_DEVICE(PSXSPU, psxspu);

79
src/mame/drivers/konamigq.c
View File

@ -55,16 +55,27 @@
#include "harddisk.h"
#include "sound/k054539.h"
/* Sound */
class konamigq_state : public psx_state
{
public:
konamigq_state(running_machine &machine, const driver_device_config_base &config)
: psx_state(machine, config) { }
static UINT8 sndto000[ 16 ];
static UINT8 sndtor3k[ 16 ];
UINT8 sndto000[ 16 ];
UINT8 sndtor3k[ 16 ];
UINT8 *p_n_pcmram;
UINT8 sector_buffer[ 512 ];
};
/* Sound */
static WRITE32_HANDLER( soundr3k_w )
{
konamigq_state *state = space->machine->driver_data<konamigq_state>();
if( ACCESSING_BITS_16_31 )
{
sndto000[ ( offset << 1 ) + 1 ] = data >> 16;
state->sndto000[ ( offset << 1 ) + 1 ] = data >> 16;
if( offset == 3 )
{
cputag_set_input_line(space->machine, "soundcpu", 1, HOLD_LINE );
@ -72,15 +83,16 @@ static WRITE32_HANDLER( soundr3k_w )
}
if( ACCESSING_BITS_0_15 )
{
sndto000[ offset << 1 ] = data;
state->sndto000[ offset << 1 ] = data;
}
}
static READ32_HANDLER( soundr3k_r )
{
konamigq_state *state = space->machine->driver_data<konamigq_state>();
UINT32 data;
data = ( sndtor3k[ ( offset << 1 ) + 1 ] << 16 ) | sndtor3k[ offset << 1 ];
data = ( state->sndtor3k[ ( offset << 1 ) + 1 ] << 16 ) | state->sndtor3k[ offset << 1 ];
/* hack to help the main program start up */
if( offset == 1 )
@ -125,29 +137,31 @@ static WRITE32_HANDLER( eeprom_w )
/* PCM RAM */
static UINT8 *m_p_n_pcmram;
static WRITE32_HANDLER( pcmram_w )
{
konamigq_state *state = space->machine->driver_data<konamigq_state>();
if( ACCESSING_BITS_0_7 )
{
m_p_n_pcmram[ offset << 1 ] = data;
state->p_n_pcmram[ offset << 1 ] = data;
}
if( ACCESSING_BITS_16_23 )
{
m_p_n_pcmram[ ( offset << 1 ) + 1 ] = data >> 16;
state->p_n_pcmram[ ( offset << 1 ) + 1 ] = data >> 16;
}
}
static READ32_HANDLER( pcmram_r )
{
return ( m_p_n_pcmram[ ( offset << 1 ) + 1 ] << 16 ) | m_p_n_pcmram[ offset << 1 ];
konamigq_state *state = space->machine->driver_data<konamigq_state>();
return ( state->p_n_pcmram[ ( offset << 1 ) + 1 ] << 16 ) | state->p_n_pcmram[ offset << 1 ];
}
/* Video */
static ADDRESS_MAP_START( konamigq_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") AM_BASE(&g_p_n_psxram) AM_SIZE(&g_n_psxramsize) /* ram */
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */
AM_RANGE(0x1f000000, 0x1f00001f) AM_READWRITE(am53cf96_r, am53cf96_w)
AM_RANGE(0x1f100000, 0x1f10000f) AM_WRITE(soundr3k_w)
AM_RANGE(0x1f100010, 0x1f10001f) AM_READ(soundr3k_r)
@ -222,12 +236,16 @@ static WRITE16_HANDLER( dual539_w )
static READ16_HANDLER( sndcomm68k_r )
{
return sndto000[ offset ];
konamigq_state *state = space->machine->driver_data<konamigq_state>();
return state->sndto000[ offset ];
}
static WRITE16_HANDLER( sndcomm68k_w )
{
sndtor3k[ offset ] = data;
konamigq_state *state = space->machine->driver_data<konamigq_state>();
state->sndtor3k[ offset ] = data;
}
static READ16_HANDLER(tms57002_data_word_r)
@ -268,18 +286,19 @@ static const k054539_interface k054539_config =
/* SCSI */
static UINT8 sector_buffer[ 512 ];
static void scsi_dma_read( running_machine *machine, UINT32 n_address, INT32 n_size )
{
konamigq_state *state = machine->driver_data<konamigq_state>();
UINT32 *p_n_psxram = state->p_n_psxram;
UINT8 *sector_buffer = state->sector_buffer;
int i;
int n_this;
while( n_size > 0 )
{
if( n_size > sizeof( sector_buffer ) / 4 )
if( n_size > sizeof( state->sector_buffer ) / 4 )
{
n_this = sizeof( sector_buffer ) / 4;
n_this = sizeof( state->sector_buffer ) / 4;
}
else
{
@ -291,7 +310,7 @@ static void scsi_dma_read( running_machine *machine, UINT32 n_address, INT32 n_s
i = 0;
while( n_this > 0 )
{
g_p_n_psxram[ n_address / 4 ] =
p_n_psxram[ n_address / 4 ] =
( sector_buffer[ i + 0 ] << 0 ) |
( sector_buffer[ i + 1 ] << 8 ) |
( sector_buffer[ i + 2 ] << 16 ) |
@ -328,9 +347,11 @@ static const struct AM53CF96interface scsi_intf =
static DRIVER_INIT( konamigq )
{
konamigq_state *state = machine->driver_data<konamigq_state>();
psx_driver_init(machine);
m_p_n_pcmram = memory_region( machine, "shared" ) + 0x80000;
state->p_n_pcmram = memory_region( machine, "shared" ) + 0x80000;
}
static void konamigq_exit(running_machine &machine)
@ -340,16 +361,18 @@ static void konamigq_exit(running_machine &machine)
static MACHINE_START( konamigq )
{
konamigq_state *state = machine->driver_data<konamigq_state>();
/* init the scsi controller and hook up it's DMA */
am53cf96_init(machine, &scsi_intf);
machine->add_notifier(MACHINE_NOTIFY_EXIT, konamigq_exit);
psx_dma_install_read_handler(5, scsi_dma_read);
psx_dma_install_write_handler(5, scsi_dma_write);
psx_dma_install_read_handler(machine, 5, scsi_dma_read);
psx_dma_install_write_handler(machine, 5, scsi_dma_write);
state_save_register_global_pointer(machine, m_p_n_pcmram, 0x380000);
state_save_register_global_array(machine, sndto000);
state_save_register_global_array(machine, sndtor3k);
state_save_register_global_array(machine, sector_buffer);
state_save_register_global_pointer(machine, state->p_n_pcmram, 0x380000);
state_save_register_global_array(machine, state->sndto000);
state_save_register_global_array(machine, state->sndtor3k);
state_save_register_global_array(machine, state->sector_buffer);
}
static MACHINE_RESET( konamigq )
@ -357,9 +380,9 @@ static MACHINE_RESET( konamigq )
psx_machine_init(machine);
}
static MACHINE_CONFIG_START( konamigq, driver_device )
static MACHINE_CONFIG_START( konamigq, konamigq_state )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", PSXCPU, XTAL_67_7376MHz )
MDRV_CPU_ADD( "maincpu", PSXCPU, XTAL_67_7376MHz )
MDRV_CPU_PROGRAM_MAP( konamigq_map)
MDRV_CPU_VBLANK_INT("screen", psx_vblank)

154
src/mame/drivers/konamigv.c
View File

@ -122,18 +122,24 @@ Notes:
#include "sound/psx.h"
#include "sound/cdda.h"
/* static variables */
class konamigv_state : public psx_state
{
public:
konamigv_state(running_machine &machine, const driver_device_config_base &config)
: psx_state(machine, config) { }
static UINT8 sector_buffer[ 4096 ];
static UINT32 flash_address;
UINT32 flash_address;
static UINT16 trackball_prev[ 2 ];
static UINT32 trackball_data[ 2 ];
static UINT16 btc_trackball_prev[ 4 ];
static UINT32 btc_trackball_data[ 4 ];
UINT16 trackball_prev[ 2 ];
UINT32 trackball_data[ 2 ];
UINT16 btc_trackball_prev[ 4 ];
UINT32 btc_trackball_data[ 4 ];
static fujitsu_29f016a_device *flash8[4];
static sharp_lh28f400_device *flash16[4];
fujitsu_29f016a_device *flash8[4];
sharp_lh28f400_device *flash16[4];
UINT8 sector_buffer[ 4096 ];
};
/* EEPROM handlers */
@ -154,7 +160,7 @@ static READ32_HANDLER( mb89371_r )
}
static ADDRESS_MAP_START( konamigv_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_SHARE("share1") AM_BASE(&g_p_n_psxram) AM_SIZE(&g_n_psxramsize) /* ram */
AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_SHARE("share1") /* ram */
AM_RANGE(0x1f000000, 0x1f00001f) AM_READWRITE(am53cf96_r, am53cf96_w)
AM_RANGE(0x1f100000, 0x1f100003) AM_READ_PORT("P1")
AM_RANGE(0x1f100004, 0x1f100007) AM_READ_PORT("P2")
@ -190,14 +196,17 @@ ADDRESS_MAP_END
static void scsi_dma_read( running_machine *machine, UINT32 n_address, INT32 n_size )
{
konamigv_state *state = machine->driver_data<konamigv_state>();
UINT32 *p_n_psxram = state->p_n_psxram;
UINT8 *sector_buffer = state->sector_buffer;
int i;
int n_this;
while( n_size > 0 )
{
if( n_size > sizeof( sector_buffer ) / 4 )
if( n_size > sizeof( state->sector_buffer ) / 4 )
{
n_this = sizeof( sector_buffer ) / 4;
n_this = sizeof( state->sector_buffer ) / 4;
}
else
{
@ -219,7 +228,7 @@ static void scsi_dma_read( running_machine *machine, UINT32 n_address, INT32 n_s
i = 0;
while( n_this > 0 )
{
g_p_n_psxram[ n_address / 4 ] =
p_n_psxram[ n_address / 4 ] =
( sector_buffer[ i + 0 ] << 0 ) |
( sector_buffer[ i + 1 ] << 8 ) |
( sector_buffer[ i + 2 ] << 16 ) |
@ -233,14 +242,17 @@ static void scsi_dma_read( running_machine *machine, UINT32 n_address, INT32 n_s
static void scsi_dma_write( running_machine *machine, UINT32 n_address, INT32 n_size )
{
konamigv_state *state = machine->driver_data<konamigv_state>();
UINT32 *p_n_psxram = state->p_n_psxram;
UINT8 *sector_buffer = state->sector_buffer;
int i;
int n_this;
while( n_size > 0 )
{
if( n_size > sizeof( sector_buffer ) / 4 )
if( n_size > sizeof( state->sector_buffer ) / 4 )
{
n_this = sizeof( sector_buffer ) / 4;
n_this = sizeof( state->sector_buffer ) / 4;
}
else
{
@ -251,10 +263,10 @@ static void scsi_dma_write( running_machine *machine, UINT32 n_address, INT32 n_
i = 0;
while( n_this > 0 )
{
sector_buffer[ i + 0 ] = ( g_p_n_psxram[ n_address / 4 ] >> 0 ) & 0xff;
sector_buffer[ i + 1 ] = ( g_p_n_psxram[ n_address / 4 ] >> 8 ) & 0xff;
sector_buffer[ i + 2 ] = ( g_p_n_psxram[ n_address / 4 ] >> 16 ) & 0xff;
sector_buffer[ i + 3 ] = ( g_p_n_psxram[ n_address / 4 ] >> 24 ) & 0xff;
sector_buffer[ i + 0 ] = ( p_n_psxram[ n_address / 4 ] >> 0 ) & 0xff;
sector_buffer[ i + 1 ] = ( p_n_psxram[ n_address / 4 ] >> 8 ) & 0xff;
sector_buffer[ i + 2 ] = ( p_n_psxram[ n_address / 4 ] >> 16 ) & 0xff;
sector_buffer[ i + 3 ] = ( p_n_psxram[ n_address / 4 ] >> 24 ) & 0xff;
n_address += 4;
i += 4;
n_this--;
@ -295,18 +307,20 @@ static DRIVER_INIT( konamigv )
/* init the scsi controller and hook up it's DMA */
am53cf96_init(machine, &scsi_intf);
machine->add_notifier(MACHINE_NOTIFY_EXIT, konamigv_exit);
psx_dma_install_read_handler(5, scsi_dma_read);
psx_dma_install_write_handler(5, scsi_dma_write);
psx_dma_install_read_handler(machine, 5, scsi_dma_read);
psx_dma_install_write_handler(machine, 5, scsi_dma_write);
}
static MACHINE_START( konamigv )
{
state_save_register_global_array(machine, sector_buffer);
state_save_register_global(machine, flash_address);
state_save_register_global_array(machine, trackball_prev);
state_save_register_global_array(machine, trackball_data);
state_save_register_global_array(machine, btc_trackball_prev);
state_save_register_global_array(machine, btc_trackball_data);
konamigv_state *state = machine->driver_data<konamigv_state>();
state_save_register_global_array(machine, state->sector_buffer);
state_save_register_global(machine, state->flash_address);
state_save_register_global_array(machine, state->trackball_prev);
state_save_register_global_array(machine, state->trackball_data);
state_save_register_global_array(machine, state->btc_trackball_prev);
state_save_register_global_array(machine, state->btc_trackball_data);
}
static MACHINE_RESET( konamigv )
@ -324,15 +338,14 @@ static void spu_irq(running_device *device, UINT32 data)
static const psx_spu_interface konamigv_psxspu_interface =
{
&g_p_n_psxram,
spu_irq,
psx_dma_install_read_handler,
psx_dma_install_write_handler
};
static MACHINE_CONFIG_START( konamigv, driver_device )
static MACHINE_CONFIG_START( konamigv, konamigv_state )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", PSXCPU, XTAL_67_7376MHz )
MDRV_CPU_ADD( "maincpu", PSXCPU, XTAL_67_7376MHz )
MDRV_CPU_PROGRAM_MAP( konamigv_map)
MDRV_CPU_VBLANK_INT("screen", psx_vblank)
@ -432,6 +445,7 @@ INPUT_PORTS_END
static READ32_HANDLER( flash_r )
{
konamigv_state *state = space->machine->driver_data<konamigv_state>();
int reg = offset*2;
//int shift = 0;
@ -443,17 +457,17 @@ static READ32_HANDLER( flash_r )
if (reg == 4) // set odd address
{
flash_address |= 1;
state->flash_address |= 1;
}
if (reg == 0)
{
int chip = (flash_address >= 0x200000) ? 2 : 0;
int chip = (state->flash_address >= 0x200000) ? 2 : 0;
int ret;
ret = flash8[chip]->read(flash_address & 0x1fffff) & 0xff;
ret |= flash8[chip+1]->read(flash_address & 0x1fffff)<<8;
flash_address++;
ret = state->flash8[chip]->read(state->flash_address & 0x1fffff) & 0xff;
ret |= state->flash8[chip+1]->read(state->flash_address & 0x1fffff)<<8;
state->flash_address++;
return ret;
}
@ -462,6 +476,7 @@ static READ32_HANDLER( flash_r )
static WRITE32_HANDLER( flash_w )
{
konamigv_state *state = space->machine->driver_data<konamigv_state>();
int reg = offset*2;
int chip;
@ -474,28 +489,30 @@ static WRITE32_HANDLER( flash_w )
switch (reg)
{
case 0:
chip = (flash_address >= 0x200000) ? 2 : 0;
flash8[chip]->write(flash_address & 0x1fffff, data&0xff);
flash8[chip+1]->write(flash_address & 0x1fffff, (data>>8)&0xff);
chip = (state->flash_address >= 0x200000) ? 2 : 0;
state->flash8[chip]->write(state->flash_address & 0x1fffff, data&0xff);
state->flash8[chip+1]->write(state->flash_address & 0x1fffff, (data>>8)&0xff);
break;
case 1:
flash_address = 0;
flash_address |= (data<<1);
state->flash_address = 0;
state->flash_address |= (data<<1);
break;
case 2:
flash_address &= 0xff00ff;
flash_address |= (data<<8);
state->flash_address &= 0xff00ff;
state->flash_address |= (data<<8);
break;
case 3:
flash_address &= 0x00ffff;
flash_address |= (data<<15);
state->flash_address &= 0x00ffff;
state->flash_address |= (data<<15);
break;
}
}
static READ32_HANDLER( trackball_r )
{
konamigv_state *state = space->machine->driver_data<konamigv_state>();
if( offset == 0 && mem_mask == 0x0000ffff )
{
int axis;
@ -506,12 +523,12 @@ static READ32_HANDLER( trackball_r )
for( axis = 0; axis < 2; axis++ )
{
value = input_port_read(space->machine, axisnames[axis]);
diff = value - trackball_prev[ axis ];
trackball_prev[ axis ] = value;
trackball_data[ axis ] = ( ( diff & 0xf00 ) << 16 ) | ( ( diff & 0xff ) << 8 );
diff = value - state->trackball_prev[ axis ];
state->trackball_prev[ axis ] = value;
state->trackball_data[ axis ] = ( ( diff & 0xf00 ) << 16 ) | ( ( diff & 0xff ) << 8 );
}
}
return trackball_data[ offset ];
return state->trackball_data[ offset ];
}
static READ32_HANDLER( unknown_r )
@ -521,10 +538,12 @@ static READ32_HANDLER( unknown_r )
static DRIVER_INIT( simpbowl )
{
flash8[0] = machine->device<fujitsu_29f016a_device>("flash0");
flash8[1] = machine->device<fujitsu_29f016a_device>("flash1");
flash8[2] = machine->device<fujitsu_29f016a_device>("flash2");
flash8[3] = machine->device<fujitsu_29f016a_device>("flash3");
konamigv_state *state = machine->driver_data<konamigv_state>();
state->flash8[0] = machine->device<fujitsu_29f016a_device>("flash0");
state->flash8[1] = machine->device<fujitsu_29f016a_device>("flash1");
state->flash8[2] = machine->device<fujitsu_29f016a_device>("flash2");
state->flash8[3] = machine->device<fujitsu_29f016a_device>("flash3");
memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f68008f, 0, 0, flash_r, flash_w );
memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f6800c0, 0x1f6800c7, 0, 0, trackball_r );
@ -555,13 +574,15 @@ INPUT_PORTS_END
static READ32_HANDLER( btcflash_r )
{
konamigv_state *state = space->machine->driver_data<konamigv_state>();
if (mem_mask == 0x0000ffff)
{
return flash16[0]->read(offset*2);
return state->flash16[0]->read(offset*2);
}
else if (mem_mask == 0xffff0000)
{
return flash16[0]->read((offset*2)+1)<<16;
return state->flash16[0]->read((offset*2)+1)<<16;
}
return 0;
@ -569,18 +590,22 @@ static READ32_HANDLER( btcflash_r )
static WRITE32_HANDLER( btcflash_w )
{
konamigv_state *state = space->machine->driver_data<konamigv_state>();
if (mem_mask == 0x0000ffff)
{
flash16[0]->write(offset*2, data&0xffff);
state->flash16[0]->write(offset*2, data&0xffff);
}
else if (mem_mask == 0xffff0000)
{
flash16[0]->write((offset*2)+1, (data>>16)&0xffff);
state->flash16[0]->write((offset*2)+1, (data>>16)&0xffff);
}
}
static READ32_HANDLER( btc_trackball_r )
{
konamigv_state *state = space->machine->driver_data<konamigv_state>();
// mame_printf_debug( "r %08x %08x %08x\n", cpu_get_pc(space->cpu), offset, mem_mask );
if( offset == 1 && mem_mask == 0xffff0000 )
@ -593,12 +618,13 @@ static READ32_HANDLER( btc_trackball_r )
for( axis = 0; axis < 4; axis++ )
{
value = input_port_read(space->machine, axisnames[axis]);
diff = value - btc_trackball_prev[ axis ];
btc_trackball_prev[ axis ] = value;
btc_trackball_data[ axis ] = ( ( diff & 0xf00 ) << 16 ) | ( ( diff & 0xff ) << 8 );
diff = value - state->btc_trackball_prev[ axis ];
state->btc_trackball_prev[ axis ] = value;
state->btc_trackball_data[ axis ] = ( ( diff & 0xf00 ) << 16 ) | ( ( diff & 0xff ) << 8 );
}
}
return btc_trackball_data[ offset ] | ( btc_trackball_data[ offset + 2 ] >> 8 );
return state->btc_trackball_data[ offset ] | ( state->btc_trackball_data[ offset + 2 ] >> 8 );
}
static WRITE32_HANDLER( btc_trackball_w )
@ -608,7 +634,9 @@ static WRITE32_HANDLER( btc_trackball_w )
static DRIVER_INIT( btchamp )
{
flash16[0] = machine->device<sharp_lh28f400_device>("flash");
konamigv_state *state = machine->driver_data<konamigv_state>();
state->flash16[0] = machine->device<sharp_lh28f400_device>("flash");
memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f68008f, 0, 0, btc_trackball_r, btc_trackball_w );
memory_nop_write ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f6800e0, 0x1f6800e3, 0, 0 );
@ -694,7 +722,9 @@ static WRITE32_HANDLER( kdeadeye_0_w )
static DRIVER_INIT( kdeadeye )
{
flash16[0] = machine->device<sharp_lh28f400_device>("flash");
konamigv_state *state = machine->driver_data<konamigv_state>();
state->flash16[0] = machine->device<sharp_lh28f400_device>("flash");
memory_install_read_port ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f680083, 0, 0, "GUNX1" );
memory_install_read_port ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f680090, 0x1f680093, 0, 0, "GUNY1" );

886
src/mame/drivers/ksys573.c
View File

File diff suppressed because it is too large Load Diff

13
src/mame/drivers/namcos10.c
View File

@ -267,8 +267,15 @@ Utyuu Daisakusen Chocovader Contactee CVC1 Ver.A KC022A
#include "cpu/mips/psx.h"
#include "includes/psx.h"
class namcos10_state : public psx_state
{
public:
namcos10_state(running_machine &machine, const driver_device_config_base &config)
: psx_state(machine, config) { }
};
static ADDRESS_MAP_START( namcos10_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") AM_BASE(&g_p_n_psxram) AM_SIZE(&g_n_psxramsize) /* ram */
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */
AM_RANGE(0x1f800000, 0x1f8003ff) AM_RAM /* scratchpad */
AM_RANGE(0x1f801000, 0x1f801007) AM_WRITENOP
AM_RANGE(0x1f801008, 0x1f80100b) AM_RAM /* ?? */
@ -375,9 +382,9 @@ static MACHINE_RESET( namcos10 )
psx_machine_init(machine);
}
static MACHINE_CONFIG_START( namcos10, driver_device )
static MACHINE_CONFIG_START( namcos10, namcos10_state )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", PSXCPU, XTAL_101_4912MHz )
MDRV_CPU_ADD( "maincpu", PSXCPU, XTAL_101_4912MHz )
MDRV_CPU_PROGRAM_MAP( namcos10_map)
MDRV_CPU_VBLANK_INT("screen", psx_vblank)

111
src/mame/drivers/namcos11.c
View File

@ -273,6 +273,20 @@ Notes:
#define VERBOSE_LEVEL ( 0 )
class namcos11_state : public psx_state
{
public:
namcos11_state(running_machine &machine, const driver_device_config_base &config)
: psx_state(machine, config) { }
UINT32 *sharedram;
UINT32 *keycus;
size_t keycus_size;
UINT8 su_83;
UINT32 m_n_bankoffset;
};
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine *machine, int n_level, const char *s_fmt, ... )
{
if( VERBOSE_LEVEL >= n_level )
@ -286,20 +300,20 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine *machine, int n_level,
}
}
static UINT32 *namcos11_sharedram;
static UINT32 *namcos11_keycus;
static size_t namcos11_keycus_size;
static WRITE32_HANDLER( keycus_w )
{
namcos11_state *state = space->machine->driver_data<namcos11_state>();
verboselog( space->machine, 1, "keycus_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
COMBINE_DATA( &namcos11_keycus[ offset ] );
COMBINE_DATA( &state->keycus[ offset ] );
}
/* tekken 2 */
static READ32_HANDLER( keycus_c406_r )
{
/* todo: verify behaviour */
namcos11_state *state = space->machine->driver_data<namcos11_state>();
UINT32 *namcos11_keycus = state->keycus;
UINT32 data;
data = namcos11_keycus[ offset ];
@ -321,9 +335,10 @@ static READ32_HANDLER( keycus_c406_r )
static READ32_HANDLER( keycus_c409_r )
{
/* todo: verify behaviour */
namcos11_state *state = space->machine->driver_data<namcos11_state>();
UINT32 data;
data = namcos11_keycus[ offset ];
data = state->keycus[ offset ];
switch( offset )
{
case 3:
@ -337,6 +352,8 @@ static READ32_HANDLER( keycus_c409_r )
/* dunk mania */
static READ32_HANDLER( keycus_c410_r )
{
namcos11_state *state = space->machine->driver_data<namcos11_state>();
UINT32 *namcos11_keycus = state->keycus;
UINT32 data;
UINT32 n_value;
@ -371,6 +388,8 @@ static READ32_HANDLER( keycus_c410_r )
/* prime goal ex */
static READ32_HANDLER( keycus_c411_r )
{
namcos11_state *state = space->machine->driver_data<namcos11_state>();
UINT32 *namcos11_keycus = state->keycus;
UINT32 data;
UINT32 n_value;
@ -404,6 +423,8 @@ static READ32_HANDLER( keycus_c411_r )
/* xevious 3d/g */
static READ32_HANDLER( keycus_c430_r )
{
namcos11_state *state = space->machine->driver_data<namcos11_state>();
UINT32 *namcos11_keycus = state->keycus;
UINT32 data;
UINT16 n_value;
@ -438,6 +459,8 @@ static READ32_HANDLER( keycus_c430_r )
/* dancing eyes */
static READ32_HANDLER( keycus_c431_r )
{
namcos11_state *state = space->machine->driver_data<namcos11_state>();
UINT32 *namcos11_keycus = state->keycus;
UINT32 data;
UINT16 n_value;
@ -470,6 +493,8 @@ static READ32_HANDLER( keycus_c431_r )
/* pocket racer */
static READ32_HANDLER( keycus_c432_r )
{
namcos11_state *state = space->machine->driver_data<namcos11_state>();
UINT32 *namcos11_keycus = state->keycus;
UINT32 data;
UINT16 n_value;
@ -504,9 +529,10 @@ static READ32_HANDLER( keycus_c432_r )
static READ32_HANDLER( keycus_c442_r )
{
/* todo: verify behaviour */
namcos11_state *state = space->machine->driver_data<namcos11_state>();
UINT32 data;
data = namcos11_keycus[ offset ];
data = state->keycus[ offset ];
switch( offset )
{
@ -525,9 +551,10 @@ static READ32_HANDLER( keycus_c442_r )
static READ32_HANDLER( keycus_c443_r )
{
/* todo: verify behaviour */
namcos11_state *state = space->machine->driver_data<namcos11_state>();
UINT32 data;
data = namcos11_keycus[ offset ];
data = state->keycus[ offset ];
switch( offset )
{
@ -556,23 +583,24 @@ static READ32_HANDLER( keycus_c443_r )
static INTERRUPT_GEN( namcos11_vblank )
{
namcos11_state *state = device->machine->driver_data<namcos11_state>();
UINT32 *p_n_psxram = state->p_n_psxram;
if( strcmp( device->machine->gamedrv->name, "pocketrc" ) == 0 )
{
if( g_p_n_psxram[ 0x12c74 / 4 ] == 0x1440fff9 )
if( p_n_psxram[ 0x12c74 / 4 ] == 0x1440fff9 )
{
g_p_n_psxram[ 0x12c74 / 4 ] = 0;
p_n_psxram[ 0x12c74 / 4 ] = 0;
}
if( g_p_n_psxram[ 0x64694 / 4 ] == 0x1443000c )
if( p_n_psxram[ 0x64694 / 4 ] == 0x1443000c )
{
g_p_n_psxram[ 0x64694 / 4 ] = 0;
p_n_psxram[ 0x64694 / 4 ] = 0;
}
}
psx_vblank(device);
}
static UINT32 m_n_bankoffset;
INLINE void bankswitch_rom8( address_space *space, const char *bank, int n_data )
{
memory_set_bank( space->machine, bank, ( ( n_data & 0xc0 ) >> 4 ) + ( n_data & 0x03 ) );
@ -596,22 +624,26 @@ static WRITE32_HANDLER( bankswitch_rom32_w )
static WRITE32_HANDLER( bankswitch_rom64_upper_w )
{
namcos11_state *state = space->machine->driver_data<namcos11_state>();
verboselog( space->machine, 2, "bankswitch_rom64_upper_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
if( ACCESSING_BITS_0_15 )
{
m_n_bankoffset = 0;
state->m_n_bankoffset = 0;
}
if( ACCESSING_BITS_16_31 )
{
m_n_bankoffset = 16;
state->m_n_bankoffset = 16;
}
}
INLINE void bankswitch_rom64( address_space *space, const char *bank, int n_data )
{
namcos11_state *state = space->machine->driver_data<namcos11_state>();
/* todo: verify behaviour */
memory_set_bank( space->machine, bank, ( ( ( ( n_data & 0xc0 ) >> 3 ) + ( n_data & 0x07 ) ) ^ m_n_bankoffset ) );
memory_set_bank( space->machine, bank, ( ( ( ( n_data & 0xc0 ) >> 3 ) + ( n_data & 0x07 ) ) ^ state->m_n_bankoffset ) );
}
static WRITE32_HANDLER( bankswitch_rom64_w )
@ -651,16 +683,16 @@ static READ32_HANDLER( lightgun_r )
switch( offset )
{
case 0:
data = input_port_read(space->machine, "GUN1X" );
data = input_port_read( space->machine, "GUN1X" );
break;
case 1:
data = ( input_port_read(space->machine, "GUN1Y" ) ) | ( ( input_port_read(space->machine, "GUN1Y" ) + 1 ) << 16 );
data = ( input_port_read( space->machine, "GUN1Y" ) ) | ( ( input_port_read( space->machine, "GUN1Y" ) + 1 ) << 16 );
break;
case 2:
data = input_port_read(space->machine, "GUN2X" );
data = input_port_read( space->machine, "GUN2X" );
break;
case 3:
data = ( input_port_read(space->machine, "GUN2Y" ) ) | ( ( input_port_read(space->machine, "GUN2Y" ) + 1 ) << 16 );
data = ( input_port_read( space->machine, "GUN2Y" ) ) | ( ( input_port_read( space->machine, "GUN2Y" ) + 1 ) << 16 );
break;
}
verboselog( space->machine, 2, "lightgun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
@ -668,7 +700,7 @@ static READ32_HANDLER( lightgun_r )
}
static ADDRESS_MAP_START( namcos11_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") AM_BASE(&g_p_n_psxram) AM_SIZE(&g_n_psxramsize) /* ram */
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */
AM_RANGE(0x1f800000, 0x1f8003ff) AM_RAM /* scratchpad */
AM_RANGE(0x1f801000, 0x1f801007) AM_WRITENOP
AM_RANGE(0x1f801008, 0x1f80100b) AM_RAM /* ?? */
@ -685,8 +717,8 @@ static ADDRESS_MAP_START( namcos11_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x1f801c00, 0x1f801dff) AM_NOP
AM_RANGE(0x1f802020, 0x1f802033) AM_RAM /* ?? */
AM_RANGE(0x1f802040, 0x1f802043) AM_WRITENOP
AM_RANGE(0x1fa04000, 0x1fa0ffff) AM_RAM AM_BASE(&namcos11_sharedram) /* shared ram with C76 */
AM_RANGE(0x1fa20000, 0x1fa2ffff) AM_WRITE(keycus_w) AM_BASE(&namcos11_keycus) AM_SIZE(&namcos11_keycus_size) /* keycus */
AM_RANGE(0x1fa04000, 0x1fa0ffff) AM_RAM AM_BASE_MEMBER(namcos11_state, sharedram) /* shared ram with C76 */
AM_RANGE(0x1fa20000, 0x1fa2ffff) AM_WRITE(keycus_w) AM_BASE_SIZE_MEMBER(namcos11_state, keycus, keycus_size) /* keycus */
AM_RANGE(0x1fa30000, 0x1fa30fff) AM_DEVREADWRITE8("at28c16", at28c16_r, at28c16_w, 0x00ff00ff) /* eeprom */
AM_RANGE(0x1fb00000, 0x1fb00003) AM_WRITENOP /* ?? */
AM_RANGE(0x1fbf6000, 0x1fbf6003) AM_WRITENOP /* ?? */
@ -700,33 +732,37 @@ ADDRESS_MAP_END
static READ16_HANDLER( c76_shared_r )
{
UINT16 *share16 = (UINT16 *)namcos11_sharedram;
namcos11_state *state = space->machine->driver_data<namcos11_state>();
UINT16 *share16 = (UINT16 *)state->sharedram;
return share16[offset];
}
static WRITE16_HANDLER( c76_shared_w )
{
UINT16 *share16 = (UINT16 *)namcos11_sharedram;
namcos11_state *state = space->machine->driver_data<namcos11_state>();
UINT16 *share16 = (UINT16 *)state->sharedram;
COMBINE_DATA(&share16[offset]);
}
static UINT8 su_83;
static READ16_HANDLER( c76_speedup_r )
{
if ((cpu_get_pc(space->cpu) == 0xc153) && (!(su_83 & 0xff00)))
namcos11_state *state = space->machine->driver_data<namcos11_state>();
if ((cpu_get_pc(space->cpu) == 0xc153) && (!(state->su_83 & 0xff00)))
{
cpu_spinuntil_int(space->cpu);
}
return su_83;
return state->su_83;
}
static WRITE16_HANDLER( c76_speedup_w )
{
COMBINE_DATA(&su_83);
namcos11_state *state = space->machine->driver_data<namcos11_state>();
COMBINE_DATA(&state->su_83);
}
static READ16_HANDLER( c76_inputs_r )
@ -876,6 +912,7 @@ static const struct
static DRIVER_INIT( namcos11 )
{
namcos11_state *state = machine->driver_data<namcos11_state>();
int n_game;
memory_install_readwrite16_handler(cputag_get_address_space(machine, "c76", ADDRESS_SPACE_PROGRAM), 0x82, 0x83, 0, 0, c76_speedup_r, c76_speedup_w);
@ -924,11 +961,11 @@ static DRIVER_INIT( namcos11 )
}
if( namcos11_config_table[ n_game ].n_daughterboard == 64 )
{
m_n_bankoffset = 0;
state->m_n_bankoffset = 0;
memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f080000, 0x1f080003, 0, 0, bankswitch_rom64_upper_w );
memory_nop_read(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fa10020, 0x1fa1002f, 0, 0 );
memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fa10020, 0x1fa1002f, 0, 0, bankswitch_rom64_w );
state_save_register_global(machine, m_n_bankoffset );
state_save_register_global( machine, state->m_n_bankoffset );
}
}
else
@ -949,13 +986,15 @@ static DRIVER_INIT( namcos11 )
static MACHINE_RESET( namcos11 )
{
memset( namcos11_keycus, 0, namcos11_keycus_size );
namcos11_state *state = machine->driver_data<namcos11_state>();
memset( state->keycus, 0, state->keycus_size );
psx_machine_init(machine);
}
static MACHINE_CONFIG_START( coh100, driver_device )
static MACHINE_CONFIG_START( coh100, namcos11_state )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", PSXCPU, XTAL_67_7376MHz )
MDRV_CPU_ADD( "maincpu", PSXCPU, XTAL_67_7376MHz )
MDRV_CPU_PROGRAM_MAP( namcos11_map)
MDRV_CPU_VBLANK_INT("screen", namcos11_vblank)

215
src/mame/drivers/namcos12.c
View File

@ -937,6 +937,33 @@ Notes:
#define VERBOSE_LEVEL ( 0 )
class namcos12_state : public psx_state
{
public:
namcos12_state(running_machine &machine, const driver_device_config_base &config)
: psx_state(machine, config) { }
UINT32 *sharedram;
UINT32 m_n_bankoffset;
UINT32 m_n_dmaoffset;
UINT32 m_n_dmabias;
UINT32 m_n_tektagdmaoffset;
int has_tektagt_dma;
UINT8 kcram[ 12 ];
int ttt_cnt;
UINT32 ttt_val[2];
int s12_porta;
int s12_rtcstate;
int s12_lastpB;
int s12_setstate;
int s12_setnum;
int s12_settings[8];
};
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine *machine, int n_level, const char *s_fmt, ... )
{
if( VERBOSE_LEVEL >= n_level )
@ -950,81 +977,85 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine *machine, int n_level,
}
}
static UINT32 *namcos12_sharedram;
static WRITE32_HANDLER( sharedram_w )
{
namcos12_state *state = space->machine->driver_data<namcos12_state>();
verboselog( space->machine, 1, "sharedram_w( %08x, %08x, %08x )\n", ( offset * 4 ), data, mem_mask );
COMBINE_DATA( &namcos12_sharedram[ offset ] );
COMBINE_DATA( &state->sharedram[ offset ] );
}
static READ32_HANDLER( sharedram_r )
{
verboselog( space->machine, 1, "sharedram_r( %08x, %08x ) %08x\n", ( offset * 4 ), mem_mask, namcos12_sharedram[ offset ] );
return namcos12_sharedram[ offset ];
namcos12_state *state = space->machine->driver_data<namcos12_state>();
verboselog( space->machine, 1, "sharedram_r( %08x, %08x ) %08x\n", ( offset * 4 ), mem_mask, state->sharedram[ offset ] );
return state->sharedram[ offset ];
}
static WRITE16_HANDLER( sharedram_sub_w )
{
UINT16 *shared16 = (UINT16 *)namcos12_sharedram;
namcos12_state *state = space->machine->driver_data<namcos12_state>();
UINT16 *shared16 = (UINT16 *)state->sharedram;
COMBINE_DATA(&shared16[BYTE_XOR_LE(offset)]);
}
static READ16_HANDLER( sharedram_sub_r )
{
UINT16 *shared16 = (UINT16 *)namcos12_sharedram;
namcos12_state *state = space->machine->driver_data<namcos12_state>();
UINT16 *shared16 = (UINT16 *)state->sharedram;
return shared16[BYTE_XOR_LE(offset)];
}
static UINT32 m_n_bankoffset;
static WRITE32_HANDLER( bankoffset_w )
{
namcos12_state *state = space->machine->driver_data<namcos12_state>();
// Golgo 13 has different banking (maybe the keycus controls it?)
if( strcmp( space->machine->gamedrv->name, "golgo13" ) == 0 ||
strcmp( space->machine->gamedrv->name, "g13knd" ) == 0 )
{
if( ( data & 8 ) != 0 )
{
m_n_bankoffset = ( data & 0x6 ) << 2;
state->m_n_bankoffset = ( data & 0x6 ) << 2;
}
else
{
m_n_bankoffset = ( m_n_bankoffset & ~0x7 ) | ( data & 0x7 );
state->m_n_bankoffset = ( state->m_n_bankoffset & ~0x7 ) | ( data & 0x7 );
}
}
else
{
m_n_bankoffset = data;
state->m_n_bankoffset = data;
}
memory_set_bank(space->machine, "bank1", m_n_bankoffset );
memory_set_bank( space->machine, "bank1", state->m_n_bankoffset );
verboselog( space->machine, 1, "bankoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_bankoffset );
verboselog( space->machine, 1, "bankoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, state->m_n_bankoffset );
}
static UINT32 m_n_dmaoffset;
static UINT32 m_n_dmabias;
static UINT32 m_n_tektagdmaoffset;
static int has_tektagt_dma;
static WRITE32_HANDLER( dmaoffset_w )
{
namcos12_state *state = space->machine->driver_data<namcos12_state>();
if( ACCESSING_BITS_0_15 )
{
m_n_dmaoffset = ( offset * 4 ) | ( data << 16 );
state->m_n_dmaoffset = ( offset * 4 ) | ( data << 16 );
}
if( ACCESSING_BITS_16_31 )
{
m_n_dmaoffset = ( ( offset * 4 ) + 2 ) | ( data & 0xffff0000 );
state->m_n_dmaoffset = ( ( offset * 4 ) + 2 ) | ( data & 0xffff0000 );
}
verboselog( space->machine, 1, "dmaoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_dmaoffset );
verboselog( space->machine, 1, "dmaoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, state->m_n_dmaoffset );
}
static void namcos12_rom_read( running_machine *machine, UINT32 n_address, INT32 n_size )
{
namcos12_state *state = machine->driver_data<namcos12_state>();
const char *n_region;
int n_offset;
@ -1034,22 +1065,22 @@ static void namcos12_rom_read( running_machine *machine, UINT32 n_address, INT32
UINT16 *source;
UINT16 *destination;
if(has_tektagt_dma && !m_n_dmaoffset)
if(state->has_tektagt_dma && !state->m_n_dmaoffset)
{
n_region = "user2";
n_offset = m_n_tektagdmaoffset & 0x7fffffff;
n_offset = state->m_n_tektagdmaoffset & 0x7fffffff;
verboselog( machine, 1, "namcos12_rom_read( %08x, %08x ) tektagt %08x\n", n_address, n_size, n_offset );
}
else if( ( m_n_dmaoffset >= 0x80000000 ) || ( m_n_dmabias == 0x1f300000 ) )
else if( ( state->m_n_dmaoffset >= 0x80000000 ) || ( state->m_n_dmabias == 0x1f300000 ) )
{
n_region = "user1";
n_offset = m_n_dmaoffset & 0x003fffff;
n_offset = state->m_n_dmaoffset & 0x003fffff;
verboselog( machine, 1, "namcos12_rom_read( %08x, %08x ) boot %08x\n", n_address, n_size, n_offset );
}
else
{
n_region = "user2";
n_offset = m_n_dmaoffset & 0x7fffffff;
n_offset = state->m_n_dmaoffset & 0x7fffffff;
verboselog( machine, 1, "namcos12_rom_read( %08x, %08x ) game %08x\n", n_address, n_size, n_offset );
}
@ -1061,8 +1092,8 @@ static void namcos12_rom_read( running_machine *machine, UINT32 n_address, INT32
n_size = n_romleft;
}
destination = (UINT16 *) g_p_n_psxram;
n_ramleft = ( g_n_psxramsize - n_address ) / 4;
destination = (UINT16 *)state->p_n_psxram;
n_ramleft = ( state->n_psxramsize - n_address ) / 4;
if( n_size > n_ramleft )
{
verboselog( machine, 1, "namcos12_rom_read dma truncated %d to %d passed end of ram\n", n_size, n_ramleft );
@ -1084,13 +1115,15 @@ static void namcos12_rom_read( running_machine *machine, UINT32 n_address, INT32
static WRITE32_HANDLER( s12_dma_bias_w )
{
m_n_dmabias = data;
namcos12_state *state = space->machine->driver_data<namcos12_state>();
state->m_n_dmabias = data;
}
static ADDRESS_MAP_START( namcos12_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") AM_BASE(&g_p_n_psxram) AM_SIZE(&g_n_psxramsize) /* ram */
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */
AM_RANGE(0x1f000000, 0x1f000003) AM_READNOP AM_WRITE(bankoffset_w) /* banking */
AM_RANGE(0x1f080000, 0x1f083fff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE(&namcos12_sharedram) /* shared ram?? */
AM_RANGE(0x1f080000, 0x1f083fff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE_MEMBER(namcos12_state, sharedram) /* shared ram?? */
AM_RANGE(0x1f140000, 0x1f140fff) AM_DEVREADWRITE8("at28c16", at28c16_r, at28c16_w, 0x00ff00ff) /* eeprom */
AM_RANGE(0x1f1bff08, 0x1f1bff0f) AM_WRITENOP /* ?? */
AM_RANGE(0x1f700000, 0x1f70ffff) AM_WRITE(dmaoffset_w) /* dma */
@ -1173,27 +1206,26 @@ static void system11gun_install( running_machine *machine )
memory_install_read32_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f780000, 0x1f78000f, 0, 0, system11gun_r );
}
static UINT8 kcram[ 12 ];
static WRITE32_HANDLER( kcoff_w )
{
memory_set_bankptr(space->machine, "bank2", memory_region( space->machine, "user1" ) + 0x20280 );
memory_set_bankptr( space->machine, "bank2", memory_region( space->machine, "user1" ) + 0x20280 );
}
static WRITE32_HANDLER( kcon_w )
{
memory_set_bankptr(space->machine, "bank2", kcram );
}
namcos12_state *state = space->machine->driver_data<namcos12_state>();
static int ttt_cnt;
static UINT32 ttt_val[2];
memory_set_bankptr( space->machine, "bank2", state->kcram );
}
static WRITE32_HANDLER( tektagt_protection_1_w )
{
namcos12_state *state = space->machine->driver_data<namcos12_state>();
// Second dma offset or protection ref values write
m_n_tektagdmaoffset = data;
if(ttt_cnt != 2)
ttt_val[ttt_cnt++] = data;
state->m_n_tektagdmaoffset = data;
if(state->ttt_cnt != 2)
state->ttt_val[state->ttt_cnt++] = data;
}
static READ32_HANDLER( tektagt_protection_1_r )
@ -1204,12 +1236,16 @@ static READ32_HANDLER( tektagt_protection_1_r )
static WRITE32_HANDLER( tektagt_protection_2_w )
{
namcos12_state *state = space->machine->driver_data<namcos12_state>();
// Writes are 0 or rand(), only used as a "start prot value write" trigger
ttt_cnt = 0;
state->ttt_cnt = 0;
}
static READ32_HANDLER( tektagt_protection_2_r )
{
namcos12_state *state = space->machine->driver_data<namcos12_state>();
UINT32 *ttt_val = state->ttt_val;
UINT32 data = 0;
if(((ttt_val[0] >> 16) & 0xff) == 0x6d)
@ -1238,17 +1274,18 @@ static READ32_HANDLER( tektagt_protection_3_r )
static MACHINE_RESET( namcos12 )
{
namcos12_state *state = machine->driver_data<namcos12_state>();
address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
psx_machine_init(machine);
bankoffset_w(space,0,0,0xffffffff);
has_tektagt_dma = 0;
state->has_tektagt_dma = 0;
if( strcmp( machine->gamedrv->name, "tektagt" ) == 0 ||
strcmp( machine->gamedrv->name, "tektagta" ) == 0 ||
strcmp( machine->gamedrv->name, "tektagtb" ) == 0 ||
strcmp( machine->gamedrv->name, "tektagtc" ) == 0 )
{
has_tektagt_dma = 1;
state->has_tektagt_dma = 1;
memory_install_readwrite32_handler(space, 0x1fb00000, 0x1fb00003, 0, 0, tektagt_protection_1_r, tektagt_protection_1_w );
memory_install_readwrite32_handler(space, 0x1fb80000, 0x1fb80003, 0, 0, tektagt_protection_2_r, tektagt_protection_2_w );
memory_install_read32_handler(space, 0x1f700000, 0x1f700003, 0, 0, tektagt_protection_3_r );
@ -1277,8 +1314,8 @@ static MACHINE_RESET( namcos12 )
memory_install_write32_handler(space, 0x1f008000, 0x1f008003, 0, 0, kcon_w );
memory_install_write32_handler(space, 0x1f018000, 0x1f018003, 0, 0, kcoff_w );
memset( kcram, 0, sizeof( kcram ) );
memory_set_bankptr(space->machine, "bank2", kcram );
memset( state->kcram, 0, sizeof( state->kcram ) );
memory_set_bankptr( space->machine, "bank2", state->kcram );
}
}
@ -1302,23 +1339,25 @@ static READ8_HANDLER( s12_mcu_p8_r )
// in System 12, bit 0 of H8/3002 port A is connected to it's chip enable
// the actual I/O takes place through the H8/3002's serial port B.
static int s12_porta = 0, s12_rtcstate = 0;
static READ8_HANDLER( s12_mcu_pa_r )
{
return s12_porta;
namcos12_state *state = space->machine->driver_data<namcos12_state>();
return state->s12_porta;
}
static WRITE8_HANDLER( s12_mcu_pa_w )
{
namcos12_state *state = space->machine->driver_data<namcos12_state>();
// bit 0 = chip enable for the RTC
// reset the state on the rising edge of the bit
if ((!(s12_porta & 1)) && (data & 1))
if ((!(state->s12_porta & 1)) && (data & 1))
{
s12_rtcstate = 0;
state->s12_rtcstate = 0;
}
s12_porta = data;
state->s12_porta = data;
}
INLINE UINT8 make_bcd(UINT8 data)
@ -1328,13 +1367,14 @@ INLINE UINT8 make_bcd(UINT8 data)
static READ8_HANDLER( s12_mcu_rtc_r )
{
namcos12_state *state = space->machine->driver_data<namcos12_state>();
UINT8 ret = 0;
system_time systime;
static const int weekday[7] = { 7, 1, 2, 3, 4, 5, 6 };
space->machine->current_datetime(systime);
switch (s12_rtcstate)
switch (state->s12_rtcstate)
{
case 0:
ret = make_bcd(systime.local_time.second); // seconds (BCD, 0-59) in bits 0-6, bit 7 = battery low
@ -1362,39 +1402,44 @@ static READ8_HANDLER( s12_mcu_rtc_r )
break;
}
s12_rtcstate++;
state->s12_rtcstate++;
return ret;
}
static int s12_lastpB, s12_setstate, s12_setnum, s12_settings[8];
static READ8_HANDLER( s12_mcu_portB_r )
{
namcos12_state *state = space->machine->driver_data<namcos12_state>();
// golgo13 won't boot if this doesn't toggle every read
s12_lastpB ^= 0x80;
return s12_lastpB;
state->s12_lastpB ^= 0x80;
return state->s12_lastpB;
}
static WRITE8_HANDLER( s12_mcu_portB_w )
{
namcos12_state *state = space->machine->driver_data<namcos12_state>();
// bit 7 = chip enable for the video settings controller
if (data & 0x80)
{
s12_setstate = 0;
state->s12_setstate = 0;
}
s12_lastpB = data;
state->s12_lastpB = data;
}
static WRITE8_HANDLER( s12_mcu_settings_w )
{
if (s12_setstate)
namcos12_state *state = space->machine->driver_data<namcos12_state>();
int *s12_settings = state->s12_settings;
if (state->s12_setstate)
{
// data
s12_settings[s12_setnum] = data;
s12_settings[state->s12_setnum] = data;
if (s12_setnum == 7)
if (state->s12_setnum == 7)
{
logerror("S12 video settings: Contrast: %02x R: %02x G: %02x B: %02x\n",
BITSWAP8(s12_settings[0], 0, 1, 2, 3, 4, 5, 6, 7),
@ -1405,10 +1450,10 @@ static WRITE8_HANDLER( s12_mcu_settings_w )
}
else
{ // setting number
s12_setnum = (data >> 4)-1;
state->s12_setnum = (data >> 4)-1;
}
s12_setstate ^= 1;
state->s12_setstate ^= 1;
}
/* Golgo 13 lightgun inputs
@ -1470,28 +1515,30 @@ ADDRESS_MAP_END
static DRIVER_INIT( namcos12 )
{
namcos12_state *state = machine->driver_data<namcos12_state>();
psx_driver_init(machine);
psx_dma_install_read_handler( 5, namcos12_rom_read );
psx_dma_install_read_handler( machine, 5, namcos12_rom_read );
memory_configure_bank(machine, "bank1", 0, memory_region_length( machine, "user2" ) / 0x200000, memory_region( machine, "user2" ), 0x200000 );
memory_configure_bank(machine, "bank1", 0, memory_region_length( machine, "user2" ) / 0x200000, memory_region( machine, "user2" ), 0x200000 );
s12_porta = 0;
s12_rtcstate = 0;
s12_lastpB = 0x50;
s12_setstate = 0;
s12_setnum = 0;
memset(s12_settings, 0, sizeof(s12_settings));
state->s12_porta = 0;
state->s12_rtcstate = 0;
state->s12_lastpB = 0x50;
state->s12_setstate = 0;
state->s12_setnum = 0;
memset(state->s12_settings, 0, sizeof(state->s12_settings));
m_n_tektagdmaoffset = 0;
m_n_dmaoffset = 0;
m_n_dmabias = 0;
m_n_bankoffset = 0;
memory_set_bank(machine, "bank1", 0 );
state->m_n_tektagdmaoffset = 0;
state->m_n_dmaoffset = 0;
state->m_n_dmabias = 0;
state->m_n_bankoffset = 0;
memory_set_bank( machine, "bank1", 0 );
state_save_register_global(machine, m_n_dmaoffset );
state_save_register_global(machine, m_n_dmabias );
state_save_register_global(machine, m_n_bankoffset );
state_save_register_global( machine, state->m_n_dmaoffset );
state_save_register_global( machine, state->m_n_dmabias );
state_save_register_global( machine, state->m_n_bankoffset );
}
static DRIVER_INIT( ptblank2 )
@ -1511,9 +1558,9 @@ static DRIVER_INIT( ghlpanic )
system11gun_install(machine);
}
static MACHINE_CONFIG_START( coh700, driver_device )
static MACHINE_CONFIG_START( coh700, namcos12_state )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", CXD8661R, XTAL_100MHz )
MDRV_CPU_ADD( "maincpu", CXD8661R, XTAL_100MHz )
MDRV_CPU_PROGRAM_MAP( namcos12_map)
MDRV_CPU_VBLANK_INT("screen", psx_vblank)

267
src/mame/drivers/taitogn.c
View File

@ -328,19 +328,40 @@ Type 3 (PCMCIA Compact Flash Adaptor + Compact Flash card, sealed together with
#include "sound/psx.h"
#include "audio/taito_zm.h"
static intel_te28f160_device *biosflash;
static intel_e28f400_device *pgmflash;
static intel_te28f160_device *sndflash[3];
class taitogn_state : public psx_state
{
public:
taitogn_state(running_machine &machine, const driver_device_config_base &config)
: psx_state(machine, config) { }
intel_te28f160_device *biosflash;
intel_e28f400_device *pgmflash;
intel_te28f160_device *sndflash[3];
unsigned char cis[512];
int locked;
unsigned char rf5c296_reg;
UINT32 control, control2, control3;
int v;
UINT32 m_n_znsecsel;
UINT32 m_b_znsecport;
int m_n_dip_bit;
int m_b_lastclock;
emu_timer *dip_timer;
UINT32 coin_info;
UINT32 mux_data;
};
static unsigned char cis[512];
static int locked;
// rf5c296 is very inaccurate at that point, it hardcodes the gnet config
static unsigned char rf5c296_reg = 0;
static void rf5c296_reg_w(ATTR_UNUSED running_machine *machine, UINT8 reg, UINT8 data)
{
taitogn_state *state = machine->driver_data<taitogn_state>();
// fprintf(stderr, "rf5c296_reg_w %02x, %02x (%s)\n", reg, data, cpuexec_describe_context(machine));
switch (reg)
{
@ -350,7 +371,7 @@ static void rf5c296_reg_w(ATTR_UNUSED running_machine *machine, UINT8 reg, UINT8
if (!(data & 0x40))
{
devtag_reset(machine, "card");
locked = 0x1ff;
state->locked = 0x1ff;
ide_set_gnet_readlock (machine->device("card"), 1);
}
break;
@ -368,6 +389,8 @@ static UINT8 rf5c296_reg_r(ATTR_UNUSED running_machine *machine, UINT8 reg)
static WRITE32_HANDLER(rf5c296_io_w)
{
taitogn_state *state = space->machine->driver_data<taitogn_state>();
if(offset < 2) {
ide_controller32_pcmcia_w(space->machine->device("card"), offset, data, mem_mask);
return;
@ -375,14 +398,16 @@ static WRITE32_HANDLER(rf5c296_io_w)
if(offset == 0x3e0/4) {
if(ACCESSING_BITS_0_7)
rf5c296_reg = data;
state->rf5c296_reg = data;
if(ACCESSING_BITS_8_15)
rf5c296_reg_w(space->machine, rf5c296_reg, data >> 8);
rf5c296_reg_w(space->machine, state->rf5c296_reg, data >> 8);
}
}
static READ32_HANDLER(rf5c296_io_r)
{
taitogn_state *state = space->machine->driver_data<taitogn_state>();
if(offset < 2)
return ide_controller32_pcmcia_r(space->machine->device("card"), offset, mem_mask);
@ -391,9 +416,9 @@ static READ32_HANDLER(rf5c296_io_r)
if(offset == 0x3e0/4) {
UINT32 res = 0xffff0000;
if(ACCESSING_BITS_0_7)
res |= rf5c296_reg;
res |= state->rf5c296_reg;
if(ACCESSING_BITS_8_15)
res |= rf5c296_reg_r(space->machine, rf5c296_reg) << 8;
res |= rf5c296_reg_r(space->machine, state->rf5c296_reg) << 8;
return res;
}
@ -404,13 +429,15 @@ static READ32_HANDLER(rf5c296_io_r)
static READ32_HANDLER(rf5c296_mem_r)
{
taitogn_state *state = space->machine->driver_data<taitogn_state>();
if(offset < 0x80)
return (cis[offset*2+1] << 16) | cis[offset*2];
return (state->cis[offset*2+1] << 16) | state->cis[offset*2];
switch(offset) {
case 0x080: return 0x00800041;
case 0x081: return 0x0000002e;
case 0x100: return locked ? 0x00010000 : 0;
case 0x100: return state->locked ? 0x00010000 : 0;
default:
return 0;
}
@ -418,6 +445,8 @@ static READ32_HANDLER(rf5c296_mem_r)
static WRITE32_HANDLER(rf5c296_mem_w)
{
taitogn_state *state = space->machine->driver_data<taitogn_state>();
if(offset >= 0x140 && offset <= 0x144) {
UINT8 key[5];
int pos = (offset - 0x140)*2;
@ -430,10 +459,10 @@ static WRITE32_HANDLER(rf5c296_mem_w)
chd_get_metadata(get_disk_handle(space->machine, "card"), HARD_DISK_KEY_METADATA_TAG, 0, key, 5, 0, 0, 0);
k = pos < 5 ? key[pos] : 0;
if(v == k)
locked &= ~(1 << pos);
state->locked &= ~(1 << pos);
else
locked |= 1 << pos;
if (!locked) {
state->locked |= 1 << pos;
if (!state->locked) {
ide_set_gnet_readlock (space->machine->device("card"), 0);
}
}
@ -465,56 +494,74 @@ static void gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, U
static READ32_HANDLER(flash_subbios_r)
{
return gen_flash_r(biosflash, offset, mem_mask);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
return gen_flash_r(state->biosflash, offset, mem_mask);
}
static WRITE32_HANDLER(flash_subbios_w)
{
gen_flash_w(biosflash, offset, data, mem_mask);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
gen_flash_w(state->biosflash, offset, data, mem_mask);
}
static READ32_HANDLER(flash_mn102_r)
{
return gen_flash_r(pgmflash, offset, mem_mask);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
return gen_flash_r(state->pgmflash, offset, mem_mask);
}
static WRITE32_HANDLER(flash_mn102_w)
{
gen_flash_w(pgmflash, offset, data, mem_mask);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
gen_flash_w(state->pgmflash, offset, data, mem_mask);
}
static READ32_HANDLER(flash_s1_r)
{
return gen_flash_r(sndflash[0], offset, mem_mask);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
return gen_flash_r(state->sndflash[0], offset, mem_mask);
}
static WRITE32_HANDLER(flash_s1_w)
{
gen_flash_w(sndflash[0], offset, data, mem_mask);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
gen_flash_w(state->sndflash[0], offset, data, mem_mask);
}
static READ32_HANDLER(flash_s2_r)
{
return gen_flash_r(sndflash[1], offset, mem_mask);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
return gen_flash_r(state->sndflash[1], offset, mem_mask);
}
static WRITE32_HANDLER(flash_s2_w)
{
gen_flash_w(sndflash[1], offset, data, mem_mask);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
gen_flash_w(state->sndflash[1], offset, data, mem_mask);
}
static READ32_HANDLER(flash_s3_r)
{
return gen_flash_r(sndflash[2], offset, mem_mask);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
return gen_flash_r(state->sndflash[2], offset, mem_mask);
}
static WRITE32_HANDLER(flash_s3_w)
{
gen_flash_w(sndflash[2], offset, data, mem_mask);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
gen_flash_w(state->sndflash[2], offset, data, mem_mask);
}
static void install_handlers(running_machine *machine, int mode)
{
address_space *a = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
@ -535,28 +582,30 @@ static void install_handlers(running_machine *machine, int mode)
// Misc. controls
static UINT32 control = 0, control2 = 0, control3;
static READ32_HANDLER(control_r)
{
taitogn_state *state = space->machine->driver_data<taitogn_state>();
// fprintf(stderr, "gn_r %08x @ %08x (%s)\n", 0x1fb00000+4*offset, mem_mask, cpuexec_describe_context(space->machine));
return control;
return state->control;
}
static WRITE32_HANDLER(control_w)
{
taitogn_state *state = space->machine->driver_data<taitogn_state>();
// 20 = watchdog
// 04 = select bank
// According to the rom code, bits 1-0 may be part of the bank
// selection too, but they're always 0.
UINT32 p = control;
UINT32 p = state->control;
running_device *mb3773 = space->machine->device("mb3773");
COMBINE_DATA(&control);
COMBINE_DATA(&state->control);
mb3773_set_ck(mb3773, (control & 0x20) >> 5);
mb3773_set_ck(mb3773, (state->control & 0x20) >> 5);
#if 0
if((p ^ control) & ~0x20)
@ -571,23 +620,29 @@ static WRITE32_HANDLER(control_w)
cpuexec_describe_context(space->machine));
#endif
if((p ^ control) & 0x04)
install_handlers(space->machine, control & 4 ? 1 : 0);
if((p ^ state->control) & 0x04)
install_handlers(space->machine, state->control & 4 ? 1 : 0);
}
static WRITE32_HANDLER(control2_w)
{
COMBINE_DATA(&control2);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
COMBINE_DATA(&state->control2);
}
static READ32_HANDLER(control3_r)
{
return control3;
taitogn_state *state = space->machine->driver_data<taitogn_state>();
return state->control3;
}
static WRITE32_HANDLER(control3_w)
{
COMBINE_DATA(&control3);
taitogn_state *state = space->machine->driver_data<taitogn_state>();
COMBINE_DATA(&state->control3);
}
static READ32_HANDLER(gn_1fb70000_r)
@ -610,10 +665,11 @@ static WRITE32_HANDLER(gn_1fb70000_w)
static READ32_HANDLER(hack1_r)
{
static int v = 0;
v = v ^ 8;
taitogn_state *state = space->machine->driver_data<taitogn_state>();
state->v = state->v ^ 8;
// Probably something to do with sound
return v;
return state->v;
}
@ -623,54 +679,56 @@ static READ32_HANDLER(hack1_r)
static const UINT8 tt10[ 8 ] = { 0x80, 0x20, 0x38, 0x08, 0xf1, 0x03, 0xfe, 0xfc };
static const UINT8 tt16[ 8 ] = { 0xc0, 0x04, 0xf9, 0xe1, 0x60, 0x70, 0xf2, 0x02 };
static UINT32 m_n_znsecsel;
static UINT32 m_b_znsecport;
static int m_n_dip_bit;
static int m_b_lastclock;
static emu_timer *dip_timer;
static READ32_HANDLER( znsecsel_r )
{
return m_n_znsecsel;
taitogn_state *state = space->machine->driver_data<taitogn_state>();
return state->m_n_znsecsel;
}
static void sio_znsec0_handler( running_machine *machine, int n_data )
{
taitogn_state *state = machine->driver_data<taitogn_state>();
if( ( n_data & PSX_SIO_OUT_CLOCK ) == 0 )
{
if( m_b_lastclock )
if( state->m_b_lastclock )
psx_sio_input( machine, 0, PSX_SIO_IN_DATA, ( znsec_step( 0, ( n_data & PSX_SIO_OUT_DATA ) != 0 ) != 0 ) * PSX_SIO_IN_DATA );
m_b_lastclock = 0;
state->m_b_lastclock = 0;
}
else
{
m_b_lastclock = 1;
state->m_b_lastclock = 1;
}
}
static void sio_znsec1_handler( running_machine *machine, int n_data )
{
taitogn_state *state = machine->driver_data<taitogn_state>();
if( ( n_data & PSX_SIO_OUT_CLOCK ) == 0 )
{
if( m_b_lastclock )
if( state->m_b_lastclock )
psx_sio_input( machine, 0, PSX_SIO_IN_DATA, ( znsec_step( 1, ( n_data & PSX_SIO_OUT_DATA ) != 0 ) != 0 ) * PSX_SIO_IN_DATA );
m_b_lastclock = 0;
state->m_b_lastclock = 0;
}
else
{
m_b_lastclock = 1;
state->m_b_lastclock = 1;
}
}
static void sio_pad_handler( running_machine *machine, int n_data )
{
taitogn_state *state = machine->driver_data<taitogn_state>();
if( ( n_data & PSX_SIO_OUT_DTR ) != 0 )
{
m_b_znsecport = 1;
state->m_b_znsecport = 1;
}
else
{
m_b_znsecport = 0;
state->m_b_znsecport = 0;
}
psx_sio_input( machine, 0, PSX_SIO_IN_DATA | PSX_SIO_IN_DSR, PSX_SIO_IN_DATA | PSX_SIO_IN_DSR );
@ -678,63 +736,69 @@ static void sio_pad_handler( running_machine *machine, int n_data )
static void sio_dip_handler( running_machine *machine, int n_data )
{
taitogn_state *state = machine->driver_data<taitogn_state>();
if( ( n_data & PSX_SIO_OUT_CLOCK ) == 0 )
{
if( m_b_lastclock )
if( state->m_b_lastclock )
{
int bit = ( ( input_port_read(machine, "DSW") >> m_n_dip_bit ) & 1 );
int bit = ( ( input_port_read(machine, "DSW") >> state->m_n_dip_bit ) & 1 );
psx_sio_input( machine, 0, PSX_SIO_IN_DATA, bit * PSX_SIO_IN_DATA );
m_n_dip_bit++;
m_n_dip_bit &= 7;
state->m_n_dip_bit++;
state->m_n_dip_bit &= 7;
}
m_b_lastclock = 0;
state->m_b_lastclock = 0;
}
else
{
m_b_lastclock = 1;
state->m_b_lastclock = 1;
}
}
static WRITE32_HANDLER( znsecsel_w )
{
COMBINE_DATA( &m_n_znsecsel );
taitogn_state *state = space->machine->driver_data<taitogn_state>();
if( ( m_n_znsecsel & 0x80 ) == 0 )
COMBINE_DATA( &state->m_n_znsecsel );
if( ( state->m_n_znsecsel & 0x80 ) == 0 )
{
psx_sio_install_handler( 0, sio_pad_handler );
psx_sio_install_handler( space->machine, 0, sio_pad_handler );
psx_sio_input( space->machine, 0, PSX_SIO_IN_DSR, 0 );
}
else if( ( m_n_znsecsel & 0x08 ) == 0 )
else if( ( state->m_n_znsecsel & 0x08 ) == 0 )
{
znsec_start( 1 );
psx_sio_install_handler( 0, sio_znsec1_handler );
psx_sio_install_handler( space->machine, 0, sio_znsec1_handler );
psx_sio_input( space->machine, 0, PSX_SIO_IN_DSR, 0 );
}
else if( ( m_n_znsecsel & 0x04 ) == 0 )
else if( ( state->m_n_znsecsel & 0x04 ) == 0 )
{
znsec_start( 0 );
psx_sio_install_handler( 0, sio_znsec0_handler );
psx_sio_install_handler( space->machine, 0, sio_znsec0_handler );
psx_sio_input( space->machine, 0, PSX_SIO_IN_DSR, 0 );
}
else
{
m_n_dip_bit = 0;
m_b_lastclock = 1;
state->m_n_dip_bit = 0;
state->m_b_lastclock = 1;
psx_sio_install_handler( 0, sio_dip_handler );
psx_sio_install_handler( space->machine, 0, sio_dip_handler );
psx_sio_input( space->machine, 0, PSX_SIO_IN_DSR, 0 );
timer_adjust_oneshot( dip_timer, downcast<cpu_device *>(space->cpu)->cycles_to_attotime( 100 ), 1 );
timer_adjust_oneshot( state->dip_timer, downcast<cpu_device *>(space->cpu)->cycles_to_attotime( 100 ), 1 );
}
}
static TIMER_CALLBACK( dip_timer_fired )
{
taitogn_state *state = machine->driver_data<taitogn_state>();
psx_sio_input( machine, 0, PSX_SIO_IN_DSR, param * PSX_SIO_IN_DSR );
if( param )
{
timer_adjust_oneshot(dip_timer, machine->device<cpu_device>("maincpu")->cycles_to_attotime(50), 0);
timer_adjust_oneshot(state->dip_timer, machine->device<cpu_device>("maincpu")->cycles_to_attotime(50), 0);
}
}
@ -764,33 +828,35 @@ static READ32_HANDLER( boardconfig_r )
}
static UINT32 coin_info;
static WRITE32_HANDLER( coin_w )
{
taitogn_state *state = space->machine->driver_data<taitogn_state>();
/* 0x01=counter
0x02=coin lock 1
0x08=??
0x20=coin lock 2
0x80=??
*/
COMBINE_DATA (&coin_info);
COMBINE_DATA (&state->coin_info);
}
static READ32_HANDLER( coin_r )
{
return coin_info;
taitogn_state *state = space->machine->driver_data<taitogn_state>();
return state->coin_info;
}
/* mahjong panel handler (for Usagi & Mahjong Oh) */
static READ32_HANDLER( gnet_mahjong_panel_r )
{
static UINT32 mux_data;
taitogn_state *state = space->machine->driver_data<taitogn_state>();
mux_data = coin_info;
mux_data &= 0xcc;
state->mux_data = state->coin_info;
state->mux_data &= 0xcc;
switch(mux_data)
switch(state->mux_data)
{
case 0x04: return input_port_read(space->machine, "KEY0");
case 0x08: return input_port_read(space->machine, "KEY1");
@ -806,21 +872,23 @@ static READ32_HANDLER( gnet_mahjong_panel_r )
static DRIVER_INIT( coh3002t )
{
biosflash = machine->device<intel_te28f160_device>("biosflash");
pgmflash = machine->device<intel_e28f400_device>("pgmflash");
sndflash[0] = machine->device<intel_te28f160_device>("sndflash0");
sndflash[1] = machine->device<intel_te28f160_device>("sndflash1");
sndflash[2] = machine->device<intel_te28f160_device>("sndflash2");
taitogn_state *state = machine->driver_data<taitogn_state>();
state->biosflash = machine->device<intel_te28f160_device>("biosflash");
state->pgmflash = machine->device<intel_e28f400_device>("pgmflash");
state->sndflash[0] = machine->device<intel_te28f160_device>("sndflash0");
state->sndflash[1] = machine->device<intel_te28f160_device>("sndflash1");
state->sndflash[2] = machine->device<intel_te28f160_device>("sndflash2");
psx_driver_init(machine);
znsec_init(0, tt10);
znsec_init(1, tt16);
psx_sio_install_handler(0, sio_pad_handler);
dip_timer = timer_alloc(machine, dip_timer_fired, NULL );
psx_sio_install_handler(machine, 0, sio_pad_handler);
state->dip_timer = timer_alloc( machine, dip_timer_fired, NULL );
memset(cis, 0xff, 512);
memset(state->cis, 0xff, 512);
if (get_disk_handle(machine, "card") != NULL)
chd_get_metadata(get_disk_handle(machine, "card"), PCMCIA_CIS_METADATA_TAG, 0, cis, 512, 0, 0, 0);
chd_get_metadata(get_disk_handle(machine, "card"), PCMCIA_CIS_METADATA_TAG, 0, state->cis, 512, 0, 0, 0);
}
static DRIVER_INIT( coh3002t_mp )
@ -831,10 +899,12 @@ static DRIVER_INIT( coh3002t_mp )
static MACHINE_RESET( coh3002t )
{
m_b_lastclock = 1;
locked = 0x1ff;
taitogn_state *state = machine->driver_data<taitogn_state>();
state->m_b_lastclock = 1;
state->locked = 0x1ff;
install_handlers(machine, 0);
control = 0;
state->control = 0;
psx_machine_init(machine);
devtag_reset(machine, "card");
ide_set_gnet_readlock(machine->device("card"), 1);
@ -844,7 +914,7 @@ static MACHINE_RESET( coh3002t )
}
static ADDRESS_MAP_START( zn_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") AM_BASE(&g_p_n_psxram) AM_SIZE(&g_n_psxramsize) /* ram */
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */
AM_RANGE(0x00400000, 0x007fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
AM_RANGE(0x1f000000, 0x1f1fffff) AM_READWRITE(flash_s1_r, flash_s1_w)
AM_RANGE(0x1f200000, 0x1f3fffff) AM_READWRITE(flash_s2_r, flash_s2_w)
@ -895,13 +965,12 @@ static void psx_spu_irq(running_device *device, UINT32 data)
static const psx_spu_interface psxspu_interface =
{
&g_p_n_psxram,
psx_spu_irq,
psx_dma_install_read_handler,
psx_dma_install_write_handler
};
static MACHINE_CONFIG_START( coh3002t, driver_device )
static MACHINE_CONFIG_START( coh3002t, taitogn_state )
/* basic machine hardware */
MDRV_CPU_ADD( "maincpu", PSXCPU, XTAL_100MHz )
MDRV_CPU_PROGRAM_MAP( zn_map)

137
src/mame/drivers/twinkle.c
View File

@ -236,33 +236,43 @@ Notes:
#include "sound/cdda.h"
#include "sound/rf5c400.h"
static UINT16 twinkle_spu_ctrl; // SPU board control register
static UINT8 twinkle_spu_shared[0x400]; // SPU/PSX shared dual-ported RAM
class twinkle_state : public psx_state
{
public:
twinkle_state(running_machine &machine, const driver_device_config_base &config)
: psx_state(machine, config) { }
UINT16 spu_ctrl; // SPU board control register
UINT8 spu_shared[0x400]; // SPU/PSX shared dual-ported RAM
UINT32 unknown;
int io_offset;
int output_last[ 0x100 ];
int last_io_offset;
UINT8 sector_buffer[ 4096 ];
};
/* RTC */
static UINT32 twinkle_unknown;
static WRITE32_HANDLER( twinkle_unknown_w )
{
twinkle_state *state = space->machine->driver_data<twinkle_state>();
/* printf( "set unknown data=%08x\n", data ); */
twinkle_unknown = data;
state->unknown = data;
}
static READ32_HANDLER( twinkle_unknown_r )
{
UINT32 data = twinkle_unknown;
twinkle_state *state = space->machine->driver_data<twinkle_state>();
UINT32 data = state->unknown;
/* printf( "get unknown data=%08x\n", data ); */
return data;
}
static int io_offset;
static int output_last[ 0x100 ];
static int last_io_offset;
#define LED_A1 0x0001
#define LED_A2 0x0002
#define LED_B 0x0004
@ -425,17 +435,19 @@ static const UINT16 asciicharset[]=
static WRITE32_HANDLER( twinkle_io_w )
{
twinkle_state *state = space->machine->driver_data<twinkle_state>();
if( ACCESSING_BITS_16_23 )
{
io_offset = ( data >> 16 ) & 0xff;
state->io_offset = ( data >> 16 ) & 0xff;
}
if( ACCESSING_BITS_0_7 )
{
if( output_last[ io_offset ] != ( data & 0xff ) )
if( state->output_last[ state->io_offset ] != ( data & 0xff ) )
{
output_last[ io_offset ] = ( data & 0xff );
state->output_last[ state->io_offset ] = ( data & 0xff );
switch( io_offset )
switch( state->io_offset )
{
/* ? */
case 0x07:
@ -456,7 +468,7 @@ static WRITE32_HANDLER( twinkle_io_w )
case 0x6f:
case 0x77:
case 0x7f:
output_set_indexed_value( "led", ( io_offset - 7 ) / 8, asciicharset[ ( data ^ 0xff ) & 0x7f ] );
output_set_indexed_value( "led", ( state->io_offset - 7 ) / 8, asciicharset[ ( data ^ 0xff ) & 0x7f ] );
break;
case 0x87:
@ -475,12 +487,12 @@ static WRITE32_HANDLER( twinkle_io_w )
if( ( data & 0xfe ) != 0xfe )
{
printf("%02x = %02x\n", io_offset, data & 0xff );
printf("%02x = %02x\n", state->io_offset, data & 0xff );
}
break;
default:
printf( "unknown io %02x = %02x\n", io_offset, data & 0xff );
printf( "unknown io %02x = %02x\n", state->io_offset, data & 0xff );
break;
}
}
@ -489,11 +501,12 @@ static WRITE32_HANDLER( twinkle_io_w )
static READ32_HANDLER(twinkle_io_r)
{
twinkle_state *state = space->machine->driver_data<twinkle_state>();
UINT32 data = 0;
if( ACCESSING_BITS_0_7 )
{
switch( io_offset )
switch( state->io_offset )
{
case 0x07:
data |= input_port_read( space->machine, "IN0" );
@ -520,9 +533,9 @@ static READ32_HANDLER(twinkle_io_r)
break;
default:
if( last_io_offset != io_offset )
if( state->last_io_offset != state->io_offset )
{
last_io_offset = io_offset;
state->last_io_offset = state->io_offset;
}
break;
@ -580,14 +593,16 @@ static WRITE32_HANDLER(serial_w)
static WRITE32_HANDLER(shared_psx_w)
{
twinkle_state *state = space->machine->driver_data<twinkle_state>();
if (mem_mask == 0xff)
{
twinkle_spu_shared[offset*2] = data;
state->spu_shared[offset*2] = data;
// printf("shared_psx_w: %x to %x (%x), mask %x (PC=%x)\n", data, offset, offset*2, mem_mask, cpu_get_pc(space->cpu));
}
else if (mem_mask == 0xff0000)
{
twinkle_spu_shared[(offset*2)+1] = data;
state->spu_shared[(offset*2)+1] = data;
// printf("shared_psx_w: %x to %x (%x), mask %x (PC=%x)\n", data, offset, (offset*2)+1, mem_mask, cpu_get_pc(space->cpu));
}
else
@ -598,9 +613,10 @@ static WRITE32_HANDLER(shared_psx_w)
static READ32_HANDLER(shared_psx_r)
{
twinkle_state *state = space->machine->driver_data<twinkle_state>();
UINT32 result;
result = twinkle_spu_shared[offset*2] | twinkle_spu_shared[(offset*2)+1]<<16;
result = state->spu_shared[offset*2] | state->spu_shared[(offset*2)+1]<<16;
// printf("shared_psx_r: @ %x (%x %x), mask %x = %x (PC=%x)\n", offset, offset*2, (offset*2)+1, mem_mask, result, cpu_get_pc(space->cpu));
@ -610,7 +626,7 @@ static READ32_HANDLER(shared_psx_r)
}
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") AM_BASE(&g_p_n_psxram) AM_SIZE(&g_n_psxramsize) /* ram */
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */
AM_RANGE(0x1f000000, 0x1f0007ff) AM_READWRITE(shared_psx_r, shared_psx_w)
AM_RANGE(0x1f200000, 0x1f20001f) AM_READWRITE(am53cf96_r, am53cf96_w)
AM_RANGE(0x1f20a01c, 0x1f20a01f) AM_WRITENOP /* scsi? */
@ -656,9 +672,11 @@ ADDRESS_MAP_END
/* SPU board */
static void ide_interrupt(running_device *device, int state)
static void ide_interrupt(running_device *device, int state_)
{
if ((state) && (twinkle_spu_ctrl & 0x0400))
twinkle_state *state = device->machine->driver_data<twinkle_state>();
if ((state_) && (state->spu_ctrl & 0x0400))
{
cputag_set_input_line(device->machine, "audiocpu", M68K_IRQ_6, ASSERT_LINE);
}
@ -694,24 +712,26 @@ static WRITE16_DEVICE_HANDLER( twinkle_ide_w )
*/
static WRITE16_HANDLER( twinkle_spu_ctrl_w )
{
if ((!(data & 0x0080)) && (twinkle_spu_ctrl & 0x0080))
twinkle_state *state = space->machine->driver_data<twinkle_state>();
if ((!(data & 0x0080)) && (state->spu_ctrl & 0x0080))
{
cpu_set_input_line(space->cpu, M68K_IRQ_1, CLEAR_LINE);
}
else if ((!(data & 0x0100)) && (twinkle_spu_ctrl & 0x0100))
else if ((!(data & 0x0100)) && (state->spu_ctrl & 0x0100))
{
cpu_set_input_line(space->cpu, M68K_IRQ_2, CLEAR_LINE);
}
else if ((!(data & 0x0200)) && (twinkle_spu_ctrl & 0x0200))
else if ((!(data & 0x0200)) && (state->spu_ctrl & 0x0200))
{
cpu_set_input_line(space->cpu, M68K_IRQ_4, CLEAR_LINE);
}
else if ((!(data & 0x0400)) && (twinkle_spu_ctrl & 0x0400))
else if ((!(data & 0x0400)) && (state->spu_ctrl & 0x0400))
{
cpu_set_input_line(space->cpu, M68K_IRQ_6, CLEAR_LINE);
}
twinkle_spu_ctrl = data;
state->spu_ctrl = data;
}
static READ16_HANDLER( twinkle_waveram_r )
@ -730,16 +750,20 @@ static WRITE16_HANDLER( twinkle_waveram_w )
static READ16_HANDLER( shared_68k_r )
{
twinkle_state *state = space->machine->driver_data<twinkle_state>();
// printf("shared_68k_r: @ %x, mask %x\n", offset, mem_mask);
return twinkle_spu_shared[offset];
return state->spu_shared[offset];
}
static WRITE16_HANDLER( shared_68k_w )
{
twinkle_state *state = space->machine->driver_data<twinkle_state>();
// printf("shared_68k_w: %x to %x, mask %x\n", data, offset, mem_mask);
twinkle_spu_shared[offset] = data & 0xff;
state->spu_shared[offset] = data & 0xff;
}
static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 16 )
@ -759,18 +783,18 @@ ADDRESS_MAP_END
/* SCSI */
static UINT8 sector_buffer[ 4096 ];
static void scsi_dma_read( running_machine *machine, UINT32 n_address, INT32 n_size )
{
twinkle_state *state = machine->driver_data<twinkle_state>();
UINT32 *p_n_psxram = state->p_n_psxram;
int i;
int n_this;
while( n_size > 0 )
{
if( n_size > sizeof( sector_buffer ) / 4 )
if( n_size > sizeof( state->sector_buffer ) / 4 )
{
n_this = sizeof( sector_buffer ) / 4;
n_this = sizeof( state->sector_buffer ) / 4;
}
else
{
@ -779,12 +803,12 @@ static void scsi_dma_read( running_machine *machine, UINT32 n_address, INT32 n_s
if( n_this < 2048 / 4 )
{
/* non-READ commands */
am53cf96_read_data( n_this * 4, sector_buffer );
am53cf96_read_data( n_this * 4, state->sector_buffer );
}
else
{
/* assume normal 2048 byte data for now */
am53cf96_read_data( 2048, sector_buffer );
am53cf96_read_data( 2048, state->sector_buffer );
n_this = 2048 / 4;
}
n_size -= n_this;
@ -792,11 +816,11 @@ static void scsi_dma_read( running_machine *machine, UINT32 n_address, INT32 n_s
i = 0;
while( n_this > 0 )
{
g_p_n_psxram[ n_address / 4 ] =
( sector_buffer[ i + 0 ] << 0 ) |
( sector_buffer[ i + 1 ] << 8 ) |
( sector_buffer[ i + 2 ] << 16 ) |
( sector_buffer[ i + 3 ] << 24 );
p_n_psxram[ n_address / 4 ] =
( state->sector_buffer[ i + 0 ] << 0 ) |
( state->sector_buffer[ i + 1 ] << 8 ) |
( state->sector_buffer[ i + 2 ] << 16 ) |
( state->sector_buffer[ i + 3 ] << 24 );
n_address += 4;
i += 4;
n_this--;
@ -806,14 +830,16 @@ static void scsi_dma_read( running_machine *machine, UINT32 n_address, INT32 n_s
static void scsi_dma_write( running_machine *machine, UINT32 n_address, INT32 n_size )
{
twinkle_state *state = machine->driver_data<twinkle_state>();
UINT32 *p_n_psxram = state->p_n_psxram;
int i;
int n_this;
while( n_size > 0 )
{
if( n_size > sizeof( sector_buffer ) / 4 )
if( n_size > sizeof( state->sector_buffer ) / 4 )
{
n_this = sizeof( sector_buffer ) / 4;
n_this = sizeof( state->sector_buffer ) / 4;
}
else
{
@ -824,16 +850,16 @@ static void scsi_dma_write( running_machine *machine, UINT32 n_address, INT32 n_
i = 0;
while( n_this > 0 )
{
sector_buffer[ i + 0 ] = ( g_p_n_psxram[ n_address / 4 ] >> 0 ) & 0xff;
sector_buffer[ i + 1 ] = ( g_p_n_psxram[ n_address / 4 ] >> 8 ) & 0xff;
sector_buffer[ i + 2 ] = ( g_p_n_psxram[ n_address / 4 ] >> 16 ) & 0xff;
sector_buffer[ i + 3 ] = ( g_p_n_psxram[ n_address / 4 ] >> 24 ) & 0xff;
state->sector_buffer[ i + 0 ] = ( p_n_psxram[ n_address / 4 ] >> 0 ) & 0xff;
state->sector_buffer[ i + 1 ] = ( p_n_psxram[ n_address / 4 ] >> 8 ) & 0xff;
state->sector_buffer[ i + 2 ] = ( p_n_psxram[ n_address / 4 ] >> 16 ) & 0xff;
state->sector_buffer[ i + 3 ] = ( p_n_psxram[ n_address / 4 ] >> 24 ) & 0xff;
n_address += 4;
i += 4;
n_this--;
}
am53cf96_write_data( n_this * 4, sector_buffer );
am53cf96_write_data( n_this * 4, state->sector_buffer );
}
}
@ -860,8 +886,8 @@ static DRIVER_INIT( twinkle )
{
psx_driver_init(machine);
am53cf96_init(machine, &scsi_intf);
psx_dma_install_read_handler(5, scsi_dma_read);
psx_dma_install_write_handler(5, scsi_dma_write);
psx_dma_install_read_handler(machine, 5, scsi_dma_read);
psx_dma_install_write_handler(machine, 5, scsi_dma_write);
running_device *i2cmem = machine->device("security");
i2cmem_e0_write( i2cmem, 0 );
@ -885,7 +911,6 @@ static void spu_irq(running_device *device, UINT32 data)
static const psx_spu_interface twinkle_psxspu_interface =
{
&g_p_n_psxram,
spu_irq,
psx_dma_install_read_handler,
psx_dma_install_write_handler
@ -896,9 +921,9 @@ static const i2cmem_interface i2cmem_interface =
I2CMEM_SLAVE_ADDRESS, 0, 0x100
};
static MACHINE_CONFIG_START( twinkle, driver_device )
static MACHINE_CONFIG_START( twinkle, twinkle_state )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", PSXCPU, XTAL_67_7376MHz )
MDRV_CPU_ADD( "maincpu", PSXCPU, XTAL_67_7376MHz )
MDRV_CPU_PROGRAM_MAP( main_map )
MDRV_CPU_VBLANK_INT( "mainscreen", psx_vblank )

302
src/mame/drivers/zn.c
View File

@ -29,6 +29,34 @@
#define VERBOSE_LEVEL ( 0 )
class zn_state : public psx_state
{
public:
zn_state(running_machine &machine, const driver_device_config_base &config)
: psx_state(machine, config) { }
UINT32 m_n_znsecsel;
UINT32 m_b_znsecport;
int m_n_dip_bit;
int m_b_lastclock;
emu_timer *dip_timer;
size_t taitofx1_eeprom_size1;
UINT8 *taitofx1_eeprom1;
size_t taitofx1_eeprom_size2;
UINT8 *taitofx1_eeprom2;
UINT32 bam2_mcu_command;
int jdredd_gun_mux;
size_t nbajamex_eeprom_size;
UINT8 *nbajamex_eeprom;
int cbaj_to_z80;
int cbaj_to_r3k;
int latch_to_z80;
};
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine *machine, int n_level, const char *s_fmt, ... )
{
if( VERBOSE_LEVEL >= n_level )
@ -42,14 +70,16 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine *machine, int n_level,
}
}
INLINE UINT8 psxreadbyte( UINT32 n_address )
#ifdef UNUSED_FUNCTION
INLINE UINT8 psxreadbyte( UINT32 *p_n_psxram, UINT32 n_address )
{
return *( (UINT8 *)g_p_n_psxram + BYTE4_XOR_LE( n_address ) );
return *( (UINT8 *)p_n_psxram + BYTE4_XOR_LE( n_address ) );
}
#endif
INLINE void psxwritebyte( UINT32 n_address, UINT8 n_data )
INLINE void psxwritebyte( UINT32 *p_n_psxram, UINT32 n_address, UINT8 n_data )
{
*( (UINT8 *)g_p_n_psxram + BYTE4_XOR_LE( n_address ) ) = n_data;
*( (UINT8 *)p_n_psxram + BYTE4_XOR_LE( n_address ) ) = n_data;
}
static const UINT8 ac01[ 8 ] = { 0x80, 0x1c, 0xe2, 0xfa, 0xf9, 0xf1, 0x30, 0xc0 };
@ -204,115 +234,121 @@ static const struct
{ NULL, NULL, NULL }
};
static UINT32 m_n_znsecsel;
static UINT32 m_b_znsecport;
static int m_n_dip_bit;
static int m_b_lastclock;
static emu_timer *dip_timer;
static READ32_HANDLER( znsecsel_r )
{
zn_state *state = space->machine->driver_data<zn_state>();
verboselog( space->machine, 2, "znsecsel_r( %08x, %08x )\n", offset, mem_mask );
return m_n_znsecsel;
return state->m_n_znsecsel;
}
static void sio_znsec0_handler( running_machine *machine, int n_data )
{
zn_state *state = machine->driver_data<zn_state>();
if( ( n_data & PSX_SIO_OUT_CLOCK ) == 0 )
{
if( m_b_lastclock )
if( state->m_b_lastclock )
{
psx_sio_input( machine, 0, PSX_SIO_IN_DATA, ( znsec_step( 0, ( n_data & PSX_SIO_OUT_DATA ) != 0 ) != 0 ) * PSX_SIO_IN_DATA );
}
m_b_lastclock = 0;
state->m_b_lastclock = 0;
}
else
{
m_b_lastclock = 1;
state->m_b_lastclock = 1;
}
}
static void sio_znsec1_handler( running_machine *machine, int n_data )
{
zn_state *state = machine->driver_data<zn_state>();
if( ( n_data & PSX_SIO_OUT_CLOCK ) == 0 )
{
if( m_b_lastclock )
if( state->m_b_lastclock )
{
psx_sio_input( machine, 0, PSX_SIO_IN_DATA, ( znsec_step( 1, ( n_data & PSX_SIO_OUT_DATA ) != 0 ) != 0 ) * PSX_SIO_IN_DATA );
}
m_b_lastclock = 0;
state->m_b_lastclock = 0;
}
else
{
m_b_lastclock = 1;
state->m_b_lastclock = 1;
}
}
static void sio_pad_handler( running_machine *machine, int n_data )
{
zn_state *state = machine->driver_data<zn_state>();
if( ( n_data & PSX_SIO_OUT_DTR ) != 0 )
{
m_b_znsecport = 1;
state->m_b_znsecport = 1;
}
else
{
m_b_znsecport = 0;
state->m_b_znsecport = 0;
}
verboselog( machine, 2, "read pad %04x %04x %02x\n", m_n_znsecsel, m_b_znsecport, n_data );
verboselog( machine, 2, "read pad %04x %04x %02x\n", state->m_n_znsecsel, state->m_b_znsecport, n_data );
psx_sio_input( machine, 0, PSX_SIO_IN_DATA | PSX_SIO_IN_DSR, PSX_SIO_IN_DATA | PSX_SIO_IN_DSR );
}
static void sio_dip_handler( running_machine *machine, int n_data )
{
zn_state *state = machine->driver_data<zn_state>();
if( ( n_data & PSX_SIO_OUT_CLOCK ) == 0 )
{
if( m_b_lastclock )
if( state->m_b_lastclock )
{
int bit = ( ( input_port_read(machine, "DSW") >> m_n_dip_bit ) & 1 );
int bit = ( ( input_port_read(machine, "DSW") >> state->m_n_dip_bit ) & 1 );
verboselog( machine, 2, "read dip %02x -> %02x\n", n_data, bit * PSX_SIO_IN_DATA );
psx_sio_input( machine, 0, PSX_SIO_IN_DATA, bit * PSX_SIO_IN_DATA );
m_n_dip_bit++;
m_n_dip_bit &= 7;
state->m_n_dip_bit++;
state->m_n_dip_bit &= 7;
}
m_b_lastclock = 0;
state->m_b_lastclock = 0;
}
else
{
m_b_lastclock = 1;
state->m_b_lastclock = 1;
}
}
static WRITE32_HANDLER( znsecsel_w )
{
COMBINE_DATA( &m_n_znsecsel );
zn_state *state = space->machine->driver_data<zn_state>();
if( ( m_n_znsecsel & 0x80 ) == 0 )
COMBINE_DATA( &state->m_n_znsecsel );
if( ( state->m_n_znsecsel & 0x80 ) == 0 )
{
psx_sio_install_handler( 0, sio_pad_handler );
psx_sio_install_handler( space->machine, 0, sio_pad_handler );
psx_sio_input( space->machine, 0, PSX_SIO_IN_DSR, 0 );
}
else if( ( m_n_znsecsel & 0x08 ) == 0 )
else if( ( state->m_n_znsecsel & 0x08 ) == 0 )
{
znsec_start( 1 );
psx_sio_install_handler( 0, sio_znsec1_handler );
psx_sio_install_handler( space->machine, 0, sio_znsec1_handler );
psx_sio_input( space->machine, 0, PSX_SIO_IN_DSR, 0 );
}
else if( ( m_n_znsecsel & 0x04 ) == 0 )
else if( ( state->m_n_znsecsel & 0x04 ) == 0 )
{
znsec_start( 0 );
psx_sio_install_handler( 0, sio_znsec0_handler );
psx_sio_install_handler( space->machine, 0, sio_znsec0_handler );
psx_sio_input( space->machine, 0, PSX_SIO_IN_DSR, 0 );
}
else
{
m_n_dip_bit = 0;
m_b_lastclock = 1;
state->m_n_dip_bit = 0;
state->m_b_lastclock = 1;
psx_sio_install_handler( 0, sio_dip_handler );
psx_sio_install_handler( space->machine, 0, sio_dip_handler );
psx_sio_input( space->machine, 0, PSX_SIO_IN_DSR, 0 );
timer_adjust_oneshot( dip_timer, downcast<cpu_device *>(space->cpu)->cycles_to_attotime( 100 ), 1 );
timer_adjust_oneshot( state->dip_timer, downcast<cpu_device *>(space->cpu)->cycles_to_attotime( 100 ), 1 );
}
verboselog( space->machine, 2, "znsecsel_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
@ -320,11 +356,12 @@ static WRITE32_HANDLER( znsecsel_w )
static TIMER_CALLBACK( dip_timer_fired )
{
zn_state *state = machine->driver_data<zn_state>();
psx_sio_input( machine, 0, PSX_SIO_IN_DSR, param * PSX_SIO_IN_DSR );
if( param )
{
timer_adjust_oneshot( dip_timer, machine->device<cpu_device>( "maincpu" )->cycles_to_attotime(50 ), 0 );
timer_adjust_oneshot( state->dip_timer, machine->device<cpu_device>( "maincpu" )->cycles_to_attotime(50 ), 0 );
}
}
@ -380,7 +417,7 @@ static WRITE32_HANDLER( coin_w )
}
static ADDRESS_MAP_START( zn_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") AM_BASE(&g_p_n_psxram) AM_SIZE(&g_n_psxramsize) /* ram */
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */
AM_RANGE(0x00400000, 0x007fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
AM_RANGE(0x1f800000, 0x1f8003ff) AM_RAM /* scratchpad */
AM_RANGE(0x1f801000, 0x1f80100f) AM_RAM /* ?? */
@ -427,6 +464,7 @@ ADDRESS_MAP_END
static void zn_driver_init( running_machine *machine )
{
zn_state *state = machine->driver_data<zn_state>();
int n_game;
psx_driver_init(machine);
@ -438,13 +476,13 @@ static void zn_driver_init( running_machine *machine )
{
znsec_init( 0, zn_config_table[ n_game ].p_n_mainsec );
znsec_init( 1, zn_config_table[ n_game ].p_n_gamesec );
psx_sio_install_handler( 0, sio_pad_handler );
psx_sio_install_handler( machine, 0, sio_pad_handler );
break;
}
n_game++;
}
dip_timer = timer_alloc(machine, dip_timer_fired, NULL );
state->dip_timer = timer_alloc( machine, dip_timer_fired, NULL );
}
static void psx_spu_irq(running_device *device, UINT32 data)
@ -454,7 +492,6 @@ static void psx_spu_irq(running_device *device, UINT32 data)
static const psx_spu_interface psxspu_interface =
{
&g_p_n_psxram,
psx_spu_irq,
psx_dma_install_read_handler,
psx_dma_install_write_handler
@ -462,12 +499,14 @@ static const psx_spu_interface psxspu_interface =
static void zn_machine_init( running_machine *machine )
{
m_n_dip_bit = 0;
m_b_lastclock = 1;
zn_state *state = machine->driver_data<zn_state>();
state->m_n_dip_bit = 0;
state->m_b_lastclock = 1;
psx_machine_init(machine);
}
static MACHINE_CONFIG_START( zn1_1mb_vram, driver_device )
static MACHINE_CONFIG_START( zn1_1mb_vram, zn_state )
/* basic machine hardware */
MDRV_CPU_ADD( "maincpu", PSXCPU, XTAL_67_7376MHz )
MDRV_CPU_PROGRAM_MAP( zn_map)
@ -504,7 +543,7 @@ static MACHINE_CONFIG_DERIVED( zn1_2mb_vram, zn1_1mb_vram )
MDRV_SCREEN_SIZE( 1024, 1024 )
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( zn2, driver_device )
static MACHINE_CONFIG_START( zn2, zn_state )
/* basic machine hardware */
MDRV_CPU_ADD( "maincpu", PSXCPU, XTAL_100MHz )
MDRV_CPU_PROGRAM_MAP( zn_map)
@ -657,12 +696,12 @@ static READ32_HANDLER( capcom_kickharness_r )
static WRITE32_HANDLER( bank_coh1000c_w )
{
memory_set_bankptr(space->machine, "bank2", memory_region( space->machine, "user2" ) + 0x400000 + ( data * 0x400000 ) );
memory_set_bankptr( space->machine, "bank2", memory_region( space->machine, "user2" ) + 0x400000 + ( data * 0x400000 ) );
}
static WRITE8_HANDLER( qsound_bankswitch_w )
{
memory_set_bankptr(space->machine, "bank10", memory_region( space->machine, "audiocpu" ) + 0x10000 + ( ( data & 0x0f ) * 0x4000 ) );
memory_set_bankptr( space->machine, "bank10", memory_region( space->machine, "audiocpu" ) + 0x10000 + ( ( data & 0x0f ) * 0x4000 ) );
}
static INTERRUPT_GEN( qsound_interrupt )
@ -700,9 +739,9 @@ static DRIVER_INIT( coh1000c )
static MACHINE_RESET( coh1000c )
{
memory_set_bankptr(machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
memory_set_bankptr(machine, "bank2", memory_region( machine, "user2" ) + 0x400000 ); /* banked game rom */
memory_set_bankptr(machine, "bank3", memory_region( machine, "user3" ) ); /* country rom */
memory_set_bankptr( machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
memory_set_bankptr( machine, "bank2", memory_region( machine, "user2" ) + 0x400000 ); /* banked game rom */
memory_set_bankptr( machine, "bank3", memory_region( machine, "user3" ) ); /* country rom */
zn_machine_init(machine);
}
@ -722,7 +761,7 @@ ADDRESS_MAP_END
static MACHINE_CONFIG_DERIVED( coh1000c, zn1_1mb_vram )
MDRV_CPU_ADD("audiocpu", Z80, 8000000 ) /* 8MHz ?? */
MDRV_CPU_ADD( "audiocpu", Z80, 8000000 ) /* 8MHz ?? */
MDRV_CPU_PROGRAM_MAP( qsound_map)
MDRV_CPU_IO_MAP( qsound_portmap)
MDRV_CPU_VBLANK_INT_HACK( qsound_interrupt, 4 ) /* 4 interrupts per frame ?? */
@ -736,7 +775,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( coh1002c, zn1_2mb_vram )
MDRV_CPU_ADD("audiocpu", Z80, 8000000 ) /* 8MHz ?? */
MDRV_CPU_ADD( "audiocpu", Z80, 8000000 ) /* 8MHz ?? */
MDRV_CPU_PROGRAM_MAP( qsound_map)
MDRV_CPU_IO_MAP( qsound_portmap)
MDRV_CPU_VBLANK_INT_HACK( qsound_interrupt, 4 ) /* 4 interrupts per frame ?? */
@ -890,7 +929,7 @@ Notes:
static WRITE32_HANDLER( bank_coh3002c_w )
{
memory_set_bankptr(space->machine, "bank2", memory_region( space->machine, "user2" ) + 0x400000 + ( data * 0x400000 ) );
memory_set_bankptr( space->machine, "bank2", memory_region( space->machine, "user2" ) + 0x400000 + ( data * 0x400000 ) );
}
static DRIVER_INIT( coh3002c )
@ -908,9 +947,9 @@ static DRIVER_INIT( coh3002c )
static MACHINE_RESET( coh3002c )
{
memory_set_bankptr(machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
memory_set_bankptr(machine, "bank2", memory_region( machine, "user2" ) + 0x400000 ); /* banked game rom */
memory_set_bankptr(machine, "bank3", memory_region( machine, "user3" ) ); /* country rom */
memory_set_bankptr( machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
memory_set_bankptr( machine, "bank2", memory_region( machine, "user2" ) + 0x400000 ); /* banked game rom */
memory_set_bankptr( machine, "bank3", memory_region( machine, "user3" ) ); /* country rom */
zn_machine_init(machine);
}
@ -1146,22 +1185,17 @@ Notes:
FM1208S - RAMTRON 4096bit Nonvolatile Ferroelectric RAM (512w x 8b)
*/
static size_t taitofx1_eeprom_size1 = 0;
static UINT8 *taitofx1_eeprom1 = NULL;
static size_t taitofx1_eeprom_size2 = 0;
static UINT8 *taitofx1_eeprom2 = NULL;
static WRITE32_HANDLER( bank_coh1000t_w )
{
running_device *mb3773 = space->machine->device("mb3773");
mb3773_set_ck(mb3773, (data & 0x20) >> 5);
verboselog( space->machine, 1, "bank_coh1000t_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
memory_set_bankptr(space->machine, "bank1", memory_region( space->machine, "user2" ) + ( ( data & 3 ) * 0x800000 ) );
memory_set_bankptr( space->machine, "bank1", memory_region( space->machine, "user2" ) + ( ( data & 3 ) * 0x800000 ) );
}
static WRITE8_HANDLER( fx1a_sound_bankswitch_w )
{
memory_set_bankptr(space->machine, "bank10", memory_region( space->machine, "audiocpu" ) + 0x10000 + ( ( ( data - 1 ) & 0x07 ) * 0x4000 ) );
memory_set_bankptr( space->machine, "bank10", memory_region( space->machine, "audiocpu" ) + 0x10000 + ( ( ( data - 1 ) & 0x07 ) * 0x4000 ) );
}
static READ32_HANDLER( taitofx1a_ymsound_r )
@ -1186,21 +1220,23 @@ static WRITE32_HANDLER( taitofx1a_ymsound_w )
static DRIVER_INIT( coh1000ta )
{
taitofx1_eeprom_size1 = 0x200; taitofx1_eeprom1 = auto_alloc_array(machine, UINT8, taitofx1_eeprom_size1 );
machine->device<nvram_device>("eeprom1")->set_base(taitofx1_eeprom1, taitofx1_eeprom_size1);
zn_state *state = machine->driver_data<zn_state>();
state->taitofx1_eeprom_size1 = 0x200; state->taitofx1_eeprom1 = auto_alloc_array( machine, UINT8, state->taitofx1_eeprom_size1 );
machine->device<nvram_device>("eeprom1")->set_base(state->taitofx1_eeprom1, state->taitofx1_eeprom_size1);
memory_install_read_bank ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, "bank1" ); /* banked game rom */
memory_install_write32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb40000, 0x1fb40003, 0, 0, bank_coh1000t_w ); /* bankswitch */
memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb80000, 0x1fb80003, 0, 0, taitofx1a_ymsound_r, taitofx1a_ymsound_w );
memory_install_readwrite_bank( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbe0000, 0x1fbe0000 + ( taitofx1_eeprom_size1 - 1 ), 0, 0, "bank2" );
memory_install_readwrite_bank( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbe0000, 0x1fbe0000 + ( state->taitofx1_eeprom_size1 - 1 ), 0, 0, "bank2" );
zn_driver_init(machine);
}
static MACHINE_RESET( coh1000ta )
{
memory_set_bankptr(machine, "bank1", memory_region( machine, "user2" ) ); /* banked game rom */
memory_set_bankptr(machine, "bank2", taitofx1_eeprom1 );
zn_state *state = machine->driver_data<zn_state>();
memory_set_bankptr( machine, "bank1", memory_region( machine, "user2" ) ); /* banked game rom */
memory_set_bankptr( machine, "bank2", state->taitofx1_eeprom1 );
zn_machine_init(machine);
}
@ -1242,9 +1278,9 @@ static MACHINE_CONFIG_DERIVED( coh1000ta, zn1_1mb_vram )
MDRV_SOUND_ADD("ymsnd", YM2610B, 16000000/2)
MDRV_SOUND_CONFIG(ym2610_config)
MDRV_SOUND_ROUTE(0, "lspeaker", 0.25)
MDRV_SOUND_ROUTE(0, "lspeaker", 0.25)
MDRV_SOUND_ROUTE(0, "rspeaker", 0.25)
MDRV_SOUND_ROUTE(1, "lspeaker", 1.0)
MDRV_SOUND_ROUTE(1, "lspeaker", 1.0)
MDRV_SOUND_ROUTE(2, "rspeaker", 1.0)
MDRV_MB3773_ADD("mb3773")
@ -1271,28 +1307,32 @@ static READ32_HANDLER( taitofx1b_sound_r )
static DRIVER_INIT( coh1000tb )
{
taitofx1_eeprom_size1 = 0x400; taitofx1_eeprom1 = auto_alloc_array(machine, UINT8, taitofx1_eeprom_size1 );
taitofx1_eeprom_size2 = 0x200; taitofx1_eeprom2 = auto_alloc_array(machine, UINT8, taitofx1_eeprom_size2 );
zn_state *state = machine->driver_data<zn_state>();
machine->device<nvram_device>("eeprom1")->set_base(taitofx1_eeprom1, taitofx1_eeprom_size1);
machine->device<nvram_device>("eeprom2")->set_base(taitofx1_eeprom2, taitofx1_eeprom_size2);
state->taitofx1_eeprom_size1 = 0x400; state->taitofx1_eeprom1 = auto_alloc_array( machine, UINT8, state->taitofx1_eeprom_size1 );
state->taitofx1_eeprom_size2 = 0x200; state->taitofx1_eeprom2 = auto_alloc_array( machine, UINT8, state->taitofx1_eeprom_size2 );
machine->device<nvram_device>("eeprom1")->set_base(state->taitofx1_eeprom1, state->taitofx1_eeprom_size1);
machine->device<nvram_device>("eeprom2")->set_base(state->taitofx1_eeprom2, state->taitofx1_eeprom_size2);
memory_install_read_bank ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, "bank1" ); /* banked game rom */
memory_install_readwrite_bank( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00000 + ( taitofx1_eeprom_size1 - 1 ), 0, 0, "bank2" );
memory_install_readwrite_bank( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00000 + ( state->taitofx1_eeprom_size1 - 1 ), 0, 0, "bank2" );
memory_install_write32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb40000, 0x1fb40003, 0, 0, bank_coh1000t_w ); /* bankswitch */
memory_install_write32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb80000, 0x1fb80003, 0, 0, taitofx1b_volume_w );
memory_install_write32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fba0000, 0x1fba0003, 0, 0, taitofx1b_sound_w );
memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbc0000, 0x1fbc0003, 0, 0, taitofx1b_sound_r );
memory_install_readwrite_bank( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbe0000, 0x1fbe0000 + ( taitofx1_eeprom_size2 - 1 ), 0, 0, "bank3" );
memory_install_readwrite_bank( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbe0000, 0x1fbe0000 + ( state->taitofx1_eeprom_size2 - 1 ), 0, 0, "bank3" );
zn_driver_init(machine);
}
static MACHINE_RESET( coh1000tb )
{
memory_set_bankptr(machine, "bank1", memory_region( machine, "user2" ) ); /* banked game rom */
memory_set_bankptr(machine, "bank2", taitofx1_eeprom1 );
memory_set_bankptr(machine, "bank3", taitofx1_eeprom2 );
zn_state *state = machine->driver_data<zn_state>();
memory_set_bankptr( machine, "bank1", memory_region( machine, "user2" ) ); /* banked game rom */
memory_set_bankptr( machine, "bank2", state->taitofx1_eeprom1 );
memory_set_bankptr( machine, "bank3", state->taitofx1_eeprom2 );
zn_machine_init(machine);
}
@ -1433,6 +1473,8 @@ static void atpsx_interrupt(running_device *device, int state)
static void atpsx_dma_read( running_machine *machine, UINT32 n_address, INT32 n_size )
{
zn_state *state = machine->driver_data<zn_state>();
UINT32 *p_n_psxram = state->p_n_psxram;
running_device *ide = machine->device("ide");
logerror("DMA read: %d bytes (%d words) to %08x\n", n_size<<2, n_size, n_address);
@ -1448,7 +1490,7 @@ static void atpsx_dma_read( running_machine *machine, UINT32 n_address, INT32 n_
n_size <<= 2;
while( n_size > 0 )
{
psxwritebyte( n_address, ide_controller32_r( ide, 0x1f0 / 4, 0x000000ff ) );
psxwritebyte( p_n_psxram, n_address, ide_controller32_r( ide, 0x1f0 / 4, 0x000000ff ) );
n_address++;
n_size--;
}
@ -1474,12 +1516,12 @@ static DRIVER_INIT( coh1000w )
static MACHINE_RESET( coh1000w )
{
memory_set_bankptr(machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
memory_set_bankptr( machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
zn_machine_init(machine);
devtag_reset(machine, "ide");
psx_dma_install_read_handler(5, atpsx_dma_read);
psx_dma_install_write_handler(5, atpsx_dma_write);
psx_dma_install_read_handler(machine, 5, atpsx_dma_read);
psx_dma_install_write_handler(machine, 5, atpsx_dma_write);
}
static MACHINE_CONFIG_DERIVED( coh1000w, zn1_2mb_vram )
@ -1640,7 +1682,7 @@ static WRITE32_HANDLER( coh1002e_bank_w )
{
znsecsel_w( space, offset, data, mem_mask );
memory_set_bankptr(space->machine, "bank1", memory_region( space->machine, "user2" ) + ( ( data & 3 ) * 0x800000 ) );
memory_set_bankptr( space->machine, "bank1", memory_region( space->machine, "user2" ) + ( ( data & 3 ) * 0x800000 ) );
}
static WRITE32_HANDLER( coh1002e_latch_w )
@ -1662,7 +1704,7 @@ static DRIVER_INIT( coh1002e )
static MACHINE_RESET( coh1002e )
{
memory_set_bankptr(machine, "bank1", memory_region( machine, "user2" ) ); /* banked game rom */
memory_set_bankptr( machine, "bank1", memory_region( machine, "user2" ) ); /* banked game rom */
zn_machine_init(machine);
}
@ -1745,26 +1787,29 @@ static WRITE32_HANDLER( bam2_sec_w )
8007f538 = detected device type. 0 = CDROM, 1 = HDD.
*/
static UINT32 bam2_mcu_command;
static WRITE32_HANDLER( bam2_mcu_w )
{
zn_state *state = space->machine->driver_data<zn_state>();
if (offset == 0)
{
if (ACCESSING_BITS_0_15)
{
memory_set_bankptr(space->machine, "bank2", memory_region( space->machine, "user2" ) + ( ( data & 0xf ) * 0x400000 ) );
memory_set_bankptr( space->machine, "bank2", memory_region( space->machine, "user2" ) + ( ( data & 0xf ) * 0x400000 ) );
}
else if (ACCESSING_BITS_16_31)
{
bam2_mcu_command = data>>16;
logerror("MCU command: %04x (PC %08x)\n", bam2_mcu_command, cpu_get_pc(space->cpu));
state->bam2_mcu_command = data>>16;
logerror("MCU command: %04x (PC %08x)\n", state->bam2_mcu_command, cpu_get_pc(space->cpu));
}
}
}
static READ32_HANDLER( bam2_mcu_r )
{
zn_state *state = space->machine->driver_data<zn_state>();
switch (offset)
{
case 0:
@ -1774,7 +1819,7 @@ static READ32_HANDLER( bam2_mcu_r )
case 1:
logerror("MCU status read @ PC %08x mask %08x\n", cpu_get_pc(space->cpu), mem_mask);
switch (bam2_mcu_command)
switch (state->bam2_mcu_command)
{
case 0x7f: // first drive check
case 0x1c: // second drive check (causes HDD detected)
@ -1806,8 +1851,8 @@ static DRIVER_INIT( bam2 )
static MACHINE_RESET( bam2 )
{
memory_set_bankptr(machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
memory_set_bankptr(machine, "bank2", memory_region( machine, "user2" ) + 0x400000 ); /* banked game rom */
memory_set_bankptr( machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
memory_set_bankptr( machine, "bank2", memory_region( machine, "user2" ) + 0x400000 ); /* banked game rom */
zn_machine_init(machine);
}
@ -2044,21 +2089,22 @@ static WRITE32_DEVICE_HANDLER( jdredd_ide_w )
}
}
static int jdredd_gun_mux = 0;
static CUSTOM_INPUT( jdredd_gun_mux_read )
{
return jdredd_gun_mux;
zn_state *state = field->port->machine->driver_data<zn_state>();
return state->jdredd_gun_mux;
}
static INTERRUPT_GEN( jdredd_vblank )
{
zn_state *state = device->machine->driver_data<zn_state>();
int x;
int y;
jdredd_gun_mux = !jdredd_gun_mux;
state->jdredd_gun_mux = !state->jdredd_gun_mux;
if( jdredd_gun_mux == 0 )
if( state->jdredd_gun_mux == 0 )
{
x = input_port_read(device->machine, "GUN1X");
y = input_port_read(device->machine, "GUN1Y");
@ -2072,15 +2118,12 @@ static INTERRUPT_GEN( jdredd_vblank )
if( x > 0x393 && x < 0xcb2 &&
y > 0x02d && y < 0x217 )
{
psx_lightgun_set( x, y );
psx_lightgun_set( device->machine, x, y );
}
psx_vblank( device );
}
static size_t nbajamex_eeprom_size;
static UINT8 *nbajamex_eeprom;
static WRITE32_HANDLER( acpsx_00_w )
{
verboselog( space->machine, 0, "acpsx_00_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
@ -2113,19 +2156,22 @@ static READ32_HANDLER( nbajamex_80_r )
static DRIVER_INIT( coh1000a )
{
zn_state *state = machine->driver_data<zn_state>();
memory_install_read_bank ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f1fffff, 0, 0, "bank1" );
memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbfff00, 0x1fbfff03, 0, 0, acpsx_00_w );
memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbfff10, 0x1fbfff13, 0, 0, acpsx_10_w );
if( strcmp( machine->gamedrv->name, "nbajamex" ) == 0 )
{
nbajamex_eeprom_size = 0x8000; nbajamex_eeprom = auto_alloc_array(machine, UINT8, nbajamex_eeprom_size );
state->nbajamex_eeprom_size = 0x8000;
state->nbajamex_eeprom = auto_alloc_array( machine, UINT8, state->nbajamex_eeprom_size );
memory_install_readwrite_bank( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f200000, 0x1f200000 + ( nbajamex_eeprom_size - 1 ), 0, 0, "bank2" );
memory_install_readwrite_bank( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f200000, 0x1f200000 + ( state->nbajamex_eeprom_size - 1 ), 0, 0, "bank2" );
memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbfff08, 0x1fbfff0b, 0, 0, nbajamex_08_r );
memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbfff80, 0x1fbfff83, 0, 0, nbajamex_80_r, nbajamex_80_w );
memory_set_bankptr(machine, "bank2", nbajamex_eeprom ); /* ram/eeprom/?? */
memory_set_bankptr( machine, "bank2", state->nbajamex_eeprom ); /* ram/eeprom/?? */
}
if( ( !strcmp( machine->gamedrv->name, "jdredd" ) ) ||
@ -2143,7 +2189,7 @@ static DRIVER_INIT( coh1000a )
static MACHINE_RESET( coh1000a )
{
memory_set_bankptr(machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
memory_set_bankptr( machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
zn_machine_init(machine);
if( ( !strcmp( machine->gamedrv->name, "jdredd" ) ) ||
( !strcmp( machine->gamedrv->name, "jdreddb" ) ) )
@ -2285,7 +2331,7 @@ Notes:
static WRITE32_HANDLER( coh1001l_bnk_w )
{
memory_set_bankptr(space->machine, "bank1", memory_region( space->machine, "user2" ) + ( ( ( data >> 16 ) & 3 ) * 0x800000 ) );
memory_set_bankptr( space->machine, "bank1", memory_region( space->machine, "user2" ) + ( ( ( data >> 16 ) & 3 ) * 0x800000 ) );
}
static DRIVER_INIT( coh1001l )
@ -2298,7 +2344,7 @@ static DRIVER_INIT( coh1001l )
static MACHINE_RESET( coh1001l )
{
memory_set_bankptr(machine, "bank1", memory_region( machine, "user2" ) ); /* banked rom */
memory_set_bankptr( machine, "bank1", memory_region( machine, "user2" ) ); /* banked rom */
zn_machine_init(machine);
}
@ -2327,7 +2373,7 @@ Key: Mother KN01
static WRITE32_HANDLER( coh1002v_bnk_w )
{
memory_set_bankptr(space->machine, "bank2", memory_region( space->machine, "user3" ) + ( data * 0x100000 ) );
memory_set_bankptr( space->machine, "bank2", memory_region( space->machine, "user3" ) + ( data * 0x100000 ) );
}
static DRIVER_INIT( coh1002v )
@ -2341,8 +2387,8 @@ static DRIVER_INIT( coh1002v )
static MACHINE_RESET( coh1002v )
{
memory_set_bankptr(machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
memory_set_bankptr(machine, "bank2", memory_region( machine, "user3" ) ); /* banked rom */
memory_set_bankptr( machine, "bank1", memory_region( machine, "user2" ) ); /* fixed game rom */
memory_set_bankptr( machine, "bank2", memory_region( machine, "user3" ) ); /* banked rom */
zn_machine_init(machine);
}
@ -2511,25 +2557,25 @@ Notes:
static WRITE32_HANDLER( coh1002m_bank_w )
{
verboselog( space->machine, 1, "coh1002m_bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
memory_set_bankptr(space->machine, "bank1", memory_region( space->machine, "user2" ) + ((data>>16) * 0x800000));
memory_set_bankptr( space->machine, "bank1", memory_region( space->machine, "user2" ) + ((data>>16) * 0x800000) );
}
static int cbaj_to_z80 = 0, cbaj_to_r3k = 0;
static int latch_to_z80;
static READ32_HANDLER( cbaj_z80_r )
{
int ready = cbaj_to_r3k;
zn_state *state = space->machine->driver_data<zn_state>();
int ready = state->cbaj_to_r3k;
cbaj_to_r3k &= ~2;
state->cbaj_to_r3k &= ~2;
return soundlatch2_r(space,0) | ready<<24;
}
static WRITE32_HANDLER( cbaj_z80_w )
{
cbaj_to_z80 |= 2;
latch_to_z80 = data;
zn_state *state = space->machine->driver_data<zn_state>();
state->cbaj_to_z80 |= 2;
state->latch_to_z80 = data;
}
static DRIVER_INIT( coh1002m )
@ -2543,27 +2589,33 @@ static DRIVER_INIT( coh1002m )
static MACHINE_RESET( coh1002m )
{
memory_set_bankptr(machine, "bank1", memory_region( machine, "user2" ) );
memory_set_bankptr( machine, "bank1", memory_region( machine, "user2" ) );
zn_machine_init(machine);
}
static READ8_HANDLER( cbaj_z80_latch_r )
{
cbaj_to_z80 &= ~2;
return latch_to_z80;
zn_state *state = space->machine->driver_data<zn_state>();
state->cbaj_to_z80 &= ~2;
return state->latch_to_z80;
}
static WRITE8_HANDLER( cbaj_z80_latch_w )
{
cbaj_to_r3k |= 2;
zn_state *state = space->machine->driver_data<zn_state>();
state->cbaj_to_r3k |= 2;
soundlatch2_w(space, 0, data);
}
static READ8_HANDLER( cbaj_z80_ready_r )
{
int ret = cbaj_to_z80;
zn_state *state = space->machine->driver_data<zn_state>();
cbaj_to_z80 &= ~2;
int ret = state->cbaj_to_z80;
state->cbaj_to_z80 &= ~2;
return ret;
}

97
src/mame/includes/psx.h
View File

@ -6,21 +6,14 @@
#if !defined( PSX_H )
/*----------- defined in video/psx.c -----------*/
PALETTE_INIT( psx );
VIDEO_START( psx_type1 );
VIDEO_START( psx_type2 );
VIDEO_UPDATE( psx );
INTERRUPT_GEN( psx_vblank );
extern void psx_gpu_reset( running_machine *machine );
extern void psx_gpu_read( running_machine *, UINT32 *p_ram, INT32 n_size );
extern void psx_gpu_write( running_machine *, UINT32 *p_ram, INT32 n_size );
READ32_HANDLER( psx_gpu_r );
WRITE32_HANDLER( psx_gpu_w );
extern void psx_lightgun_set( int, int );
/*----------- defined in machine/psx.c -----------*/
#define PSX_RC_STOP ( 0x01 )
#define PSX_RC_RESET ( 0x04 ) /* guess */
#define PSX_RC_COUNTTARGET ( 0x08 )
#define PSX_RC_IRQTARGET ( 0x10 )
#define PSX_RC_IRQOVERFLOW ( 0x20 )
#define PSX_RC_REPEAT ( 0x40 )
#define PSX_RC_CLC ( 0x100 )
#define PSX_RC_DIV ( 0x200 )
#define PSX_IRQ_ROOTCOUNTER3 0x0001
#define PSX_IRQ_CDROM 0x0004
@ -34,27 +27,6 @@ extern void psx_lightgun_set( int, int );
#define PSX_IRQ_EXTCD 0x0400
#define PSX_IRQ_MASK (PSX_IRQ_ROOTCOUNTER3 | PSX_IRQ_CDROM | PSX_IRQ_DMA | PSX_IRQ_ROOTCOUNTER2 | PSX_IRQ_ROOTCOUNTER1 | PSX_IRQ_ROOTCOUNTER0 | PSX_IRQ_SIO0 | PSX_IRQ_SIO1 | PSX_IRQ_SPU | PSX_IRQ_EXTCD)
extern UINT32 *g_p_n_psxram;
extern size_t g_n_psxramsize;
typedef void ( *psx_dma_read_handler )( running_machine *, UINT32, INT32 );
typedef void ( *psx_dma_write_handler )( running_machine *, UINT32, INT32 );
WRITE32_HANDLER( psx_com_delay_w );
READ32_HANDLER( psx_com_delay_r );
WRITE32_HANDLER( psx_irq_w );
READ32_HANDLER( psx_irq_r );
extern void psx_irq_set( running_machine *, UINT32 );
extern void psx_dma_install_read_handler( int, psx_dma_read_handler );
extern void psx_dma_install_write_handler( int, psx_dma_read_handler );
WRITE32_HANDLER( psx_dma_w );
READ32_HANDLER( psx_dma_r );
WRITE32_HANDLER( psx_counter_w );
READ32_HANDLER( psx_counter_r );
WRITE32_HANDLER( psx_sio_w );
READ32_HANDLER( psx_sio_r );
typedef void ( *psx_sio_handler )( running_machine *, int );
extern void psx_sio_install_handler( int, psx_sio_handler );
extern void psx_sio_input( running_machine *, int, int, int );
#define PSX_SIO_OUT_DATA ( 1 ) /* COMMAND */
#define PSX_SIO_OUT_DTR ( 2 ) /* ATT */
#define PSX_SIO_OUT_RTS ( 4 )
@ -63,6 +35,59 @@ extern void psx_sio_input( running_machine *, int, int, int );
#define PSX_SIO_IN_DSR ( 2 ) /* ACK */
#define PSX_SIO_IN_CTS ( 4 )
typedef void ( *psx_dma_read_handler )( running_machine *, UINT32, INT32 );
typedef void ( *psx_dma_write_handler )( running_machine *, UINT32, INT32 );
typedef void ( *psx_sio_handler )( running_machine *, int );
typedef struct _psx_machine psx_machine;
typedef struct _psx_gpu psx_gpu;
class psx_state : public driver_device
{
public:
psx_state(running_machine &machine, const driver_device_config_base &config)
: driver_device(machine, config) { }
psx_machine *p_psx;
psx_gpu *p_psxgpu;
UINT32 *p_n_psxram;
size_t n_psxramsize;
};
/*----------- defined in video/psx.c -----------*/
PALETTE_INIT( psx );
VIDEO_START( psx_type1 );
VIDEO_START( psx_type2 );
VIDEO_UPDATE( psx );
INTERRUPT_GEN( psx_vblank );
extern void psx_gpu_reset( running_machine *machine );
extern void psx_gpu_read( running_machine *, UINT32 *p_ram, INT32 n_size );
extern void psx_gpu_write( running_machine *, UINT32 *p_ram, INT32 n_size );
READ32_HANDLER( psx_gpu_r );
WRITE32_HANDLER( psx_gpu_w );
extern void psx_lightgun_set( running_machine *, int, int );
/*----------- defined in machine/psx.c -----------*/
WRITE32_HANDLER( psx_com_delay_w );
READ32_HANDLER( psx_com_delay_r );
WRITE32_HANDLER( psx_irq_w );
READ32_HANDLER( psx_irq_r );
extern void psx_irq_set( running_machine *, UINT32 );
extern void psx_dma_install_read_handler( running_machine *, int, psx_dma_read_handler );
extern void psx_dma_install_write_handler( running_machine *, int, psx_dma_read_handler );
WRITE32_HANDLER( psx_dma_w );
READ32_HANDLER( psx_dma_r );
WRITE32_HANDLER( psx_counter_w );
READ32_HANDLER( psx_counter_r );
WRITE32_HANDLER( psx_sio_w );
READ32_HANDLER( psx_sio_r );
extern void psx_sio_install_handler( running_machine *, int, psx_sio_handler );
extern void psx_sio_input( running_machine *, int, int, int );
WRITE32_HANDLER( psx_mdec_w );
READ32_HANDLER( psx_mdec_r );
extern void psx_machine_init( running_machine *machine );

2079
src/mame/machine/psx.c
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File diff suppressed because it is too large Load Diff

2135
src/mame/video/psx.c
View File

File diff suppressed because it is too large Load Diff