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istellar: Communication latch modernization (nw)

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This commit is contained in:
AJR 2018-04-09 01:43:56 -04:00
parent 67139e021b
commit af0164389e
1 changed files with 23 additions and 60 deletions
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83
src/mame/drivers/istellar.cpp
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@ -23,6 +23,7 @@ Todo:
#include "emu.h"
#include "cpu/z80/z80.h"
#include "machine/gen_latch.h"
#include "machine/ldv1000.h"
#include "render.h"
#include "speaker.h"
@ -42,30 +43,23 @@ public:
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette") { }
DECLARE_DRIVER_INIT(istellar);
void istellar(machine_config &config);
private:
required_device<pioneer_ldv1000_device> m_laserdisc;
required_shared_ptr<uint8_t> m_tile_ram;
required_shared_ptr<uint8_t> m_tile_control_ram;
required_shared_ptr<uint8_t> m_sprite_ram;
uint8_t m_ldp_latch1;
uint8_t m_ldp_latch2;
uint8_t m_z80_2_nmi_enable;
DECLARE_READ8_MEMBER(z80_0_latch1_read);
DECLARE_WRITE8_MEMBER(z80_0_latch2_write);
DECLARE_READ8_MEMBER(z80_2_ldp_read);
DECLARE_READ8_MEMBER(z80_2_latch2_read);
DECLARE_READ8_MEMBER(z80_2_nmienable);
DECLARE_READ8_MEMBER(z80_2_unknown_read);
DECLARE_WRITE8_MEMBER(z80_2_latch1_write);
DECLARE_WRITE8_MEMBER(z80_2_ldp_write);
DECLARE_DRIVER_INIT(istellar);
virtual void machine_start() override;
uint32_t screen_update_istellar(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(vblank_callback_istellar);
DECLARE_WRITE_LINE_MEMBER(vblank_irq);
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_subcpu;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
void istellar(machine_config &config);
void z80_0_io(address_map &map);
void z80_0_mem(address_map &map);
void z80_1_io(address_map &map);
@ -113,26 +107,6 @@ void istellar_state::machine_start()
/* MEMORY HANDLERS */
/* Z80 0 R/W */
READ8_MEMBER(istellar_state::z80_0_latch1_read)
{
/*logerror("CPU0 : reading LDP status latch (%x)\n", m_ldp_latch1);*/
return m_ldp_latch1;
}
WRITE8_MEMBER(istellar_state::z80_0_latch2_write)
{
/*logerror("CPU0 : writing cpu_latch2 (%x). Potentially followed by an IRQ.\n", data);*/
m_ldp_latch2 = data;
/* A CPU2 NMI */
if (m_z80_2_nmi_enable)
{
logerror("Executing an NMI on CPU2\n");
m_subcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE); /* Maybe this is a ASSERT_LINE, CLEAR_LINE combo? */
m_z80_2_nmi_enable = 0;
}
}
/* Z80 1 R/W */
@ -146,31 +120,12 @@ READ8_MEMBER(istellar_state::z80_2_ldp_read)
return readResult;
}
READ8_MEMBER(istellar_state::z80_2_latch2_read)
{
logerror("CPU2 : reading latch2 (%x)\n", m_ldp_latch2);
return m_ldp_latch2;
}
READ8_MEMBER(istellar_state::z80_2_nmienable)
{
logerror("CPU2 : ENABLING NMI\n");
m_z80_2_nmi_enable = 1;
return 0x00;
}
READ8_MEMBER(istellar_state::z80_2_unknown_read)
{
logerror("CPU2 : c000!\n");
return 0x00;
}
WRITE8_MEMBER(istellar_state::z80_2_latch1_write)
{
logerror("CPU2 : writing latch1 (%x)\n", data);
m_ldp_latch1 = data;
}
WRITE8_MEMBER(istellar_state::z80_2_ldp_write)
{
logerror("CPU2 : writing LDP : 0x%x\n", data);
@ -211,7 +166,7 @@ void istellar_state::z80_0_io(address_map &map)
map(0x02, 0x02).portr("DSW1");
map(0x03, 0x03).portr("DSW2");
/*AM_RANGE(0x04,0x04) AM_WRITE(volatile_palette_write)*/
map(0x05, 0x05).rw(this, FUNC(istellar_state::z80_0_latch1_read), FUNC(istellar_state::z80_0_latch2_write));
map(0x05, 0x05).r("latch1", FUNC(generic_latch_8_device::read)).w("latch2", FUNC(generic_latch_8_device::write));
}
void istellar_state::z80_1_io(address_map &map)
@ -226,8 +181,8 @@ void istellar_state::z80_2_io(address_map &map)
{
map.global_mask(0xff);
map(0x00, 0x00).rw(this, FUNC(istellar_state::z80_2_ldp_read), FUNC(istellar_state::z80_2_ldp_write));
map(0x01, 0x01).rw(this, FUNC(istellar_state::z80_2_latch2_read), FUNC(istellar_state::z80_2_latch1_write));
map(0x02, 0x02).r(this, FUNC(istellar_state::z80_2_nmienable));
map(0x01, 0x01).r("latch2", FUNC(generic_latch_8_device::read)).w("latch1", FUNC(generic_latch_8_device::write));
map(0x02, 0x02).r("latch2", FUNC(generic_latch_8_device::acknowledge_r));
/* AM_RANGE(0x03,0x03) AM_WRITE(z80_2_ldtrans_write)*/
}
@ -303,13 +258,16 @@ static GFXDECODE_START( istellar )
GFXDECODE_ENTRY( "gfx1", 0, istellar_gfx_layout, 0x0, 0x20 )
GFXDECODE_END
INTERRUPT_GEN_MEMBER(istellar_state::vblank_callback_istellar)
WRITE_LINE_MEMBER(istellar_state::vblank_irq)
{
/* Interrupt presumably comes from VBlank */
device.execute().set_input_line(0, HOLD_LINE);
if (state)
{
/* Interrupt presumably comes from VBlank */
m_maincpu->set_input_line(0, HOLD_LINE);
/* Interrupt presumably comes from the LDP's status strobe */
m_subcpu->set_input_line(0, ASSERT_LINE);
/* Interrupt presumably comes from the LDP's status strobe */
m_subcpu->set_input_line(0, ASSERT_LINE);
}
}
@ -319,7 +277,6 @@ MACHINE_CONFIG_START(istellar_state::istellar)
MCFG_CPU_ADD("maincpu", Z80, GUESSED_CLOCK)
MCFG_CPU_PROGRAM_MAP(z80_0_mem)
MCFG_CPU_IO_MAP(z80_0_io)
MCFG_CPU_VBLANK_INT_DRIVER("screen", istellar_state, vblank_callback_istellar)
/* sound cpu */
MCFG_CPU_ADD("audiocpu", Z80, GUESSED_CLOCK)
@ -331,6 +288,11 @@ MACHINE_CONFIG_START(istellar_state::istellar)
MCFG_CPU_PROGRAM_MAP(z80_2_mem)
MCFG_CPU_IO_MAP(z80_2_io)
MCFG_GENERIC_LATCH_8_ADD("latch1")
MCFG_GENERIC_LATCH_8_ADD("latch2")
MCFG_GENERIC_LATCH_DATA_PENDING_CB(INPUTLINE("sub", INPUT_LINE_NMI))
MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(true)
MCFG_LASERDISC_LDV1000_ADD("laserdisc")
MCFG_LASERDISC_OVERLAY_DRIVER(256, 256, istellar_state, screen_update_istellar)
@ -338,6 +300,7 @@ MACHINE_CONFIG_START(istellar_state::istellar)
/* video hardware */
MCFG_LASERDISC_SCREEN_ADD_NTSC("screen", "laserdisc")
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(istellar_state, vblank_irq))
// Daphne says "TODO: get the real interstellar resistor values"
MCFG_PALETTE_ADD_RRRRGGGGBBBB_PROMS("palette", "proms", 256)
@ -390,7 +353,7 @@ ROM_END
DRIVER_INIT_MEMBER(istellar_state,istellar)
{
m_z80_2_nmi_enable = 0;
//m_z80_2_nmi_enable = 0;
#if 0
{