Add SPARC to unidasm [Vas Crabb]

This commit is contained in:
Vas Crabb 2016-06-22 13:35:20 +10:00
parent af9f4006a5
commit af406e316a
2 changed files with 17 additions and 7 deletions

View File

@ -14,6 +14,10 @@ namespace {
const sparc_disassembler DASM_V7(7);
const sparc_disassembler DASM_V8(8);
const sparc_disassembler DASM_V9(9);
INT32 get_disp16(UINT32 op) { return DISP19; }
INT32 get_disp19(UINT32 op) { return DISP19; }
INT32 get_disp22(UINT32 op) { return DISP19; }
}
const char * const sparc_disassembler::REG_NAMES[32] = {
@ -33,7 +37,7 @@ const sparc_disassembler::branch_desc sparc_disassembler::EMPTY_BRANCH_DESC = {
};
const sparc_disassembler::branch_desc sparc_disassembler::BPCC_DESC = {
[](UINT32 op) { return DISP19; }, 6, true, true,
&get_disp19, 6, true, true,
{ "%icc", nullptr, "%xcc", nullptr },
{
"bn", "be", "ble", "bl", "bleu", "bcs", "bneg", "bvs",
@ -42,7 +46,7 @@ const sparc_disassembler::branch_desc sparc_disassembler::BPCC_DESC = {
};
const sparc_disassembler::branch_desc sparc_disassembler::BICC_DESC = {
[](UINT32 op) { return DISP22; }, 6, false, false,
&get_disp22, 6, false, false,
{ nullptr, nullptr, nullptr, nullptr },
{
"bn", "be", "ble", "bl", "bleu", "bcs", "bneg", "bvs",
@ -51,7 +55,7 @@ const sparc_disassembler::branch_desc sparc_disassembler::BICC_DESC = {
};
const sparc_disassembler::branch_desc sparc_disassembler::BPR_DESC = {
[](UINT32 op) { return DISP16; }, 5, true, false,
&get_disp16, 5, true, false,
{ nullptr, nullptr, nullptr, nullptr },
{
nullptr, "brz", "brlez", "brlz", nullptr, "brnz", "brgz", "brgez",
@ -60,7 +64,7 @@ const sparc_disassembler::branch_desc sparc_disassembler::BPR_DESC = {
};
const sparc_disassembler::branch_desc sparc_disassembler::FBPFCC_DESC = {
[](UINT32 op) { return DISP19; }, 6, true, true,
&get_disp19, 6, true, true,
{ "%fcc0", "%fcc1", "%fcc2", "%fcc3" },
{
"fbn", "fbne", "fblg", "fbul", "fbl", "fbug", "fbg", "fbu",
@ -69,7 +73,7 @@ const sparc_disassembler::branch_desc sparc_disassembler::FBPFCC_DESC = {
};
const sparc_disassembler::branch_desc sparc_disassembler::FBFCC_DESC = {
[](UINT32 op) { return DISP22; }, 6, false, false,
&get_disp22, 6, false, false,
{ nullptr, nullptr, nullptr, nullptr },
{
"fbn", "fbne", "fblg", "fbul", "fbl", "fbug", "fbg", "fbu",
@ -78,7 +82,7 @@ const sparc_disassembler::branch_desc sparc_disassembler::FBFCC_DESC = {
};
const sparc_disassembler::branch_desc sparc_disassembler::CBCCC_DESC = {
[](UINT32 op) { return DISP22; }, 6, false, false,
&get_disp22, 6, false, false,
{ nullptr, nullptr, nullptr, nullptr },
{
"cbn", "cb123", "cb12", "cb13", "cb1", "cb23", "cb2", "cb3",
@ -412,7 +416,7 @@ offs_t sparc_disassembler::dasm(char *buf, offs_t pc, UINT32 op) const
}
return 4 | DASMFLAG_SUPPORTED;
case 1:
print(buf, "%-*s%%pc%c0x%08x ! %08x", m_op_field_width, "call", (DISP30 < 0) ? '-' : '+', std::abs(DISP30), pc + DISP30);
print(buf, "%-*s%%pc%c0x%08x ! 0x%08x", m_op_field_width, "call", (DISP30 < 0) ? '-' : '+', std::abs(DISP30), pc + DISP30);
return 4 | DASMFLAG_SUPPORTED;
case 2:
switch (OP3)

View File

@ -163,6 +163,9 @@ CPU_DISASSEMBLE( sm500 );
CPU_DISASSEMBLE( sm510 );
CPU_DISASSEMBLE( sm511 );
CPU_DISASSEMBLE( sm8500 );
CPU_DISASSEMBLE( sparcv7 );
CPU_DISASSEMBLE( sparcv8 );
CPU_DISASSEMBLE( sparcv9 );
CPU_DISASSEMBLE( spc700 );
CPU_DISASSEMBLE( ssem );
CPU_DISASSEMBLE( ssp1601 );
@ -319,6 +322,9 @@ static const dasm_table_entry dasm_table[] =
{ "sm510", _8bit, 0, CPU_DISASSEMBLE_NAME(sm510) },
{ "sm511", _8bit, 0, CPU_DISASSEMBLE_NAME(sm511) },
{ "sm8500", _8bit, 0, CPU_DISASSEMBLE_NAME(sm8500) },
{ "sparcv7", _32be, 0, CPU_DISASSEMBLE_NAME(sparcv7) },
{ "sparcv8", _32be, 0, CPU_DISASSEMBLE_NAME(sparcv8) },
{ "sparcv9", _32be, 0, CPU_DISASSEMBLE_NAME(sparcv9) },
{ "spc700", _8bit, 0, CPU_DISASSEMBLE_NAME(spc700) },
{ "ssem", _32le, 0, CPU_DISASSEMBLE_NAME(ssem) },
{ "ssp1601", _16be, -1, CPU_DISASSEMBLE_NAME(ssp1601) },