Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-10-06 09:00:04 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

namco50.cpp, namco53.cpp: timer_set removal (nw)

Browse Source
This commit is contained in:
Ivan Vangelista 2018-08-14 18:06:57 +02:00
parent 839e46c359
commit af4a5deb29
5 changed files with 26 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/mame/drivers/galaga.cpp
View File

@ -1604,8 +1604,9 @@ MACHINE_CONFIG_START(bosco_state::bosco)
misclatch.q_out_cb<3>().set_inputline("sub", INPUT_LINE_RESET).invert();
misclatch.q_out_cb<3>().append_inputline("sub2", INPUT_LINE_RESET).invert();
MCFG_NAMCO_50XX_ADD("50xx_1", MASTER_CLOCK/6/2) /* 1.536 MHz */
MCFG_NAMCO_50XX_ADD("50xx_2", MASTER_CLOCK/6/2) /* 1.536 MHz */
NAMCO_50XX(config, "50xx_1", MASTER_CLOCK/6/2); /* 1.536 MHz */
NAMCO_50XX(config, "50xx_2", MASTER_CLOCK/6/2); /* 1.536 MHz */
MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
MCFG_NAMCO_51XX_SCREEN("screen")
MCFG_NAMCO_51XX_INPUT_0_CB(IOPORT("IN0L"))
@ -1802,7 +1803,7 @@ MACHINE_CONFIG_START(xevious_state::xevious)
misclatch.q_out_cb<3>().set_inputline("sub", INPUT_LINE_RESET).invert();
misclatch.q_out_cb<3>().append_inputline("sub2", INPUT_LINE_RESET).invert();
MCFG_NAMCO_50XX_ADD("50xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
NAMCO_50XX(config, "50xx", MASTER_CLOCK/6/2); /* 1.536 MHz */
MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
MCFG_NAMCO_51XX_SCREEN("screen")

4
src/mame/machine/namco50.cpp
View File

@ -184,7 +184,7 @@ void namco_50xx_device::irq_set()
// The input clock to the 06XX interface chip is 64H, that is
// 18432000/6/64 = 48kHz, so it makes sense for the irq line to be
// asserted for one clock cycle ~= 21us.
machine().scheduler().timer_set(attotime::from_usec(21), timer_expired_delegate(FUNC(namco_50xx_device::irq_clear),this), 0);
m_irq_cleared_timer->adjust(attotime::from_usec(21), 0);
}
WRITE8_MEMBER( namco_50xx_device::write )
@ -241,6 +241,8 @@ namco_50xx_device::namco_50xx_device(const machine_config &mconfig, const char *
void namco_50xx_device::device_start()
{
m_irq_cleared_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(namco_50xx_device::irq_clear), this));
save_item(NAME(m_latched_cmd));
save_item(NAME(m_latched_rw));
save_item(NAME(m_portO));

16
src/mame/machine/namco50.h
View File

@ -7,10 +7,6 @@
#include "cpu/mb88xx/mb88xx.h"
#define MCFG_NAMCO_50XX_ADD(_tag, _clock) \
MCFG_DEVICE_ADD(_tag, NAMCO_50XX, _clock)
/* device get info callback */
class namco_50xx_device : public device_t
{
@ -21,11 +17,6 @@ public:
WRITE_LINE_MEMBER(read_request);
READ8_MEMBER( read );
READ8_MEMBER( K_r );
READ8_MEMBER( R0_r );
READ8_MEMBER( R2_r );
WRITE8_MEMBER( O_w );
protected:
// device-level overrides
virtual void device_start() override;
@ -36,12 +27,19 @@ protected:
TIMER_CALLBACK_MEMBER( readrequest_callback );
TIMER_CALLBACK_MEMBER( irq_clear );
void irq_set();
private:
// internal state
required_device<mb88_cpu_device> m_cpu;
uint8_t m_latched_cmd;
uint8_t m_latched_rw;
uint8_t m_portO;
emu_timer * m_irq_cleared_timer;
READ8_MEMBER( K_r );
READ8_MEMBER( R0_r );
READ8_MEMBER( R2_r );
WRITE8_MEMBER( O_w );
};
DECLARE_DEVICE_TYPE(NAMCO_50XX, namco_50xx_device)

4
src/mame/machine/namco53.cpp
View File

@ -116,7 +116,7 @@ WRITE_LINE_MEMBER(namco_53xx_device::read_request)
// The input clock to the 06XX interface chip is 64H, that is
// 18432000/6/64 = 48kHz, so it makes sense for the irq line to be
// asserted for one clock cycle ~= 21us.
machine().scheduler().timer_set(attotime::from_usec(21), timer_expired_delegate(FUNC(namco_53xx_device::irq_clear),this), 0);
m_irq_cleared_timer->adjust(attotime::from_usec(21), 0);
}
READ8_MEMBER( namco_53xx_device::read )
@ -161,6 +161,8 @@ void namco_53xx_device::device_start()
cb.resolve_safe(0);
m_p.resolve_safe();
m_irq_cleared_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(namco_53xx_device::irq_clear), this));
save_item(NAME(m_portO));
}

42
src/mame/machine/namco53.h
View File

@ -7,49 +7,16 @@
#include "cpu/mb88xx/mb88xx.h"
#define MCFG_NAMCO_53XX_ADD(_tag, _clock) \
MCFG_DEVICE_ADD(_tag, NAMCO_53XX, _clock)
#define MCFG_NAMCO_53XX_K_CB(_devcb) \
downcast<namco_53xx_device &>(*device).set_k_port_callback(DEVCB_##_devcb);
#define MCFG_NAMCO_53XX_INPUT_0_CB(_devcb) \
downcast<namco_53xx_device &>(*device).set_input_callback<0>(DEVCB_##_devcb);
#define MCFG_NAMCO_53XX_INPUT_1_CB(_devcb) \
downcast<namco_53xx_device &>(*device).set_input_callback<1>(DEVCB_##_devcb);
#define MCFG_NAMCO_53XX_INPUT_2_CB(_devcb) \
downcast<namco_53xx_device &>(*device).set_input_callback<2>(DEVCB_##_devcb);
#define MCFG_NAMCO_53XX_INPUT_3_CB(_devcb) \
downcast<namco_53xx_device &>(*device).set_input_callback<3>(DEVCB_##_devcb);
#define MCFG_NAMCO_53XX_P_CB(_devcb) \
downcast<namco_53xx_device &>(*device).set_p_port_callback(DEVCB_##_devcb);
class namco_53xx_device : public device_t
{
public:
namco_53xx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <unsigned N, class Object> devcb_base &set_input_callback(Object &&cb) { return m_in[N].set_callback(std::forward<Object>(cb)); }
template <unsigned N> auto input_callback() { return m_in[N].bind(); }
template <class Object> devcb_base &set_k_port_callback(Object &&cb) { return m_k.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_p_port_callback(Object &&cb) { return m_p.set_callback(std::forward<Object>(cb)); }
auto k_port_callback() { return m_k.bind(); }
auto p_port_callback() { return m_p.bind(); }
DECLARE_READ8_MEMBER( K_r );
DECLARE_READ8_MEMBER( R0_r );
DECLARE_READ8_MEMBER( R1_r );
DECLARE_READ8_MEMBER( R2_r );
DECLARE_READ8_MEMBER( R3_r );
DECLARE_WRITE8_MEMBER( O_w );
DECLARE_WRITE8_MEMBER( P_w );
DECLARE_WRITE_LINE_MEMBER(read_request);
DECLARE_READ8_MEMBER( read );
@ -60,6 +27,7 @@ protected:
virtual void device_add_mconfig(machine_config &config) override;
TIMER_CALLBACK_MEMBER( irq_clear );
private:
// internal state
required_device<mb88_cpu_device> m_cpu;
@ -67,7 +35,15 @@ private:
devcb_read8 m_k;
devcb_read8 m_in[4];
devcb_write8 m_p;
emu_timer *m_irq_cleared_timer;
DECLARE_READ8_MEMBER( K_r );
DECLARE_READ8_MEMBER( R0_r );
DECLARE_READ8_MEMBER( R1_r );
DECLARE_READ8_MEMBER( R2_r );
DECLARE_READ8_MEMBER( R3_r );
DECLARE_WRITE8_MEMBER( O_w );
DECLARE_WRITE8_MEMBER( P_w );
};
DECLARE_DEVICE_TYPE(NAMCO_53XX, namco_53xx_device)