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Merge pull request #8565 from 0kmg/nes-mapper49
bus/nes: Fixed Super HiK 4 in 1 so that Master Fighter III now loads.
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commit
af86a77c40
@ -82283,9 +82283,9 @@ to check why this is different -->
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</part>
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</software>
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<software name="mc_sh4" supported="partial">
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<description>Super HIK 4 in 1</description>
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<year>19??</year>
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<software name="mc_sh4">
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<description>Super HiK 4 in 1</description>
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<year>199?</year>
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<publisher><pirate></publisher>
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<part name="cart" interface="nes_cart">
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<feature name="slot" value="bmc_hik4in1" />
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@ -284,8 +284,8 @@ nes_bmc_hik8_device::nes_bmc_hik8_device(const machine_config &mconfig, const ch
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{
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}
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nes_bmc_hik4_device::nes_bmc_hik4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: nes_txrom_device(mconfig, NES_BMC_HIK4, tag, owner, clock)
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nes_bmc_hik4_device::nes_bmc_hik4_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: nes_txrom_device(mconfig, NES_BMC_HIK4, tag, owner, clock), m_mmc3_mode(true)
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{
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}
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@ -649,9 +649,16 @@ void nes_bmc_hik8_device::pcb_reset()
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mmc3_common_initialize(0x3f, 0xff, 0);
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}
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void nes_bmc_hik4_device::device_start()
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{
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mmc3_start();
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save_item(NAME(m_mmc3_mode));
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}
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void nes_bmc_hik4_device::pcb_reset()
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{
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m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
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m_mmc3_mode = true;
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mmc3_common_initialize(0x0f, 0x7f, 0);
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}
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@ -2206,30 +2213,33 @@ void nes_bmc_hik8_device::write_m(offs_t offset, uint8_t data)
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iNES: mapper 49
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In MESS: Supported. It also uses mmc3_irq.
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In MAME: Supported. It also uses mmc3_irq.
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-------------------------------------------------*/
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void nes_bmc_hik4_device::write_m(offs_t offset, uint8_t data)
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void nes_bmc_hik4_device::prg_cb(int start, int bank)
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{
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if (m_mmc3_mode) // all games use MMC3 PRG banking except Master Fighter III
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nes_txrom_device::prg_cb(start, bank);
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}
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void nes_bmc_hik4_device::write_m(offs_t offset, u8 data)
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{
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LOG_MMC(("bmc_hik4 write_m, offset: %04x, data: %02x\n", offset, data));
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/* mid writes only work when WRAM is enabled. not sure if I should
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change the condition to m_mmc_latch2==0x80 (i.e. what is the effect of
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the read-only bit?) */
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if (m_wram_protect & 0x80)
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// mid writes only work when WRAM is enabled and writable
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if ((m_wram_protect & 0xc0) == 0x80)
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{
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if (data & 0x01) /* if this is 0, then we have 32k PRG blocks */
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m_mmc3_mode = data & 0x01;
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if (m_mmc3_mode)
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{
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m_prg_base = (data & 0xc0) >> 2;
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m_prg_mask = 0x0f;
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set_prg(m_prg_base, m_prg_mask);
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}
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else
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else // Master Fighter III only
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prg32((data & 0x30) >> 4);
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m_chr_base = (data & 0xc0) << 1;
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m_chr_mask = 0x7f;
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set_chr(m_chr_source, m_chr_base, m_chr_mask);
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}
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}
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@ -681,12 +681,19 @@ class nes_bmc_hik4_device : public nes_txrom_device
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{
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public:
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// construction/destruction
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nes_bmc_hik4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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nes_bmc_hik4_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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// device-level overrides
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virtual void write_m(offs_t offset, uint8_t data) override;
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virtual void write_m(offs_t offset, u8 data) override;
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virtual void prg_cb(int start, int bank) override;
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virtual void pcb_reset() override;
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protected:
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// device-level overrides
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virtual void device_start() override;
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private:
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bool m_mmc3_mode;
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};
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