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(MESS) Cleanup. (nw)

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This commit is contained in:
Curt Coder 2013-02-22 15:23:05 +00:00
parent 2121b5c40d
commit af96c3b896
18 changed files with 560 additions and 307 deletions
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6
.gitattributes vendored
View File

@ -6145,7 +6145,7 @@ src/mess/drivers/pegasus.c svneol=native#text/plain
src/mess/drivers/pencil2.c svneol=native#text/plain
src/mess/drivers/pentagon.c svneol=native#text/plain
src/mess/drivers/pes.c svneol=native#text/plain
src/mess/drivers/pet2001.c svneol=native#text/plain
src/mess/drivers/pet.c svneol=native#text/plain
src/mess/drivers/phc25.c svneol=native#text/plain
src/mess/drivers/phunsy.c svneol=native#text/plain
src/mess/drivers/pimps.c svneol=native#text/plain
@ -6481,7 +6481,7 @@ src/mess/includes/pcw16.h svneol=native#text/plain
src/mess/includes/pdp1.h svneol=native#text/plain
src/mess/includes/pecom.h svneol=native#text/plain
src/mess/includes/pes.h svneol=native#text/plain
src/mess/includes/pet2001.h svneol=native#text/plain
src/mess/includes/pet.h svneol=native#text/plain
src/mess/includes/phc25.h svneol=native#text/plain
src/mess/includes/pk8020.h svneol=native#text/plain
src/mess/includes/plus4.h svneol=native#text/plain
@ -7388,6 +7388,8 @@ src/mess/machine/pce220_ser.h svneol=native#text/plain
src/mess/machine/pcf8593.c svneol=native#text/plain
src/mess/machine/pcf8593.h svneol=native#text/plain
src/mess/machine/pecom.c svneol=native#text/plain
src/mess/machine/pet_64k.c svneol=native#text/plain
src/mess/machine/pet_64k.h svneol=native#text/plain
src/mess/machine/petcass.c svneol=native#text/plain
src/mess/machine/petcass.h svneol=native#text/plain
src/mess/machine/petexp.c svneol=native#text/plain

31
src/mess/drivers/c128.c
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@ -3,7 +3,6 @@
TODO:
- connect CAPS LOCK to charom A12 on international variants
- expansion DMA
*/
@ -1329,21 +1328,6 @@ WRITE_LINE_MEMBER( c128_state::exp_reset_w )
}
//-------------------------------------------------
// C64_USER_PORT_INTERFACE( user_intf )
//-------------------------------------------------
static C64_USER_PORT_INTERFACE( user_intf )
{
DEVCB_DEVICE_LINE_MEMBER(MOS6526_1_TAG, mos6526_device, sp_w),
DEVCB_DEVICE_LINE_MEMBER(MOS6526_1_TAG, mos6526_device, cnt_w),
DEVCB_DEVICE_LINE_MEMBER(MOS6526_2_TAG, mos6526_device, sp_w),
DEVCB_DEVICE_LINE_MEMBER(MOS6526_2_TAG, mos6526_device, cnt_w),
DEVCB_DEVICE_LINE_MEMBER(MOS6526_2_TAG, mos6526_device, flag_w),
DEVCB_DRIVER_LINE_MEMBER(c128_state, exp_reset_w)
};
//**************************************************************************
// MACHINE INITIALIZATION
@ -1398,9 +1382,6 @@ void c128_state::machine_start()
void c128_state::machine_reset()
{
m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
m_subcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
m_maincpu->reset();
m_reset = 1;
@ -1463,7 +1444,6 @@ static MACHINE_CONFIG_START( ntsc, c128_state )
MCFG_MOS6526_SERIAL_CALLBACKS(DEVWRITELINE(C64_USER_PORT_TAG, c64_user_port_device, cnt2_w), DEVWRITELINE(C64_USER_PORT_TAG, c64_user_port_device, sp2_w))
MCFG_MOS6526_PORT_A_CALLBACKS(DEVREAD8(DEVICE_SELF, c128_state, cia2_pa_r), DEVWRITE8(DEVICE_SELF, c128_state, cia2_pa_w))
MCFG_MOS6526_PORT_B_CALLBACKS(DEVREAD8(C64_USER_PORT_TAG, c64_user_port_device, pb_r), DEVWRITE8(C64_USER_PORT_TAG, c64_user_port_device, pb_w), DEVWRITELINE(C64_USER_PORT_TAG, c64_user_port_device, pc2_w))
MCFG_QUICKLOAD_ADD("quickload", cbm_c64, "p00,prg", CBM_QUICKLOAD_DELAY_SECONDS)
MCFG_PET_DATASSETTE_PORT_ADD(PET_DATASSETTE_PORT_TAG, cbm_datassette_devices, "c1530", NULL, DEVWRITELINE(MOS6526_2_TAG, mos6526_device, flag_w))
MCFG_VCS_CONTROL_PORT_ADD(CONTROL1_TAG, vcs_control_port_devices, NULL, NULL)
MCFG_VCS_CONTROL_PORT_TRIGGER_HANDLER(DEVWRITELINE(MOS8564_TAG, mos8564_device, lp_w))
@ -1471,7 +1451,10 @@ static MACHINE_CONFIG_START( ntsc, c128_state )
MCFG_C64_EXPANSION_SLOT_ADD(C64_EXPANSION_SLOT_TAG, VIC6567_CLOCK, c64_expansion_cards, NULL, NULL)
MCFG_C64_EXPANSION_SLOT_IRQ_CALLBACKS(DEVWRITELINE(DEVICE_SELF, c128_state, exp_irq_w), DEVWRITELINE(DEVICE_SELF, c128_state, exp_nmi_w), DEVWRITELINE(DEVICE_SELF, c128_state, exp_reset_w))
MCFG_C64_EXPANSION_SLOT_DMA_CALLBACKS(DEVREAD8(DEVICE_SELF, c128_state, exp_dma_cd_r), DEVWRITE8(DEVICE_SELF, c128_state, exp_dma_cd_w), DEVWRITELINE(DEVICE_SELF, c128_state, exp_dma_w))
MCFG_C64_USER_PORT_ADD(C64_USER_PORT_TAG, user_intf, c64_user_port_cards, NULL, NULL)
MCFG_C64_USER_PORT_ADD(C64_USER_PORT_TAG, c64_user_port_cards, NULL, NULL, DEVWRITELINE(DEVICE_SELF, c128_state, exp_reset_w))
MCFG_C64_USER_PORT_CIA1_CALLBACKS(DEVWRITELINE(MOS6526_1_TAG, mos6526_device, cnt_w), DEVWRITELINE(MOS6526_1_TAG, mos6526_device, sp_w))
MCFG_C64_USER_PORT_CIA2_CALLBACKS(DEVWRITELINE(MOS6526_2_TAG, mos6526_device, cnt_w), DEVWRITELINE(MOS6526_2_TAG, mos6526_device, sp_w), DEVWRITELINE(MOS6526_2_TAG, mos6526_device, flag_w))
MCFG_QUICKLOAD_ADD("quickload", cbm_c64, "p00,prg", CBM_QUICKLOAD_DELAY_SECONDS)
// software list
MCFG_SOFTWARE_LIST_ADD("cart_list_vic10", "vic10")
@ -1584,7 +1567,6 @@ static MACHINE_CONFIG_START( pal, c128_state )
MCFG_MOS6526_SERIAL_CALLBACKS(DEVWRITELINE(C64_USER_PORT_TAG, c64_user_port_device, cnt2_w), DEVWRITELINE(C64_USER_PORT_TAG, c64_user_port_device, sp2_w))
MCFG_MOS6526_PORT_A_CALLBACKS(DEVREAD8(DEVICE_SELF, c128_state, cia2_pa_r), DEVWRITE8(DEVICE_SELF, c128_state, cia2_pa_w))
MCFG_MOS6526_PORT_B_CALLBACKS(DEVREAD8(C64_USER_PORT_TAG, c64_user_port_device, pb_r), DEVWRITE8(C64_USER_PORT_TAG, c64_user_port_device, pb_w), DEVWRITELINE(C64_USER_PORT_TAG, c64_user_port_device, pc2_w))
MCFG_QUICKLOAD_ADD("quickload", cbm_c64, "p00,prg", CBM_QUICKLOAD_DELAY_SECONDS)
MCFG_PET_DATASSETTE_PORT_ADD(PET_DATASSETTE_PORT_TAG, cbm_datassette_devices, "c1530", NULL, DEVWRITELINE(MOS6526_2_TAG, mos6526_device, flag_w))
MCFG_VCS_CONTROL_PORT_ADD(CONTROL1_TAG, vcs_control_port_devices, NULL, NULL)
MCFG_VCS_CONTROL_PORT_TRIGGER_HANDLER(DEVWRITELINE(MOS8566_TAG, mos8566_device, lp_w))
@ -1592,7 +1574,10 @@ static MACHINE_CONFIG_START( pal, c128_state )
MCFG_C64_EXPANSION_SLOT_ADD(C64_EXPANSION_SLOT_TAG, VIC6569_CLOCK, c64_expansion_cards, NULL, NULL)
MCFG_C64_EXPANSION_SLOT_IRQ_CALLBACKS(DEVWRITELINE(DEVICE_SELF, c128_state, exp_irq_w), DEVWRITELINE(DEVICE_SELF, c128_state, exp_nmi_w), DEVWRITELINE(DEVICE_SELF, c128_state, exp_reset_w))
MCFG_C64_EXPANSION_SLOT_DMA_CALLBACKS(DEVREAD8(DEVICE_SELF, c128_state, exp_dma_cd_r), DEVWRITE8(DEVICE_SELF, c128_state, exp_dma_cd_w), DEVWRITELINE(DEVICE_SELF, c128_state, exp_dma_w))
MCFG_C64_USER_PORT_ADD(C64_USER_PORT_TAG, user_intf, c64_user_port_cards, NULL, NULL)
MCFG_C64_USER_PORT_ADD(C64_USER_PORT_TAG, c64_user_port_cards, NULL, NULL, DEVWRITELINE(DEVICE_SELF, c128_state, exp_reset_w))
MCFG_C64_USER_PORT_CIA1_CALLBACKS(DEVWRITELINE(MOS6526_1_TAG, mos6526_device, cnt_w), DEVWRITELINE(MOS6526_1_TAG, mos6526_device, sp_w))
MCFG_C64_USER_PORT_CIA2_CALLBACKS(DEVWRITELINE(MOS6526_2_TAG, mos6526_device, cnt_w), DEVWRITELINE(MOS6526_2_TAG, mos6526_device, sp_w), DEVWRITELINE(MOS6526_2_TAG, mos6526_device, flag_w))
MCFG_QUICKLOAD_ADD("quickload", cbm_c64, "p00,prg", CBM_QUICKLOAD_DELAY_SECONDS)
// software list
MCFG_SOFTWARE_LIST_ADD("cart_list_vic10", "vic10")

27
src/mess/drivers/c64.c
View File

@ -984,21 +984,6 @@ WRITE_LINE_MEMBER( c64_state::exp_reset_w )
}
//-------------------------------------------------
// C64_USER_PORT_INTERFACE( user_intf )
//-------------------------------------------------
static C64_USER_PORT_INTERFACE( user_intf )
{
DEVCB_DEVICE_LINE_MEMBER(MOS6526_1_TAG, mos6526_device, sp_w),
DEVCB_DEVICE_LINE_MEMBER(MOS6526_1_TAG, mos6526_device, cnt_w),
DEVCB_DEVICE_LINE_MEMBER(MOS6526_2_TAG, mos6526_device, sp_w),
DEVCB_DEVICE_LINE_MEMBER(MOS6526_2_TAG, mos6526_device, cnt_w),
DEVCB_DEVICE_LINE_MEMBER(MOS6526_2_TAG, mos6526_device, flag_w),
DEVCB_DRIVER_LINE_MEMBER(c64_state, exp_reset_w)
};
//**************************************************************************
// MACHINE INITIALIZATION
@ -1102,7 +1087,9 @@ static MACHINE_CONFIG_START( ntsc, c64_state )
MCFG_C64_EXPANSION_SLOT_ADD(C64_EXPANSION_SLOT_TAG, VIC6567_CLOCK, c64_expansion_cards, NULL, NULL)
MCFG_C64_EXPANSION_SLOT_IRQ_CALLBACKS(DEVWRITELINE(DEVICE_SELF, c64_state, exp_irq_w), DEVWRITELINE(DEVICE_SELF, c64_state, exp_nmi_w), DEVWRITELINE(DEVICE_SELF, c64_state, exp_reset_w))
MCFG_C64_EXPANSION_SLOT_DMA_CALLBACKS(DEVREAD8(DEVICE_SELF, c64_state, read), DEVWRITE8(DEVICE_SELF, c64_state, write), DEVWRITELINE(DEVICE_SELF, c64_state, exp_dma_w))
MCFG_C64_USER_PORT_ADD(C64_USER_PORT_TAG, user_intf, c64_user_port_cards, NULL, NULL)
MCFG_C64_USER_PORT_ADD(C64_USER_PORT_TAG, c64_user_port_cards, NULL, NULL, DEVWRITELINE(DEVICE_SELF, c64_state, exp_reset_w))
MCFG_C64_USER_PORT_CIA1_CALLBACKS(DEVWRITELINE(MOS6526_1_TAG, mos6526_device, cnt_w), DEVWRITELINE(MOS6526_1_TAG, mos6526_device, sp_w))
MCFG_C64_USER_PORT_CIA2_CALLBACKS(DEVWRITELINE(MOS6526_2_TAG, mos6526_device, cnt_w), DEVWRITELINE(MOS6526_2_TAG, mos6526_device, sp_w), DEVWRITELINE(MOS6526_2_TAG, mos6526_device, flag_w))
MCFG_QUICKLOAD_ADD("quickload", cbm_c64, "p00,prg,t64", CBM_QUICKLOAD_DELAY_SECONDS)
// software list
@ -1213,7 +1200,9 @@ static MACHINE_CONFIG_START( pal, c64_state )
MCFG_C64_EXPANSION_SLOT_ADD(C64_EXPANSION_SLOT_TAG, VIC6569_CLOCK, c64_expansion_cards, NULL, NULL)
MCFG_C64_EXPANSION_SLOT_IRQ_CALLBACKS(DEVWRITELINE(DEVICE_SELF, c64_state, exp_irq_w), DEVWRITELINE(DEVICE_SELF, c64_state, exp_nmi_w), DEVWRITELINE(DEVICE_SELF, c64_state, exp_reset_w))
MCFG_C64_EXPANSION_SLOT_DMA_CALLBACKS(DEVREAD8(DEVICE_SELF, c64_state, read), DEVWRITE8(DEVICE_SELF, c64_state, write), DEVWRITELINE(DEVICE_SELF, c64_state, exp_dma_w))
MCFG_C64_USER_PORT_ADD(C64_USER_PORT_TAG, user_intf, c64_user_port_cards, NULL, NULL)
MCFG_C64_USER_PORT_ADD(C64_USER_PORT_TAG, c64_user_port_cards, NULL, NULL, DEVWRITELINE(DEVICE_SELF, c64_state, exp_reset_w))
MCFG_C64_USER_PORT_CIA1_CALLBACKS(DEVWRITELINE(MOS6526_1_TAG, mos6526_device, cnt_w), DEVWRITELINE(MOS6526_1_TAG, mos6526_device, sp_w))
MCFG_C64_USER_PORT_CIA2_CALLBACKS(DEVWRITELINE(MOS6526_2_TAG, mos6526_device, cnt_w), DEVWRITELINE(MOS6526_2_TAG, mos6526_device, sp_w), DEVWRITELINE(MOS6526_2_TAG, mos6526_device, flag_w))
MCFG_QUICKLOAD_ADD("quickload", cbm_c64, "p00,prg,t64", CBM_QUICKLOAD_DELAY_SECONDS)
// software list
@ -1302,7 +1291,9 @@ static MACHINE_CONFIG_START( pal_gs, c64gs_state )
MCFG_C64_EXPANSION_SLOT_ADD(C64_EXPANSION_SLOT_TAG, VIC6569_CLOCK, c64_expansion_cards, NULL, NULL)
MCFG_C64_EXPANSION_SLOT_IRQ_CALLBACKS(DEVWRITELINE(DEVICE_SELF, c64_state, exp_irq_w), DEVWRITELINE(DEVICE_SELF, c64_state, exp_nmi_w), DEVWRITELINE(DEVICE_SELF, c64_state, exp_reset_w))
MCFG_C64_EXPANSION_SLOT_DMA_CALLBACKS(DEVREAD8(DEVICE_SELF, c64_state, read), DEVWRITE8(DEVICE_SELF, c64_state, write), DEVWRITELINE(DEVICE_SELF, c64_state, exp_dma_w))
MCFG_C64_USER_PORT_ADD(C64_USER_PORT_TAG, user_intf, c64_user_port_cards, NULL, NULL)
MCFG_C64_USER_PORT_ADD(C64_USER_PORT_TAG, c64_user_port_cards, NULL, NULL, DEVWRITELINE(DEVICE_SELF, c64_state, exp_reset_w))
MCFG_C64_USER_PORT_CIA1_CALLBACKS(DEVWRITELINE(MOS6526_1_TAG, mos6526_device, cnt_w), DEVWRITELINE(MOS6526_1_TAG, mos6526_device, sp_w))
MCFG_C64_USER_PORT_CIA2_CALLBACKS(DEVWRITELINE(MOS6526_2_TAG, mos6526_device, cnt_w), DEVWRITELINE(MOS6526_2_TAG, mos6526_device, sp_w), DEVWRITELINE(MOS6526_2_TAG, mos6526_device, flag_w))
MCFG_QUICKLOAD_ADD("quickload", cbm_c64, "p00,prg,t64", CBM_QUICKLOAD_DELAY_SECONDS)
// software list

4
src/mess/drivers/cbm2.c
View File

@ -2403,6 +2403,8 @@ static MACHINE_CONFIG_DERIVED( bx256hp, b256hp )
MCFG_MOS6526_SERIAL_CALLBACKS(DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, cnt_w), DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, sp_w))
//MCFG_MOS6526_PORT_A_CALLBACKS(DEVREAD8(EXT_MOS6525_TAG, tpi6525_porta_r), NULL)
MCFG_MOS6526_PORT_B_CALLBACKS(DEVREAD8(DEVICE_SELF, cbm2_state, ext_cia_pb_r), DEVWRITE8(DEVICE_SELF, cbm2_state, ext_cia_pb_w), NULL)
MCFG_SOFTWARE_LIST_ADD("flop_list2", "bx256hp_flop")
MACHINE_CONFIG_END
@ -2460,6 +2462,8 @@ static MACHINE_CONFIG_DERIVED( cbm730, cbm720 )
MCFG_MOS6526_SERIAL_CALLBACKS(DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, cnt_w), DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, sp_w))
//MCFG_MOS6526_PORT_A_CALLBACKS(DEVREAD8(EXT_MOS6525_TAG, tpi6525_porta_r), NULL)
MCFG_MOS6526_PORT_B_CALLBACKS(DEVREAD8(DEVICE_SELF, cbm2_state, ext_cia_pb_r), DEVWRITE8(DEVICE_SELF, cbm2_state, ext_cia_pb_w), NULL)
MCFG_SOFTWARE_LIST_ADD("flop_list2", "bx256hp_flop")
MACHINE_CONFIG_END

308
src/mess/drivers/pet2001.c → src/mess/drivers/pet.c
View File

@ -150,7 +150,9 @@ ROM sockets: UA3 2K or 4K character
*/
#include "includes/pet2001.h"
#include "includes/pet.h"
static void cbm_pet_quick_sethiaddress( running_machine &machine, UINT16 hiaddress )
{
@ -169,6 +171,8 @@ static QUICKLOAD_LOAD( cbm_pet )
return general_cbm_loadsnap(image, file_type, quickload_size, 0, cbm_pet_quick_sethiaddress);
}
//**************************************************************************
// INTERRUPTS
//**************************************************************************
@ -194,7 +198,7 @@ void pet_state::update_speaker()
{
if (m_speaker)
{
speaker_level_w(m_speaker, !(m_via_cb2 || m_pia1_pa7));
speaker_level_w(m_speaker, !(m_via_cb2 || m_pia1_pa7));
}
}
@ -212,48 +216,48 @@ READ8_MEMBER( pet_state::read )
switch (sel)
{
case SEL0: case SEL1: case SEL2: case SEL3: case SEL4: case SEL5: case SEL6: case SEL7:
if (offset < m_ram->size())
{
data = m_ram->pointer()[offset];
}
break;
if (offset < m_ram->size())
{
data = m_ram->pointer()[offset];
}
break;
case SEL8:
data = m_video_ram[offset & (m_video_ram_size - 1)];
break;
data = m_video_ram[offset & (m_video_ram_size - 1)];
break;
case SEL9: case SELA: case SELB: case SELC: case SELD: case SELF:
if (norom)
{
data = m_rom->base()[offset - 0x9000];
}
break;
if (norom)
{
data = m_rom->base()[offset - 0x9000];
}
break;
case SELE:
if (BIT(offset, 11))
if (BIT(offset, 11))
{
if (BIT(offset, 4))
{
if (BIT(offset, 4))
{
data = m_pia1->read(space, offset & 0x03);
}
if (BIT(offset, 5))
{
data = m_pia2->read(space, offset & 0x03);
}
if (BIT(offset, 6))
{
data = m_via->read(space, offset & 0x0f);
}
if (m_crtc && BIT(offset, 7) && BIT(offset, 0))
{
data = m_crtc->register_r(space, 0);
}
data = m_pia1->read(space, offset & 0x03);
}
else if (norom)
if (BIT(offset, 5))
{
data = m_rom->base()[offset - 0x9000];
data = m_pia2->read(space, offset & 0x03);
}
break;
if (BIT(offset, 6))
{
data = m_via->read(space, offset & 0x0f);
}
if (m_crtc && BIT(offset, 7) && BIT(offset, 0))
{
data = m_crtc->register_r(space, 0);
}
}
else if (norom)
{
data = m_rom->base()[offset - 0x9000];
}
break;
}
return m_exp->read(space, offset, data, sel);
@ -271,44 +275,44 @@ WRITE8_MEMBER( pet_state::write )
switch (sel)
{
case SEL0: case SEL1: case SEL2: case SEL3: case SEL4: case SEL5: case SEL6: case SEL7:
if (offset < m_ram->size())
{
m_ram->pointer()[offset] = data;
}
break;
if (offset < m_ram->size())
{
m_ram->pointer()[offset] = data;
}
break;
case SEL8:
m_video_ram[offset & (m_video_ram_size - 1)] = data;
break;
m_video_ram[offset & (m_video_ram_size - 1)] = data;
break;
case SELE:
if (BIT(offset, 11))
if (BIT(offset, 11))
{
if (BIT(offset, 4))
{
if (BIT(offset, 4))
{
m_pia1->write(space, offset & 0x03, data);
}
if (BIT(offset, 5))
{
m_pia2->write(space, offset & 0x03, data);
}
if (BIT(offset, 6))
{
m_via->write(space, offset & 0x0f, data);
}
if (m_crtc && BIT(offset, 7))
{
if (BIT(offset, 0))
{
m_crtc->register_w(space, 0, data);
}
else
{
m_crtc->address_w(space, 0, data);
}
}
m_pia1->write(space, offset & 0x03, data);
}
break;
if (BIT(offset, 5))
{
m_pia2->write(space, offset & 0x03, data);
}
if (BIT(offset, 6))
{
m_via->write(space, offset & 0x0f, data);
}
if (m_crtc && BIT(offset, 7))
{
if (BIT(offset, 0))
{
m_crtc->register_w(space, 0, data);
}
else
{
m_crtc->address_w(space, 0, data);
}
}
}
break;
}
m_exp->write(space, offset, data, sel);
@ -594,16 +598,16 @@ READ8_MEMBER( pet_state::via_pb_r )
{
/*
bit description
bit description
PB0 _NDAC IN
PB1
PB2
PB3
PB4
PB5 SYNC IN
PB6 _NRFD IN
PB7 _DAV IN
PB0 _NDAC IN
PB1
PB2
PB3
PB4
PB5 SYNC IN
PB6 _NRFD IN
PB7 _DAV IN
*/
@ -624,16 +628,16 @@ WRITE8_MEMBER( pet_state::via_pb_w )
{
/*
bit description
bit description
PB0
PB1 _NRFD OUT
PB2 _ATN OUT
PB3 CASS WRITE
PB4 #2 CASS MOTOR
PB5
PB6
PB7
PB0
PB1 _NRFD OUT
PB2 _ATN OUT
PB3 CASS WRITE
PB4 #2 CASS MOTOR
PB5
PB6
PB7
*/
@ -700,16 +704,16 @@ READ8_MEMBER( pet_state::pia1_pa_r )
{
/*
bit description
bit description
PA0 KEY A
PA1 KEY B
PA2 KEY C
PA3 KEY D
PA4 #1 CASS SWITCH
PA5 #2 CASS SWITCH
PA6 _EOI IN
PA7 DIAG JUMPER
PA0 KEY A
PA1 KEY B
PA2 KEY C
PA3 KEY D
PA4 #1 CASS SWITCH
PA5 #2 CASS SWITCH
PA6 _EOI IN
PA7 DIAG JUMPER
*/
@ -735,16 +739,16 @@ WRITE8_MEMBER( pet_state::pia1_pa_w )
{
/*
bit description
bit description
PA0 KEY A
PA1 KEY B
PA2 KEY C
PA3 KEY D
PA4
PA5
PA6
PA7 SPEAKER
PA0 KEY A
PA1 KEY B
PA2 KEY C
PA3 KEY D
PA4
PA5
PA6
PA7 SPEAKER
*/
@ -914,23 +918,23 @@ UINT32 pet_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, con
{
for (int y = 0; y < 200; y++)
{
for (int sx = 0; sx < 40; sx++)
for (int sx = 0; sx < 40; sx++)
{
int sy = y / 8;
offs_t video_addr = (sy * 40) + sx;
UINT8 lsd = m_video_ram[video_addr];
int ra = y & 0x07;
offs_t char_addr = (m_graphic << 10) | ((lsd & 0x7f) << 3) | ra;
UINT8 data = m_char_rom->base()[char_addr];
for (int x = 0; x < 8; x++, data <<= 1)
{
int sy = y / 8;
offs_t video_addr = (sy * 40) + sx;
UINT8 lsd = m_video_ram[video_addr];
int ra = y & 0x07;
offs_t char_addr = (m_graphic << 10) | ((lsd & 0x7f) << 3) | ra;
UINT8 data = m_char_rom->base()[char_addr];
for (int x = 0; x < 8; x++, data <<= 1)
{
int color = (BIT(data, 7) ^ BIT(lsd, 7)) && m_blanktv;
bitmap.pix32(y, (sx * 8) + x) = RGB_MONOCHROME_GREEN[color];
}
int color = (BIT(data, 7) ^ BIT(lsd, 7)) && m_blanktv;
bitmap.pix32(y, (sx * 8) + x) = RGB_MONOCHROME_GREEN[color];
}
}
}
return 0;
}
@ -948,37 +952,37 @@ static MC6845_UPDATE_ROW( pet80_update_row )
for (int column = 0; column < x_count; column++)
{
UINT8 lsd = 0, data = 0;
UINT8 rra = ra & 0x07;
int no_row = !(BIT(ra, 3) || BIT(ra, 4));
int invert = BIT(ma, 12);
int chr_option = BIT(ma, 13);
UINT8 lsd = 0, data = 0;
UINT8 rra = ra & 0x07;
int no_row = !(BIT(ra, 3) || BIT(ra, 4));
int invert = BIT(ma, 12);
int chr_option = BIT(ma, 13);
// even character
// even character
lsd = state->m_video_ram[((ma + column) << 1) & 0x7ff];
lsd = state->m_video_ram[((ma + column) << 1) & 0x7ff];
offs_t char_addr = (chr_option << 11) | (state->m_graphic << 10) | ((lsd & 0x7f) << 3) | rra;
data = state->m_char_rom->base()[char_addr & char_rom_mask];
offs_t char_addr = (chr_option << 11) | (state->m_graphic << 10) | ((lsd & 0x7f) << 3) | rra;
data = state->m_char_rom->base()[char_addr & char_rom_mask];
for (int bit = 0; bit < 8; bit++, data <<= 1)
{
int video = !((BIT(data, 7) ^ BIT(lsd, 7)) && no_row) ^ invert;
bitmap.pix32(y, x++) = RGB_MONOCHROME_GREEN[video];
}
for (int bit = 0; bit < 8; bit++, data <<= 1)
{
int video = !((BIT(data, 7) ^ BIT(lsd, 7)) && no_row) ^ invert;
bitmap.pix32(y, x++) = RGB_MONOCHROME_GREEN[video];
}
// odd character
// odd character
lsd = state->m_video_ram[(((ma + column) << 1) + 1) & 0x7ff];
lsd = state->m_video_ram[(((ma + column) << 1) + 1) & 0x7ff];
char_addr = (chr_option << 11) | (state->m_graphic << 10) | ((lsd & 0x7f) << 3) | rra;
data = state->m_char_rom->base()[char_addr & char_rom_mask];
char_addr = (chr_option << 11) | (state->m_graphic << 10) | ((lsd & 0x7f) << 3) | rra;
data = state->m_char_rom->base()[char_addr & char_rom_mask];
for (int bit = 0; bit < 8; bit++, data <<= 1)
{
int video = !((BIT(data, 7) ^ BIT(lsd, 7)) && no_row) ^ invert;
bitmap.pix32(y, x++) = RGB_MONOCHROME_GREEN[video];
}
for (int bit = 0; bit < 8; bit++, data <<= 1)
{
int video = !((BIT(data, 7) ^ BIT(lsd, 7)) && no_row) ^ invert;
bitmap.pix32(y, x++) = RGB_MONOCHROME_GREEN[video];
}
}
}
@ -1017,16 +1021,16 @@ MACHINE_START_MEMBER( pet_state, pet )
for (offs_t offset = 0; offset < m_ram->size(); offset++)
{
m_ram->pointer()[offset] = data;
if (!(offset % 64)) data ^= 0xff;
m_ram->pointer()[offset] = data;
if (!(offset % 64)) data ^= 0xff;
}
data = 0xff;
for (offs_t offset = 0; offset < m_video_ram_size; offset++)
{
m_video_ram[offset] = data;
if (!(offset % 64)) data ^= 0xff;
m_video_ram[offset] = data;
if (!(offset % 64)) data ^= 0xff;
}
// state saving
@ -1490,6 +1494,10 @@ MACHINE_CONFIG_END
//-------------------------------------------------
static MACHINE_CONFIG_DERIVED_CLASS( cbm8096, pet80, cbm8096_state )
MCFG_DEVICE_REMOVE(PET_EXPANSION_SLOT_TAG)
MCFG_PET_EXPANSION_SLOT_ADD(PET_EXPANSION_SLOT_TAG, XTAL_16MHz/16, pet_expansion_cards, "64k", NULL)
MCFG_PET_EXPANSION_SLOT_DMA_CALLBACKS(READ8(pet_state, read), WRITE8(pet_state, write))
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("96K")
@ -1809,10 +1817,10 @@ ROM_START( cbm8296 )
ROM_LOAD( "74s288.uc2", 0x00, 0x20, CRC(06030665) SHA1(19dc91ca49ecc20e66c646ba480d2c3bc70a62e6) ) // video/RAM timing
ROM_REGION( 0xf5, "pla1", 0 )
ROM_LOAD( "324744-01.ue6", 0x00, 0xf5, NO_DUMP )
ROM_LOAD( "324744-01.ue6", 0x00, 0xf5, NO_DUMP ) // 8700-009
ROM_REGION( 0xf5, "pla2", 0 )
ROM_LOAD( "324745-01.ue5", 0x00, 0xf5, NO_DUMP )
ROM_LOAD( "324745-01.ue5", 0x00, 0xf5, NO_DUMP ) // 8700-008
ROM_END
@ -1835,10 +1843,10 @@ ROM_START( cbm8296d )
ROM_LOAD( "74s288.uc2", 0x00, 0x20, CRC(06030665) SHA1(19dc91ca49ecc20e66c646ba480d2c3bc70a62e6) ) // video/RAM timing
ROM_REGION( 0xf5, "pla1", 0 )
ROM_LOAD( "324744-01.ue6", 0x00, 0xf5, NO_DUMP )
ROM_LOAD( "324744-01.ue6", 0x00, 0xf5, NO_DUMP ) // 8700-009
ROM_REGION( 0xf5, "pla2", 0 )
ROM_LOAD( "324745-01.ue5", 0x00, 0xf5, NO_DUMP )
ROM_LOAD( "324745-01.ue5", 0x00, 0xf5, NO_DUMP ) // 8700-008
ROM_END
@ -1861,10 +1869,10 @@ ROM_START( cbm8296d_de )
ROM_LOAD( "74s288.uc2", 0x00, 0x20, CRC(06030665) SHA1(19dc91ca49ecc20e66c646ba480d2c3bc70a62e6) ) // video/RAM timing
ROM_REGION( 0xf5, "pla1", 0 )
ROM_LOAD( "324744-01.ue6", 0x00, 0xf5, NO_DUMP )
ROM_LOAD( "324744-01.ue6", 0x00, 0xf5, NO_DUMP ) // 8700-009
ROM_REGION( 0xf5, "pla2", 0 )
ROM_LOAD( "324745-01.ue5", 0x00, 0xf5, NO_DUMP )
ROM_LOAD( "324745-01.ue5", 0x00, 0xf5, NO_DUMP ) // 8700-008
ROM_END
@ -1899,7 +1907,7 @@ COMP( 1981, cbm8032_se, pet8032, 0, pet8032, petb_se, driver_devic
COMP( 1981, superpet, pet8032, 0, superpet, petb, driver_device, 0, "Commodore Business Machines", "SuperPET SP-9000", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1981, mmf9000, pet8032, 0, superpet, petb, driver_device, 0, "Commodore Business Machines", "MicroMainFrame 9000", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1981, mmf9000_se, pet8032, 0, superpet, petb_se, driver_device, 0, "Commodore Business Machines", "MicroMainFrame 9000 (Sweden/Finland)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1981, cbm8096, pet8032, 0, cbm8096, petb, driver_device, 0, "Commodore Business Machines", "CBM 8096", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1981, cbm8096, pet8032, 0, cbm8096, petb, driver_device, 0, "Commodore Business Machines", "CBM 8096", GAME_SUPPORTS_SAVE )
COMP( 1984, cbm8296, 0, 0, cbm8296, petb, driver_device, 0, "Commodore Business Machines", "CBM 8296", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1984, cbm8296d, cbm8296, 0, cbm8296d, petb, driver_device, 0, "Commodore Business Machines", "CBM 8296D", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
COMP( 1984, cbm8296d_de,cbm8296, 0, cbm8296d, petb_de, driver_device, 0, "Commodore Business Machines", "CBM 8296D (Germany)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )

9
src/mess/drivers/vic20.c
View File

@ -450,16 +450,11 @@ WRITE8_MEMBER( vic20_state::via1_pa_w )
m_iec->atn_w(!BIT(data, 7));
}
READ_LINE_MEMBER( vic20_state::via1_ca1_r )
{
return m_restore->read();
}
static const via6522_interface via1_intf =
{
DEVCB_DRIVER_MEMBER(vic20_state, via1_pa_r),
DEVCB_DEVICE_MEMBER(VIC20_USER_PORT_TAG, vic20_user_port_device, pb_r),
DEVCB_DRIVER_LINE_MEMBER(vic20_state, via1_ca1_r),
DEVCB_INPUT_PORT("RESTORE"),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
@ -469,7 +464,7 @@ static const via6522_interface via1_intf =
DEVCB_DEVICE_LINE_MEMBER(VIC20_USER_PORT_TAG, vic20_user_port_device, cb1_w),
DEVCB_DEVICE_LINE_MEMBER(PET_DATASSETTE_PORT_TAG, pet_datassette_port_device, motor_w),
DEVCB_DEVICE_LINE_MEMBER(VIC20_USER_PORT_TAG, vic20_user_port_device, cb2_w),
DEVCB_CPU_INPUT_LINE(M6502_TAG, INPUT_LINE_NMI)
DEVCB_CPU_INPUT_LINE(M6502_TAG, M6502_NMI_LINE)
};

2
src/mess/includes/pet2001.h → src/mess/includes/pet.h
View File

@ -5,9 +5,9 @@
#include "emu.h"
#include "cpu/m6502/m6502.h"
#include "machine/cbm_snqk.h"
#include "machine/6522via.h"
#include "machine/6821pia.h"
#include "machine/cbm_snqk.h"
#include "machine/cbmipt.h"
#include "machine/ieee488.h"
#include "machine/petcass.h"

1
src/mess/includes/vic20.h
View File

@ -99,7 +99,6 @@ public:
DECLARE_READ8_MEMBER( via1_pa_r );
DECLARE_WRITE8_MEMBER( via1_pa_w );
DECLARE_READ_LINE_MEMBER( via1_ca1_r );
DECLARE_READ8_MEMBER( via2_pa_r );
DECLARE_READ8_MEMBER( via2_pb_r );

48
src/mess/machine/c64user.c
View File

@ -54,39 +54,17 @@ device_c64_user_port_interface::~device_c64_user_port_interface()
c64_user_port_device::c64_user_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, C64_USER_PORT, "C64 user port", tag, owner, clock),
device_slot_interface(mconfig, *this)
device_slot_interface(mconfig, *this),
m_write_cnt1(*this),
m_write_sp1(*this),
m_write_cnt2(*this),
m_write_sp2(*this),
m_write_flag2(*this),
m_write_reset(*this)
{
}
//-------------------------------------------------
// device_config_complete - perform any
// operations now that the configuration is
// complete
//-------------------------------------------------
void c64_user_port_device::device_config_complete()
{
// inherit a copy of the static data
const c64_user_port_interface *intf = reinterpret_cast<const c64_user_port_interface *>(static_config());
if (intf != NULL)
{
*static_cast<c64_user_port_interface *>(this) = *intf;
}
// or initialize to defaults if none provided
else
{
memset(&m_out_cnt1_cb, 0, sizeof(m_out_cnt1_cb));
memset(&m_out_sp1_cb, 0, sizeof(m_out_sp1_cb));
memset(&m_out_cnt2_cb, 0, sizeof(m_out_cnt2_cb));
memset(&m_out_sp2_cb, 0, sizeof(m_out_sp2_cb));
memset(&m_out_flag2_cb, 0, sizeof(m_out_flag2_cb));
memset(&m_out_reset_cb, 0, sizeof(m_out_reset_cb));
}
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
@ -96,12 +74,12 @@ void c64_user_port_device::device_start()
m_card = dynamic_cast<device_c64_user_port_interface *>(get_card_device());
// resolve callbacks
m_out_cnt1_func.resolve(m_out_cnt1_cb, *this);
m_out_sp1_func.resolve(m_out_sp1_cb, *this);
m_out_cnt2_func.resolve(m_out_cnt2_cb, *this);
m_out_sp2_func.resolve(m_out_sp2_cb, *this);
m_out_flag2_func.resolve(m_out_flag2_cb, *this);
m_out_reset_func.resolve(m_out_reset_cb, *this);
m_write_cnt1.resolve_safe();
m_write_sp1.resolve_safe();
m_write_cnt2.resolve_safe();
m_write_sp2.resolve_safe();
m_write_flag2.resolve_safe();
m_write_reset.resolve_safe();
}

67
src/mess/machine/c64user.h
View File

@ -43,46 +43,48 @@
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define C64_USER_PORT_INTERFACE(_name) \
const c64_user_port_interface (_name) =
#define MCFG_C64_USER_PORT_ADD(_tag, _config, _slot_intf, _def_slot, _def_inp) \
#define MCFG_C64_USER_PORT_ADD(_tag, _slot_intf, _def_slot, _def_inp, _reset) \
MCFG_DEVICE_ADD(_tag, C64_USER_PORT, 0) \
MCFG_DEVICE_CONFIG(_config) \
downcast<c64_user_port_device *>(device)->set_reset_callback(DEVCB2_##_reset); \
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _def_inp, false)
#define MCFG_C64_USER_PORT_CIA1_CALLBACKS(_cnt, _sp) \
downcast<c64_user_port_device *>(device)->set_cia1_callbacks(DEVCB2_##_cnt, DEVCB2_##_sp);
#define MCFG_C64_USER_PORT_CIA2_CALLBACKS(_cnt, _sp, _flag) \
downcast<c64_user_port_device *>(device)->set_cia2_callbacks(DEVCB2_##_cnt, DEVCB2_##_sp, DEVCB2_##_flag);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> c64_user_port_interface
struct c64_user_port_interface
{
devcb_write_line m_out_cnt1_cb;
devcb_write_line m_out_sp1_cb;
devcb_write_line m_out_cnt2_cb;
devcb_write_line m_out_sp2_cb;
devcb_write_line m_out_flag2_cb;
devcb_write_line m_out_reset_cb;
};
// ======================> c64_user_port_device
class device_c64_user_port_interface;
class c64_user_port_device : public device_t,
public c64_user_port_interface,
public device_slot_interface
{
public:
// construction/destruction
c64_user_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
template<class _reset> void set_reset_callback(_reset reset) { m_write_reset.set_callback(reset); }
template<class _cnt, class _sp> void set_cia1_callbacks(_cnt cnt, _sp sp) {
m_write_cnt1.set_callback(cnt);
m_write_sp1.set_callback(sp);
}
template<class _cnt, class _sp, class _flag> void set_cia2_callbacks(_cnt cnt, _sp sp, _flag flag) {
m_write_cnt2.set_callback(cnt);
m_write_sp2.set_callback(sp);
m_write_flag2.set_callback(flag);
}
// computer interface
DECLARE_READ8_MEMBER( pb_r );
DECLARE_WRITE8_MEMBER( pb_w );
@ -96,25 +98,24 @@ public:
DECLARE_WRITE_LINE_MEMBER( sp2_w );
// cartridge interface
DECLARE_WRITE_LINE_MEMBER( cia_cnt1_w ) { m_out_cnt1_func(state); }
DECLARE_WRITE_LINE_MEMBER( cia_sp1_w ) { m_out_sp1_func(state); }
DECLARE_WRITE_LINE_MEMBER( cia_cnt2_w ) { m_out_cnt2_func(state); }
DECLARE_WRITE_LINE_MEMBER( cia_sp2_w ) { m_out_sp2_func(state); }
DECLARE_WRITE_LINE_MEMBER( cia_flag2_w ) { m_out_flag2_func(state); }
DECLARE_WRITE_LINE_MEMBER( reset_w ) { m_out_reset_func(state); }
DECLARE_WRITE_LINE_MEMBER( cia_cnt1_w ) { m_write_cnt1(state); }
DECLARE_WRITE_LINE_MEMBER( cia_sp1_w ) { m_write_sp1(state); }
DECLARE_WRITE_LINE_MEMBER( cia_cnt2_w ) { m_write_cnt2(state); }
DECLARE_WRITE_LINE_MEMBER( cia_sp2_w ) { m_write_sp2(state); }
DECLARE_WRITE_LINE_MEMBER( cia_flag2_w ) { m_write_flag2(state); }
DECLARE_WRITE_LINE_MEMBER( reset_w ) { m_write_reset(state); }
protected:
// device-level overrides
virtual void device_config_complete();
virtual void device_start();
virtual void device_reset();
devcb_resolved_write_line m_out_cnt1_func;
devcb_resolved_write_line m_out_sp1_func;
devcb_resolved_write_line m_out_cnt2_func;
devcb_resolved_write_line m_out_sp2_func;
devcb_resolved_write_line m_out_flag2_func;
devcb_resolved_write_line m_out_reset_func;
devcb2_write_line m_write_cnt1;
devcb2_write_line m_write_sp1;
devcb2_write_line m_write_cnt2;
devcb2_write_line m_write_sp2;
devcb2_write_line m_write_flag2;
devcb2_write_line m_write_reset;
device_c64_user_port_interface *m_card;
};

2
src/mess/machine/cbmipt.c
View File

@ -1024,7 +1024,7 @@ INPUT_PORTS_START( vic_special )
INPUT_PORTS_END
SLOT_INTERFACE_START( pet_expansion_cards )
//SLOT_INTERFACE("64k", PET_64K)
SLOT_INTERFACE("64k", PET_64K)
SLOT_INTERFACE("superpet", SUPERPET)
SLOT_INTERFACE_END

1
src/mess/machine/cbmipt.h
View File

@ -90,6 +90,7 @@
#include "machine/diag264_lb_user.h"
#include "machine/fd2000.h"
#include "machine/interpod.h"
#include "machine/pet_64k.h"
#include "machine/plus4_sid.h"
#include "machine/plus4_std.h"
#include "machine/serialbox.h"

201
src/mess/machine/pet_64k.c Normal file
View File

@ -0,0 +1,201 @@
/**********************************************************************
Commodore PET 64KB RAM Expansion emulation
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#include "pet_64k.h"
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
const device_type PET_64K = &device_creator<pet_64k_expansion_device>;
//**************************************************************************
// INLINE HELPERS
//**************************************************************************
//-------------------------------------------------
// read_ram -
//-------------------------------------------------
inline UINT8 pet_64k_expansion_device::read_ram(offs_t offset)
{
UINT8 data = 0;
if (offset < 0xc000)
{
data = m_ram[(BIT(m_ctrl, 2) << 14) | (offset & 0x3fff)];
}
else
{
data = m_ram[0x8000 | (BIT(m_ctrl, 3) << 14) | (offset & 0x3fff)];
}
return data;
}
//-------------------------------------------------
// write_ram -
//-------------------------------------------------
inline void pet_64k_expansion_device::write_ram(offs_t offset, UINT8 data)
{
if (offset < 0xc000)
{
if (!BIT(m_ctrl, 0))
{
m_ram[(BIT(m_ctrl, 2) << 14) | (offset & 0x3fff)] = data;
}
}
else
{
if (!BIT(m_ctrl, 1))
{
m_ram[0x8000 | (BIT(m_ctrl, 3) << 14) | (offset & 0x3fff)] = data;
}
}
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
//-------------------------------------------------
// pet_64k_expansion_device - constructor
//-------------------------------------------------
pet_64k_expansion_device::pet_64k_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, PET_64K, "PET 64KB RAM", tag, owner, clock),
device_pet_expansion_card_interface(mconfig, *this),
m_ram(*this, "ram"),
m_ctrl(0)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void pet_64k_expansion_device::device_start()
{
// allocate memory
m_ram.allocate(0x10000);
// state saving
save_item(NAME(m_ctrl));
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void pet_64k_expansion_device::device_reset()
{
m_ctrl = 0;
}
//-------------------------------------------------
// pet_norom_r - NO ROM read
//-------------------------------------------------
int pet_64k_expansion_device::pet_norom_r(address_space &space, offs_t offset, int sel)
{
return !BIT(m_ctrl, 7);
}
//-------------------------------------------------
// pet_bd_r - buffered data read
//-------------------------------------------------
UINT8 pet_64k_expansion_device::pet_bd_r(address_space &space, offs_t offset, UINT8 data, int sel)
{
if (BIT(m_ctrl, 7))
{
switch (sel)
{
case pet_expansion_slot_device::SEL8:
if (!BIT(m_ctrl, 5))
{
data = read_ram(offset);
}
break;
case pet_expansion_slot_device::SELE:
if (!BIT(m_ctrl, 6) || !BIT(offset, 11))
{
data = read_ram(offset);
}
break;
case pet_expansion_slot_device::SEL9:
case pet_expansion_slot_device::SELA:
case pet_expansion_slot_device::SELB:
case pet_expansion_slot_device::SELC:
case pet_expansion_slot_device::SELD:
case pet_expansion_slot_device::SELF:
data = read_ram(offset);
break;
}
}
return data;
}
//-------------------------------------------------
// pet_bd_w - buffered data write
//-------------------------------------------------
void pet_64k_expansion_device::pet_bd_w(address_space &space, offs_t offset, UINT8 data, int sel)
{
if (BIT(m_ctrl, 7))
{
switch (sel)
{
case pet_expansion_slot_device::SEL8:
if (!BIT(m_ctrl, 5))
{
write_ram(offset, data);
}
break;
case pet_expansion_slot_device::SELE:
if (!BIT(m_ctrl, 6) || !BIT(offset, 11))
{
write_ram(offset, data);
}
break;
case pet_expansion_slot_device::SEL9:
case pet_expansion_slot_device::SELA:
case pet_expansion_slot_device::SELB:
case pet_expansion_slot_device::SELC:
case pet_expansion_slot_device::SELD:
case pet_expansion_slot_device::SELF:
write_ram(offset, data);
break;
}
}
if (offset == 0xfff0)
{
printf("CTRL %02x\n", data);
m_ctrl = data;
}
}

58
src/mess/machine/pet_64k.h Normal file
View File

@ -0,0 +1,58 @@
/**********************************************************************
Commodore PET 64KB RAM Expansion emulation
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************/
#pragma once
#ifndef __PET_64K__
#define __PET_64K__
#include "emu.h"
#include "machine/petexp.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> pet_64k_expansion_device
class pet_64k_expansion_device : public device_t,
public device_pet_expansion_card_interface
{
public:
// construction/destruction
pet_64k_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
// device-level overrides
virtual void device_config_complete() { m_shortname = "pet_64k"; }
virtual void device_start();
virtual void device_reset();
// device_pet_expansion_card_interface overrides
virtual int pet_norom_r(address_space &space, offs_t offset, int sel);
virtual UINT8 pet_bd_r(address_space &space, offs_t offset, UINT8 data, int sel);
virtual void pet_bd_w(address_space &space, offs_t offset, UINT8 data, int sel);
private:
inline UINT8 read_ram(offs_t offset);
inline void write_ram(offs_t offset, UINT8 data);
optional_shared_ptr<UINT8> m_ram;
UINT8 m_ctrl;
};
// device type definition
extern const device_type PET_64K;
#endif

20
src/mess/machine/petexp.h
View File

@ -72,6 +72,26 @@ public:
UINT8 dma_bd_r(offs_t offset);
void dma_bd_w(offs_t offset, UINT8 data);
int phi2();
enum
{
SEL0 = 0,
SEL1,
SEL2,
SEL3,
SEL4,
SEL5,
SEL6,
SEL7,
SEL8,
SEL9,
SELA,
SELB,
SELC,
SELD,
SELE,
SELF
};
protected:
// device-level overrides

46
src/mess/machine/superpet.c
View File

@ -111,8 +111,16 @@ machine_config_constructor superpet_device::device_mconfig_additions() const
static INPUT_PORTS_START( superpet )
PORT_START("SW1")
PORT_DIPNAME( 0x03, 0x02, "RAM" )
PORT_DIPSETTING( 0x00, "Read Only" )
PORT_DIPSETTING( 0x01, "Read/Write" )
PORT_DIPSETTING( 0x02, "System Port" )
PORT_START("SW2")
PORT_DIPNAME( 0x03, 0x02, "CPU" )
PORT_DIPSETTING( 0x00, "6809" )
PORT_DIPSETTING( 0x01, "6502" )
PORT_DIPSETTING( 0x02, "System Port" )
INPUT_PORTS_END
@ -135,8 +143,10 @@ ioport_constructor superpet_device::device_input_ports() const
// update_cpu -
//-------------------------------------------------
inline void superpet_device::update_cpu(int cpu)
inline void superpet_device::update_cpu()
{
int cpu = (m_sw2 == 2) ? BIT(m_system, 0) : m_sw2;
if (cpu)
{
// 6502 active
@ -152,6 +162,16 @@ inline void superpet_device::update_cpu(int cpu)
}
//-------------------------------------------------
// is_ram_writable -
//-------------------------------------------------
inline bool superpet_device::is_ram_writable()
{
return (m_sw1 == 2) ? BIT(m_system, 1) : m_sw1;
}
//**************************************************************************
// LIVE DEVICE
@ -169,8 +189,8 @@ superpet_device::superpet_device(const machine_config &mconfig, const char *tag,
m_dongle(*this, MOS6702_TAG),
m_rom(*this, M6809_TAG),
m_ram(*this, "ram"),
m_sw1(*this, "SW1"),
m_sw2(*this, "SW2"),
m_io_sw1(*this, "SW1"),
m_io_sw2(*this, "SW2"),
m_system(0),
m_bank(0),
m_sel9_rom(0),
@ -209,8 +229,10 @@ void superpet_device::device_reset()
m_system = 0;
m_bank = 0;
m_sel9_rom = 0;
m_sw1 = m_io_sw1->read();
m_sw2 = m_io_sw2->read();
update_cpu(BIT(m_system, 0));
update_cpu();
}
@ -234,7 +256,7 @@ UINT8 superpet_device::pet_bd_r(address_space &space, offs_t offset, UINT8 data,
switch (sel)
{
case SEL9:
case pet_expansion_slot_device::SEL9:
if (m_sel9_rom)
{
data = m_rom->base()[offset - 0x9000];
@ -245,14 +267,18 @@ UINT8 superpet_device::pet_bd_r(address_space &space, offs_t offset, UINT8 data,
}
break;
case SELA: case SELB: case SELC: case SELD: case SELF:
case pet_expansion_slot_device::SELA:
case pet_expansion_slot_device::SELB:
case pet_expansion_slot_device::SELC:
case pet_expansion_slot_device::SELD:
case pet_expansion_slot_device::SELF:
if (!norom)
{
data = m_rom->base()[offset - 0x9000];
}
break;
case SELE:
case pet_expansion_slot_device::SELE:
if (!norom && !BIT(offset, 11))
{
data = m_rom->base()[offset - 0x9000];
@ -289,8 +315,8 @@ void superpet_device::pet_bd_w(address_space &space, offs_t offset, UINT8 data,
{
switch (sel)
{
case SEL9:
if (!m_sel9_rom && BIT(m_system, 1))
case pet_expansion_slot_device::SEL9:
if (!m_sel9_rom && is_ram_writable())
{
m_ram[((m_bank & 0x0f) << 12) | (offset & 0xfff)] = data;
}
@ -334,7 +360,7 @@ void superpet_device::pet_bd_w(address_space &space, offs_t offset, UINT8 data,
*/
m_system = data;
update_cpu(BIT(m_system, 0));
update_cpu();
printf("SYSTEM %02x\n", data);
}
break;

29
src/mess/machine/superpet.h
View File

@ -57,39 +57,22 @@ protected:
virtual int pet_diag_r();
virtual void pet_irq_w(int state);
enum
{
SEL0 = 0,
SEL1,
SEL2,
SEL3,
SEL4,
SEL5,
SEL6,
SEL7,
SEL8,
SEL9,
SELA,
SELB,
SELC,
SELD,
SELE,
SELF
};
private:
required_device<cpu_device> m_maincpu;
required_device<mos6551_device> m_acia;
required_device<mos6702_device> m_dongle;
required_memory_region m_rom;
optional_shared_ptr<UINT8> m_ram;
required_ioport m_sw1;
required_ioport m_sw2;
required_ioport m_io_sw1;
required_ioport m_io_sw2;
inline void update_cpu(int cpu);
inline void update_cpu();
inline bool is_ram_writable();
UINT8 m_system;
UINT8 m_bank;
UINT8 m_sw1;
UINT8 m_sw2;
int m_sel9_rom;
int m_pet_irq;
int m_acia_irq;

7
src/mess/mess.mak
View File

@ -821,11 +821,12 @@ $(MESSOBJ)/casio.a: \
$(MESS_VIDEO)/hd44352.o \
$(MESSOBJ)/cbm.a: \
$(MESS_DRIVERS)/pet2001.o \
$(MESS_DRIVERS)/pet.o \
$(MESS_MACHINE)/petcass.o \
$(MESS_MACHINE)/petexp.o \
$(MESS_MACHINE)/petexp.o \
$(MESS_MACHINE)/petuser.o \
$(MESS_MACHINE)/superpet.o \
$(MESS_MACHINE)/pet_64k.o \
$(MESS_MACHINE)/superpet.o \
$(MESS_MACHINE)/mos6702.o \
$(MESS_DRIVERS)/c64.o \
$(MESS_MACHINE)/c64_legacy.o \