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trs80m3.cpp: Pedantic XTAL stuff (nw)

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AJR 2018-08-27 10:10:11 -04:00
parent 7d0cb2a8a6
commit b034e281af
1 changed files with 3 additions and 3 deletions
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6
src/mame/drivers/trs80m3.cpp
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@ -335,14 +335,14 @@ static void trs80_floppies(device_slot_interface &device)
MACHINE_CONFIG_START(trs80m3_state::model3)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", Z80, 20.2752_MHz_XTAL / 10)
MCFG_DEVICE_ADD("maincpu", Z80, 20.2752_MHz_XTAL / 10) // FIXME: actual Model III XTAL is 10.1376 MHz
MCFG_DEVICE_PROGRAM_MAP(m3_mem)
MCFG_DEVICE_IO_MAP(m3_io)
MCFG_DEVICE_PERIODIC_INT_DRIVER(trs80m3_state, rtc_interrupt, 20.2752_MHz_XTAL / 10 / 67584)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(12.672_MHz_XTAL, 800, 0, 640, 264, 0, 240)
MCFG_SCREEN_RAW_PARAMS(12.672_MHz_XTAL, 800, 0, 640, 264, 0, 240) // FIXME: these are Model 4 80-column parameters
MCFG_SCREEN_UPDATE_DRIVER(trs80m3_state, screen_update_trs80m3)
MCFG_SCREEN_PALETTE("palette")
@ -381,7 +381,7 @@ MACHINE_CONFIG_START(trs80m3_state::model3)
MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
COM8116(config, m_brg, 5.0688_MHz_XTAL); // BR1943 (or BR1941L)
COM8116(config, m_brg, 20.2752_MHz_XTAL / 4); // BR1943 (or BR1941L)
m_brg->fr_handler().set(m_uart, FUNC(ay31015_device::write_rcp));
m_brg->ft_handler().set(m_uart, FUNC(ay31015_device::write_tcp));