refactors etc. (nw)

This commit is contained in:
DavidHaywood 2019-03-25 19:05:20 +00:00
parent 0859b23993
commit b08da5142b
4 changed files with 67 additions and 115 deletions

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@ -17,48 +17,22 @@
DEFINE_DEVICE_TYPE(SPG24X, spg24x_device, "spg24x", "SPG240-series System-on-a-Chip") DEFINE_DEVICE_TYPE(SPG24X, spg24x_device, "spg24x", "SPG240-series System-on-a-Chip")
DEFINE_DEVICE_TYPE(SPG28X, spg28x_device, "spg28x", "SPG280-series System-on-a-Chip") DEFINE_DEVICE_TYPE(SPG28X, spg28x_device, "spg28x", "SPG280-series System-on-a-Chip")
#define LOG_IO_READS (1U << 1)
#define LOG_IO_WRITES (1U << 2)
#define LOG_UNKNOWN_IO (1U << 3) #define LOG_UNKNOWN_IO (1U << 3)
#define LOG_IRQS (1U << 4) #define LOG_IRQS (1U << 4)
#define LOG_VLINES (1U << 5) #define LOG_VLINES (1U << 5)
#define LOG_GPIO (1U << 6)
#define LOG_UART (1U << 7)
#define LOG_I2C (1U << 8)
#define LOG_DMA (1U << 9) #define LOG_DMA (1U << 9)
#define LOG_SEGMENT (1U << 10)
#define LOG_WATCHDOG (1U << 11)
#define LOG_TIMERS (1U << 12)
#define LOG_SPU_READS (1U << 13)
#define LOG_SPU_WRITES (1U << 14)
#define LOG_UNKNOWN_SPU (1U << 15)
#define LOG_CHANNEL_READS (1U << 16)
#define LOG_CHANNEL_WRITES (1U << 17)
#define LOG_ENVELOPES (1U << 18)
#define LOG_SAMPLES (1U << 19)
#define LOG_RAMPDOWN (1U << 20)
#define LOG_BEAT (1U << 21)
#define LOG_PPU_READS (1U << 22) #define LOG_PPU_READS (1U << 22)
#define LOG_PPU_WRITES (1U << 23) #define LOG_PPU_WRITES (1U << 23)
#define LOG_UNKNOWN_PPU (1U << 24) #define LOG_UNKNOWN_PPU (1U << 24)
#define LOG_FIQ (1U << 25) #define LOG_IO (LOG_IRQS | LOG_DMA | LOG_UNKNOWN_IO)
#define LOG_SIO (1U << 26)
#define LOG_EXT_MEM (1U << 27)
#define LOG_EXTINT (1U << 28)
#define LOG_IO (LOG_IO_READS | LOG_IO_WRITES | LOG_IRQS | LOG_GPIO | LOG_UART | LOG_I2C | LOG_DMA | LOG_TIMERS | LOG_EXTINT | LOG_UNKNOWN_IO)
#define LOG_CHANNELS (LOG_CHANNEL_READS | LOG_CHANNEL_WRITES)
#define LOG_SPU (LOG_SPU_READS | LOG_SPU_WRITES | LOG_UNKNOWN_SPU | LOG_CHANNEL_READS | LOG_CHANNEL_WRITES \
| LOG_ENVELOPES | LOG_SAMPLES | LOG_RAMPDOWN | LOG_BEAT)
#define LOG_PPU (LOG_PPU_READS | LOG_PPU_WRITES | LOG_UNKNOWN_PPU) #define LOG_PPU (LOG_PPU_READS | LOG_PPU_WRITES | LOG_UNKNOWN_PPU)
#define LOG_ALL (LOG_IO | LOG_SPU | LOG_PPU | LOG_VLINES | LOG_SEGMENT | LOG_FIQ) #define LOG_ALL (LOG_IO | LOG_PPU | LOG_VLINES )
#define VERBOSE (0) #define VERBOSE (0)
#include "logmacro.h" #include "logmacro.h"
#define SPG_DEBUG_VIDEO (0) #define SPG_DEBUG_VIDEO (0)
//#define IO_IRQ_ENABLE m_io_regs[0x21]
//#define IO_IRQ_STATUS m_io_regs[0x22]
#define VIDEO_IRQ_ENABLE m_video_regs[0x62] #define VIDEO_IRQ_ENABLE m_video_regs[0x62]
#define VIDEO_IRQ_STATUS m_video_regs[0x63] #define VIDEO_IRQ_STATUS m_video_regs[0x63]
@ -152,39 +126,13 @@ void spg2xx_device::device_start()
save_item(NAME(m_video_regs)); save_item(NAME(m_video_regs));
save_item(NAME(m_sprite_limit)); save_item(NAME(m_sprite_limit));
save_item(NAME(m_pal_flag)); save_item(NAME(m_pal_flag));
// save_item(NAME(m_2khz_divider));
// save_item(NAME(m_1khz_divider));
// save_item(NAME(m_4hz_divider));
// save_item(NAME(m_uart_baud_rate));
} }
void spg2xx_device::device_reset() void spg2xx_device::device_reset()
{ {
memset(m_video_regs, 0, 0x100 * sizeof(uint16_t)); memset(m_video_regs, 0, 0x100 * sizeof(uint16_t));
// memset(m_io_regs, 0, 0x100 * sizeof(uint16_t));
memset(m_dma_regs, 0, 0x4 * sizeof(uint16_t)); memset(m_dma_regs, 0, 0x4 * sizeof(uint16_t));
// m_timer_a_preload = 0;
// m_timer_b_preload = 0;
// m_timer_b_divisor = 0;
// m_timer_b_tick_rate = 0;
// m_io_regs[0x23] = 0x0028;
// m_io_regs[0x2c] = 0x1418;
// m_io_regs[0x2d] = 0x1658;
// m_uart_rx_available = false;
// memset(m_uart_rx_fifo, 0, ARRAY_LENGTH(m_uart_rx_fifo));
// m_uart_rx_fifo_start = 0;
// m_uart_rx_fifo_end = 0;
// m_uart_rx_fifo_count = 0;
// m_uart_tx_irq = false;
// m_uart_rx_irq = false;
// memset(m_extint, 0, sizeof(bool) * 2);
m_video_regs[0x36] = 0xffff; m_video_regs[0x36] = 0xffff;
m_video_regs[0x37] = 0xffff; m_video_regs[0x37] = 0xffff;
m_video_regs[0x3c] = 0x0020; m_video_regs[0x3c] = 0x0020;
@ -197,23 +145,8 @@ void spg2xx_device::device_reset()
m_debug_blit = false; m_debug_blit = false;
m_debug_palette = false; m_debug_palette = false;
m_sprite_index_to_debug = 0; m_sprite_index_to_debug = 0;
// m_4khz_timer->adjust(attotime::from_hz(4096), 0, attotime::from_hz(4096));
// m_2khz_divider = 0;
// m_1khz_divider = 0;
// m_4hz_divider = 0;
} }
void spg2xx_device::uart_rx(uint8_t data)
{
// TODO trampoline
}
void spg2xx_device::extint_w(int channel, bool state)
{
// TODO trampoline
}
WRITE_LINE_MEMBER(spg2xx_device::audioirq_w) WRITE_LINE_MEMBER(spg2xx_device::audioirq_w)
{ {
@ -1051,23 +984,45 @@ void spg2xx_device::do_cpu_dma(uint32_t len)
m_dma_regs[0x003] = (dst + len) & 0x3fff; m_dma_regs[0x003] = (dst + len) & 0x3fff;
} }
void spg2xx_device::device_add_mconfig(machine_config &config) void spg2xx_device::configure_spg_io(spg2xx_io_device* io)
{
io->porta_in().set(FUNC(spg2xx_device::porta_r));
io->portb_in().set(FUNC(spg2xx_device::portb_r));
io->portc_in().set(FUNC(spg2xx_device::portc_r));
io->porta_out().set(FUNC(spg2xx_device::porta_w));
io->portb_out().set(FUNC(spg2xx_device::portb_w));
io->portc_out().set(FUNC(spg2xx_device::portc_w));
io->adc_in<0>().set(FUNC(spg2xx_device::adc_r<0>));
io->adc_in<1>().set(FUNC(spg2xx_device::adc_r<1>));
io->eeprom_w().set(FUNC(spg2xx_device::eepromx_w));
io->eeprom_r().set(FUNC(spg2xx_device::eepromx_r));
io->uart_tx().set(FUNC(spg2xx_device::tx_w));
io->chip_select().set(FUNC(spg2xx_device::cs_w));
io->pal_read_callback().set(FUNC(spg2xx_device::get_pal_r));
}
void spg24x_device::device_add_mconfig(machine_config &config)
{ {
SPG2XX_AUDIO(config, m_spg_audio, DERIVED_CLOCK(1, 1)); SPG2XX_AUDIO(config, m_spg_audio, DERIVED_CLOCK(1, 1));
m_spg_audio->write_irq_callback().set(FUNC(spg2xx_device::audioirq_w)); m_spg_audio->write_irq_callback().set(FUNC(spg24x_device::audioirq_w));
m_spg_audio->space_read_callback().set(FUNC(spg2xx_device::space_r)); m_spg_audio->space_read_callback().set(FUNC(spg24x_device::space_r));
m_spg_audio->add_route(0, *this, 1.0, AUTO_ALLOC_INPUT, 0); m_spg_audio->add_route(0, *this, 1.0, AUTO_ALLOC_INPUT, 0);
m_spg_audio->add_route(1, *this, 1.0, AUTO_ALLOC_INPUT, 1); m_spg_audio->add_route(1, *this, 1.0, AUTO_ALLOC_INPUT, 1);
SPG24X_IO(config, m_spg_io, DERIVED_CLOCK(1, 1), m_cpu, m_screen); SPG24X_IO(config, m_spg_io, DERIVED_CLOCK(1, 1), m_cpu, m_screen);
m_spg_io->porta_in().set(FUNC(spg2xx_device::porta_r)); configure_spg_io(m_spg_io);
m_spg_io->portb_in().set(FUNC(spg2xx_device::portb_r)); }
m_spg_io->portc_in().set(FUNC(spg2xx_device::portc_r));
m_spg_io->porta_out().set(FUNC(spg2xx_device::porta_w)); void spg28x_device::device_add_mconfig(machine_config &config)
m_spg_io->portb_out().set(FUNC(spg2xx_device::portb_w)); {
m_spg_io->portc_out().set(FUNC(spg2xx_device::portc_w)); SPG2XX_AUDIO(config, m_spg_audio, DERIVED_CLOCK(1, 1));
m_spg_audio->write_irq_callback().set(FUNC(spg28x_device::audioirq_w));
m_spg_audio->space_read_callback().set(FUNC(spg28x_device::space_r));
m_spg_audio->add_route(0, *this, 1.0, AUTO_ALLOC_INPUT, 0);
m_spg_audio->add_route(1, *this, 1.0, AUTO_ALLOC_INPUT, 1);
SPG28X_IO(config, m_spg_io, DERIVED_CLOCK(1, 1), m_cpu, m_screen);
configure_spg_io(m_spg_io);
} }

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@ -65,16 +65,15 @@ public:
auto chip_select() { return m_chip_sel.bind(); } auto chip_select() { return m_chip_sel.bind(); }
void uart_rx(uint8_t data);
void extint_w(int channel, bool state);
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_WRITE_LINE_MEMBER(vblank); DECLARE_WRITE_LINE_MEMBER(vblank);
required_device<spg2xx_audio_device> m_spg_audio; required_device<spg2xx_audio_device> m_spg_audio;
required_device<spg2xx_io_device> m_spg_io; required_device<spg2xx_io_device> m_spg_io;
void extint_w(int channel, bool state) { m_spg_io->extint_w(channel, state); };
void uart_rx(uint8_t data) { m_spg_io->uart_rx(data); };
protected: protected:
spg2xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const uint32_t sprite_limit) spg2xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const uint32_t sprite_limit)
: spg2xx_device(mconfig, type, tag, owner, clock) : spg2xx_device(mconfig, type, tag, owner, clock)
@ -82,8 +81,6 @@ protected:
m_sprite_limit = sprite_limit; m_sprite_limit = sprite_limit;
} }
virtual void device_add_mconfig(machine_config &config) override;
enum enum
{ {
PAGE_ENABLE_MASK = 0x0008, PAGE_ENABLE_MASK = 0x0008,
@ -111,7 +108,6 @@ protected:
DECLARE_WRITE_LINE_MEMBER(audioirq_w); DECLARE_WRITE_LINE_MEMBER(audioirq_w);
DECLARE_READ16_MEMBER(space_r); DECLARE_READ16_MEMBER(space_r);
// void check_extint_irq(int channel);
inline void check_video_irq(); inline void check_video_irq();
void spg2xx_map(address_map &map); void spg2xx_map(address_map &map);
@ -199,12 +195,22 @@ protected:
required_shared_ptr<uint16_t> m_paletteram; required_shared_ptr<uint16_t> m_paletteram;
required_shared_ptr<uint16_t> m_spriteram; required_shared_ptr<uint16_t> m_spriteram;
void configure_spg_io(spg2xx_io_device* io);
DECLARE_READ16_MEMBER(porta_r) { return m_porta_in(); }; DECLARE_READ16_MEMBER(porta_r) { return m_porta_in(); };
DECLARE_READ16_MEMBER(portb_r) { return m_portb_in(); }; DECLARE_READ16_MEMBER(portb_r) { return m_portb_in(); };
DECLARE_READ16_MEMBER(portc_r) { return m_portc_in(); }; DECLARE_READ16_MEMBER(portc_r) { return m_portc_in(); };
DECLARE_WRITE16_MEMBER(porta_w) { m_porta_out(offset, data, mem_mask); }; DECLARE_WRITE16_MEMBER(porta_w) { m_porta_out(offset, data, mem_mask); };
DECLARE_WRITE16_MEMBER(portb_w) { m_portb_out(offset, data, mem_mask); }; DECLARE_WRITE16_MEMBER(portb_w) { m_portb_out(offset, data, mem_mask); };
DECLARE_WRITE16_MEMBER(portc_w) { m_portc_out(offset, data, mem_mask); }; DECLARE_WRITE16_MEMBER(portc_w) { m_portc_out(offset, data, mem_mask); };
template <size_t Line> DECLARE_READ16_MEMBER(adc_r) { return m_adc_in[Line](); };
DECLARE_WRITE8_MEMBER(eepromx_w) { m_eeprom_w(offset, data, mem_mask); };
DECLARE_READ8_MEMBER(eepromx_r) { return m_eeprom_r(); };
DECLARE_WRITE8_MEMBER(tx_w) { m_uart_tx(offset, data, mem_mask); };
DECLARE_WRITE8_MEMBER(cs_w) { m_chip_sel(offset, data, mem_mask); };
DECLARE_READ16_MEMBER(get_pal_r) { return m_pal_flag; };
}; };
@ -220,6 +226,9 @@ public:
} }
spg24x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); spg24x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual void device_add_mconfig(machine_config &config) override;
}; };
class spg28x_device : public spg2xx_device class spg28x_device : public spg2xx_device
@ -235,7 +244,8 @@ public:
spg28x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); spg28x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
//virtual DECLARE_WRITE16_MEMBER(io_w) override; virtual void device_add_mconfig(machine_config &config) override;
}; };
DECLARE_DEVICE_TYPE(SPG24X, spg24x_device) DECLARE_DEVICE_TYPE(SPG24X, spg24x_device)

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@ -15,32 +15,15 @@ DEFINE_DEVICE_TYPE(SPG28X_IO, spg28x_io_device, "spg28x_io", "SPG280-series Syst
#define LOG_GPIO (1U << 6) #define LOG_GPIO (1U << 6)
#define LOG_UART (1U << 7) #define LOG_UART (1U << 7)
#define LOG_I2C (1U << 8) #define LOG_I2C (1U << 8)
#define LOG_DMA (1U << 9)
#define LOG_SEGMENT (1U << 10) #define LOG_SEGMENT (1U << 10)
#define LOG_WATCHDOG (1U << 11) #define LOG_WATCHDOG (1U << 11)
#define LOG_TIMERS (1U << 12) #define LOG_TIMERS (1U << 12)
#define LOG_SPU_READS (1U << 13)
#define LOG_SPU_WRITES (1U << 14)
#define LOG_UNKNOWN_SPU (1U << 15)
#define LOG_CHANNEL_READS (1U << 16)
#define LOG_CHANNEL_WRITES (1U << 17)
#define LOG_ENVELOPES (1U << 18)
#define LOG_SAMPLES (1U << 19)
#define LOG_RAMPDOWN (1U << 20)
#define LOG_BEAT (1U << 21)
#define LOG_PPU_READS (1U << 22)
#define LOG_PPU_WRITES (1U << 23)
#define LOG_UNKNOWN_PPU (1U << 24)
#define LOG_FIQ (1U << 25) #define LOG_FIQ (1U << 25)
#define LOG_SIO (1U << 26) #define LOG_SIO (1U << 26)
#define LOG_EXT_MEM (1U << 27) #define LOG_EXT_MEM (1U << 27)
#define LOG_EXTINT (1U << 28) #define LOG_EXTINT (1U << 28)
#define LOG_IO (LOG_IO_READS | LOG_IO_WRITES | LOG_IRQS | LOG_GPIO | LOG_UART | LOG_I2C | LOG_DMA | LOG_TIMERS | LOG_EXTINT | LOG_UNKNOWN_IO) #define LOG_IO (LOG_IO_READS | LOG_IO_WRITES | LOG_IRQS | LOG_GPIO | LOG_UART | LOG_I2C | LOG_TIMERS | LOG_EXTINT | LOG_UNKNOWN_IO)
#define LOG_CHANNELS (LOG_CHANNEL_READS | LOG_CHANNEL_WRITES) #define LOG_ALL (LOG_IO | LOG_VLINES | LOG_SEGMENT | LOG_FIQ)
#define LOG_SPU (LOG_SPU_READS | LOG_SPU_WRITES | LOG_UNKNOWN_SPU | LOG_CHANNEL_READS | LOG_CHANNEL_WRITES \
| LOG_ENVELOPES | LOG_SAMPLES | LOG_RAMPDOWN | LOG_BEAT)
#define LOG_PPU (LOG_PPU_READS | LOG_PPU_WRITES | LOG_UNKNOWN_PPU)
#define LOG_ALL (LOG_IO | LOG_SPU | LOG_PPU | LOG_VLINES | LOG_SEGMENT | LOG_FIQ)
#define VERBOSE (0) #define VERBOSE (0)
#include "logmacro.h" #include "logmacro.h"
@ -64,6 +47,7 @@ spg2xx_io_device::spg2xx_io_device(const machine_config &mconfig, device_type ty
, m_chip_sel(*this) , m_chip_sel(*this)
, m_cpu(*this, finder_base::DUMMY_TAG) , m_cpu(*this, finder_base::DUMMY_TAG)
, m_screen(*this, finder_base::DUMMY_TAG) , m_screen(*this, finder_base::DUMMY_TAG)
, m_pal_read_cb(*this)
{ {
} }
@ -92,6 +76,7 @@ void spg2xx_io_device::device_start()
m_eeprom_r.resolve_safe(0); m_eeprom_r.resolve_safe(0);
m_uart_tx.resolve_safe(); m_uart_tx.resolve_safe();
m_chip_sel.resolve_safe(); m_chip_sel.resolve_safe();
m_pal_read_cb.resolve_safe(0);
m_tmb1 = timer_alloc(TIMER_TMB1); m_tmb1 = timer_alloc(TIMER_TMB1);
m_tmb2 = timer_alloc(TIMER_TMB2); m_tmb2 = timer_alloc(TIMER_TMB2);
@ -127,6 +112,7 @@ void spg2xx_io_device::device_start()
save_item(NAME(m_4hz_divider)); save_item(NAME(m_4hz_divider));
save_item(NAME(m_uart_baud_rate)); save_item(NAME(m_uart_baud_rate));
} }
void spg2xx_io_device::device_reset() void spg2xx_io_device::device_reset()
@ -247,8 +233,11 @@ READ16_MEMBER(spg2xx_io_device::io_r)
break; break;
case 0x2b: case 0x2b:
LOGMASKED(LOG_IO_READS, "io_r: NTSC/PAL = %04x\n", m_pal_flag); {
return m_pal_flag; uint16_t pal = m_pal_read_cb();
LOGMASKED(LOG_IO_READS, "io_r: NTSC/PAL = %04x\n", pal);
return pal;
}
case 0x2c: // PRNG 0 case 0x2c: // PRNG 0
{ {

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@ -36,6 +36,8 @@ public:
virtual DECLARE_READ16_MEMBER(io_r); virtual DECLARE_READ16_MEMBER(io_r);
virtual DECLARE_WRITE16_MEMBER(io_w); virtual DECLARE_WRITE16_MEMBER(io_w);
auto pal_read_callback() { return m_pal_read_cb.bind(); }
protected: protected:
spg2xx_io_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const uint32_t sprite_limit) spg2xx_io_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const uint32_t sprite_limit)
@ -43,10 +45,6 @@ protected:
{ {
} }
DECLARE_WRITE_LINE_MEMBER(audioirq_w);
DECLARE_READ16_MEMBER(space_r);
void check_extint_irq(int channel); void check_extint_irq(int channel);
void check_irqs(const uint16_t changed); void check_irqs(const uint16_t changed);
@ -130,7 +128,7 @@ protected:
required_device<unsp_device> m_cpu; required_device<unsp_device> m_cpu;
required_device<screen_device> m_screen; required_device<screen_device> m_screen;
uint16_t m_pal_flag; devcb_read16 m_pal_read_cb;
}; };
class spg24x_io_device : public spg2xx_io_device class spg24x_io_device : public spg2xx_io_device