diff --git a/src/mess/drivers/dccons.c b/src/mess/drivers/dccons.c
index ffae095369b..bb5854e0c8f 100644
--- a/src/mess/drivers/dccons.c
+++ b/src/mess/drivers/dccons.c
@@ -116,7 +116,7 @@ static ADDRESS_MAP_START( dc_map, AS_PROGRAM, 64, dc_cons_state )
 	AM_RANGE(0x005f6800, 0x005f69ff) AM_READWRITE(dc_sysctrl_r, dc_sysctrl_w )
 	AM_RANGE(0x005f6c00, 0x005f6cff) AM_DEVICE32( "maple_dc", maple_dc_device, amap, U64(0xffffffffffffffff) )
 	AM_RANGE(0x005f7000, 0x005f70ff) AM_READWRITE(dc_mess_gdrom_r, dc_mess_gdrom_w )
-	AM_RANGE(0x005f7400, 0x005f74ff) AM_READWRITE(dc_mess_g1_ctrl_r, dc_mess_g1_ctrl_w )
+	AM_RANGE(0x005f7400, 0x005f74ff) AM_READWRITE32(dc_mess_g1_ctrl_r, dc_mess_g1_ctrl_w, U64(0xffffffffffffffff) )
 	AM_RANGE(0x005f7800, 0x005f78ff) AM_READWRITE(dc_g2_ctrl_r, dc_g2_ctrl_w )
 	AM_RANGE(0x005f7c00, 0x005f7cff) AM_DEVICE32("powervr2", powervr2_device, pd_dma_map, U64(0xffffffffffffffff))
 	AM_RANGE(0x005f8000, 0x005f9fff) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff))
diff --git a/src/mess/includes/dccons.h b/src/mess/includes/dccons.h
index 8e783fbd4ff..a241d972cb9 100644
--- a/src/mess/includes/dccons.h
+++ b/src/mess/includes/dccons.h
@@ -30,8 +30,8 @@ public:
 	inline int decode_reg32_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift);
 	READ64_MEMBER( dc_mess_gdrom_r );
 	WRITE64_MEMBER( dc_mess_gdrom_w );
-	READ64_MEMBER( dc_mess_g1_ctrl_r );
-	WRITE64_MEMBER( dc_mess_g1_ctrl_w );
+	READ32_MEMBER( dc_mess_g1_ctrl_r );
+	WRITE32_MEMBER( dc_mess_g1_ctrl_w );
 
 private:
 	UINT64 PDTRA, PCTRA;
diff --git a/src/mess/machine/dccons.c b/src/mess/machine/dccons.c
index d43a95f16d4..010a78468c0 100644
--- a/src/mess/machine/dccons.c
+++ b/src/mess/machine/dccons.c
@@ -11,6 +11,9 @@
 
     cfffee0 - stack location when bad happens
 
+	TODO:
+	- gdrom_alt_status is identical to normal status except that "but it does not clear DMA status information when it is accessed"
+
 */
 
 #include "emu.h"
@@ -267,6 +270,8 @@ WRITE32_MEMBER(dc_cons_state::atapi_w )
 		atapi_data[atapi_data_ptr++] = data & 0xff;
 		atapi_data[atapi_data_ptr++] = data >> 8;
 
+		//printf("%02x %02x %d\n",data & 0xff, data >> 8,atapi_data_ptr);
+
 		if (atapi_cdata_wait)
 		{
 //                  printf("ATAPI: waiting, ptr %d wait %d\n", atapi_data_ptr, atapi_cdata_wait);
@@ -651,32 +656,30 @@ int dc_cons_state::decode_reg32_64( UINT32 offset, UINT64 mem_mask, UINT64 *shif
 	return reg;
 }
 
-READ64_MEMBER(dc_cons_state::dc_mess_g1_ctrl_r )
+READ32_MEMBER(dc_cons_state::dc_mess_g1_ctrl_r )
 {
-	int reg;
-	UINT64 shift;
-
-	reg = decode_reg32_64(offset, mem_mask, &shift);
-	mame_printf_verbose("G1CTRL:  Unmapped read %08x\n", 0x5f7400+reg*4);
-	return (UINT64)g1bus_regs[reg] << shift;
+	switch(offset)
+	{
+		case SB_GDST:
+			break;
+		case SB_GDLEND:
+			//debugger_break(machine());
+			return atapi_xferlen; // TODO: check me
+		default:
+			printf("G1CTRL:  Unmapped read %08x\n", 0x5f7400+offset*4);
+			debugger_break(machine());
+	}
+	return g1bus_regs[offset];
 }
 
-WRITE64_MEMBER(dc_cons_state::dc_mess_g1_ctrl_w )
+WRITE32_MEMBER(dc_cons_state::dc_mess_g1_ctrl_w )
 {
-	int reg;
-	UINT64 shift;
-	UINT32 dat; //, old
-
-	reg = decode_reg32_64(offset, mem_mask, &shift);
-	dat = (UINT32)(data >> shift);
-//  old = g1bus_regs[reg];
-
-	g1bus_regs[reg] = dat; // 5f7400+reg*4=dat
-	mame_printf_verbose("G1CTRL: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x5f7400+reg*4, dat, data, offset, mem_mask);
-	switch (reg)
+	g1bus_regs[offset] = data; // 5f7400+reg*4=dat
+//	mame_printf_verbose("G1CTRL: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x5f7400+reg*4, dat, data, offset, mem_mask);
+	switch (offset)
 	{
 	case SB_GDST:
-		if (dat & 1 && g1bus_regs[SB_GDEN] == 1) // 0 -> 1
+		if (data & 1 && g1bus_regs[SB_GDEN] == 1) // 0 -> 1
 		{
 			if (g1bus_regs[SB_GDDIR] == 0)
 			{