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(nw) Split mc80 into separate mc8020 and mc8030 as they have little in common.

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This commit is contained in:
Robbbert 2017-11-25 01:32:17 +11:00
parent 0a9c7de2e1
commit b1198c91f9
7 changed files with 475 additions and 540 deletions
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6
scripts/target/mame/mess.lua
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@ -3275,10 +3275,8 @@ files {
MAME_DIR .. "src/mame/video/kc.cpp",
MAME_DIR .. "src/mame/drivers/lc80.cpp",
MAME_DIR .. "src/mame/includes/lc80.h",
MAME_DIR .. "src/mame/drivers/mc80.cpp",
MAME_DIR .. "src/mame/includes/mc80.h",
MAME_DIR .. "src/mame/machine/mc80.cpp",
MAME_DIR .. "src/mame/video/mc80.cpp",
MAME_DIR .. "src/mame/drivers/mc8020.cpp",
MAME_DIR .. "src/mame/drivers/mc8030.cpp",
MAME_DIR .. "src/mame/drivers/poly880.cpp",
MAME_DIR .. "src/mame/includes/poly880.h",
MAME_DIR .. "src/mame/drivers/sc1.cpp",

345
src/mame/drivers/mc80.cpp → src/mame/drivers/mc8020.cpp
View File

@ -2,30 +2,44 @@
// copyright-holders:Miodrag Milanovic
/***************************************************************************
MC-80.xx driver by Miodrag Milanovic
MC-80.20 driver by Miodrag Milanovic
15/05/2009 Initial implementation
12/05/2009 Skeleton driver.
01/09/2011 Modernised, added a keyboard to mc8020
2009-05-12 Skeleton driver.
2009-05-15 Initial implementation
2011-09-01 Modernised, added a keyboard to mc8020
Real workings of mc8020 keyboard need to be understood and implemented.
mc80.3x: http://www.ycdt.net/mc80.3x/
mc8030: very little info available. The area from FFD8-FFFF is meant for
interrupt vectors and so on, but most of it is zeroes. Appears the keyboard
is an ascii keyboard with built-in beeper. It communicates via the SIO,
which needs a rewrite to become useful. The asp ctc needs at least 2
triggers. The purpose of the zve pio is unknown. The system uses interrupts
for various things, but none of that is working.
****************************************************************************/
#include "emu.h"
#include "includes/mc80.h"
#include "cpu/z80/z80.h"
#include "machine/timer.h"
#include "machine/z80ctc.h"
#include "machine/z80pio.h"
#include "screen.h"
static ADDRESS_MAP_START(mc8020_mem, AS_PROGRAM, 8, mc80_state)
class mc8020_state : public driver_device
{
public:
mc8020_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_p_videoram(*this, "videoram")
, m_maincpu(*this, "maincpu")
{ }
DECLARE_READ8_MEMBER(mc80_port_b_r);
DECLARE_READ8_MEMBER(mc80_port_a_r);
uint32_t screen_update_mc8020(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
TIMER_DEVICE_CALLBACK_MEMBER(mc8020_kbd);
IRQ_CALLBACK_MEMBER(mc8020_irq_callback);
private:
required_shared_ptr<u8> m_p_videoram;
required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, mc8020_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x0bff) AM_ROM
AM_RANGE(0x0c00, 0x0fff) AM_RAM AM_SHARE("videoram")// 1KB RAM ZRE
@ -33,35 +47,13 @@ static ADDRESS_MAP_START(mc8020_mem, AS_PROGRAM, 8, mc80_state)
AM_RANGE(0x6000, 0xffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START(mc8020_io, AS_IO, 8, mc80_state)
static ADDRESS_MAP_START( io_map, AS_IO, 8, mc8020_state )
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0xf0, 0xf3) AM_DEVREADWRITE("z80ctc", z80ctc_device, read, write)
AM_RANGE(0xf4, 0xf7) AM_DEVREADWRITE("z80pio", z80pio_device, read, write)
AM_RANGE(0xf0, 0xf3) AM_DEVREADWRITE("ctc", z80ctc_device, read, write)
AM_RANGE(0xf4, 0xf7) AM_DEVREADWRITE("pio", z80pio_device, read, write)
ADDRESS_MAP_END
static ADDRESS_MAP_START(mc8030_mem, AS_PROGRAM, 8, mc80_state)
ADDRESS_MAP_UNMAP_HIGH
// ZRE 4 * 2KB
AM_RANGE(0x0000, 0x1fff) AM_ROM // ZRE ROM's 4 * 2716
AM_RANGE(0x2000, 0x27ff) AM_ROM // SPE ROM's 2 * 2708
AM_RANGE(0x2800, 0x3fff) AM_ROM // For extension
AM_RANGE(0x4000, 0xbfff) AM_RAM // SPE RAM
AM_RANGE(0xc000, 0xffff) AM_RAM // ZRE RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START(mc8030_io, AS_IO, 8, mc80_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x30, 0x3f) AM_MIRROR(0xff00) AM_NOP //"mass storage"
AM_RANGE(0x80, 0x83) AM_MIRROR(0xff00) AM_DEVREADWRITE("zve_ctc", z80ctc_device, read, write) // user CTC
AM_RANGE(0x84, 0x87) AM_MIRROR(0xff00) AM_DEVREADWRITE("zve_pio", z80pio_device, read, write) // PIO unknown usage
AM_RANGE(0x88, 0x8f) AM_MIRROR(0xff00) AM_WRITE(mc8030_zve_write_protect_w)
AM_RANGE(0xc0, 0xcf) AM_SELECT(0xff00) AM_WRITE(mc8030_vis_w)
AM_RANGE(0xd0, 0xd3) AM_MIRROR(0xff00) AM_DEVREADWRITE("asp_sio", z80sio0_device, cd_ba_r, cd_ba_w) // keyboard & IFSS?
AM_RANGE(0xd4, 0xd7) AM_MIRROR(0xff00) AM_DEVREADWRITE("asp_ctc", z80ctc_device, read, write) // sio bauds, KMBG? and kbd
AM_RANGE(0xd8, 0xdb) AM_MIRROR(0xff00) AM_DEVREADWRITE("asp_pio", z80pio_device, read, write) // external bus
AM_RANGE(0xe0, 0xef) AM_MIRROR(0xff00) AM_WRITE(mc8030_eprom_prog_w)
ADDRESS_MAP_END
/* Input ports */
static INPUT_PORTS_START( mc8020 )
@ -136,41 +128,152 @@ static INPUT_PORTS_START( mc8020 )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT)
INPUT_PORTS_END
static INPUT_PORTS_START( mc8030 )
INPUT_PORTS_END
TIMER_DEVICE_CALLBACK_MEMBER(mc80_state::mc8020_kbd)
TIMER_DEVICE_CALLBACK_MEMBER( mc8020_state::mc8020_kbd )
{
address_space &mem = m_maincpu->space(AS_PROGRAM);
char kbdrow[6];
uint8_t i;
for (i = 1; i < 8; i++)
for (u8 i = 1; i < 8; i++)
{
sprintf(kbdrow,"X%X", i);
mem.write_word(0xd20+i, ioport(kbdrow)->read());
}
}
// this is a guess there is no information available
static const z80_daisy_config mc8030_daisy_chain[] =
IRQ_CALLBACK_MEMBER(mc8020_state::mc8020_irq_callback)
{
{ "asp_ctc" }, /* System ctc */
{ "asp_pio" }, /* System pio */
{ "asp_sio" }, /* sio */
{ "zve_pio" }, /* User pio */
{ "zve_ctc" }, /* User ctc */
{ nullptr }
return 0x00;
}
READ8_MEMBER( mc8020_state::mc80_port_b_r )
{
return 0;
}
READ8_MEMBER( mc8020_state::mc80_port_a_r )
{
return 0;
}
// This is not a content of U402 510
// but order is fine
static const uint8_t prom[] = {
0x0c,0x11,0x13,0x15,0x17,0x10,0x0e,0x00, // @
0x04,0x0a,0x11,0x11,0x1f,0x11,0x11,0x00, // A
0x1e,0x11,0x11,0x1e,0x11,0x11,0x1e,0x00, // B
0x0e,0x11,0x10,0x10,0x10,0x11,0x0e,0x00, // C
0x1e,0x09,0x09,0x09,0x09,0x09,0x1e,0x00, // D
0x1f,0x10,0x10,0x1e,0x10,0x10,0x1f,0x00, // E
0x1f,0x10,0x10,0x1e,0x10,0x10,0x10,0x00, // F
0x0e,0x11,0x10,0x10,0x13,0x11,0x0f,0x00, // G
0x11,0x11,0x11,0x1f,0x11,0x11,0x11,0x00, // H
0x0e,0x04,0x04,0x04,0x04,0x04,0x0e,0x00, // I
0x01,0x01,0x01,0x01,0x11,0x11,0x0e,0x00, // J
0x11,0x12,0x14,0x18,0x14,0x12,0x11,0x00, // K
0x10,0x10,0x10,0x10,0x10,0x10,0x1f,0x00, // L
0x11,0x1b,0x15,0x15,0x11,0x11,0x11,0x00, // M
0x11,0x11,0x19,0x15,0x13,0x11,0x11,0x00, // N
0x0e,0x11,0x11,0x11,0x11,0x11,0x0e,0x00, // O
0x1e,0x11,0x11,0x1e,0x10,0x10,0x10,0x00, // P
0x0e,0x11,0x11,0x11,0x15,0x12,0x0d,0x00, // Q
0x1e,0x11,0x11,0x1e,0x14,0x12,0x11,0x00, // R
0x0e,0x11,0x10,0x0e,0x01,0x11,0x0e,0x00, // S
0x1f,0x04,0x04,0x04,0x04,0x04,0x04,0x00, // T
0x11,0x11,0x11,0x11,0x11,0x11,0x0e,0x00, // U
0x11,0x11,0x11,0x0a,0x0a,0x04,0x04,0x00, // V
0x11,0x11,0x11,0x15,0x15,0x15,0x0a,0x00, // W
0x11,0x11,0x0a,0x04,0x0a,0x11,0x11,0x00, // X
0x11,0x11,0x0a,0x04,0x04,0x04,0x04,0x00, // Y
0x1f,0x01,0x02,0x04,0x08,0x10,0x1f,0x00, // Z
0x1c,0x10,0x10,0x10,0x10,0x10,0x1c,0x00, // [
0x00,0x10,0x08,0x04,0x02,0x01,0x00,0x00, // backslash
0x07,0x01,0x01,0x01,0x01,0x01,0x07,0x00, // ]
0x0e,0x11,0x00,0x00,0x00,0x00,0x00,0x00, // ^
0x00,0x00,0x00,0x00,0x00,0x00,0x1f,0x00, // _
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //
0x04,0x04,0x04,0x04,0x04,0x00,0x04,0x00, // !
0x0a,0x0a,0x0a,0x00,0x00,0x00,0x00,0x00, // "
0x0a,0x0a,0x1f,0x0a,0x1f,0x0a,0x0a,0x00, // #
0x00,0x11,0x0e,0x0a,0x0e,0x11,0x00,0x00, // []
0x18,0x19,0x02,0x04,0x08,0x13,0x03,0x00, // %
0x04,0x0a,0x0a,0x0c,0x15,0x12,0x0d,0x00, // &
0x04,0x04,0x08,0x00,0x00,0x00,0x00,0x00, // '
0x02,0x04,0x08,0x08,0x08,0x04,0x02,0x00, // (
0x08,0x04,0x02,0x02,0x02,0x04,0x08,0x00, // )
0x00,0x04,0x15,0x0e,0x15,0x04,0x00,0x00, // *
0x00,0x04,0x04,0x1f,0x04,0x04,0x00,0x00, // +
0x00,0x00,0x00,0x00,0x08,0x08,0x10,0x00, // ,
0x00,0x00,0x00,0x1f,0x00,0x00,0x00,0x00, // -
0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00, // .
0x00,0x01,0x02,0x04,0x08,0x10,0x00,0x00, // /
0x0e,0x11,0x13,0x15,0x19,0x11,0x0e,0x00, // 0
0x04,0x0c,0x04,0x04,0x04,0x04,0x0e,0x00, // 1
0x0e,0x11,0x01,0x06,0x08,0x10,0x1f,0x00, // 2
0x1f,0x01,0x02,0x06,0x01,0x11,0x0e,0x00, // 3
0x02,0x06,0x0a,0x12,0x1f,0x02,0x02,0x00, // 4
0x1f,0x10,0x1e,0x01,0x01,0x11,0x0e,0x00, // 5
0x07,0x08,0x10,0x1e,0x11,0x11,0x0e,0x00, // 6
0x1f,0x01,0x02,0x04,0x08,0x08,0x08,0x00, // 7
0x0e,0x11,0x11,0x0e,0x11,0x11,0x0e,0x00, // 8
0x0e,0x11,0x11,0x0f,0x01,0x02,0x1c,0x00, // 9
0x00,0x00,0x00,0x00,0x08,0x00,0x08,0x00, // :
0x00,0x00,0x04,0x00,0x04,0x04,0x08,0x00, // ;
0x02,0x04,0x08,0x10,0x08,0x04,0x02,0x00, // <
0x00,0x00,0x1f,0x00,0x1f,0x00,0x00,0x00, // =
0x08,0x04,0x02,0x01,0x02,0x04,0x08,0x00, // >
0x0e,0x11,0x01,0x02,0x04,0x00,0x04,0x00 // ?
};
uint32_t mc8020_state::screen_update_mc8020(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
uint8_t y,ra,chr,gfx;
uint16_t sy=0,ma=0,x;
for(y = 0; y < 8; y++ )
{
for (ra = 0; ra < 16; ra++)
{
uint16_t *p = &bitmap.pix16(sy++);
for (x = ma; x < ma + 32; x++)
{
if (ra > 3 && ra < 12)
{
chr = m_p_videoram[x];
gfx = prom[(chr<<3) | (ra-4)];
}
else
gfx = 0;
/* Display a scanline of a character */
*p++ = BIT(gfx, 5);
*p++ = BIT(gfx, 4);
*p++ = BIT(gfx, 3);
*p++ = BIT(gfx, 2);
*p++ = BIT(gfx, 1);
*p++ = BIT(gfx, 0);
}
}
ma+=32;
}
return 0;
}
static MACHINE_CONFIG_START( mc8020 )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu",Z80, XTAL_2_4576MHz)
MCFG_CPU_PROGRAM_MAP(mc8020_mem)
MCFG_CPU_IO_MAP(mc8020_io)
MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(mc80_state,mc8020_irq_callback)
MCFG_MACHINE_RESET_OVERRIDE(mc80_state,mc8020)
MCFG_CPU_PROGRAM_MAP(mem_map)
MCFG_CPU_IO_MAP(io_map)
MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(mc8020_state, mc8020_irq_callback)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -178,78 +281,28 @@ static MACHINE_CONFIG_START( mc8020 )
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
MCFG_SCREEN_SIZE(32*6, 16*8)
MCFG_SCREEN_VISIBLE_AREA(0, 32*6-1, 0, 16*8-1)
MCFG_VIDEO_START_OVERRIDE(mc80_state,mc8020)
MCFG_SCREEN_UPDATE_DRIVER(mc80_state, screen_update_mc8020)
MCFG_SCREEN_UPDATE_DRIVER(mc8020_state, screen_update_mc8020)
MCFG_SCREEN_PALETTE("palette")
MCFG_PALETTE_ADD_MONOCHROME("palette")
/* devices */
MCFG_DEVICE_ADD("z80pio", Z80PIO, XTAL_2_4576MHz)
MCFG_Z80PIO_IN_PA_CB(READ8(mc80_state, mc80_port_a_r))
MCFG_Z80PIO_OUT_PA_CB(WRITE8(mc80_state, mc80_port_a_w))
MCFG_Z80PIO_IN_PB_CB(READ8(mc80_state, mc80_port_b_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(mc80_state, mc80_port_b_w))
MCFG_DEVICE_ADD("pio", Z80PIO, XTAL_2_4576MHz)
MCFG_Z80PIO_IN_PA_CB(READ8(mc8020_state, mc80_port_a_r))
//MCFG_Z80PIO_OUT_PA_CB(WRITE8(mc8020_state, mc80_port_a_w))
MCFG_Z80PIO_IN_PB_CB(READ8(mc8020_state, mc80_port_b_r))
//MCFG_Z80PIO_OUT_PB_CB(WRITE8(mc8020_state, mc80_port_b_w))
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_2_4576MHz / 100)
MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL_2_4576MHz / 100)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(mc80_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(mc80_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(mc80_state, ctc_z2_w))
//MCFG_Z80CTC_ZC0_CB(WRITELINE(mc8020_state, ctc_z0_w))
//MCFG_Z80CTC_ZC1_CB(WRITELINE(mc8020_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE("ctc", z80ctc_device, trg0))
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ctc", z80ctc_device, trg1))
MCFG_TIMER_DRIVER_ADD_PERIODIC("mc8020_kbd", mc80_state, mc8020_kbd, attotime::from_hz(50))
MCFG_TIMER_DRIVER_ADD_PERIODIC("mc8020_kbd", mc8020_state, mc8020_kbd, attotime::from_hz(50))
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( mc8030 )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu",Z80, XTAL_2_4576MHz)
MCFG_CPU_PROGRAM_MAP(mc8030_mem)
MCFG_CPU_IO_MAP(mc8030_io)
MCFG_Z80_DAISY_CHAIN(mc8030_daisy_chain)
MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(mc80_state,mc8030_irq_callback)
MCFG_MACHINE_RESET_OVERRIDE(mc80_state,mc8030)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(50)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
MCFG_SCREEN_SIZE(512, 256)
MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1)
MCFG_VIDEO_START_OVERRIDE(mc80_state,mc8030)
MCFG_SCREEN_UPDATE_DRIVER(mc80_state, screen_update_mc8030)
MCFG_SCREEN_PALETTE("palette")
MCFG_PALETTE_ADD_MONOCHROME("palette")
/* Devices */
MCFG_DEVICE_ADD("zve_pio", Z80PIO, XTAL_2_4576MHz)
MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80PIO_IN_PA_CB(READ8(mc80_state, zve_port_a_r))
MCFG_Z80PIO_OUT_PA_CB(WRITE8(mc80_state, zve_port_a_w))
MCFG_Z80PIO_IN_PB_CB(READ8(mc80_state, zve_port_b_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(mc80_state, zve_port_b_w))
MCFG_DEVICE_ADD("zve_ctc", Z80CTC, XTAL_2_4576MHz)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// ZC0, ZC1, ZC2 for user
MCFG_DEVICE_ADD("asp_pio", Z80PIO, XTAL_2_4576MHz)
MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80PIO_IN_PA_CB(READ8(mc80_state, asp_port_a_r))
MCFG_Z80PIO_OUT_PA_CB(WRITE8(mc80_state, asp_port_a_w))
MCFG_Z80PIO_IN_PB_CB(READ8(mc80_state, asp_port_b_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(mc80_state, asp_port_b_w))
MCFG_DEVICE_ADD("asp_ctc", Z80CTC, XTAL_2_4576MHz)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// ZC0: to SIO CLK CH A
// ZC1: to SIO CLK CH B
// ZC2: KMBG (??)
MCFG_DEVICE_ADD("asp_sio", Z80SIO0, 4800)
// SIO CH A in = keyboard; out = beeper; CH B = IFSS (??)
MACHINE_CONFIG_END
/* ROM definition */
ROM_START( mc8020 )
@ -289,54 +342,8 @@ ROM_START( mc8020 )
ROM_LOAD( "mo16.rom", 0x5c00, 0x0400, CRC(403be935) SHA1(4e74355a78ab090ce180437156fed8e4a1d1c787))
ROM_END
ROM_START( mc8030 )
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
ROM_LOAD( "zve_1.rom", 0x0000, 0x0800, CRC(31ec0159) SHA1(a97ea9eb733c462e77d625a7942134e45d911c0a))
ROM_LOAD( "zve_2.rom", 0x0800, 0x0800, CRC(5104983d) SHA1(7516274904042f4fc6813aa8b2a75c0a64f9b937))
ROM_LOAD( "zve_3.rom", 0x1000, 0x0800, CRC(4bcfd727) SHA1(d296e587098e70270ad60db8edaa685af368b849))
ROM_LOAD( "zve_4.rom", 0x1800, 0x0800, CRC(f949ae43) SHA1(68c324cf5578497db7ae65da5695fcb30493f612))
ROM_LOAD( "spe_1.rom", 0x2000, 0x0400, CRC(826f609c) SHA1(e77ff6c180f5a6d7756d076173ae264a0e26f066))
ROM_LOAD( "spe_2.rom", 0x2400, 0x0400, CRC(98320040) SHA1(6baf87e196f1ccdf44912deafa6042becbfb0679))
ROM_REGION( 0x4000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x4000, "user1", 0 )
// marked as "80.3x"
ROM_LOAD( "mc80.3-x-2c00-c63c.bin", 0x2c00, 0x0400, CRC(469be754) SHA1(a7fea257a1c0970349f75504c0870a2649b50303) )
ROM_LOAD( "mc80.3-ccd-3000-f10a.bin", 0x3000, 0x0400, CRC(7d220128) SHA1(bb6070c9d460ec7ea1a1b46b19ca9520d55e127c) ) // 80.3x ccd test system
ROM_LOAD( "mc80.3-x-3800-7280.bin", 0x3800, 0x0400, CRC(09976efb) SHA1(1a708adbf1cd68d450a9bfccafe1f82e755e5885) )
// marked as "80.3x rk"
ROM_LOAD( "mc80.3-rk-3000-5642.bin", 0x3000, 0x0400, CRC(280b2211) SHA1(d2c05ff7f7ea534776bf7e92263f1c10192e5385) )
ROM_LOAD( "mc80.3-rk-3400-c6a7.bin", 0x3400, 0x0400, CRC(fc5656f3) SHA1(0ad5abb6536665719693063bf8da2993238c84dd) )
ROM_LOAD( "mc80.3-rk-3800-1678.bin", 0x3800, 0x0400, CRC(34d7e1cf) SHA1(14d3e49f34e0c2a95967613538b33a671998e7a8) )
// marked as "80.30e v1"
ROM_LOAD( "mc80.30e-0000.bin", 0x0000, 0x0800, CRC(ebdf766f) SHA1(d06f1e4467104f59554168d17cd15b98d107375e) )
// marked as "80.30e v2"
ROM_LOAD( "mc80.30e-0000v2.bin", 0x0000, 0x0800, CRC(259b55e9) SHA1(6e8fd84f1b225f33bc0fd30ecc6e30b8063eaeed) )
ROM_LOAD( "mc80.30e-0800v2.bin", 0x0800, 0x0800, CRC(fe7a01a7) SHA1(6531cde5b9dea2a15a813598937aa3d9540a8066) )
// marked as "80.31e"
ROM_LOAD( "mc80.31e-2400-d0d7.bin", 0x2400, 0x0400, CRC(43c22046) SHA1(a179fe83b5cbbbc5f92a4b2ef1012099ccb333d9) )
ROM_LOAD( "mc80.31e-3000-0d15.bin", 0x3000, 0x0400, CRC(cf6f090b) SHA1(0bc352ca42f41cfe7e28052c099dcd020b776dd5) )
ROM_LOAD( "mc80.31e-3400-9993.bin", 0x3400, 0x0400, CRC(918d2b55) SHA1(b6dec17e996c464cf189a699d24d270494540b49) )
ROM_LOAD( "mc80.31e-3800-7a4c.bin", 0x3800, 0x0400, CRC(62d9f989) SHA1(a20b731daed51270d86f486751302055eb93dd1c) )
// marked as "80.31e?"
ROM_LOAD( "mc80.3s-2000.bin", 0x2000, 0x0400, CRC(28f1df56) SHA1(9752c9eab3d9f72c23b5f5618a5db1a038953e29) )
ROM_LOAD( "mc80.3s-2400.bin", 0x2400, 0x0400, CRC(43c22046) SHA1(a179fe83b5cbbbc5f92a4b2ef1012099ccb333d9) )
ROM_LOAD( "mc80.3s-2800.bin", 0x2800, 0x0400, CRC(4b52deb1) SHA1(f8a9ddb4363f8389990fd263985e882a73265c5d) )
ROM_LOAD( "mc80.3s-2c00.bin", 0x2c00, 0x0400, CRC(a13d8302) SHA1(1fcdcd6b7af8ef4b18a0658a1a50d0db26b7f214) )
ROM_LOAD( "mc80.3s-3000.bin", 0x3000, 0x0400, CRC(cf6f090b) SHA1(0bc352ca42f41cfe7e28052c099dcd020b776dd5) )
ROM_LOAD( "mc80.3s-3400.bin", 0x3400, 0x0400, CRC(918d2b55) SHA1(b6dec17e996c464cf189a699d24d270494540b49) )
ROM_LOAD( "mc80.3s-3800.bin", 0x3800, 0x0400, CRC(6104646b) SHA1(630f7c57e928db0eb4070139a66f2d313a6314b4) )
ROM_LOAD( "mc80.3s-3c00.bin", 0x3c00, 0x0400, CRC(2f82d032) SHA1(fe8f642b94a0ba8852ec56d8cbb7a52bb7e5d55a) )
// marked as "80.33 original"
ROM_LOAD( "mc80.33-1000.bin", 0x1000, 0x0800, CRC(c7e062b1) SHA1(81b999655b32d9b39287a08896a274278a2f739c) )
// random set, zve_1 - 4 same as main set
ROM_LOAD( "spe_1a.rom", 0x2000, 0x000800, CRC(37c71c68) SHA1(951650698b00f65facf5ccfbd8dd13628a93425d) )
ROM_LOAD( "spe_2a.rom", 0x2800, 0x000400, CRC(9ec8f287) SHA1(cdf5a9583d898814ba480ffbc8d906a642c6dc81) )
ROM_END
/* Driver */
// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS
COMP( 198?, mc8020, 0, 0, mc8020, mc8020, mc80_state, 0, "VEB Elektronik Gera", "MC-80.21/22", MACHINE_NO_SOUND )
COMP( 198?, mc8030, mc8020, 0, mc8030, mc8030, mc80_state, 0, "VEB Elektronik Gera", "MC-80.30/31", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | ORIENTATION_FLIP_X )
// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS
COMP( 198?, mc8020, 0, 0, mc8020, mc8020, mc8020_state, 0, "VEB Elektronik Gera", "MC-80.21/22", MACHINE_NO_SOUND )

294
src/mame/drivers/mc8030.cpp Normal file
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// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/***************************************************************************
MC-80.3x driver by Miodrag Milanovic
2009-05-12 Skeleton driver.
2009-05-15 Initial implementation
2011-09-01 Modernised
mc80.3x: http://www.ycdt.net/mc80.3x/
mc8030: very little info available. The area from FFD8-FFFF is meant for
interrupt vectors and so on, but most of it is zeroes. Appears the keyboard
is an ascii keyboard with built-in beeper. It communicates via the SIO.
The asp ctc needs at least 2 triggers. The purpose of the zve pio is unknown.
The system uses interrupts for various things, but none of that is working.
Looks like maybe a sio bug is preventing the keyboard from working.
****************************************************************************/
#include "emu.h"
#include "cpu/z80/z80.h"
#include "screen.h"
#include "machine/clock.h"
#include "bus/rs232/rs232.h"
#include "machine/z80ctc.h"
#include "machine/z80pio.h"
#include "machine/z80sio.h"
class mc8030_state : public driver_device
{
public:
mc8030_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_p_videoram(*this, "vram")
, m_maincpu(*this, "maincpu")
{ }
DECLARE_WRITE8_MEMBER(zve_write_protect_w);
DECLARE_WRITE8_MEMBER(vis_w);
DECLARE_WRITE8_MEMBER(eprom_prog_w);
DECLARE_READ8_MEMBER(zve_port_a_r);
DECLARE_READ8_MEMBER(zve_port_b_r);
DECLARE_WRITE8_MEMBER(zve_port_a_w);
DECLARE_WRITE8_MEMBER(zve_port_b_w);
DECLARE_READ8_MEMBER(asp_port_a_r);
DECLARE_READ8_MEMBER(asp_port_b_r);
DECLARE_WRITE8_MEMBER(asp_port_a_w);
DECLARE_WRITE8_MEMBER(asp_port_b_w);
uint32_t screen_update_mc8030(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
IRQ_CALLBACK_MEMBER(irq_callback);
private:
required_region_ptr<u8> m_p_videoram;
required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, mc8030_state )
ADDRESS_MAP_UNMAP_HIGH
// ZRE 4 * 2KB
AM_RANGE(0x0000, 0x1fff) AM_ROM // ZRE ROM's 4 * 2716
AM_RANGE(0x2000, 0x27ff) AM_ROM // SPE ROM's 2 * 2708
AM_RANGE(0x2800, 0x3fff) AM_ROM // For extension
AM_RANGE(0x4000, 0xbfff) AM_RAM // SPE RAM
AM_RANGE(0xc000, 0xffff) AM_RAM // ZRE RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( io_map, AS_IO, 8, mc8030_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x30, 0x3f) AM_MIRROR(0xff00) AM_NOP //"mass storage"
AM_RANGE(0x80, 0x83) AM_MIRROR(0xff00) AM_DEVREADWRITE("zve_ctc", z80ctc_device, read, write) // user CTC
AM_RANGE(0x84, 0x87) AM_MIRROR(0xff00) AM_DEVREADWRITE("zve_pio", z80pio_device, read, write) // PIO unknown usage
AM_RANGE(0x88, 0x8f) AM_MIRROR(0xff00) AM_WRITE(zve_write_protect_w)
AM_RANGE(0xc0, 0xcf) AM_SELECT(0xff00) AM_WRITE(vis_w)
AM_RANGE(0xd0, 0xd3) AM_MIRROR(0xff00) AM_DEVREADWRITE("asp_sio", z80sio_device, cd_ba_r, cd_ba_w) // keyboard & IFSS?
AM_RANGE(0xd4, 0xd7) AM_MIRROR(0xff00) AM_DEVREADWRITE("asp_ctc", z80ctc_device, read, write) // sio bauds, KMBG? and kbd
AM_RANGE(0xd8, 0xdb) AM_MIRROR(0xff00) AM_DEVREADWRITE("asp_pio", z80pio_device, read, write) // external bus
AM_RANGE(0xe0, 0xef) AM_MIRROR(0xff00) AM_WRITE(eprom_prog_w)
ADDRESS_MAP_END
/* Input ports */
static INPUT_PORTS_START( mc8030 )
INPUT_PORTS_END
WRITE8_MEMBER( mc8030_state::zve_write_protect_w )
{
}
WRITE8_MEMBER( mc8030_state::vis_w )
{
// reg C
// 7 6 5 4 -- module
// 3 - 0 left half, 1 right half
// 2 1 0
// =====
// 0 0 0 - dark
// 0 0 1 - light
// 0 1 0 - in reg pixel
// 0 1 1 - negate in reg pixel
// 1 0 x - operation code in B reg
// reg B
//
uint16_t addr = ((offset & 0xff00) >> 2) | ((offset & 0x08) << 2) | (data >> 3);
static const uint8_t val[] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
int c = offset & 1;
m_p_videoram[addr] = m_p_videoram[addr] | (val[data & 7]*c);
}
WRITE8_MEMBER( mc8030_state::eprom_prog_w )
{
}
IRQ_CALLBACK_MEMBER(mc8030_state::irq_callback )
{
return 0x20;
}
READ8_MEMBER( mc8030_state::zve_port_a_r )
{
return 0xff;
}
READ8_MEMBER( mc8030_state::zve_port_b_r )
{
return 0xff;
}
READ8_MEMBER( mc8030_state::asp_port_a_r )
{
return 0xff;
}
READ8_MEMBER( mc8030_state::asp_port_b_r )
{
return 0xff;
}
uint32_t mc8030_state::screen_update_mc8030(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
uint8_t gfx;
uint16_t y=0,ma=0,x;
for(y = 0; y < 256; y++ )
{
uint16_t *p = &bitmap.pix16(y);
{
for (x = ma; x < ma + 64; x++)
{
gfx = m_p_videoram[x^0x3fff];
/* Display a scanline of a character */
*p++ = BIT(gfx, 7);
*p++ = BIT(gfx, 6);
*p++ = BIT(gfx, 5);
*p++ = BIT(gfx, 4);
*p++ = BIT(gfx, 3);
*p++ = BIT(gfx, 2);
*p++ = BIT(gfx, 1);
*p++ = BIT(gfx, 0);
}
}
ma+=64;
}
return 0;
}
// this is a guess there is no information available
static const z80_daisy_config daisy_chain[] =
{
{ "asp_ctc" }, /* System ctc */
{ "asp_pio" }, /* System pio */
{ "asp_sio" }, /* sio */
{ "zve_pio" }, /* User pio */
{ "zve_ctc" }, /* User ctc */
{ nullptr }
};
static MACHINE_CONFIG_START( mc8030 )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu",Z80, XTAL_2_4576MHz)
MCFG_CPU_PROGRAM_MAP(mem_map)
MCFG_CPU_IO_MAP(io_map)
MCFG_Z80_DAISY_CHAIN(daisy_chain)
MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(mc8030_state, irq_callback)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(50)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
MCFG_SCREEN_SIZE(512, 256)
MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1)
MCFG_SCREEN_UPDATE_DRIVER(mc8030_state, screen_update_mc8030)
MCFG_SCREEN_PALETTE("palette")
MCFG_PALETTE_ADD_MONOCHROME("palette")
/* Devices */
MCFG_DEVICE_ADD("zve_pio", Z80PIO, XTAL_2_4576MHz)
MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80PIO_IN_PA_CB(READ8(mc8030_state, zve_port_a_r))
//MCFG_Z80PIO_OUT_PA_CB(WRITE8(mc8030_state, zve_port_a_w))
MCFG_Z80PIO_IN_PB_CB(READ8(mc8030_state, zve_port_b_r))
//MCFG_Z80PIO_OUT_PB_CB(WRITE8(mc8030_state, zve_port_b_w))
MCFG_DEVICE_ADD("zve_ctc", Z80CTC, XTAL_2_4576MHz)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// ZC0, ZC1, ZC2 for user
MCFG_DEVICE_ADD("asp_pio", Z80PIO, XTAL_2_4576MHz)
MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80PIO_IN_PA_CB(READ8(mc8030_state, asp_port_a_r))
//MCFG_Z80PIO_OUT_PA_CB(WRITE8(mc8030_state, asp_port_a_w))
MCFG_Z80PIO_IN_PB_CB(READ8(mc8030_state, asp_port_b_r))
//MCFG_Z80PIO_OUT_PB_CB(WRITE8(mc8030_state, asp_port_b_w))
MCFG_DEVICE_ADD("asp_ctc", Z80CTC, XTAL_2_4576MHz)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// ZC0: to SIO CLK CH A
// ZC1: to SIO CLK CH B
// ZC2: KMBG (??)
MCFG_DEVICE_ADD("uart_clock", CLOCK, 153600)
MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("asp_sio", z80sio_device, txca_w))
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("asp_sio", z80sio_device, rxca_w))
MCFG_DEVICE_ADD("asp_sio", Z80SIO, 4800)
// SIO CH A in = keyboard; out = beeper; CH B = IFSS (??)
MCFG_Z80SIO_OUT_TXDA_CB(DEVWRITELINE("rs232", rs232_port_device, write_txd))
MCFG_Z80SIO_OUT_DTRA_CB(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
MCFG_Z80SIO_OUT_RTSA_CB(DEVWRITELINE("rs232", rs232_port_device, write_rts))
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "keyboard")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("asp_sio", z80sio_device, rxa_w))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("asp_sio", z80sio_device, ctsa_w))
MACHINE_CONFIG_END
/* ROM definition */
ROM_START( mc8030 )
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
ROM_LOAD( "zve_1.rom", 0x0000, 0x0800, CRC(31ec0159) SHA1(a97ea9eb733c462e77d625a7942134e45d911c0a))
ROM_LOAD( "zve_2.rom", 0x0800, 0x0800, CRC(5104983d) SHA1(7516274904042f4fc6813aa8b2a75c0a64f9b937))
ROM_LOAD( "zve_3.rom", 0x1000, 0x0800, CRC(4bcfd727) SHA1(d296e587098e70270ad60db8edaa685af368b849))
ROM_LOAD( "zve_4.rom", 0x1800, 0x0800, CRC(f949ae43) SHA1(68c324cf5578497db7ae65da5695fcb30493f612))
ROM_LOAD( "spe_1.rom", 0x2000, 0x0400, CRC(826f609c) SHA1(e77ff6c180f5a6d7756d076173ae264a0e26f066))
ROM_LOAD( "spe_2.rom", 0x2400, 0x0400, CRC(98320040) SHA1(6baf87e196f1ccdf44912deafa6042becbfb0679))
ROM_REGION( 0x4000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x4000, "user1", 0 )
// marked as "80.3x"
ROM_LOAD( "mc80.3-x-2c00-c63c.bin", 0x2c00, 0x0400, CRC(469be754) SHA1(a7fea257a1c0970349f75504c0870a2649b50303) )
ROM_LOAD( "mc80.3-ccd-3000-f10a.bin", 0x3000, 0x0400, CRC(7d220128) SHA1(bb6070c9d460ec7ea1a1b46b19ca9520d55e127c) ) // 80.3x ccd test system
ROM_LOAD( "mc80.3-x-3800-7280.bin", 0x3800, 0x0400, CRC(09976efb) SHA1(1a708adbf1cd68d450a9bfccafe1f82e755e5885) )
// marked as "80.3x rk"
ROM_LOAD( "mc80.3-rk-3000-5642.bin", 0x3000, 0x0400, CRC(280b2211) SHA1(d2c05ff7f7ea534776bf7e92263f1c10192e5385) )
ROM_LOAD( "mc80.3-rk-3400-c6a7.bin", 0x3400, 0x0400, CRC(fc5656f3) SHA1(0ad5abb6536665719693063bf8da2993238c84dd) )
ROM_LOAD( "mc80.3-rk-3800-1678.bin", 0x3800, 0x0400, CRC(34d7e1cf) SHA1(14d3e49f34e0c2a95967613538b33a671998e7a8) )
// marked as "80.30e v1"
ROM_LOAD( "mc80.30e-0000.bin", 0x0000, 0x0800, CRC(ebdf766f) SHA1(d06f1e4467104f59554168d17cd15b98d107375e) )
// marked as "80.30e v2"
ROM_LOAD( "mc80.30e-0000v2.bin", 0x0000, 0x0800, CRC(259b55e9) SHA1(6e8fd84f1b225f33bc0fd30ecc6e30b8063eaeed) )
ROM_LOAD( "mc80.30e-0800v2.bin", 0x0800, 0x0800, CRC(fe7a01a7) SHA1(6531cde5b9dea2a15a813598937aa3d9540a8066) )
// marked as "80.31e"
ROM_LOAD( "mc80.31e-2400-d0d7.bin", 0x2400, 0x0400, CRC(43c22046) SHA1(a179fe83b5cbbbc5f92a4b2ef1012099ccb333d9) )
ROM_LOAD( "mc80.31e-3000-0d15.bin", 0x3000, 0x0400, CRC(cf6f090b) SHA1(0bc352ca42f41cfe7e28052c099dcd020b776dd5) )
ROM_LOAD( "mc80.31e-3400-9993.bin", 0x3400, 0x0400, CRC(918d2b55) SHA1(b6dec17e996c464cf189a699d24d270494540b49) )
ROM_LOAD( "mc80.31e-3800-7a4c.bin", 0x3800, 0x0400, CRC(62d9f989) SHA1(a20b731daed51270d86f486751302055eb93dd1c) )
// marked as "80.31e?"
ROM_LOAD( "mc80.3s-2000.bin", 0x2000, 0x0400, CRC(28f1df56) SHA1(9752c9eab3d9f72c23b5f5618a5db1a038953e29) )
ROM_LOAD( "mc80.3s-2400.bin", 0x2400, 0x0400, CRC(43c22046) SHA1(a179fe83b5cbbbc5f92a4b2ef1012099ccb333d9) )
ROM_LOAD( "mc80.3s-2800.bin", 0x2800, 0x0400, CRC(4b52deb1) SHA1(f8a9ddb4363f8389990fd263985e882a73265c5d) )
ROM_LOAD( "mc80.3s-2c00.bin", 0x2c00, 0x0400, CRC(a13d8302) SHA1(1fcdcd6b7af8ef4b18a0658a1a50d0db26b7f214) )
ROM_LOAD( "mc80.3s-3000.bin", 0x3000, 0x0400, CRC(cf6f090b) SHA1(0bc352ca42f41cfe7e28052c099dcd020b776dd5) )
ROM_LOAD( "mc80.3s-3400.bin", 0x3400, 0x0400, CRC(918d2b55) SHA1(b6dec17e996c464cf189a699d24d270494540b49) )
ROM_LOAD( "mc80.3s-3800.bin", 0x3800, 0x0400, CRC(6104646b) SHA1(630f7c57e928db0eb4070139a66f2d313a6314b4) )
ROM_LOAD( "mc80.3s-3c00.bin", 0x3c00, 0x0400, CRC(2f82d032) SHA1(fe8f642b94a0ba8852ec56d8cbb7a52bb7e5d55a) )
// marked as "80.33 original"
ROM_LOAD( "mc80.33-1000.bin", 0x1000, 0x0800, CRC(c7e062b1) SHA1(81b999655b32d9b39287a08896a274278a2f739c) )
// random set, zve_1 - 4 same as main set
ROM_LOAD( "spe_1a.rom", 0x2000, 0x000800, CRC(37c71c68) SHA1(951650698b00f65facf5ccfbd8dd13628a93425d) )
ROM_LOAD( "spe_2a.rom", 0x2800, 0x000400, CRC(9ec8f287) SHA1(cdf5a9583d898814ba480ffbc8d906a642c6dc81) )
ROM_END
/* Driver */
// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS
COMP( 198?, mc8030, 0, 0, mc8030, mc8030, mc8030_state, 0, "VEB Elektronik Gera", "MC-80.30/31", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | ORIENTATION_FLIP_X )

57
src/mame/includes/mc80.h
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@ -1,57 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/*****************************************************************************
*
* includes/mc80.h
*
****************************************************************************/
#ifndef MC80_H_
#define MC80_H_
#include "cpu/z80/z80.h"
#include "machine/timer.h"
#include "machine/z80ctc.h"
#include "machine/z80pio.h"
#include "machine/z80dart.h"
class mc80_state : public driver_device
{
public:
mc80_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_p_videoram(*this, "videoram"),
m_maincpu(*this, "maincpu") { }
DECLARE_WRITE8_MEMBER(mc8030_zve_write_protect_w);
DECLARE_WRITE8_MEMBER(mc8030_vis_w);
DECLARE_WRITE8_MEMBER(mc8030_eprom_prog_w);
DECLARE_WRITE_LINE_MEMBER(ctc_z0_w);
DECLARE_WRITE_LINE_MEMBER(ctc_z1_w);
DECLARE_READ8_MEMBER(mc80_port_b_r);
DECLARE_READ8_MEMBER(mc80_port_a_r);
DECLARE_WRITE8_MEMBER(mc80_port_a_w);
DECLARE_WRITE8_MEMBER(mc80_port_b_w);
DECLARE_READ8_MEMBER(zve_port_a_r);
DECLARE_READ8_MEMBER(zve_port_b_r);
DECLARE_WRITE8_MEMBER(zve_port_a_w);
DECLARE_WRITE8_MEMBER(zve_port_b_w);
DECLARE_READ8_MEMBER(asp_port_a_r);
DECLARE_READ8_MEMBER(asp_port_b_r);
DECLARE_WRITE8_MEMBER(asp_port_a_w);
DECLARE_WRITE8_MEMBER(asp_port_b_w);
optional_shared_ptr<uint8_t> m_p_videoram;
DECLARE_MACHINE_RESET(mc8020);
DECLARE_VIDEO_START(mc8020);
DECLARE_MACHINE_RESET(mc8030);
DECLARE_VIDEO_START(mc8030);
uint32_t screen_update_mc8020(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
uint32_t screen_update_mc8030(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
TIMER_DEVICE_CALLBACK_MEMBER(mc8020_kbd);
DECLARE_WRITE_LINE_MEMBER(ctc_z2_w);
IRQ_CALLBACK_MEMBER(mc8020_irq_callback);
IRQ_CALLBACK_MEMBER(mc8030_irq_callback);
required_device<cpu_device> m_maincpu;
};
#endif

135
src/mame/machine/mc80.cpp
View File

@ -1,135 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/***************************************************************************
MC-80.xx by Miodrag Milanovic
15/05/2009 Initial implementation
12/05/2009 Skeleton driver.
****************************************************************************/
#include "emu.h"
#include "includes/mc80.h"
/*****************************************************************************/
/* Implementation for MC80.2x */
/*****************************************************************************/
IRQ_CALLBACK_MEMBER(mc80_state::mc8020_irq_callback)
{
return 0x00;
}
MACHINE_RESET_MEMBER(mc80_state,mc8020)
{
}
WRITE_LINE_MEMBER( mc80_state::ctc_z0_w )
{
}
WRITE_LINE_MEMBER( mc80_state::ctc_z1_w )
{
}
WRITE_LINE_MEMBER(mc80_state::ctc_z2_w)
{
downcast<z80ctc_device *>(machine().device("z80ctc"))->trg0(state);
downcast<z80ctc_device *>(machine().device("z80ctc"))->trg1(state);
}
READ8_MEMBER( mc80_state::mc80_port_b_r )
{
return 0;
}
READ8_MEMBER( mc80_state::mc80_port_a_r )
{
return 0;
}
WRITE8_MEMBER( mc80_state::mc80_port_a_w )
{
}
WRITE8_MEMBER( mc80_state::mc80_port_b_w )
{
}
/*****************************************************************************/
/* Implementation for MC80.3x */
/*****************************************************************************/
WRITE8_MEMBER( mc80_state::mc8030_zve_write_protect_w )
{
}
WRITE8_MEMBER( mc80_state::mc8030_vis_w )
{
// reg C
// 7 6 5 4 -- module
// 3 - 0 left half, 1 right half
// 2 1 0
// =====
// 0 0 0 - dark
// 0 0 1 - light
// 0 1 0 - in reg pixel
// 0 1 1 - negate in reg pixel
// 1 0 x - operation code in B reg
// reg B
//
uint16_t addr = ((offset & 0xff00) >> 2) | ((offset & 0x08) << 2) | (data >> 3);
static const uint8_t val[] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
int c = offset & 1;
m_p_videoram[addr] = m_p_videoram[addr] | (val[data & 7]*c);
}
WRITE8_MEMBER( mc80_state::mc8030_eprom_prog_w )
{
}
IRQ_CALLBACK_MEMBER(mc80_state::mc8030_irq_callback )
{
return 0x20;
}
MACHINE_RESET_MEMBER(mc80_state,mc8030)
{
}
READ8_MEMBER( mc80_state::zve_port_a_r )
{
return 0xff;
}
READ8_MEMBER( mc80_state::zve_port_b_r )
{
return 0xff;
}
WRITE8_MEMBER( mc80_state::zve_port_a_w )
{
}
WRITE8_MEMBER( mc80_state::zve_port_b_w )
{
}
READ8_MEMBER( mc80_state::asp_port_a_r )
{
return 0xff;
}
READ8_MEMBER( mc80_state::asp_port_b_r )
{
return 0xff;
}
WRITE8_MEMBER( mc80_state::asp_port_a_w )
{
}
WRITE8_MEMBER( mc80_state::asp_port_b_w )
{
}

4
src/mame/mame.lst
View File

@ -20254,8 +20254,10 @@ mc1000 //
mc1502 //
pk88 //
@source:mc80.cpp
@source:mc8020.cpp
mc8020 // MC 80.2x
@source:mc8030.cpp
mc8030 // MC 80.3x
@source:mcatadv.cpp

174
src/mame/video/mc80.cpp
View File

@ -1,174 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
/***************************************************************************
MC-80.xx video by Miodrag Milanovic
15/05/2009 Initial implementation
12/05/2009 Skeleton driver.
****************************************************************************/
#include "emu.h"
#include "includes/mc80.h"
// This is not a content of U402 510
// but order is fine
static const uint8_t prom[] = {
0x0c,0x11,0x13,0x15,0x17,0x10,0x0e,0x00, // @
0x04,0x0a,0x11,0x11,0x1f,0x11,0x11,0x00, // A
0x1e,0x11,0x11,0x1e,0x11,0x11,0x1e,0x00, // B
0x0e,0x11,0x10,0x10,0x10,0x11,0x0e,0x00, // C
0x1e,0x09,0x09,0x09,0x09,0x09,0x1e,0x00, // D
0x1f,0x10,0x10,0x1e,0x10,0x10,0x1f,0x00, // E
0x1f,0x10,0x10,0x1e,0x10,0x10,0x10,0x00, // F
0x0e,0x11,0x10,0x10,0x13,0x11,0x0f,0x00, // G
0x11,0x11,0x11,0x1f,0x11,0x11,0x11,0x00, // H
0x0e,0x04,0x04,0x04,0x04,0x04,0x0e,0x00, // I
0x01,0x01,0x01,0x01,0x11,0x11,0x0e,0x00, // J
0x11,0x12,0x14,0x18,0x14,0x12,0x11,0x00, // K
0x10,0x10,0x10,0x10,0x10,0x10,0x1f,0x00, // L
0x11,0x1b,0x15,0x15,0x11,0x11,0x11,0x00, // M
0x11,0x11,0x19,0x15,0x13,0x11,0x11,0x00, // N
0x0e,0x11,0x11,0x11,0x11,0x11,0x0e,0x00, // O
0x1e,0x11,0x11,0x1e,0x10,0x10,0x10,0x00, // P
0x0e,0x11,0x11,0x11,0x15,0x12,0x0d,0x00, // Q
0x1e,0x11,0x11,0x1e,0x14,0x12,0x11,0x00, // R
0x0e,0x11,0x10,0x0e,0x01,0x11,0x0e,0x00, // S
0x1f,0x04,0x04,0x04,0x04,0x04,0x04,0x00, // T
0x11,0x11,0x11,0x11,0x11,0x11,0x0e,0x00, // U
0x11,0x11,0x11,0x0a,0x0a,0x04,0x04,0x00, // V
0x11,0x11,0x11,0x15,0x15,0x15,0x0a,0x00, // W
0x11,0x11,0x0a,0x04,0x0a,0x11,0x11,0x00, // X
0x11,0x11,0x0a,0x04,0x04,0x04,0x04,0x00, // Y
0x1f,0x01,0x02,0x04,0x08,0x10,0x1f,0x00, // Z
0x1c,0x10,0x10,0x10,0x10,0x10,0x1c,0x00, // [
0x00,0x10,0x08,0x04,0x02,0x01,0x00,0x00, // backslash
0x07,0x01,0x01,0x01,0x01,0x01,0x07,0x00, // ]
0x0e,0x11,0x00,0x00,0x00,0x00,0x00,0x00, // ^
0x00,0x00,0x00,0x00,0x00,0x00,0x1f,0x00, // _
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //
0x04,0x04,0x04,0x04,0x04,0x00,0x04,0x00, // !
0x0a,0x0a,0x0a,0x00,0x00,0x00,0x00,0x00, // "
0x0a,0x0a,0x1f,0x0a,0x1f,0x0a,0x0a,0x00, // #
0x00,0x11,0x0e,0x0a,0x0e,0x11,0x00,0x00, // []
0x18,0x19,0x02,0x04,0x08,0x13,0x03,0x00, // %
0x04,0x0a,0x0a,0x0c,0x15,0x12,0x0d,0x00, // &
0x04,0x04,0x08,0x00,0x00,0x00,0x00,0x00, // '
0x02,0x04,0x08,0x08,0x08,0x04,0x02,0x00, // (
0x08,0x04,0x02,0x02,0x02,0x04,0x08,0x00, // )
0x00,0x04,0x15,0x0e,0x15,0x04,0x00,0x00, // *
0x00,0x04,0x04,0x1f,0x04,0x04,0x00,0x00, // +
0x00,0x00,0x00,0x00,0x08,0x08,0x10,0x00, // ,
0x00,0x00,0x00,0x1f,0x00,0x00,0x00,0x00, // -
0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00, // .
0x00,0x01,0x02,0x04,0x08,0x10,0x00,0x00, // /
0x0e,0x11,0x13,0x15,0x19,0x11,0x0e,0x00, // 0
0x04,0x0c,0x04,0x04,0x04,0x04,0x0e,0x00, // 1
0x0e,0x11,0x01,0x06,0x08,0x10,0x1f,0x00, // 2
0x1f,0x01,0x02,0x06,0x01,0x11,0x0e,0x00, // 3
0x02,0x06,0x0a,0x12,0x1f,0x02,0x02,0x00, // 4
0x1f,0x10,0x1e,0x01,0x01,0x11,0x0e,0x00, // 5
0x07,0x08,0x10,0x1e,0x11,0x11,0x0e,0x00, // 6
0x1f,0x01,0x02,0x04,0x08,0x08,0x08,0x00, // 7
0x0e,0x11,0x11,0x0e,0x11,0x11,0x0e,0x00, // 8
0x0e,0x11,0x11,0x0f,0x01,0x02,0x1c,0x00, // 9
0x00,0x00,0x00,0x00,0x08,0x00,0x08,0x00, // :
0x00,0x00,0x04,0x00,0x04,0x04,0x08,0x00, // ;
0x02,0x04,0x08,0x10,0x08,0x04,0x02,0x00, // <
0x00,0x00,0x1f,0x00,0x1f,0x00,0x00,0x00, // =
0x08,0x04,0x02,0x01,0x02,0x04,0x08,0x00, // >
0x0e,0x11,0x01,0x02,0x04,0x00,0x04,0x00 // ?
};
/*****************************************************************************/
/* Implementation for MC80.2x */
/*****************************************************************************/
VIDEO_START_MEMBER(mc80_state,mc8020)
{
}
uint32_t mc80_state::screen_update_mc8020(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
uint8_t y,ra,chr,gfx;
uint16_t sy=0,ma=0,x;
for(y = 0; y < 8; y++ )
{
for (ra = 0; ra < 16; ra++)
{
uint16_t *p = &bitmap.pix16(sy++);
for (x = ma; x < ma + 32; x++)
{
if (ra > 3 && ra < 12)
{
chr = m_p_videoram[x];
gfx = prom[(chr<<3) | (ra-4)];
}
else
gfx = 0;
/* Display a scanline of a character */
*p++ = BIT(gfx, 5);
*p++ = BIT(gfx, 4);
*p++ = BIT(gfx, 3);
*p++ = BIT(gfx, 2);
*p++ = BIT(gfx, 1);
*p++ = BIT(gfx, 0);
}
}
ma+=32;
}
return 0;
}
/*****************************************************************************/
/* Implementation for MC80.3x */
/*****************************************************************************/
VIDEO_START_MEMBER(mc80_state,mc8030)
{
m_p_videoram.set_target(memregion("vram")->base(),m_p_videoram.bytes());
}
uint32_t mc80_state::screen_update_mc8030(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
uint8_t gfx;
uint16_t y=0,ma=0,x;
for(y = 0; y < 256; y++ )
{
uint16_t *p = &bitmap.pix16(y);
{
for (x = ma; x < ma + 64; x++)
{
gfx = m_p_videoram[x^0x3fff];
/* Display a scanline of a character */
*p++ = BIT(gfx, 7);
*p++ = BIT(gfx, 6);
*p++ = BIT(gfx, 5);
*p++ = BIT(gfx, 4);
*p++ = BIT(gfx, 3);
*p++ = BIT(gfx, 2);
*p++ = BIT(gfx, 1);
*p++ = BIT(gfx, 0);
}
}
ma+=64;
}
return 0;
}