From 958731ef5aef0e2357bd03f597e0ec06f893d309 Mon Sep 17 00:00:00 2001 From: Ville Linde Date: Sat, 28 May 2016 17:46:58 +0300 Subject: [PATCH 01/14] Added highly experimental SHARC recompiler (disabled by default) [Ville Linde] --- scripts/src/cpu.lua | 3 + src/devices/cpu/drcfe.cpp | 1 + src/devices/cpu/drcfe.h | 1 + src/devices/cpu/sharc/compute.hxx | 410 +-- src/devices/cpu/sharc/sharc.cpp | 839 +++-- src/devices/cpu/sharc/sharc.h | 454 ++- src/devices/cpu/sharc/sharcdma.hxx | 152 +- src/devices/cpu/sharc/sharcdrc.cpp | 4909 ++++++++++++++++++++++++++++ src/devices/cpu/sharc/sharcdsm.cpp | 4 +- src/devices/cpu/sharc/sharcfe.cpp | 1830 +++++++++++ src/devices/cpu/sharc/sharcfe.h | 81 + src/devices/cpu/sharc/sharcmem.hxx | 15 +- src/devices/cpu/sharc/sharcops.hxx | 1132 ++++--- 13 files changed, 8520 insertions(+), 1311 deletions(-) create mode 100644 src/devices/cpu/sharc/sharcdrc.cpp create mode 100644 src/devices/cpu/sharc/sharcfe.cpp create mode 100644 src/devices/cpu/sharc/sharcfe.h diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 1b746fb59bc..054a2bbabee 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -221,6 +221,9 @@ if (CPUS["ADSP21062"]~=null) then MAME_DIR .. "src/devices/cpu/sharc/sharcmem.hxx", MAME_DIR .. "src/devices/cpu/sharc/sharcops.h", MAME_DIR .. "src/devices/cpu/sharc/sharcops.hxx", + MAME_DIR .. "src/devices/cpu/sharc/sharcdrc.cpp", + MAME_DIR .. "src/devices/cpu/sharc/sharcfe.cpp", + MAME_DIR .. "src/devices/cpu/sharc/sharcfe.h", } end diff --git a/src/devices/cpu/drcfe.cpp b/src/devices/cpu/drcfe.cpp index 6d2bd09cddf..87478de59e6 100644 --- a/src/devices/cpu/drcfe.cpp +++ b/src/devices/cpu/drcfe.cpp @@ -171,6 +171,7 @@ opcode_desc *drc_frontend::describe_one(offs_t curpc, const opcode_desc *prevdes desc->delayslots = 0; desc->skipslots = 0; desc->flags = 0; + desc->userflags = 0; desc->cycles = 0; memset(desc->regin, 0x00, sizeof(desc->regin)); memset(desc->regout, 0x00, sizeof(desc->regout)); diff --git a/src/devices/cpu/drcfe.h b/src/devices/cpu/drcfe.h index 67c67067221..09d86b2bd99 100644 --- a/src/devices/cpu/drcfe.h +++ b/src/devices/cpu/drcfe.h @@ -113,6 +113,7 @@ struct opcode_desc UINT8 delayslots; // number of delay slots (for branches) UINT8 skipslots; // number of skip slots (for branches) UINT32 flags; // OPFLAG_* opcode flags + UINT32 userflags; // core specific flags UINT32 cycles; // number of cycles needed to execute // register usage information diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index 880b368ad1f..4124fadf6a9 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -4,27 +4,27 @@ #include -#define CLEAR_ALU_FLAGS() (m_astat &= ~(AZ|AN|AV|AC|AS|AI)) +#define CLEAR_ALU_FLAGS() (m_core->astat &= ~(AZ|AN|AV|AC|AS|AI)) -#define SET_FLAG_AZ(r) { m_astat |= (((r) == 0) ? AZ : 0); } -#define SET_FLAG_AN(r) { m_astat |= (((r) & 0x80000000) ? AN : 0); } -#define SET_FLAG_AC_ADD(r,a,b) { m_astat |= (((UINT32)r < (UINT32)a) ? AC : 0); } -#define SET_FLAG_AV_ADD(r,a,b) { m_astat |= (((~((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); } -#define SET_FLAG_AC_SUB(r,a,b) { m_astat |= ((!((UINT32)a < (UINT32)b)) ? AC : 0); } -#define SET_FLAG_AV_SUB(r,a,b) { m_astat |= ((( ((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); } +#define SET_FLAG_AZ(r) { m_core->astat |= (((r) == 0) ? AZ : 0); } +#define SET_FLAG_AN(r) { m_core->astat |= (((r) & 0x80000000) ? AN : 0); } +#define SET_FLAG_AC_ADD(r,a,b) { m_core->astat |= (((UINT32)r < (UINT32)a) ? AC : 0); } +#define SET_FLAG_AV_ADD(r,a,b) { m_core->astat |= (((~((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); } +#define SET_FLAG_AC_SUB(r,a,b) { m_core->astat |= ((!((UINT32)a < (UINT32)b)) ? AC : 0); } +#define SET_FLAG_AV_SUB(r,a,b) { m_core->astat |= ((( ((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); } #define IS_FLOAT_ZERO(r) ((((r) & 0x7fffffff) == 0)) #define IS_FLOAT_DENORMAL(r) ((((r) & 0x7f800000) == 0) && (((r) & 0x7fffff) != 0)) #define IS_FLOAT_NAN(r) ((((r) & 0x7f800000) == 0x7f800000) && (((r) & 0x7fffff) != 0)) #define IS_FLOAT_INFINITY(r) (((r) & 0x7fffffff) == 0x7f800000) -#define CLEAR_MULTIPLIER_FLAGS() (m_astat &= ~(MN|MV|MU|MI)) +#define CLEAR_MULTIPLIER_FLAGS() (m_core->astat &= ~(MN|MV|MU|MI)) -#define SET_FLAG_MN(r) { m_astat |= (((r) & 0x80000000) ? MN : 0); } -#define SET_FLAG_MV(r) { m_astat |= ((((UINT32)((r) >> 32) != 0) && ((UINT32)((r) >> 32) != 0xffffffff)) ? MV : 0); } +#define SET_FLAG_MN(r) { m_core->astat |= (((r) & 0x80000000) ? MN : 0); } +#define SET_FLAG_MV(r) { m_core->astat |= ((((UINT32)((r) >> 32) != 0) && ((UINT32)((r) >> 32) != 0xffffffff)) ? MV : 0); } /* TODO: MU needs 80-bit result */ -#define SET_FLAG_MU(r) { m_astat |= ((((UINT32)((r) >> 32) == 0) && ((UINT32)(r)) != 0) ? MU : 0); } +#define SET_FLAG_MU(r) { m_core->astat |= ((((UINT32)((r) >> 32) == 0) && ((UINT32)(r)) != 0) ? MU : 0); } #define FLOAT_SIGN 0x80000000 @@ -115,7 +115,7 @@ void adsp21062_device::compute_add(int rn, int rx, int ry) { UINT32 r = REG(rx) + REG(ry); - if (m_mode1 & MODE1_ALUSAT) + if (m_core->mode1 & MODE1_ALUSAT) fatalerror("SHARC: compute_add: ALU saturation not implemented!\n"); CLEAR_ALU_FLAGS(); @@ -125,7 +125,7 @@ void adsp21062_device::compute_add(int rn, int rx, int ry) SET_FLAG_AC_ADD(r, REG(rx), REG(ry)); REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = Rx - Ry */ @@ -133,7 +133,7 @@ void adsp21062_device::compute_sub(int rn, int rx, int ry) { UINT32 r = REG(rx) - REG(ry); - if (m_mode1 & MODE1_ALUSAT) + if (m_core->mode1 & MODE1_ALUSAT) fatalerror("SHARC: compute_sub: ALU saturation not implemented!\n"); CLEAR_ALU_FLAGS(); @@ -143,16 +143,16 @@ void adsp21062_device::compute_sub(int rn, int rx, int ry) SET_FLAG_AC_SUB(r, REG(rx), REG(ry)); REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = Rx + Ry + CI */ void adsp21062_device::compute_add_ci(int rn, int rx, int ry) { - int c = (m_astat & AC) ? 1 : 0; + int c = (m_core->astat & AC) ? 1 : 0; UINT32 r = REG(rx) + REG(ry) + c; - if (m_mode1 & MODE1_ALUSAT) + if (m_core->mode1 & MODE1_ALUSAT) fatalerror("SHARC: compute_add_ci: ALU saturation not implemented!\n"); CLEAR_ALU_FLAGS(); @@ -162,16 +162,16 @@ void adsp21062_device::compute_add_ci(int rn, int rx, int ry) SET_FLAG_AC_ADD(r, REG(rx), REG(ry)+c); REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = Rx - Ry + CI - 1 */ void adsp21062_device::compute_sub_ci(int rn, int rx, int ry) { - int c = (m_astat & AC) ? 1 : 0; + int c = (m_core->astat & AC) ? 1 : 0; UINT32 r = REG(rx) - REG(ry) + c - 1; - if (m_mode1 & MODE1_ALUSAT) + if (m_core->mode1 & MODE1_ALUSAT) fatalerror("SHARC: compute_sub_ci: ALU saturation not implemented!\n"); CLEAR_ALU_FLAGS(); @@ -181,7 +181,7 @@ void adsp21062_device::compute_sub_ci(int rn, int rx, int ry) SET_FLAG_AC_SUB(r, REG(rx), REG(ry)+c-1); REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = Rx AND Ry */ @@ -194,7 +194,7 @@ void adsp21062_device::compute_and(int rn, int rx, int ry) SET_FLAG_AZ(r); REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* COMP(Rx, Ry) */ @@ -204,21 +204,21 @@ void adsp21062_device::compute_comp(int rx, int ry) CLEAR_ALU_FLAGS(); if( REG(rx) == REG(ry) ) - m_astat |= AZ; + m_core->astat |= AZ; if( (INT32)REG(rx) < (INT32)REG(ry) ) - m_astat |= AN; + m_core->astat |= AN; // Update ASTAT compare accumulation register - comp_accum = (m_astat >> 24) & 0xff; + comp_accum = (m_core->astat >> 24) & 0xff; comp_accum >>= 1; - if ((m_astat & (AZ|AN)) == 0) + if ((m_core->astat & (AZ|AN)) == 0) { comp_accum |= 0x80; } - m_astat &= 0xffffff; - m_astat |= comp_accum << 24; + m_core->astat &= 0xffffff; + m_core->astat |= comp_accum << 24; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = PASS Rx */ @@ -229,11 +229,11 @@ void adsp21062_device::compute_pass(int rn, int rx) REG(rn) = REG(rx); if (REG(rn) == 0) - m_astat |= AZ; + m_core->astat |= AZ; if (REG(rn) & 0x80000000) - m_astat |= AN; + m_core->astat |= AN; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = Rx XOR Ry */ @@ -245,7 +245,7 @@ void adsp21062_device::compute_xor(int rn, int rx, int ry) SET_FLAG_AZ(r); REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = Rx OR Ry */ @@ -257,7 +257,7 @@ void adsp21062_device::compute_or(int rn, int rx, int ry) SET_FLAG_AZ(r); REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = Rx + 1 */ @@ -273,7 +273,7 @@ void adsp21062_device::compute_inc(int rn, int rx) REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = Rx - 1 */ @@ -289,7 +289,7 @@ void adsp21062_device::compute_dec(int rn, int rx) REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = MIN(Rx, Ry) */ @@ -303,7 +303,7 @@ void adsp21062_device::compute_min(int rn, int rx, int ry) REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = MAX(Rx, Ry) */ @@ -317,7 +317,7 @@ void adsp21062_device::compute_max(int rn, int rx, int ry) REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = -Rx */ @@ -333,7 +333,7 @@ void adsp21062_device::compute_neg(int rn, int rx) REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rn = NOT Rx */ @@ -347,7 +347,7 @@ void adsp21062_device::compute_not(int rn, int rx) REG(rn) = r; - m_astat &= ~AF; + m_core->astat &= ~AF; } /*****************************************************************************/ @@ -364,13 +364,13 @@ UINT32 adsp21062_device::SCALB(SHARC_REG rx, int ry) if (exponent > 127) { // overflow - m_astat |= AV; + m_core->astat |= AV; return sign | FLOAT_INFINITY; } else if (exponent < -126) { // denormal - m_astat |= AZ; + m_core->astat |= AZ; return sign; } else @@ -389,12 +389,12 @@ void adsp21062_device::compute_float(int rn, int rx) // AN SET_FLAG_AN(REG(rn)); // AZ - m_astat |= (IS_FLOAT_DENORMAL(REG(rn)) || IS_FLOAT_ZERO(REG(rn))) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL(REG(rn)) || IS_FLOAT_ZERO(REG(rn))) ? AZ : 0; // AUS - m_stky |= (IS_FLOAT_DENORMAL(REG(rn))) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(REG(rn))) ? AUS : 0; /* TODO: AV flag */ - m_astat |= AF; + m_core->astat |= AF; } /* Rn = FIX Fx */ @@ -404,7 +404,7 @@ void adsp21062_device::compute_fix(int rn, int rx) SHARC_REG r_alu; r_alu.f = FREG(rx); - if (m_mode1 & MODE1_TRUNCATE) + if (m_core->mode1 & MODE1_TRUNCATE) { alu_i = (INT32)(r_alu.f); } @@ -418,13 +418,13 @@ void adsp21062_device::compute_fix(int rn, int rx) // AZ SET_FLAG_AZ(alu_i); // AU - m_stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; /* TODO: AV flag */ REG(rn) = alu_i; - m_astat |= AF; + m_core->astat |= AF; } /* Rn = FIX Fx BY Ry */ @@ -433,8 +433,8 @@ void adsp21062_device::compute_fix_scaled(int rn, int rx, int ry) INT32 alu_i; SHARC_REG r_alu; - r_alu.r = SCALB(m_r[rx], ry); - if (m_mode1 & MODE1_TRUNCATE) + r_alu.r = SCALB(m_core->r[rx], ry); + if (m_core->mode1 & MODE1_TRUNCATE) { alu_i = (INT32)(r_alu.f); } @@ -448,13 +448,13 @@ void adsp21062_device::compute_fix_scaled(int rn, int rx, int ry) // AZ SET_FLAG_AZ(alu_i); // AU - m_stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; /* TODO: AV flag */ REG(rn) = alu_i; - m_astat |= AF; + m_core->astat |= AF; } /* Fn = FLOAT Rx BY Ry */ @@ -471,11 +471,11 @@ void adsp21062_device::compute_float_scaled(int rn, int rx, int ry) // AN SET_FLAG_AN(REG(rn)); // AZ - m_astat |= (IS_FLOAT_DENORMAL(REG(rn)) || IS_FLOAT_ZERO(REG(rn))) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL(REG(rn)) || IS_FLOAT_ZERO(REG(rn))) ? AZ : 0; // AU - m_stky |= (IS_FLOAT_DENORMAL(REG(rn))) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(REG(rn))) ? AUS : 0; - m_astat |= AF; + m_core->astat |= AF; } /* Rn = LOGB Fx */ @@ -490,20 +490,20 @@ void adsp21062_device::compute_logb(int rn, int rx) { REG(rn) = FLOAT_INFINITY; - m_astat |= AV; + m_core->astat |= AV; } else if (IS_FLOAT_ZERO(REG(rx))) { REG(rn) = FLOAT_SIGN | FLOAT_INFINITY; - m_astat |= AV; + m_core->astat |= AV; } else if (IS_FLOAT_NAN(REG(rx))) { REG(rn) = 0xffffffff; - m_astat |= AI; - m_stky |= AIS; + m_core->astat |= AI; + m_core->stky |= AIS; } else { @@ -517,7 +517,7 @@ void adsp21062_device::compute_logb(int rn, int rx) REG(rn) = exponent; } - m_astat |= AF; + m_core->astat |= AF; } /* Fn = SCALB Fx BY Fy */ @@ -529,25 +529,25 @@ void adsp21062_device::compute_scalb(int rn, int rx, int ry) if (IS_FLOAT_NAN(REG(rx))) { - m_astat |= AI; - m_stky |= AIS; + m_core->astat |= AI; + m_core->stky |= AIS; REG(rn) = 0xffffffff; } else { - r.r = SCALB(m_r[rx], ry); + r.r = SCALB(m_core->r[rx], ry); // AN SET_FLAG_AN(r.r); // AZ - m_astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; + m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; // AUS - m_stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; FREG(rn) = r.f; } - m_astat |= AF; + m_core->astat |= AF; } /* Fn = Fx + Fy */ @@ -558,20 +558,20 @@ void adsp21062_device::compute_fadd(int rn, int rx, int ry) CLEAR_ALU_FLAGS(); // AN - m_astat |= (r.f < 0.0f) ? AN : 0; + m_core->astat |= (r.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; // AUS - m_stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; /* TODO: AV flag */ // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; FREG(rn) = r.f; - m_astat |= AF; + m_core->astat |= AF; } void adsp21062_device::compute_favg(int rn, int rx, int ry) @@ -581,20 +581,20 @@ void adsp21062_device::compute_favg(int rn, int rx, int ry) CLEAR_ALU_FLAGS(); // AN - m_astat |= (r.f < 0.0f) ? AN : 0; + m_core->astat |= (r.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; // AUS - m_stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; /* TODO: AV flag */ // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; FREG(rn) = r.f; - m_astat |= AF; + m_core->astat |= AF; } /* Fn = Fx - Fy */ @@ -605,20 +605,20 @@ void adsp21062_device::compute_fsub(int rn, int rx, int ry) CLEAR_ALU_FLAGS(); // AN - m_astat |= (r.f < 0.0f) ? AN : 0; + m_core->astat |= (r.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; // AUS - m_stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; /* TODO: AV flag */ // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; FREG(rn) = r.f; - m_astat |= AF; + m_core->astat |= AF; } /* Fn = -Fx */ @@ -629,17 +629,17 @@ void adsp21062_device::compute_fneg(int rn, int rx) CLEAR_ALU_FLAGS(); // AZ - m_astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; // AN - m_astat |= (r.f < 0.0f) ? AN : 0; + m_core->astat |= (r.f < 0.0f) ? AN : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; FREG(rn) = r.f; - m_astat |= AF; + m_core->astat |= AF; } /* COMP(Fx, Fy) */ @@ -650,26 +650,26 @@ void adsp21062_device::compute_fcomp(int rx, int ry) CLEAR_ALU_FLAGS(); // AZ if( FREG(rx) == FREG(ry) ) - m_astat |= AZ; + m_core->astat |= AZ; // AN if( FREG(rx) < FREG(ry) ) - m_astat |= AN; + m_core->astat |= AN; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; // Update ASTAT compare accumulation register - comp_accum = (m_astat >> 24) & 0xff; + comp_accum = (m_core->astat >> 24) & 0xff; comp_accum >>= 1; - if ((m_astat & (AZ|AN)) == 0) + if ((m_core->astat & (AZ|AN)) == 0) { comp_accum |= 0x80; } - m_astat &= 0xffffff; - m_astat |= comp_accum << 24; - m_astat |= AF; + m_core->astat &= 0xffffff; + m_core->astat |= comp_accum << 24; + m_core->astat |= AF; } /* Fn = ABS(Fx + Fy) */ @@ -680,18 +680,18 @@ void adsp21062_device::compute_fabs_plus(int rn, int rx, int ry) CLEAR_ALU_FLAGS(); // AZ - m_astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; // AUS - m_stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; /* TODO: AV flag */ // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; FREG(rn) = r.f; - m_astat |= AF; + m_core->astat |= AF; } /* Fn = MAX(Fx, Fy) */ @@ -702,17 +702,17 @@ void adsp21062_device::compute_fmax(int rn, int rx, int ry) r_alu.f = MAX(FREG(rx), FREG(ry)); CLEAR_ALU_FLAGS(); - m_astat |= (r_alu.f < 0.0f) ? AN : 0; + m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; // AU - m_stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; /* TODO: AV flag */ FREG(rn) = r_alu.f; - m_astat |= AF; + m_core->astat |= AF; } /* Fn = MIN(Fx, Fy) */ @@ -723,17 +723,17 @@ void adsp21062_device::compute_fmin(int rn, int rx, int ry) r_alu.f = MIN(FREG(rx), FREG(ry)); CLEAR_ALU_FLAGS(); - m_astat |= (r_alu.f < 0.0f) ? AN : 0; + m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; // AU - m_stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; /* TODO: AV flag */ FREG(rn) = r_alu.f; - m_astat |= AF; + m_core->astat |= AF; } /* Fn = CLIP Fx BY Fy */ @@ -761,14 +761,14 @@ void adsp21062_device::compute_fclip(int rn, int rx, int ry) CLEAR_ALU_FLAGS(); SET_FLAG_AN(r_alu.r); // AZ - m_astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; // AU - m_stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; FREG(rn) = r_alu.f; - m_astat |= AF; + m_core->astat |= AF; } /* Fn = RECIPS Fx */ @@ -785,17 +785,17 @@ void adsp21062_device::compute_recips(int rn, int rx) r = 0xffffffff; // AI - m_astat |= AI; + m_core->astat |= AI; // AIS - m_stky |= AIS; + m_core->stky |= AIS; } else if (IS_FLOAT_ZERO(REG(rx))) { // +- Zero r = (REG(rx) & FLOAT_SIGN) | FLOAT_INFINITY; - m_astat |= AZ; + m_core->astat |= AZ; } else { @@ -820,17 +820,17 @@ void adsp21062_device::compute_recips(int rn, int rx) SET_FLAG_AN(REG(rx)); // AZ & AV - m_astat |= (IS_FLOAT_ZERO(r)) ? AZ : 0; - m_astat |= (IS_FLOAT_ZERO(REG(rx))) ? AV : 0; + m_core->astat |= (IS_FLOAT_ZERO(r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_ZERO(REG(rx))) ? AV : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; } // AF - m_astat |= AF; + m_core->astat |= AF; REG(rn) = r; } @@ -867,16 +867,16 @@ void adsp21062_device::compute_rsqrts(int rn, int rx) CLEAR_ALU_FLAGS(); // AN - m_astat |= (REG(rx) == 0x80000000) ? AN : 0; + m_core->astat |= (REG(rx) == 0x80000000) ? AN : 0; // AZ & AV - m_astat |= (IS_FLOAT_ZERO(r)) ? AZ : 0; - m_astat |= (IS_FLOAT_ZERO(REG(rx))) ? AV : 0; + m_core->astat |= (IS_FLOAT_ZERO(r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_ZERO(REG(rx))) ? AV : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx)) || (REG(rx) & 0x80000000)) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || (REG(rx) & 0x80000000)) ? AI : 0; // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; // AF - m_astat |= AF; + m_core->astat |= AF; REG(rn) = r; } @@ -890,14 +890,14 @@ void adsp21062_device::compute_fpass(int rn, int rx) CLEAR_ALU_FLAGS(); // AN - m_astat |= (r.f < 0.0f) ? AN : 0; + m_core->astat |= (r.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; FREG(rn) = r.f; - m_astat |= AF; + m_core->astat |= AF; } /* Fn = ABS Fx */ @@ -908,14 +908,14 @@ void adsp21062_device::compute_fabs(int rn, int rx) CLEAR_ALU_FLAGS(); // AN - m_astat |= (r.f < 0.0f) ? AN : 0; + m_core->astat |= (r.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; FREG(rn) = r.f; - m_astat |= AF; + m_core->astat |= AF; } /*****************************************************************************/ @@ -950,7 +950,7 @@ void adsp21062_device::compute_mul_ssin(int rn, int rx, int ry) /* MRF + (signed)Rx * (signed)Ry, integer, no rounding */ UINT32 adsp21062_device::compute_mrf_plus_mul_ssin(int rx, int ry) { - UINT64 r = m_mrf + ((INT64)(INT32)REG(rx) * (INT64)(INT32)REG(ry)); + UINT64 r = m_core->mrf + ((INT64)(INT32)REG(rx) * (INT64)(INT32)REG(ry)); CLEAR_MULTIPLIER_FLAGS(); SET_FLAG_MN((UINT32)r); @@ -963,7 +963,7 @@ UINT32 adsp21062_device::compute_mrf_plus_mul_ssin(int rx, int ry) /* MRB + (signed)Rx * (signed)Ry, integer, no rounding */ UINT32 adsp21062_device::compute_mrb_plus_mul_ssin(int rx, int ry) { - INT64 r = m_mrb + ((INT64)(INT32)REG(rx) * (INT64)(INT32)REG(ry)); + INT64 r = m_core->mrb + ((INT64)(INT32)REG(rx) * (INT64)(INT32)REG(ry)); CLEAR_MULTIPLIER_FLAGS(); SET_FLAG_MN((UINT32)r); @@ -994,11 +994,11 @@ void adsp21062_device::compute_multi_mr_to_reg(int ai, int rk) { switch(ai) { - case 0: SET_UREG(rk, (UINT32)(m_mrf)); break; - case 1: SET_UREG(rk, (UINT32)(m_mrf >> 32)); break; + case 0: SET_UREG(rk, (UINT32)(m_core->mrf)); break; + case 1: SET_UREG(rk, (UINT32)(m_core->mrf >> 32)); break; case 2: fatalerror("SHARC: tried to load MR2F\n"); break; - case 4: SET_UREG(rk, (UINT32)(m_mrb)); break; - case 5: SET_UREG(rk, (UINT32)(m_mrb >> 32)); break; + case 4: SET_UREG(rk, (UINT32)(m_core->mrb)); break; + case 5: SET_UREG(rk, (UINT32)(m_core->mrb >> 32)); break; case 6: fatalerror("SHARC: tried to load MR2B\n"); break; default: fatalerror("SHARC: unknown ai %d in mr_to_reg\n", ai); } @@ -1010,11 +1010,11 @@ void adsp21062_device::compute_multi_reg_to_mr(int ai, int rk) { switch(ai) { - case 0: m_mrf &= ~0xffffffff; m_mrf |= GET_UREG(rk); break; - case 1: m_mrf &= 0xffffffff; m_mrf |= (UINT64)(GET_UREG(rk)) << 32; break; + case 0: m_core->mrf &= ~0xffffffff; m_core->mrf |= GET_UREG(rk); break; + case 1: m_core->mrf &= 0xffffffff; m_core->mrf |= (UINT64)(GET_UREG(rk)) << 32; break; case 2: fatalerror("SHARC: tried to write MR2F\n"); break; - case 4: m_mrb &= ~0xffffffff; m_mrb |= GET_UREG(rk); break; - case 5: m_mrb &= 0xffffffff; m_mrb |= (UINT64)(GET_UREG(rk)) << 32; break; + case 4: m_core->mrb &= ~0xffffffff; m_core->mrb |= GET_UREG(rk); break; + case 5: m_core->mrb &= 0xffffffff; m_core->mrb |= (UINT64)(GET_UREG(rk)) << 32; break; case 6: fatalerror("SHARC: tried to write MR2B\n"); break; default: fatalerror("SHARC: unknown ai %d in reg_to_mr\n", ai); } @@ -1031,27 +1031,27 @@ void adsp21062_device::compute_dual_add_sub(int ra, int rs, int rx, int ry) CLEAR_ALU_FLAGS(); if (r_add == 0 || r_sub == 0) { - m_astat |= AZ; + m_core->astat |= AZ; } if (r_add & 0x80000000 || r_sub & 0x80000000) { - m_astat |= AN; + m_core->astat |= AN; } if (((~(REG(rx) ^ REG(ry)) & (REG(rx) ^ r_add)) & 0x80000000) || (( (REG(rx) ^ REG(ry)) & (REG(rx) ^ r_sub)) & 0x80000000)) { - m_astat |= AV; + m_core->astat |= AV; } if (((UINT32)r_add < (UINT32)REG(rx)) || (!((UINT32)r_sub < (UINT32)REG(rx)))) { - m_astat |= AC; + m_core->astat |= AC; } REG(ra) = r_add; REG(rs) = r_sub; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rm = (signed)Rxm * (signed)Rym, fractional, rounding, Ra = Rxa + Rya */ @@ -1076,7 +1076,7 @@ void adsp21062_device::compute_mul_ssfr_add(int rm, int rxm, int rym, int ra, in REG(rm) = r_mul; REG(ra) = r_add; - m_astat &= ~AF; + m_core->astat &= ~AF; } /* Rm = (signed)Rxm * (signed)Rym, fractional, rounding, Ra = Rxa - Rya */ @@ -1101,7 +1101,7 @@ void adsp21062_device::compute_mul_ssfr_sub(int rm, int rxm, int rym, int ra, in REG(rm) = r_mul; REG(ra) = r_sub; - m_astat &= ~AF; + m_core->astat &= ~AF; } @@ -1116,22 +1116,22 @@ void adsp21062_device::compute_dual_fadd_fsub(int ra, int rs, int rx, int ry) CLEAR_ALU_FLAGS(); // AN - m_astat |= ((r_add.f < 0.0f) || (r_sub.f < 0.0f)) ? AN : 0; + m_core->astat |= ((r_add.f < 0.0f) || (r_sub.f < 0.0f)) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_ZERO(r_add.r) || + m_core->astat |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_ZERO(r_add.r) || IS_FLOAT_DENORMAL(r_sub.r) || IS_FLOAT_ZERO(r_sub.r)) ? AZ : 0; // AUS - m_stky |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_DENORMAL(r_sub.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_DENORMAL(r_sub.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; /* TODO: AV flag */ // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; FREG(ra) = r_add.f; FREG(rs) = r_sub.f; - m_astat |= AF; + m_core->astat |= AF; } /* Fm = Fxm * Fym, Fa = Fxa + Fya */ @@ -1148,21 +1148,21 @@ void adsp21062_device::compute_fmul_fadd(int fm, int fxm, int fym, int fa, int f /* TODO: MI flag */ CLEAR_ALU_FLAGS(); - m_astat |= (r_add.f < 0.0f) ? AN : 0; + m_core->astat |= (r_add.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_ZERO(r_add.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_ZERO(r_add.r)) ? AZ : 0; // AU - m_stky |= (IS_FLOAT_DENORMAL(r_add.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_add.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; /* TODO: AV flag */ // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; FREG(fm) = r_mul.f; FREG(fa) = r_add.f; - m_astat |= AF; + m_core->astat |= AF; } /* Fm = Fxm * Fym, Fa = Fxa - Fya */ @@ -1179,21 +1179,21 @@ void adsp21062_device::compute_fmul_fsub(int fm, int fxm, int fym, int fa, int f /* TODO: MI flag */ CLEAR_ALU_FLAGS(); - m_astat |= (r_sub.f < 0.0f) ? AN : 0; + m_core->astat |= (r_sub.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_DENORMAL(r_sub.r) || IS_FLOAT_ZERO(r_sub.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL(r_sub.r) || IS_FLOAT_ZERO(r_sub.r)) ? AZ : 0; // AU - m_stky |= (IS_FLOAT_DENORMAL(r_sub.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_sub.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; /* TODO: AV flag */ // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; FREG(fm) = r_mul.f; FREG(fa) = r_sub.f; - m_astat |= AF; + m_core->astat |= AF; } /* Fm = Fxm * Fym, Fa = FLOAT Fxa BY Fya */ @@ -1214,16 +1214,16 @@ void adsp21062_device::compute_fmul_float_scaled(int fm, int fxm, int fym, int f /* TODO: MI flag */ CLEAR_ALU_FLAGS(); - m_astat |= (r_alu.f < 0.0f) ? AN : 0; + m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_DENORMAL(r_alu.r) || IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL(r_alu.r) || IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; // AU - m_stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; /* TODO: set AV if overflowed */ FREG(fm) = r_mul.f; FREG(fa) = r_alu.f; - m_astat |= AF; + m_core->astat |= AF; } /* Fm = Fxm * Fym, Fa = FIX Fxa BY Fya */ @@ -1233,9 +1233,9 @@ void adsp21062_device::compute_fmul_fix_scaled(int fm, int fxm, int fym, int fa, SHARC_REG r_mul, r_alu; r_mul.f = FREG(fxm) * FREG(fym); - r_alu.r = SCALB(m_r[fxa], fya); + r_alu.r = SCALB(m_core->r[fxa], fya); - if (m_mode1 & MODE1_TRUNCATE) + if (m_core->mode1 & MODE1_TRUNCATE) { alu_i = (INT32)(r_alu.f); } @@ -1255,14 +1255,14 @@ void adsp21062_device::compute_fmul_fix_scaled(int fm, int fxm, int fym, int fa, // AZ SET_FLAG_AZ(alu_i); // AU - m_stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(fxa))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(fxa))) ? AI : 0; /* TODO: AV flag */ FREG(fm) = r_mul.f; REG(fa) = alu_i; // TODO: check this, should be RA? - m_astat |= AF; + m_core->astat |= AF; } void adsp21062_device::compute_fmul_avg(int fm, int fxm, int fym, int fa, int fxa, int fya) @@ -1273,7 +1273,7 @@ void adsp21062_device::compute_fmul_avg(int fm, int fxm, int fym, int fa, int fx r_alu.f = (FREG(fxa) * FREG(fya))/((float) 2.0); /* TODO: are flags right for this? */ - if (m_mode1 & MODE1_TRUNCATE) + if (m_core->mode1 & MODE1_TRUNCATE) { alu_i = (INT32)(r_alu.f); } @@ -1293,14 +1293,14 @@ void adsp21062_device::compute_fmul_avg(int fm, int fxm, int fym, int fa, int fx // AZ SET_FLAG_AZ(alu_i); // AU - m_stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(fxa))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(fxa))) ? AI : 0; /* TODO: AV flag */ FREG(fm) = r_mul.f; REG(fa) = alu_i; - m_astat |= AF; + m_core->astat |= AF; } /* Fm = Fxm * Fym, Fa = MAX(Fxa, Fya) */ @@ -1318,18 +1318,18 @@ void adsp21062_device::compute_fmul_fmax(int fm, int fxm, int fym, int fa, int f /* TODO: MI flag */ CLEAR_ALU_FLAGS(); - m_astat |= (r_alu.f < 0.0f) ? AN : 0; + m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; // AU - m_stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; /* TODO: AV flag */ FREG(fm) = r_mul.f; FREG(fa) = r_alu.f; - m_astat |= AF; + m_core->astat |= AF; } @@ -1348,18 +1348,18 @@ void adsp21062_device::compute_fmul_fmin(int fm, int fxm, int fym, int fa, int f /* TODO: MI flag */ CLEAR_ALU_FLAGS(); - m_astat |= (r_alu.f < 0.0f) ? AN : 0; + m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; // AU - m_stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; /* TODO: AV flag */ FREG(fm) = r_mul.f; FREG(fa) = r_alu.f; - m_astat |= AF; + m_core->astat |= AF; } @@ -1380,21 +1380,21 @@ void adsp21062_device::compute_fmul_dual_fadd_fsub(int fm, int fxm, int fym, int CLEAR_ALU_FLAGS(); // AN - m_astat |= ((r_add.r < 0.0f) || (r_sub.r < 0.0f)) ? AN : 0; + m_core->astat |= ((r_add.r < 0.0f) || (r_sub.r < 0.0f)) ? AN : 0; // AZ - m_astat |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_ZERO(r_add.r) || + m_core->astat |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_ZERO(r_add.r) || IS_FLOAT_DENORMAL(r_sub.r) || IS_FLOAT_ZERO(r_sub.r)) ? AZ : 0; // AUS - m_stky |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_DENORMAL(r_sub.r)) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_DENORMAL(r_sub.r)) ? AUS : 0; // AI - m_astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; /* TODO: AV flag */ // AIS - if (m_astat & AI) m_stky |= AIS; + if (m_core->astat & AI) m_core->stky |= AIS; FREG(fm) = r_mul.f; FREG(fa) = r_add.f; FREG(fs) = r_sub.f; - m_astat |= AF; + m_core->astat |= AF; } diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp index 3c4cadf5386..f5336be8499 100644 --- a/src/devices/cpu/sharc/sharc.cpp +++ b/src/devices/cpu/sharc/sharc.cpp @@ -1,6 +1,6 @@ // license:BSD-3-Clause // copyright-holders:Ville Linde -/* Analog Devices ADSP-2106x SHARC emulator v2.0 +/* Analog Devices ADSP-2106x SHARC emulator v3.0 Written by Ville Linde */ @@ -8,6 +8,19 @@ #include "emu.h" #include "debugger.h" #include "sharc.h" +#include "sharcfe.h" + + +#define ENABLE_DRC 0 +#define DISABLE_FAST_REGISTERS 1 + + + +#define CACHE_SIZE (2 * 1024 * 1024) +#define COMPILE_BACKWARDS_BYTES 128 +#define COMPILE_FORWARDS_BYTES 512 +#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/4) + (COMPILE_FORWARDS_BYTES/4)) +#define COMPILE_MAX_SEQUENCE 64 enum @@ -20,7 +33,7 @@ enum SHARC_R8, SHARC_R9, SHARC_R10, SHARC_R11, SHARC_R12, SHARC_R13, SHARC_R14, SHARC_R15, SHARC_SYSCON, SHARC_SYSSTAT, SHARC_MRF, SHARC_MRB, - SHARC_STSTKP, SHARC_PCSTKP, SHARC_LSTKP, + SHARC_STSTKP, SHARC_PCSTKP, SHARC_LSTKP, SHARC_CURLCNTR, SHARC_FADDR, SHARC_DADDR, SHARC_I0, SHARC_I1, SHARC_I2, SHARC_I3, SHARC_I4, SHARC_I5, SHARC_I6, SHARC_I7, @@ -60,6 +73,9 @@ adsp21062_device::adsp21062_device(const machine_config &mconfig, const char *ta , m_program_config("program", ENDIANNESS_LITTLE, 64, 24, -3, ADDRESS_MAP_NAME(internal_pgm)) , m_data_config("data", ENDIANNESS_LITTLE, 32, 32, -2) , m_boot_mode(BOOT_MODE_HOST) + , m_cache(CACHE_SIZE + sizeof(sharc_internal_state)) + , m_drcuml(nullptr) + , m_drcfe(nullptr) { } @@ -73,27 +89,27 @@ offs_t adsp21062_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 void adsp21062_device::CHANGE_PC(UINT32 newpc) { - m_pc = newpc; - m_daddr = newpc; - m_faddr = newpc+1; - m_nfaddr = newpc+2; + m_core->pc = newpc; + m_core->daddr = newpc; + m_core->faddr = newpc+1; + m_core->nfaddr = newpc+2; } void adsp21062_device::CHANGE_PC_DELAYED(UINT32 newpc) { - m_nfaddr = newpc; + m_core->nfaddr = newpc; - m_delay_slot1 = m_pc; - m_delay_slot2 = m_daddr; + m_core->delay_slot1 = m_core->pc; + m_core->delay_slot2 = m_core->daddr; } TIMER_CALLBACK_MEMBER(adsp21062_device::sharc_iop_delayed_write_callback) { - switch (m_iop_delayed_reg) + switch (m_core->iop_delayed_reg) { case 0x1c: { - if (m_iop_delayed_data & 0x1) + if (m_core->iop_delayed_data & 0x1) { sharc_dma_exec(6); } @@ -102,25 +118,25 @@ TIMER_CALLBACK_MEMBER(adsp21062_device::sharc_iop_delayed_write_callback) case 0x1d: { - if (m_iop_delayed_data & 0x1) + if (m_core->iop_delayed_data & 0x1) { sharc_dma_exec(7); } break; } - default: fatalerror("SHARC: sharc_iop_delayed_write: unknown IOP register %02X\n", m_iop_delayed_reg); + default: fatalerror("SHARC: sharc_iop_delayed_write: unknown IOP register %02X\n", m_core->iop_delayed_reg); } - m_delayed_iop_timer->adjust(attotime::never, 0); + m_core->delayed_iop_timer->adjust(attotime::never, 0); } void adsp21062_device::sharc_iop_delayed_w(UINT32 reg, UINT32 data, int cycles) { - m_iop_delayed_reg = reg; - m_iop_delayed_data = data; + m_core->iop_delayed_reg = reg; + m_core->iop_delayed_data = data; - m_delayed_iop_timer->adjust(cycles_to_attotime(cycles), 0); + m_core->delayed_iop_timer->adjust(cycles_to_attotime(cycles), 0); } @@ -133,9 +149,9 @@ UINT32 adsp21062_device::sharc_iop_r(UINT32 address) case 0x37: // DMA status { - return m_dma_status; + return m_core->dma_status; } - default: fatalerror("sharc_iop_r: Unimplemented IOP reg %02X at %08X\n", address, m_pc); + default: fatalerror("sharc_iop_r: Unimplemented IOP reg %02X at %08X\n", address, m_core->pc); } } @@ -148,24 +164,24 @@ void adsp21062_device::sharc_iop_w(UINT32 address, UINT32 data) case 0x04: // External port DMA buffer 0 /* TODO: Last Bronx uses this to init the program, int_index however is 0? */ { - external_dma_write(m_extdma_shift,data); - m_extdma_shift++; - if(m_extdma_shift == 3) - m_extdma_shift = 0; + external_dma_write(m_core->extdma_shift,data); + m_core->extdma_shift++; + if(m_core->extdma_shift == 3) + m_core->extdma_shift = 0; #if 0 - UINT64 r = pm_read48(m_dma[6].int_index); + UINT64 r = pm_read48(m_core->dma[6].int_index); - r &= ~((UINT64)(0xffff) << (m_extdma_shift*16)); - r |= ((UINT64)data & 0xffff) << (m_extdma_shift*16); + r &= ~((UINT64)(0xffff) << (m_core->extdma_shift*16)); + r |= ((UINT64)data & 0xffff) << (m_core->extdma_shift*16); - pm_write48(m_dma[6].int_index, r); + pm_write48(m_core->dma[6].int_index, r); - m_extdma_shift++; - if (m_extdma_shift == 3) + m_core->extdma_shift++; + if (m_core->extdma_shift == 3) { - m_extdma_shift = 0; - m_dma[6].int_index ++; + m_core->extdma_shift = 0; + m_core->dma[6].int_index ++; } #endif } @@ -186,40 +202,40 @@ void adsp21062_device::sharc_iop_w(UINT32 address, UINT32 data) // DMA 6 case 0x1c: { - m_dma[6].control = data; + m_core->dma[6].control = data; sharc_iop_delayed_w(0x1c, data, 1); break; } case 0x20: break; - case 0x40: m_dma[6].int_index = data; return; - case 0x41: m_dma[6].int_modifier = data; return; - case 0x42: m_dma[6].int_count = data; return; - case 0x43: m_dma[6].chain_ptr = data; return; - case 0x44: m_dma[6].gen_purpose = data; return; - case 0x45: m_dma[6].ext_index = data; return; - case 0x46: m_dma[6].ext_modifier = data; return; - case 0x47: m_dma[6].ext_count = data; return; + case 0x40: m_core->dma[6].int_index = data; return; + case 0x41: m_core->dma[6].int_modifier = data; return; + case 0x42: m_core->dma[6].int_count = data; return; + case 0x43: m_core->dma[6].chain_ptr = data; return; + case 0x44: m_core->dma[6].gen_purpose = data; return; + case 0x45: m_core->dma[6].ext_index = data; return; + case 0x46: m_core->dma[6].ext_modifier = data; return; + case 0x47: m_core->dma[6].ext_count = data; return; // DMA 7 case 0x1d: { - m_dma[7].control = data; + m_core->dma[7].control = data; sharc_iop_delayed_w(0x1d, data, 30); break; } - case 0x48: m_dma[7].int_index = data; return; - case 0x49: m_dma[7].int_modifier = data; return; - case 0x4a: m_dma[7].int_count = data; return; - case 0x4b: m_dma[7].chain_ptr = data; return; - case 0x4c: m_dma[7].gen_purpose = data; return; - case 0x4d: m_dma[7].ext_index = data; return; - case 0x4e: m_dma[7].ext_modifier = data; return; - case 0x4f: m_dma[7].ext_count = data; return; + case 0x48: m_core->dma[7].int_index = data; return; + case 0x49: m_core->dma[7].int_modifier = data; return; + case 0x4a: m_core->dma[7].int_count = data; return; + case 0x4b: m_core->dma[7].chain_ptr = data; return; + case 0x4c: m_core->dma[7].gen_purpose = data; return; + case 0x4d: m_core->dma[7].ext_index = data; return; + case 0x4e: m_core->dma[7].ext_modifier = data; return; + case 0x4f: m_core->dma[7].ext_count = data; return; - default: fatalerror("sharc_iop_w: Unimplemented IOP reg %02X, %08X at %08X\n", address, data, m_pc); + default: fatalerror("sharc_iop_w: Unimplemented IOP reg %02X, %08X at %08X\n", address, data, m_core->pc); } } @@ -270,7 +286,7 @@ void adsp21062_device::external_iop_write(UINT32 address, UINT32 data) { if (data != 0) { - m_dma[6].control = data; + m_core->dma[6].control = data; } } else @@ -287,27 +303,27 @@ void adsp21062_device::external_dma_write(UINT32 address, UINT64 data) first internal RAM location, before they are used by the DMA controller. */ - switch ((m_dma[6].control >> 6) & 0x3) + switch ((m_core->dma[6].control >> 6) & 0x3) { case 2: // 16/48 packing { int shift = address % 3; - UINT64 r = pm_read48((m_dma[6].int_index & 0x1ffff) | 0x20000); + UINT64 r = pm_read48((m_core->dma[6].int_index & 0x1ffff) | 0x20000); r &= ~((UINT64)(0xffff) << (shift*16)); r |= (data & 0xffff) << (shift*16); - pm_write48((m_dma[6].int_index & 0x1ffff) | 0x20000, r); + pm_write48((m_core->dma[6].int_index & 0x1ffff) | 0x20000, r); if (shift == 2) { - m_dma[6].int_index += m_dma[6].int_modifier; + m_core->dma[6].int_index += m_core->dma[6].int_modifier; } break; } default: { - fatalerror("sharc_external_dma_write: unimplemented packing mode %d\n", (m_dma[6].control >> 6) & 0x3); + fatalerror("sharc_external_dma_write: unimplemented packing mode %d\n", (m_core->dma[6].control >> 6) & 0x3); } } } @@ -315,8 +331,12 @@ void adsp21062_device::external_dma_write(UINT32 address, UINT64 data) void adsp21062_device::device_start() { int saveindex; + + m_core = (sharc_internal_state *)m_cache.alloc_near(sizeof(sharc_internal_state)); + memset(m_core, 0, sizeof(sharc_internal_state)); m_program = &space(AS_PROGRAM); + m_direct = &m_program->direct(); m_data = &space(AS_DATA); build_opcode_table(); @@ -324,9 +344,107 @@ void adsp21062_device::device_start() m_internal_ram_block0 = &m_internal_ram[0]; m_internal_ram_block1 = &m_internal_ram[0x20000/2]; - m_delayed_iop_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(adsp21062_device::sharc_iop_delayed_write_callback), this)); + // init UML generator + UINT32 umlflags = 0; + m_drcuml = std::make_unique(*this, m_cache, umlflags, 1, 24, 0); - for (auto & elem : m_dma_op) + // add UML symbols + m_drcuml->symbol_add(&m_core->pc, sizeof(m_core->pc), "pc"); + m_drcuml->symbol_add(&m_core->icount, sizeof(m_core->icount), "icount"); + + for (int i=0; i < 16; i++) + { + char buf[10]; + sprintf(buf, "r%d", i); + m_drcuml->symbol_add(&m_core->r[i], sizeof(m_core->r[i]), buf); + + if (i < 8) + { + sprintf(buf, "dag_i%d", i); + m_drcuml->symbol_add(&m_core->dag1.i[i & 7], sizeof(m_core->dag1.i[i & 7]), buf); + sprintf(buf, "dag_m%d", i); + m_drcuml->symbol_add(&m_core->dag1.m[i & 7], sizeof(m_core->dag1.m[i & 7]), buf); + sprintf(buf, "dag_l%d", i); + m_drcuml->symbol_add(&m_core->dag1.l[i & 7], sizeof(m_core->dag1.l[i & 7]), buf); + sprintf(buf, "dag_b%d", i); + m_drcuml->symbol_add(&m_core->dag1.b[i & 7], sizeof(m_core->dag1.b[i & 7]), buf); + } + else + { + sprintf(buf, "dag_i%d", i); + m_drcuml->symbol_add(&m_core->dag2.i[i & 7], sizeof(m_core->dag2.i[i & 7]), buf); + sprintf(buf, "dag_m%d", i); + m_drcuml->symbol_add(&m_core->dag2.m[i & 7], sizeof(m_core->dag2.m[i & 7]), buf); + sprintf(buf, "dag_l%d", i); + m_drcuml->symbol_add(&m_core->dag2.l[i & 7], sizeof(m_core->dag2.l[i & 7]), buf); + sprintf(buf, "dag_b%d", i); + m_drcuml->symbol_add(&m_core->dag2.b[i & 7], sizeof(m_core->dag2.b[i & 7]), buf); + } + } + + m_drcuml->symbol_add(&m_core->astat, sizeof(m_core->astat), "astat"); + m_drcuml->symbol_add(&m_core->mode1, sizeof(m_core->mode1), "mode1"); + m_drcuml->symbol_add(&m_core->mode2, sizeof(m_core->mode2), "mode2"); + m_drcuml->symbol_add(&m_core->lcntr, sizeof(m_core->lcntr), "lcntr"); + m_drcuml->symbol_add(&m_core->curlcntr, sizeof(m_core->curlcntr), "curlcntr"); + m_drcuml->symbol_add(&m_core->imask, sizeof(m_core->imask), "imask"); + m_drcuml->symbol_add(&m_core->imaskp, sizeof(m_core->imaskp), "imaskp"); + m_drcuml->symbol_add(&m_core->irptl, sizeof(m_core->irptl), "irptl"); + m_drcuml->symbol_add(&m_core->ustat1, sizeof(m_core->ustat1), "ustat1"); + m_drcuml->symbol_add(&m_core->ustat2, sizeof(m_core->ustat2), "ustat2"); + m_drcuml->symbol_add(&m_core->stky, sizeof(m_core->stky), "stky"); + + m_drcuml->symbol_add(&m_core->astat_drc.az, sizeof(m_core->astat_drc.az), "astat_az"); + m_drcuml->symbol_add(&m_core->astat_drc.ac, sizeof(m_core->astat_drc.ac), "astat_ac"); + m_drcuml->symbol_add(&m_core->astat_drc.an, sizeof(m_core->astat_drc.an), "astat_an"); + m_drcuml->symbol_add(&m_core->astat_drc.av, sizeof(m_core->astat_drc.av), "astat_av"); + m_drcuml->symbol_add(&m_core->astat_drc.ai, sizeof(m_core->astat_drc.ai), "astat_ai"); + m_drcuml->symbol_add(&m_core->astat_drc.as, sizeof(m_core->astat_drc.as), "astat_as"); + m_drcuml->symbol_add(&m_core->astat_drc.mv, sizeof(m_core->astat_drc.mv), "astat_mv"); + m_drcuml->symbol_add(&m_core->astat_drc.mn, sizeof(m_core->astat_drc.mn), "astat_mn"); + m_drcuml->symbol_add(&m_core->astat_drc.mu, sizeof(m_core->astat_drc.mu), "astat_mu"); + m_drcuml->symbol_add(&m_core->astat_drc.mi, sizeof(m_core->astat_drc.mi), "astat_mi"); + m_drcuml->symbol_add(&m_core->astat_drc.sz, sizeof(m_core->astat_drc.sz), "astat_sz"); + m_drcuml->symbol_add(&m_core->astat_drc.sv, sizeof(m_core->astat_drc.sv), "astat_sv"); + m_drcuml->symbol_add(&m_core->astat_drc.ss, sizeof(m_core->astat_drc.ss), "astat_ss"); + + m_drcuml->symbol_add(&m_core->arg0, sizeof(m_core->arg0), "arg0"); + m_drcuml->symbol_add(&m_core->arg1, sizeof(m_core->arg1), "arg1"); + m_drcuml->symbol_add(&m_core->arg2, sizeof(m_core->arg2), "arg2"); + m_drcuml->symbol_add(&m_core->arg3, sizeof(m_core->arg3), "arg3"); + + m_drcuml->symbol_add(&m_core->dreg_temp, sizeof(m_core->dreg_temp), "dreg_temp"); + m_drcuml->symbol_add(&m_core->lstkp, sizeof(m_core->lstkp), "lstkp"); + m_drcuml->symbol_add(&m_core->px, sizeof(m_core->px), "px"); + + m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, COMPILE_MAX_SEQUENCE); + + for (int i = 0; i < 16; i++) + { + m_regmap[i] = uml::mem(&m_core->r[i]); + } + + // I0-3 used by the DRC, rest can be assigned to fast registers + if (!DISABLE_FAST_REGISTERS) + { + drcbe_info beinfo; + m_drcuml->get_backend_info(beinfo); + if (beinfo.direct_iregs > 4) + m_regmap[0] = uml::I4; + if (beinfo.direct_iregs > 5) + m_regmap[1] = uml::I5; + if (beinfo.direct_iregs > 6) + m_regmap[2] = uml::I6; + if (beinfo.direct_iregs > 7) + m_regmap[3] = uml::I7; + } + + m_cache_dirty = true; + + + m_core->delayed_iop_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(adsp21062_device::sharc_iop_delayed_write_callback), this)); + + for (auto & elem : m_core->dma_op) { elem.src = 0; elem.dst = 0; @@ -343,32 +461,32 @@ void adsp21062_device::device_start() for (int i=0; i < 16; i++) { - m_r[i].r = 0; - m_reg_alt[i].r = 0; + m_core->r[i].r = 0; + m_core->reg_alt[i].r = 0; } - m_mrf = 0; - m_mrb = 0; - for (auto & elem : m_pcstack) + m_core->mrf = 0; + m_core->mrb = 0; + for (auto & elem : m_core->pcstack) { elem = 0; } for (int i=0; i < 6; i++) { - m_lcstack[i] = 0; - m_lastack[i] = 0; + m_core->lcstack[i] = 0; + m_core->lastack[i] = 0; } - m_pcstk = 0; - m_laddr.addr = m_laddr.code = m_laddr.loop_type = 0; - m_curlcntr = 0; - m_lcntr = 0; + m_core->pcstk = 0; + m_core->laddr.addr = m_core->laddr.code = m_core->laddr.loop_type = 0; + m_core->curlcntr = 0; + m_core->lcntr = 0; for (int i=0; i < 8; i++) { - m_dag1.i[i] = m_dag1.m[i] = m_dag1.b[i] = m_dag1.l[i] = 0; - m_dag2.i[i] = m_dag2.m[i] = m_dag2.b[i] = m_dag2.l[i] = 0; - m_dag1_alt.i[i] = m_dag1_alt.m[i] = m_dag1_alt.b[i] = m_dag1_alt.l[i] = 0; - m_dag2_alt.i[i] = m_dag2_alt.m[i] = m_dag2_alt.b[i] = m_dag2_alt.l[i] = 0; + m_core->dag1.i[i] = m_core->dag1.m[i] = m_core->dag1.b[i] = m_core->dag1.l[i] = 0; + m_core->dag2.i[i] = m_core->dag2.m[i] = m_core->dag2.b[i] = m_core->dag2.l[i] = 0; + m_core->dag1_alt.i[i] = m_core->dag1_alt.m[i] = m_core->dag1_alt.b[i] = m_core->dag1_alt.l[i] = 0; + m_core->dag2_alt.i[i] = m_core->dag2_alt.m[i] = m_core->dag2_alt.b[i] = m_core->dag2_alt.l[i] = 0; } - for (auto & elem : m_dma) + for (auto & elem : m_core->dma) { elem.control = 0; elem.int_index = 0; @@ -380,261 +498,265 @@ void adsp21062_device::device_start() elem.ext_modifier = 0; elem.ext_count = 0; } - m_mode1 = 0; - m_mode2 = 0; - m_astat = 0; - m_irptl = 0; - m_imask = 0; - m_imaskp = 0; - m_ustat1 = 0; - m_ustat2 = 0; - m_flag[0] = m_flag[1] = m_flag[2] = m_flag[3] = 0; - m_syscon = 0; - m_sysstat = 0; - for (auto & elem : m_status_stack) + m_core->mode1 = 0; + m_core->mode2 = 0; + m_core->astat = 0; + m_core->irptl = 0; + m_core->imask = 0; + m_core->imaskp = 0; + m_core->ustat1 = 0; + m_core->ustat2 = 0; + m_core->flag[0] = m_core->flag[1] = m_core->flag[2] = m_core->flag[3] = 0; + m_core->syscon = 0; + m_core->sysstat = 0; + for (auto & elem : m_core->status_stack) { elem.mode1 = 0; elem.astat = 0; } - m_status_stkp = 0; - m_px = 0; - m_opcode = 0; - m_irq_active = 0; - m_active_irq_num = 0; - m_dma_status = 0; - m_iop_delayed_reg = 0; - m_iop_delayed_data = 0; - m_delay_slot1 = 0; - m_delay_slot2 = 0; - m_systemreg_latency_cycles = 0; - m_systemreg_latency_reg = 0; - m_systemreg_latency_data = 0; - m_systemreg_previous_data = 0; - m_astat_old = 0; - m_astat_old_old = 0; - m_astat_old_old_old = 0; + m_core->status_stkp = 0; + m_core->px = 0; + m_core->opcode = 0; + m_core->irq_pending = 0; + m_core->active_irq_num = 0; + m_core->dma_status = 0; + m_core->iop_delayed_reg = 0; + m_core->iop_delayed_data = 0; + m_core->delay_slot1 = 0; + m_core->delay_slot2 = 0; + m_core->systemreg_latency_cycles = 0; + m_core->systemreg_latency_reg = 0; + m_core->systemreg_latency_data = 0; + m_core->systemreg_previous_data = 0; + m_core->astat_old = 0; + m_core->astat_old_old = 0; + m_core->astat_old_old_old = 0; - save_item(NAME(m_pc)); - save_pointer(NAME(&m_r[0].r), ARRAY_LENGTH(m_r)); - save_pointer(NAME(&m_reg_alt[0].r), ARRAY_LENGTH(m_reg_alt)); - save_item(NAME(m_mrf)); - save_item(NAME(m_mrb)); + m_core->fp0 = 0.0f; + m_core->fp1 = 1.0f; - save_item(NAME(m_pcstack)); - save_item(NAME(m_lcstack)); - save_item(NAME(m_lastack)); - save_item(NAME(m_lstkp)); + save_item(NAME(m_core->pc)); + save_pointer(NAME(&m_core->r[0].r), ARRAY_LENGTH(m_core->r)); + save_pointer(NAME(&m_core->reg_alt[0].r), ARRAY_LENGTH(m_core->reg_alt)); + save_item(NAME(m_core->mrf)); + save_item(NAME(m_core->mrb)); - save_item(NAME(m_faddr)); - save_item(NAME(m_daddr)); - save_item(NAME(m_pcstk)); - save_item(NAME(m_pcstkp)); - save_item(NAME(m_laddr.addr)); - save_item(NAME(m_laddr.code)); - save_item(NAME(m_laddr.loop_type)); - save_item(NAME(m_curlcntr)); - save_item(NAME(m_lcntr)); + save_item(NAME(m_core->pcstack)); + save_item(NAME(m_core->lcstack)); + save_item(NAME(m_core->lastack)); + save_item(NAME(m_core->lstkp)); - save_item(NAME(m_dag1.i)); - save_item(NAME(m_dag1.m)); - save_item(NAME(m_dag1.b)); - save_item(NAME(m_dag1.l)); - save_item(NAME(m_dag2.i)); - save_item(NAME(m_dag2.m)); - save_item(NAME(m_dag2.b)); - save_item(NAME(m_dag2.l)); - save_item(NAME(m_dag1_alt.i)); - save_item(NAME(m_dag1_alt.m)); - save_item(NAME(m_dag1_alt.b)); - save_item(NAME(m_dag1_alt.l)); - save_item(NAME(m_dag2_alt.i)); - save_item(NAME(m_dag2_alt.m)); - save_item(NAME(m_dag2_alt.b)); - save_item(NAME(m_dag2_alt.l)); + save_item(NAME(m_core->faddr)); + save_item(NAME(m_core->daddr)); + save_item(NAME(m_core->pcstk)); + save_item(NAME(m_core->pcstkp)); + save_item(NAME(m_core->laddr.addr)); + save_item(NAME(m_core->laddr.code)); + save_item(NAME(m_core->laddr.loop_type)); + save_item(NAME(m_core->curlcntr)); + save_item(NAME(m_core->lcntr)); - for (saveindex = 0; saveindex < ARRAY_LENGTH(m_dma); saveindex++) + save_item(NAME(m_core->dag1.i)); + save_item(NAME(m_core->dag1.m)); + save_item(NAME(m_core->dag1.b)); + save_item(NAME(m_core->dag1.l)); + save_item(NAME(m_core->dag2.i)); + save_item(NAME(m_core->dag2.m)); + save_item(NAME(m_core->dag2.b)); + save_item(NAME(m_core->dag2.l)); + save_item(NAME(m_core->dag1_alt.i)); + save_item(NAME(m_core->dag1_alt.m)); + save_item(NAME(m_core->dag1_alt.b)); + save_item(NAME(m_core->dag1_alt.l)); + save_item(NAME(m_core->dag2_alt.i)); + save_item(NAME(m_core->dag2_alt.m)); + save_item(NAME(m_core->dag2_alt.b)); + save_item(NAME(m_core->dag2_alt.l)); + + for (saveindex = 0; saveindex < ARRAY_LENGTH(m_core->dma); saveindex++) { - save_item(NAME(m_dma[saveindex].control), saveindex); - save_item(NAME(m_dma[saveindex].int_index), saveindex); - save_item(NAME(m_dma[saveindex].int_modifier), saveindex); - save_item(NAME(m_dma[saveindex].int_count), saveindex); - save_item(NAME(m_dma[saveindex].chain_ptr), saveindex); - save_item(NAME(m_dma[saveindex].gen_purpose), saveindex); - save_item(NAME(m_dma[saveindex].ext_index), saveindex); - save_item(NAME(m_dma[saveindex].ext_modifier), saveindex); - save_item(NAME(m_dma[saveindex].ext_count), saveindex); + save_item(NAME(m_core->dma[saveindex].control), saveindex); + save_item(NAME(m_core->dma[saveindex].int_index), saveindex); + save_item(NAME(m_core->dma[saveindex].int_modifier), saveindex); + save_item(NAME(m_core->dma[saveindex].int_count), saveindex); + save_item(NAME(m_core->dma[saveindex].chain_ptr), saveindex); + save_item(NAME(m_core->dma[saveindex].gen_purpose), saveindex); + save_item(NAME(m_core->dma[saveindex].ext_index), saveindex); + save_item(NAME(m_core->dma[saveindex].ext_modifier), saveindex); + save_item(NAME(m_core->dma[saveindex].ext_count), saveindex); } - save_item(NAME(m_mode1)); - save_item(NAME(m_mode2)); - save_item(NAME(m_astat)); - save_item(NAME(m_stky)); - save_item(NAME(m_irptl)); - save_item(NAME(m_imask)); - save_item(NAME(m_imaskp)); - save_item(NAME(m_ustat1)); - save_item(NAME(m_ustat2)); + save_item(NAME(m_core->mode1)); + save_item(NAME(m_core->mode2)); + save_item(NAME(m_core->astat)); + save_item(NAME(m_core->stky)); + save_item(NAME(m_core->irptl)); + save_item(NAME(m_core->imask)); + save_item(NAME(m_core->imaskp)); + save_item(NAME(m_core->ustat1)); + save_item(NAME(m_core->ustat2)); - save_item(NAME(m_flag)); + save_item(NAME(m_core->flag)); - save_item(NAME(m_syscon)); - save_item(NAME(m_sysstat)); + save_item(NAME(m_core->syscon)); + save_item(NAME(m_core->sysstat)); - for (saveindex = 0; saveindex < ARRAY_LENGTH(m_status_stack); saveindex++) + for (saveindex = 0; saveindex < ARRAY_LENGTH(m_core->status_stack); saveindex++) { - save_item(NAME(m_status_stack[saveindex].mode1), saveindex); - save_item(NAME(m_status_stack[saveindex].astat), saveindex); + save_item(NAME(m_core->status_stack[saveindex].mode1), saveindex); + save_item(NAME(m_core->status_stack[saveindex].astat), saveindex); } - save_item(NAME(m_status_stkp)); + save_item(NAME(m_core->status_stkp)); - save_item(NAME(m_px)); + save_item(NAME(m_core->px)); save_pointer(NAME(m_internal_ram), 2 * 0x10000); - save_item(NAME(m_opcode)); + save_item(NAME(m_core->opcode)); - save_item(NAME(m_nfaddr)); + save_item(NAME(m_core->nfaddr)); - save_item(NAME(m_idle)); - save_item(NAME(m_irq_active)); - save_item(NAME(m_active_irq_num)); + save_item(NAME(m_core->idle)); + save_item(NAME(m_core->irq_pending)); + save_item(NAME(m_core->active_irq_num)); - for (saveindex = 0; saveindex < ARRAY_LENGTH(m_dma_op); saveindex++) + for (saveindex = 0; saveindex < ARRAY_LENGTH(m_core->dma_op); saveindex++) { - save_item(NAME(m_dma_op[saveindex].src), saveindex); - save_item(NAME(m_dma_op[saveindex].dst), saveindex); - save_item(NAME(m_dma_op[saveindex].chain_ptr), saveindex); - save_item(NAME(m_dma_op[saveindex].src_modifier), saveindex); - save_item(NAME(m_dma_op[saveindex].dst_modifier), saveindex); - save_item(NAME(m_dma_op[saveindex].src_count), saveindex); - save_item(NAME(m_dma_op[saveindex].dst_count), saveindex); - save_item(NAME(m_dma_op[saveindex].pmode), saveindex); - save_item(NAME(m_dma_op[saveindex].chained_direction), saveindex); - save_item(NAME(m_dma_op[saveindex].active), saveindex); + save_item(NAME(m_core->dma_op[saveindex].src), saveindex); + save_item(NAME(m_core->dma_op[saveindex].dst), saveindex); + save_item(NAME(m_core->dma_op[saveindex].chain_ptr), saveindex); + save_item(NAME(m_core->dma_op[saveindex].src_modifier), saveindex); + save_item(NAME(m_core->dma_op[saveindex].dst_modifier), saveindex); + save_item(NAME(m_core->dma_op[saveindex].src_count), saveindex); + save_item(NAME(m_core->dma_op[saveindex].dst_count), saveindex); + save_item(NAME(m_core->dma_op[saveindex].pmode), saveindex); + save_item(NAME(m_core->dma_op[saveindex].chained_direction), saveindex); + save_item(NAME(m_core->dma_op[saveindex].active), saveindex); } - save_item(NAME(m_dma_status)); + save_item(NAME(m_core->dma_status)); - save_item(NAME(m_interrupt_active)); + save_item(NAME(m_core->interrupt_active)); - save_item(NAME(m_iop_delayed_reg)); - save_item(NAME(m_iop_delayed_data)); + save_item(NAME(m_core->iop_delayed_reg)); + save_item(NAME(m_core->iop_delayed_data)); - save_item(NAME(m_delay_slot1)); - save_item(NAME(m_delay_slot2)); + save_item(NAME(m_core->delay_slot1)); + save_item(NAME(m_core->delay_slot2)); - save_item(NAME(m_systemreg_latency_cycles)); - save_item(NAME(m_systemreg_latency_reg)); - save_item(NAME(m_systemreg_latency_data)); - save_item(NAME(m_systemreg_previous_data)); + save_item(NAME(m_core->systemreg_latency_cycles)); + save_item(NAME(m_core->systemreg_latency_reg)); + save_item(NAME(m_core->systemreg_latency_data)); + save_item(NAME(m_core->systemreg_previous_data)); - save_item(NAME(m_astat_old)); - save_item(NAME(m_astat_old_old)); - save_item(NAME(m_astat_old_old_old)); + save_item(NAME(m_core->astat_old)); + save_item(NAME(m_core->astat_old_old)); + save_item(NAME(m_core->astat_old_old_old)); - state_add( SHARC_PC, "PC", m_pc).formatstr("%08X"); - state_add( SHARC_PCSTK, "PCSTK", m_pcstk).formatstr("%08X"); - state_add( SHARC_PCSTKP, "PCSTKP", m_pcstkp).formatstr("%08X"); - state_add( SHARC_LSTKP, "LSTKP", m_lstkp).formatstr("%08X"); - state_add( SHARC_FADDR, "FADDR", m_faddr).formatstr("%08X"); - state_add( SHARC_DADDR, "DADDR", m_daddr).formatstr("%08X"); - state_add( SHARC_MODE1, "MODE1", m_mode1).formatstr("%08X"); - state_add( SHARC_MODE2, "MODE2", m_mode2).formatstr("%08X"); - state_add( SHARC_ASTAT, "ASTAT", m_astat).formatstr("%08X"); - state_add( SHARC_IRPTL, "IRPTL", m_irptl).formatstr("%08X"); - state_add( SHARC_IMASK, "IMASK", m_imask).formatstr("%08X"); - state_add( SHARC_USTAT1, "USTAT1", m_ustat1).formatstr("%08X"); - state_add( SHARC_USTAT2, "USTAT2", m_ustat2).formatstr("%08X"); - state_add( SHARC_STSTKP, "STSTKP", m_status_stkp).formatstr("%08X"); + state_add( SHARC_PC, "PC", m_core->pc).formatstr("%08X"); + state_add( SHARC_PCSTK, "PCSTK", m_core->pcstk).formatstr("%08X"); + state_add( SHARC_PCSTKP, "PCSTKP", m_core->pcstkp).formatstr("%08X"); + state_add( SHARC_LSTKP, "LSTKP", m_core->lstkp).formatstr("%08X"); + state_add( SHARC_FADDR, "FADDR", m_core->faddr).formatstr("%08X"); + state_add( SHARC_DADDR, "DADDR", m_core->daddr).formatstr("%08X"); + state_add( SHARC_MODE1, "MODE1", m_core->mode1).formatstr("%08X"); + state_add( SHARC_MODE2, "MODE2", m_core->mode2).formatstr("%08X"); + state_add( SHARC_ASTAT, "ASTAT", m_core->astat).formatstr("%08X"); + state_add( SHARC_IRPTL, "IRPTL", m_core->irptl).formatstr("%08X"); + state_add( SHARC_IMASK, "IMASK", m_core->imask).formatstr("%08X"); + state_add( SHARC_USTAT1, "USTAT1", m_core->ustat1).formatstr("%08X"); + state_add( SHARC_USTAT2, "USTAT2", m_core->ustat2).formatstr("%08X"); + state_add( SHARC_CURLCNTR, "CURLCNTR", m_core->curlcntr).formatstr("%08X"); + state_add( SHARC_STSTKP, "STSTKP", m_core->status_stkp).formatstr("%08X"); - state_add( SHARC_R0, "R0", m_r[0].r).formatstr("%08X"); - state_add( SHARC_R1, "R1", m_r[1].r).formatstr("%08X"); - state_add( SHARC_R2, "R2", m_r[2].r).formatstr("%08X"); - state_add( SHARC_R3, "R3", m_r[3].r).formatstr("%08X"); - state_add( SHARC_R4, "R4", m_r[4].r).formatstr("%08X"); - state_add( SHARC_R5, "R5", m_r[5].r).formatstr("%08X"); - state_add( SHARC_R6, "R6", m_r[6].r).formatstr("%08X"); - state_add( SHARC_R7, "R7", m_r[7].r).formatstr("%08X"); - state_add( SHARC_R8, "R8", m_r[8].r).formatstr("%08X"); - state_add( SHARC_R9, "R9", m_r[9].r).formatstr("%08X"); - state_add( SHARC_R10, "R10", m_r[10].r).formatstr("%08X"); - state_add( SHARC_R11, "R11", m_r[11].r).formatstr("%08X"); - state_add( SHARC_R12, "R12", m_r[12].r).formatstr("%08X"); - state_add( SHARC_R13, "R13", m_r[13].r).formatstr("%08X"); - state_add( SHARC_R14, "R14", m_r[14].r).formatstr("%08X"); - state_add( SHARC_R15, "R15", m_r[15].r).formatstr("%08X"); + state_add( SHARC_R0, "R0", m_core->r[0].r).formatstr("%08X"); + state_add( SHARC_R1, "R1", m_core->r[1].r).formatstr("%08X"); + state_add( SHARC_R2, "R2", m_core->r[2].r).formatstr("%08X"); + state_add( SHARC_R3, "R3", m_core->r[3].r).formatstr("%08X"); + state_add( SHARC_R4, "R4", m_core->r[4].r).formatstr("%08X"); + state_add( SHARC_R5, "R5", m_core->r[5].r).formatstr("%08X"); + state_add( SHARC_R6, "R6", m_core->r[6].r).formatstr("%08X"); + state_add( SHARC_R7, "R7", m_core->r[7].r).formatstr("%08X"); + state_add( SHARC_R8, "R8", m_core->r[8].r).formatstr("%08X"); + state_add( SHARC_R9, "R9", m_core->r[9].r).formatstr("%08X"); + state_add( SHARC_R10, "R10", m_core->r[10].r).formatstr("%08X"); + state_add( SHARC_R11, "R11", m_core->r[11].r).formatstr("%08X"); + state_add( SHARC_R12, "R12", m_core->r[12].r).formatstr("%08X"); + state_add( SHARC_R13, "R13", m_core->r[13].r).formatstr("%08X"); + state_add( SHARC_R14, "R14", m_core->r[14].r).formatstr("%08X"); + state_add( SHARC_R15, "R15", m_core->r[15].r).formatstr("%08X"); - state_add( SHARC_I0, "I0", m_dag1.i[0]).formatstr("%08X"); - state_add( SHARC_I1, "I1", m_dag1.i[1]).formatstr("%08X"); - state_add( SHARC_I2, "I2", m_dag1.i[2]).formatstr("%08X"); - state_add( SHARC_I3, "I3", m_dag1.i[3]).formatstr("%08X"); - state_add( SHARC_I4, "I4", m_dag1.i[4]).formatstr("%08X"); - state_add( SHARC_I5, "I5", m_dag1.i[5]).formatstr("%08X"); - state_add( SHARC_I6, "I6", m_dag1.i[6]).formatstr("%08X"); - state_add( SHARC_I7, "I7", m_dag1.i[7]).formatstr("%08X"); - state_add( SHARC_I8, "I8", m_dag2.i[0]).formatstr("%08X"); - state_add( SHARC_I9, "I9", m_dag2.i[1]).formatstr("%08X"); - state_add( SHARC_I10, "I10", m_dag2.i[2]).formatstr("%08X"); - state_add( SHARC_I11, "I11", m_dag2.i[3]).formatstr("%08X"); - state_add( SHARC_I12, "I12", m_dag2.i[4]).formatstr("%08X"); - state_add( SHARC_I13, "I13", m_dag2.i[5]).formatstr("%08X"); - state_add( SHARC_I14, "I14", m_dag2.i[6]).formatstr("%08X"); - state_add( SHARC_I15, "I15", m_dag2.i[7]).formatstr("%08X"); + state_add( SHARC_I0, "I0", m_core->dag1.i[0]).formatstr("%08X"); + state_add( SHARC_I1, "I1", m_core->dag1.i[1]).formatstr("%08X"); + state_add( SHARC_I2, "I2", m_core->dag1.i[2]).formatstr("%08X"); + state_add( SHARC_I3, "I3", m_core->dag1.i[3]).formatstr("%08X"); + state_add( SHARC_I4, "I4", m_core->dag1.i[4]).formatstr("%08X"); + state_add( SHARC_I5, "I5", m_core->dag1.i[5]).formatstr("%08X"); + state_add( SHARC_I6, "I6", m_core->dag1.i[6]).formatstr("%08X"); + state_add( SHARC_I7, "I7", m_core->dag1.i[7]).formatstr("%08X"); + state_add( SHARC_I8, "I8", m_core->dag2.i[0]).formatstr("%08X"); + state_add( SHARC_I9, "I9", m_core->dag2.i[1]).formatstr("%08X"); + state_add( SHARC_I10, "I10", m_core->dag2.i[2]).formatstr("%08X"); + state_add( SHARC_I11, "I11", m_core->dag2.i[3]).formatstr("%08X"); + state_add( SHARC_I12, "I12", m_core->dag2.i[4]).formatstr("%08X"); + state_add( SHARC_I13, "I13", m_core->dag2.i[5]).formatstr("%08X"); + state_add( SHARC_I14, "I14", m_core->dag2.i[6]).formatstr("%08X"); + state_add( SHARC_I15, "I15", m_core->dag2.i[7]).formatstr("%08X"); - state_add( SHARC_M0, "M0", m_dag1.m[0]).formatstr("%08X"); - state_add( SHARC_M1, "M1", m_dag1.m[1]).formatstr("%08X"); - state_add( SHARC_M2, "M2", m_dag1.m[2]).formatstr("%08X"); - state_add( SHARC_M3, "M3", m_dag1.m[3]).formatstr("%08X"); - state_add( SHARC_M4, "M4", m_dag1.m[4]).formatstr("%08X"); - state_add( SHARC_M5, "M5", m_dag1.m[5]).formatstr("%08X"); - state_add( SHARC_M6, "M6", m_dag1.m[6]).formatstr("%08X"); - state_add( SHARC_M7, "M7", m_dag1.m[7]).formatstr("%08X"); - state_add( SHARC_M8, "M8", m_dag2.m[0]).formatstr("%08X"); - state_add( SHARC_M9, "M9", m_dag2.m[1]).formatstr("%08X"); - state_add( SHARC_M10, "M10", m_dag2.m[2]).formatstr("%08X"); - state_add( SHARC_M11, "M11", m_dag2.m[3]).formatstr("%08X"); - state_add( SHARC_M12, "M12", m_dag2.m[4]).formatstr("%08X"); - state_add( SHARC_M13, "M13", m_dag2.m[5]).formatstr("%08X"); - state_add( SHARC_M14, "M14", m_dag2.m[6]).formatstr("%08X"); - state_add( SHARC_M15, "M15", m_dag2.m[7]).formatstr("%08X"); + state_add( SHARC_M0, "M0", m_core->dag1.m[0]).formatstr("%08X"); + state_add( SHARC_M1, "M1", m_core->dag1.m[1]).formatstr("%08X"); + state_add( SHARC_M2, "M2", m_core->dag1.m[2]).formatstr("%08X"); + state_add( SHARC_M3, "M3", m_core->dag1.m[3]).formatstr("%08X"); + state_add( SHARC_M4, "M4", m_core->dag1.m[4]).formatstr("%08X"); + state_add( SHARC_M5, "M5", m_core->dag1.m[5]).formatstr("%08X"); + state_add( SHARC_M6, "M6", m_core->dag1.m[6]).formatstr("%08X"); + state_add( SHARC_M7, "M7", m_core->dag1.m[7]).formatstr("%08X"); + state_add( SHARC_M8, "M8", m_core->dag2.m[0]).formatstr("%08X"); + state_add( SHARC_M9, "M9", m_core->dag2.m[1]).formatstr("%08X"); + state_add( SHARC_M10, "M10", m_core->dag2.m[2]).formatstr("%08X"); + state_add( SHARC_M11, "M11", m_core->dag2.m[3]).formatstr("%08X"); + state_add( SHARC_M12, "M12", m_core->dag2.m[4]).formatstr("%08X"); + state_add( SHARC_M13, "M13", m_core->dag2.m[5]).formatstr("%08X"); + state_add( SHARC_M14, "M14", m_core->dag2.m[6]).formatstr("%08X"); + state_add( SHARC_M15, "M15", m_core->dag2.m[7]).formatstr("%08X"); - state_add( SHARC_L0, "L0", m_dag1.l[0]).formatstr("%08X"); - state_add( SHARC_L1, "L1", m_dag1.l[1]).formatstr("%08X"); - state_add( SHARC_L2, "L2", m_dag1.l[2]).formatstr("%08X"); - state_add( SHARC_L3, "L3", m_dag1.l[3]).formatstr("%08X"); - state_add( SHARC_L4, "L4", m_dag1.l[4]).formatstr("%08X"); - state_add( SHARC_L5, "L5", m_dag1.l[5]).formatstr("%08X"); - state_add( SHARC_L6, "L6", m_dag1.l[6]).formatstr("%08X"); - state_add( SHARC_L7, "L7", m_dag1.l[7]).formatstr("%08X"); - state_add( SHARC_L8, "L8", m_dag2.l[0]).formatstr("%08X"); - state_add( SHARC_L9, "L9", m_dag2.l[1]).formatstr("%08X"); - state_add( SHARC_L10, "L10", m_dag2.l[2]).formatstr("%08X"); - state_add( SHARC_L11, "L11", m_dag2.l[3]).formatstr("%08X"); - state_add( SHARC_L12, "L12", m_dag2.l[4]).formatstr("%08X"); - state_add( SHARC_L13, "L13", m_dag2.l[5]).formatstr("%08X"); - state_add( SHARC_L14, "L14", m_dag2.l[6]).formatstr("%08X"); - state_add( SHARC_L15, "L15", m_dag2.l[7]).formatstr("%08X"); + state_add( SHARC_L0, "L0", m_core->dag1.l[0]).formatstr("%08X"); + state_add( SHARC_L1, "L1", m_core->dag1.l[1]).formatstr("%08X"); + state_add( SHARC_L2, "L2", m_core->dag1.l[2]).formatstr("%08X"); + state_add( SHARC_L3, "L3", m_core->dag1.l[3]).formatstr("%08X"); + state_add( SHARC_L4, "L4", m_core->dag1.l[4]).formatstr("%08X"); + state_add( SHARC_L5, "L5", m_core->dag1.l[5]).formatstr("%08X"); + state_add( SHARC_L6, "L6", m_core->dag1.l[6]).formatstr("%08X"); + state_add( SHARC_L7, "L7", m_core->dag1.l[7]).formatstr("%08X"); + state_add( SHARC_L8, "L8", m_core->dag2.l[0]).formatstr("%08X"); + state_add( SHARC_L9, "L9", m_core->dag2.l[1]).formatstr("%08X"); + state_add( SHARC_L10, "L10", m_core->dag2.l[2]).formatstr("%08X"); + state_add( SHARC_L11, "L11", m_core->dag2.l[3]).formatstr("%08X"); + state_add( SHARC_L12, "L12", m_core->dag2.l[4]).formatstr("%08X"); + state_add( SHARC_L13, "L13", m_core->dag2.l[5]).formatstr("%08X"); + state_add( SHARC_L14, "L14", m_core->dag2.l[6]).formatstr("%08X"); + state_add( SHARC_L15, "L15", m_core->dag2.l[7]).formatstr("%08X"); - state_add( SHARC_B0, "B0", m_dag1.b[0]).formatstr("%08X"); - state_add( SHARC_B1, "B1", m_dag1.b[1]).formatstr("%08X"); - state_add( SHARC_B2, "B2", m_dag1.b[2]).formatstr("%08X"); - state_add( SHARC_B3, "B3", m_dag1.b[3]).formatstr("%08X"); - state_add( SHARC_B4, "B4", m_dag1.b[4]).formatstr("%08X"); - state_add( SHARC_B5, "B5", m_dag1.b[5]).formatstr("%08X"); - state_add( SHARC_B6, "B6", m_dag1.b[6]).formatstr("%08X"); - state_add( SHARC_B7, "B7", m_dag1.b[7]).formatstr("%08X"); - state_add( SHARC_B8, "B8", m_dag2.b[0]).formatstr("%08X"); - state_add( SHARC_B9, "B9", m_dag2.b[1]).formatstr("%08X"); - state_add( SHARC_B10, "B10", m_dag2.b[2]).formatstr("%08X"); - state_add( SHARC_B11, "B11", m_dag2.b[3]).formatstr("%08X"); - state_add( SHARC_B12, "B12", m_dag2.b[4]).formatstr("%08X"); - state_add( SHARC_B13, "B13", m_dag2.b[5]).formatstr("%08X"); - state_add( SHARC_B14, "B14", m_dag2.b[6]).formatstr("%08X"); - state_add( SHARC_B15, "B15", m_dag2.b[7]).formatstr("%08X"); + state_add( SHARC_B0, "B0", m_core->dag1.b[0]).formatstr("%08X"); + state_add( SHARC_B1, "B1", m_core->dag1.b[1]).formatstr("%08X"); + state_add( SHARC_B2, "B2", m_core->dag1.b[2]).formatstr("%08X"); + state_add( SHARC_B3, "B3", m_core->dag1.b[3]).formatstr("%08X"); + state_add( SHARC_B4, "B4", m_core->dag1.b[4]).formatstr("%08X"); + state_add( SHARC_B5, "B5", m_core->dag1.b[5]).formatstr("%08X"); + state_add( SHARC_B6, "B6", m_core->dag1.b[6]).formatstr("%08X"); + state_add( SHARC_B7, "B7", m_core->dag1.b[7]).formatstr("%08X"); + state_add( SHARC_B8, "B8", m_core->dag2.b[0]).formatstr("%08X"); + state_add( SHARC_B9, "B9", m_core->dag2.b[1]).formatstr("%08X"); + state_add( SHARC_B10, "B10", m_core->dag2.b[2]).formatstr("%08X"); + state_add( SHARC_B11, "B11", m_core->dag2.b[3]).formatstr("%08X"); + state_add( SHARC_B12, "B12", m_core->dag2.b[4]).formatstr("%08X"); + state_add( SHARC_B13, "B13", m_core->dag2.b[5]).formatstr("%08X"); + state_add( SHARC_B14, "B14", m_core->dag2.b[6]).formatstr("%08X"); + state_add( SHARC_B15, "B15", m_core->dag2.b[7]).formatstr("%08X"); - state_add( STATE_GENPC, "GENPC", m_pc).noshow(); + state_add( STATE_GENPC, "GENPC", m_core->pc).noshow(); - m_icountptr = &m_icount; + m_icountptr = &m_core->icount; } void adsp21062_device::device_reset() @@ -645,27 +767,27 @@ void adsp21062_device::device_reset() { case BOOT_MODE_EPROM: { - m_dma[6].int_index = 0x20000; - m_dma[6].int_modifier = 1; - m_dma[6].int_count = 0x100; - m_dma[6].ext_index = 0x400000; - m_dma[6].ext_modifier = 1; - m_dma[6].ext_count = 0x600; - m_dma[6].control = 0x2a1; + m_core->dma[6].int_index = 0x20000; + m_core->dma[6].int_modifier = 1; + m_core->dma[6].int_count = 0x100; + m_core->dma[6].ext_index = 0x400000; + m_core->dma[6].ext_modifier = 1; + m_core->dma[6].ext_count = 0x600; + m_core->dma[6].control = 0x2a1; sharc_dma_exec(6); dma_op(6); - m_dma_op[6].timer->adjust(attotime::never, 0); + m_core->dma_op[6].timer->adjust(attotime::never, 0); break; } case BOOT_MODE_HOST: { - m_dma[6].int_index = 0x20000; - m_dma[6].int_modifier = 1; - m_dma[6].int_count = 0x100; - m_dma[6].control = 0xa1; + m_core->dma[6].int_index = 0x20000; + m_core->dma[6].int_modifier = 1; + m_core->dma[6].int_count = 0x100; + m_core->dma[6].control = 0xa1; break; } @@ -673,18 +795,18 @@ void adsp21062_device::device_reset() fatalerror("SHARC: Unimplemented boot mode %d\n", m_boot_mode); } - m_pc = 0x20004; - m_extdma_shift = 0; - m_daddr = m_pc + 1; - m_faddr = m_daddr + 1; - m_nfaddr = m_faddr+1; + m_core->pc = 0x20004; + m_core->extdma_shift = 0; + m_core->daddr = m_core->pc + 1; + m_core->faddr = m_core->daddr + 1; + m_core->nfaddr = m_core->faddr+1; - m_idle = 0; - m_stky = 0x5400000; + m_core->idle = 0; + m_core->stky = 0x5400000; - m_lstkp = 0; - m_pcstkp = 0; - m_interrupt_active = 0; + m_core->lstkp = 0; + m_core->pcstkp = 0; + m_core->interrupt_active = 0; } @@ -694,11 +816,11 @@ void adsp21062_device::execute_set_input(int irqline, int state) { if (state == ASSERT_LINE) { - m_irq_active |= 1 << (8-irqline); + m_core->irq_pending |= 1 << (8-irqline); } else { - m_irq_active &= ~(1 << (8-irqline)); + m_core->irq_pending &= ~(1 << (8-irqline)); } } else if (irqline >= SHARC_INPUT_FLAG0 && irqline <= SHARC_INPUT_FLAG3) @@ -712,9 +834,9 @@ void adsp21062_device::set_flag_input(int flag_num, int state) if (flag_num >= 0 && flag_num < 4) { // Check if flag is set to input in MODE2 (bit == 0) - if ((m_mode2 & (1 << (flag_num+15))) == 0) + if ((m_core->mode2 & (1 << (flag_num+15))) == 0) { - m_flag[flag_num] = state ? 1 : 0; + m_core->flag[flag_num] = state ? 1 : 0; } else { @@ -726,29 +848,29 @@ void adsp21062_device::set_flag_input(int flag_num, int state) void adsp21062_device::check_interrupts() { int i; - if ((m_imask & m_irq_active) && (m_mode1 & MODE1_IRPTEN) && !m_interrupt_active && - m_pc != m_delay_slot1 && m_pc != m_delay_slot2) + if ((m_core->imask & m_core->irq_pending) && (m_core->mode1 & MODE1_IRPTEN) && !m_core->interrupt_active && + m_core->pc != m_core->delay_slot1 && m_core->pc != m_core->delay_slot2) { int which = 0; for (i=0; i < 32; i++) { - if (m_irq_active & (1 << i)) + if (m_core->irq_pending & (1 << i)) { break; } which++; } - if (m_idle) + if (m_core->idle) { - PUSH_PC(m_pc+1); + PUSH_PC(m_core->pc+1); } else { - PUSH_PC(m_daddr); + PUSH_PC(m_core->daddr); } - m_irptl |= 1 << which; + m_core->irptl |= 1 << which; if (which >= 6 && which <= 8) { @@ -759,55 +881,63 @@ void adsp21062_device::check_interrupts() /* TODO: alter IMASKP */ - m_active_irq_num = which; - m_irq_active &= ~(1 << which); + m_core->active_irq_num = which; + m_core->irq_pending &= ~(1 << which); - m_interrupt_active = 1; + m_core->interrupt_active = 1; } } void adsp21062_device::execute_run() { - if (m_idle && m_irq_active == 0) +#if ENABLE_DRC + if (m_core->irq_pending != 0) { - m_icount = 0; - debugger_instruction_hook(this, m_daddr); + m_core->idle = 0; } - if (m_irq_active != 0) + execute_run_drc(); + return; +#else + if (m_core->idle && m_core->irq_pending == 0) + { + m_core->icount = 0; + debugger_instruction_hook(this, m_core->daddr); + } + if (m_core->irq_pending != 0) { check_interrupts(); - m_idle = 0; + m_core->idle = 0; } - while (m_icount > 0 && !m_idle) + while (m_core->icount > 0 && !m_core->idle) { - m_pc = m_daddr; - m_daddr = m_faddr; - m_faddr = m_nfaddr; - m_nfaddr++; + m_core->pc = m_core->daddr; + m_core->daddr = m_core->faddr; + m_core->faddr = m_core->nfaddr; + m_core->nfaddr++; - m_astat_old_old_old = m_astat_old_old; - m_astat_old_old = m_astat_old; - m_astat_old = m_astat; + m_core->astat_old_old_old = m_core->astat_old_old; + m_core->astat_old_old = m_core->astat_old; + m_core->astat_old = m_core->astat; - m_opcode = ROPCODE(m_pc); + debugger_instruction_hook(this, m_core->pc); - debugger_instruction_hook(this, m_pc); + m_core->opcode = ROPCODE(m_core->pc); // handle looping - if (m_pc == m_laddr.addr) + if (m_core->pc == m_core->laddr.addr) { - switch (m_laddr.loop_type) + switch (m_core->laddr.loop_type) { case 0: // arithmetic condition-based { - int condition = m_laddr.code; + int condition = m_core->laddr.code; { UINT32 looptop = TOP_PC(); - if (m_pc - looptop > 2) + if (m_core->pc - looptop > 2) { - m_astat = m_astat_old_old_old; + m_core->astat = m_core->astat_old_old_old; } } @@ -821,7 +951,7 @@ void adsp21062_device::execute_run() CHANGE_PC(TOP_PC()); } - m_astat = m_astat_old; + m_core->astat = m_core->astat_old; break; } case 1: // counter-based, length 1 @@ -836,9 +966,9 @@ void adsp21062_device::execute_run() } case 3: // counter-based, length >2 { - --m_lcstack[m_lstkp]; - --m_curlcntr; - if (m_curlcntr == 0) + --m_core->lcstack[m_core->lstkp]; + --m_core->curlcntr; + if (m_core->curlcntr == 0) { POP_LOOP(); POP_PC(); @@ -851,23 +981,24 @@ void adsp21062_device::execute_run() } } - (this->*m_sharc_op[(m_opcode >> 39) & 0x1ff])(); + (this->*m_sharc_op[(m_core->opcode >> 39) & 0x1ff])(); // System register latency effect - if (m_systemreg_latency_cycles > 0) + if (m_core->systemreg_latency_cycles > 0) { - --m_systemreg_latency_cycles; - if (m_systemreg_latency_cycles <= 0) + --m_core->systemreg_latency_cycles; + if (m_core->systemreg_latency_cycles <= 0) { systemreg_write_latency_effect(); } } - --m_icount; + --m_core->icount; }; +#endif } bool adsp21062_device::memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value) diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index c658b3a9800..671076a87f7 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -5,6 +5,8 @@ #ifndef __SHARC_H__ #define __SHARC_H__ +#include "cpu/drcfe.h" +#include "cpu/drcuml.h" #define SHARC_INPUT_FLAG0 3 #define SHARC_INPUT_FLAG1 4 @@ -21,7 +23,7 @@ enum SHARC_BOOT_MODE }; -struct SHARC_DAG +struct alignas(16) SHARC_DAG { UINT32 i[8]; UINT32 m[8]; @@ -71,12 +73,73 @@ struct SHARC_DMA_OP }; +// STKY flags +#define AUS 0x1 /* ALU floating-point underflow */ +#define AVS 0x2 /* ALU floating-point overflow */ +#define AOS 0x4 /* ALU fixed-point overflow */ +#define AIS 0x20 /* ALU floating-point invalid operation */ + +// MODE1 flags +#define MODE1_BR8 0x1 /* Bit-reverse for I8 */ +#define MODE1_BR0 0x2 /* Bit-reverse for I0 */ +#define MODE1_SRCU 0x4 /* Alternate register select for computational units */ +#define MODE1_SRD1H 0x8 /* DAG alternate register select (7-4) */ +#define MODE1_SRD1L 0x10 /* DAG alternate register select (3-0) */ +#define MODE1_SRD2H 0x20 /* DAG alternate register select (15-12) */ +#define MODE1_SRD2L 0x40 /* DAG alternate register select (11-8) */ +#define MODE1_SRRFH 0x80 /* Register file alternate select for R(15-8) */ +#define MODE1_SRRFL 0x400 /* Register file alternate select for R(7-0) */ +#define MODE1_NESTM 0x800 /* Interrupt nesting enable */ +#define MODE1_IRPTEN 0x1000 /* Global interrupt enable */ +#define MODE1_ALUSAT 0x2000 /* Enable ALU fixed-point saturation */ +#define MODE1_SSE 0x4000 /* Enable short word sign extension */ +#define MODE1_TRUNCATE 0x8000 /* (1) Floating-point truncation / (0) round to nearest */ +#define MODE1_RND32 0x10000 /* (1) 32-bit floating-point rounding / (0) 40-bit rounding */ +#define MODE1_CSEL 0x60000 /* CSelect */ + +// MODE2 flags +#define MODE2_IRQ0E 0x1 /* IRQ0 (1) Edge sens. / (0) Level sens. */ +#define MODE2_IRQ1E 0x2 /* IRQ1 (1) Edge sens. / (0) Level sens. */ +#define MODE2_IRQ2E 0x4 /* IRQ2 (1) Edge sens. / (0) Level sens. */ +#define MODE2_CADIS 0x10 /* Cache disable */ +#define MODE2_TIMEN 0x20 /* Timer enable */ +#define MODE2_BUSLK 0x40 /* External bus lock */ +#define MODE2_FLG0O 0x8000 /* FLAG0 (1) Output / (0) Input */ +#define MODE2_FLG1O 0x10000 /* FLAG1 (1) Output / (0) Input */ +#define MODE2_FLG2O 0x20000 /* FLAG2 (1) Output / (0) Input */ +#define MODE2_FLG3O 0x40000 /* FLAG3 (1) Output / (0) Input */ +#define MODE2_CAFRZ 0x80000 /* Cache freeze */ + + +#define SIGN_EXTEND6(x) (((x) & 0x20) ? (0xffffffc0 | (x)) : (x)) +#define SIGN_EXTEND24(x) (((x) & 0x800000) ? (0xff000000 | (x)) : (x)) +#define MAKE_EXTRACT_MASK(start_bit, length) ((0xffffffff << start_bit) & (((UINT32)0xffffffff) >> (32 - (start_bit + length)))) + +#define OP_USERFLAG_COUNTER_LOOP 0x00000001 +#define OP_USERFLAG_COND_LOOP 0x00000002 +#define OP_USERFLAG_COND_FIELD 0x0000003c +#define OP_USERFLAG_COND_FIELD_SHIFT 2 +#define OP_USERFLAG_ASTAT_DELAY_COPY_AZ 0x00001000 +#define OP_USERFLAG_ASTAT_DELAY_COPY_AN 0x00002000 +#define OP_USERFLAG_ASTAT_DELAY_COPY_AC 0x00004000 +#define OP_USERFLAG_ASTAT_DELAY_COPY_AV 0x00008000 +#define OP_USERFLAG_ASTAT_DELAY_COPY_MV 0x00010000 +#define OP_USERFLAG_ASTAT_DELAY_COPY_MN 0x00020000 +#define OP_USERFLAG_ASTAT_DELAY_COPY_SV 0x00040000 +#define OP_USERFLAG_ASTAT_DELAY_COPY_SZ 0x00080000 +#define OP_USERFLAG_ASTAT_DELAY_COPY_BTF 0x00100000 +#define OP_USERFLAG_ASTAT_DELAY_COPY 0x001ff000 + + #define MCFG_SHARC_BOOT_MODE(boot_mode) \ adsp21062_device::set_boot_mode(*device, boot_mode); +class sharc_frontend; class adsp21062_device : public cpu_device { + friend class sharc_frontend; + public: // construction/destruction adsp21062_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock); @@ -91,6 +154,92 @@ public: TIMER_CALLBACK_MEMBER(sharc_iop_delayed_write_callback); TIMER_CALLBACK_MEMBER(sharc_dma_callback); + void sharc_cfunc_unimplemented(); + void sharc_cfunc_read_iop(); + void sharc_cfunc_write_iop(); + void sharc_cfunc_pcstack_overflow(); + void sharc_cfunc_pcstack_underflow(); + void sharc_cfunc_loopstack_overflow(); + void sharc_cfunc_loopstack_underflow(); + void sharc_cfunc_statusstack_overflow(); + void sharc_cfunc_statusstack_underflow(); + + void sharc_cfunc_unimplemented_compute(); + void sharc_cfunc_unimplemented_shiftimm(); + void sharc_cfunc_write_snoop(); + + enum ASTAT_FLAGS + { + // ASTAT flags + AZ = 0x1, /* ALU result zero */ + AV = 0x2, /* ALU overflow */ + AN = 0x4, /* ALU result negative */ + AC = 0x8, /* ALU fixed-point carry */ + AS = 0x10, /* ALU X input sign */ + AI = 0x20, /* ALU floating-point invalid operation */ + MN = 0x40, /* Multiplier result negative */ + MV = 0x80, /* Multiplier overflow */ + MU = 0x100, /* Multiplier underflow */ + MI = 0x200, /* Multiplier floating-point invalid operation */ + AF = 0x400, + SV = 0x800, /* Shifter overflow */ + SZ = 0x1000, /* Shifter result zero */ + SS = 0x2000, /* Shifter input sign */ + BTF = 0x40000, /* Bit Test Flag */ + FLG0 = 0x80000, /* FLAG0 */ + FLG1 = 0x100000, /* FLAG1 */ + FLG2 = 0x200000, /* FLAG2 */ + FLG3 = 0x400000 /* FLAG3 */ + }; + + enum ASTAT_SHIFT + { + AZ_SHIFT = 0, + AV_SHIFT = 1, + AN_SHIFT = 2, + AC_SHIFT = 3, + AS_SHIFT = 4, + AI_SHIFT = 5, + MN_SHIFT = 6, + MV_SHIFT = 7, + MU_SHIFT = 8, + MI_SHIFT = 9, + AF_SHIFT = 10, + SV_SHIFT = 11, + SZ_SHIFT = 12, + SS_SHIFT = 13, + BTF_SHIFT = 18, + FLG0_SHIFT = 19, + FLG1_SHIFT = 20, + FLG2_SHIFT = 21, + FLG3_SHIFT = 22 + }; + + enum MODE1_DELAY_MODE + { + MODE1_WRITE_IMM, + MODE1_WRITE_REG, + MODE1_SET, + MODE1_CLEAR, + MODE1_TOGGLE, + }; + + enum MEM_ACCESSOR_TYPE + { + MEM_ACCESSOR_PM_READ48, + MEM_ACCESSOR_PM_WRITE48, + MEM_ACCESSOR_PM_READ32, + MEM_ACCESSOR_PM_WRITE32, + MEM_ACCESSOR_DM_READ32, + MEM_ACCESSOR_DM_WRITE32 + }; + + enum + { + EXCEPTION_INTERRUPT = 0, + EXCEPTION_COUNT + }; + protected: // device-level overrides virtual void device_start() override; @@ -109,10 +258,12 @@ protected: virtual bool memory_readop(offs_t offset, int size, UINT64 &value) override; // device_disasm_interface overrides - virtual UINT32 disasm_min_opcode_bytes() const override { return 1; } - virtual UINT32 disasm_max_opcode_bytes() const override { return 40; } + virtual UINT32 disasm_min_opcode_bytes() const override { return 6; } + virtual UINT32 disasm_max_opcode_bytes() const override { return 6; } virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override; + direct_read_data *m_direct; + private: address_space_config m_program_config; address_space_config m_data_config; @@ -126,94 +277,178 @@ private: }; static const SHARC_OP s_sharc_opcode_table[]; - UINT32 m_pc; - SHARC_REG m_r[16]; - SHARC_REG m_reg_alt[16]; - UINT64 m_mrf; - UINT64 m_mrb; - - UINT32 m_pcstack[32]; - UINT32 m_lcstack[6]; - UINT32 m_lastack[6]; - UINT32 m_lstkp; - - UINT32 m_faddr; - UINT32 m_daddr; - UINT32 m_pcstk; - UINT32 m_pcstkp; - SHARC_LADDR m_laddr; - UINT32 m_curlcntr; - UINT32 m_lcntr; - UINT8 m_extdma_shift; - - /* Data Address Generator (DAG) */ - SHARC_DAG m_dag1; // (DM bus) - SHARC_DAG m_dag2; // (PM bus) - SHARC_DAG m_dag1_alt; - SHARC_DAG m_dag2_alt; - - SHARC_DMA_REGS m_dma[12]; - - /* System registers */ - UINT32 m_mode1; - UINT32 m_mode2; - UINT32 m_astat; - UINT32 m_stky; - UINT32 m_irptl; - UINT32 m_imask; - UINT32 m_imaskp; - UINT32 m_ustat1; - UINT32 m_ustat2; - - UINT32 m_flag[4]; - - UINT32 m_syscon; - UINT32 m_sysstat; - - struct + struct ASTAT_DRC { - UINT32 mode1; - UINT32 astat; - } m_status_stack[5]; - INT32 m_status_stkp; + union + { + struct + { + UINT32 az; + UINT32 av; + UINT32 an; + UINT32 ac; + UINT32 as; + UINT32 ai; + UINT32 mn; + UINT32 mv; + UINT32 mu; + UINT32 mi; + UINT32 sv; + UINT32 sz; + UINT32 ss; + UINT32 btf; + UINT32 af; + UINT32 cacc; + }; + UINT64 flags64[8]; + }; + }; - UINT64 m_px; + struct alignas(16) sharc_internal_state + { + SHARC_REG r[16]; + SHARC_REG reg_alt[16]; + + UINT32 pc; + UINT64 mrf; + UINT64 mrb; + + UINT32 pcstack[32]; + UINT32 lcstack[6]; + UINT32 lastack[6]; + UINT32 lstkp; + + UINT32 faddr; + UINT32 daddr; + UINT32 pcstk; + UINT32 pcstkp; + SHARC_LADDR laddr; + UINT32 curlcntr; + UINT32 lcntr; + UINT8 extdma_shift; + + /* Data Address Generator (DAG) */ + SHARC_DAG dag1; // (DM bus) + SHARC_DAG dag2; // (PM bus) + SHARC_DAG dag1_alt; + SHARC_DAG dag2_alt; + + SHARC_DMA_REGS dma[12]; + + /* System registers */ + UINT32 mode1; + UINT32 mode2; + UINT32 astat; + UINT32 stky; + UINT32 irptl; + UINT32 imask; + UINT32 imaskp; + UINT32 ustat1; + UINT32 ustat2; + + UINT32 flag[4]; + + UINT32 syscon; + UINT32 sysstat; + + struct + { + UINT32 mode1; + UINT32 astat; + } status_stack[5]; + INT32 status_stkp; + + UINT64 px; + + int icount; + UINT64 opcode; + + UINT32 nfaddr; + + INT32 idle; + INT32 irq_pending; + INT32 active_irq_num; + + SHARC_DMA_OP dma_op[12]; + UINT32 dma_status; + + INT32 interrupt_active; + + UINT32 iop_delayed_reg; + UINT32 iop_delayed_data; + emu_timer *delayed_iop_timer; + + UINT32 delay_slot1, delay_slot2; + + INT32 systemreg_latency_cycles; + INT32 systemreg_latency_reg; + UINT32 systemreg_latency_data; + UINT32 systemreg_previous_data; + + UINT32 astat_old; + UINT32 astat_old_old; + UINT32 astat_old_old_old; + + UINT32 arg0; + UINT32 arg1; + UINT32 arg2; + UINT32 arg3; + + UINT64 arg64; + UINT32 mode1_delay_data; + + ASTAT_DRC astat_drc; + ASTAT_DRC astat_drc_copy; + ASTAT_DRC astat_delay_copy; + UINT32 dreg_temp; + UINT32 jmpdest; + + float fp0; + float fp1; + + UINT32 force_recompile; + }; + + sharc_internal_state* m_core; + + SHARC_BOOT_MODE m_boot_mode; + + // UML stuff + drc_cache m_cache; + std::unique_ptr m_drcuml; + std::unique_ptr m_drcfe; + uml::parameter m_regmap[16]; + + uml::code_handle *m_entry; /* entry point */ + uml::code_handle *m_nocode; /* nocode exception handler */ + uml::code_handle *m_out_of_cycles; /* out of cycles exception handler */ + uml::code_handle *m_pm_read48; + uml::code_handle *m_pm_write48; + uml::code_handle *m_pm_read32; + uml::code_handle *m_pm_write32; + uml::code_handle *m_dm_read32; + uml::code_handle *m_dm_write32; + uml::code_handle *m_push_pc; + uml::code_handle *m_pop_pc; + uml::code_handle *m_push_loop; + uml::code_handle *m_pop_loop; + uml::code_handle *m_push_status; + uml::code_handle *m_pop_status; + uml::code_handle *m_exception[EXCEPTION_COUNT]; // exception handlers + uml::code_handle *m_swap_dag1_0_3; + uml::code_handle *m_swap_dag1_4_7; + uml::code_handle *m_swap_dag2_0_3; + uml::code_handle *m_swap_dag2_4_7; + uml::code_handle *m_swap_r0_7; + uml::code_handle *m_swap_r8_15; + + bool m_cache_dirty; UINT16 *m_internal_ram_block0, *m_internal_ram_block1; address_space *m_program; address_space *m_data; opcode_func m_sharc_op[512]; - int m_icount; - UINT64 m_opcode; - - UINT32 m_nfaddr; - - INT32 m_idle; - INT32 m_irq_active; - INT32 m_active_irq_num; - - SHARC_BOOT_MODE m_boot_mode; - - SHARC_DMA_OP m_dma_op[12]; - UINT32 m_dma_status; - - INT32 m_interrupt_active; - - UINT32 m_iop_delayed_reg; - UINT32 m_iop_delayed_data; - emu_timer *m_delayed_iop_timer; - - UINT32 m_delay_slot1, m_delay_slot2; - - INT32 m_systemreg_latency_cycles; - INT32 m_systemreg_latency_reg; - UINT32 m_systemreg_latency_data; - UINT32 m_systemreg_previous_data; - - UINT32 m_astat_old; - UINT32 m_astat_old_old; - UINT32 m_astat_old_old_old; UINT16 m_internal_ram[2 * 0x10000]; // 2x 128KB @@ -349,6 +584,59 @@ private: inline void compute_fmul_dual_fadd_fsub(int fm, int fxm, int fym, int fa, int fs, int fxa, int fya); void build_opcode_table(); + /* internal compiler state */ + struct compiler_state + { + UINT32 cycles; /* accumulated cycles */ + UINT8 checkints; /* need to check interrupts before next instruction */ + uml::code_label labelnum; /* index for local labels */ + struct + { + int counter; + int mode; + UINT32 data; + } mode1_delay; + }; + + void execute_run_drc(); + void flush_cache(); + void compile_block(offs_t pc); + void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name); + void static_generate_entry_point(); + void static_generate_nocode_handler(); + void static_generate_out_of_cycles(); + void static_generate_memory_accessor(MEM_ACCESSOR_TYPE type, const char *name, uml::code_handle *&handleptr); + void static_generate_exception(UINT8 exception, const char *name); + void static_generate_push_pc(); + void static_generate_pop_pc(); + void static_generate_push_loop(); + void static_generate_pop_loop(); + void static_generate_push_status(); + void static_generate_pop_status(); + void static_generate_mode1_ops(); + void load_fast_iregs(drcuml_block *block); + void save_fast_iregs(drcuml_block *block); + void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, int allow_exception); + int generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_unimplemented_compute(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_compute(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_if_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int condition, int skip_label); + void generate_do_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int condition, int skip_label, ASTAT_DRC &astat); + void generate_shift_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int data, int shiftop, int rn, int rx); + void generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool delayslot); + void generate_jump(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool delayslot, bool loopabort, bool clearint); + void generate_write_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data); + void generate_set_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data); + void generate_clear_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data); + void generate_toggle_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data); + void generate_read_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool has_compute); + void generate_write_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool imm, UINT32 data); + void generate_update_circular_buffer(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int g, int i); + void generate_astat_copy(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + bool if_condition_always_true(int condition); + UINT32 do_condition_astat_bits(int condition); }; diff --git a/src/devices/cpu/sharc/sharcdma.hxx b/src/devices/cpu/sharc/sharcdma.hxx index eacede6fb5b..9321dd88b05 100644 --- a/src/devices/cpu/sharc/sharcdma.hxx +++ b/src/devices/cpu/sharc/sharcdma.hxx @@ -21,80 +21,80 @@ void adsp21062_device::schedule_chained_dma_op(int channel, UINT32 dma_chain_ptr UINT32 ext_modifier = dm_read32(op_ptr - 6); UINT32 ext_count = dm_read32(op_ptr - 7); - if (m_dma_op[channel].active) + if (m_core->dma_op[channel].active) { - fatalerror("schedule_chained_dma_op: DMA operation already scheduled at %08X!\n", m_pc); + fatalerror("schedule_chained_dma_op: DMA operation already scheduled at %08X!\n", m_core->pc); } if (chained_direction) // Transmit to external { - m_dma_op[channel].dst = ext_index; - m_dma_op[channel].dst_modifier = ext_modifier; - m_dma_op[channel].dst_count = ext_count; - m_dma_op[channel].src = int_index; - m_dma_op[channel].src_modifier = int_modifier; - m_dma_op[channel].src_count = int_count; + m_core->dma_op[channel].dst = ext_index; + m_core->dma_op[channel].dst_modifier = ext_modifier; + m_core->dma_op[channel].dst_count = ext_count; + m_core->dma_op[channel].src = int_index; + m_core->dma_op[channel].src_modifier = int_modifier; + m_core->dma_op[channel].src_count = int_count; } else // Receive from external { - m_dma_op[channel].src = ext_index; - m_dma_op[channel].src_modifier = ext_modifier; - m_dma_op[channel].src_count = ext_count; - m_dma_op[channel].dst = int_index; - m_dma_op[channel].dst_modifier = int_modifier; - m_dma_op[channel].dst_count = int_count; + m_core->dma_op[channel].src = ext_index; + m_core->dma_op[channel].src_modifier = ext_modifier; + m_core->dma_op[channel].src_count = ext_count; + m_core->dma_op[channel].dst = int_index; + m_core->dma_op[channel].dst_modifier = int_modifier; + m_core->dma_op[channel].dst_count = int_count; } - m_dma_op[channel].pmode = 0; - m_dma_op[channel].chain_ptr = chain_ptr; - m_dma_op[channel].chained_direction = chained_direction; + m_core->dma_op[channel].pmode = 0; + m_core->dma_op[channel].chain_ptr = chain_ptr; + m_core->dma_op[channel].chained_direction = chained_direction; - m_dma_op[channel].active = true; + m_core->dma_op[channel].active = true; - int cycles = m_dma_op[channel].src_count / 4; - m_dma_op[channel].timer->adjust(cycles_to_attotime(cycles), channel); + int cycles = m_core->dma_op[channel].src_count / 4; + m_core->dma_op[channel].timer->adjust(cycles_to_attotime(cycles), channel); // enable busy flag - m_dma_status |= (1 << channel); + m_core->dma_status |= (1 << channel); } void adsp21062_device::schedule_dma_op(int channel, UINT32 src, UINT32 dst, int src_modifier, int dst_modifier, int src_count, int dst_count, int pmode) { - if (m_dma_op[channel].active) + if (m_core->dma_op[channel].active) { - fatalerror("schedule_dma_op: DMA operation already scheduled at %08X!\n", m_pc); + fatalerror("schedule_dma_op: DMA operation already scheduled at %08X!\n", m_core->pc); } - m_dma_op[channel].src = src; - m_dma_op[channel].dst = dst; - m_dma_op[channel].src_modifier = src_modifier; - m_dma_op[channel].dst_modifier = dst_modifier; - m_dma_op[channel].src_count = src_count; - m_dma_op[channel].dst_count = dst_count; - m_dma_op[channel].pmode = pmode; - m_dma_op[channel].chain_ptr = 0; + m_core->dma_op[channel].src = src; + m_core->dma_op[channel].dst = dst; + m_core->dma_op[channel].src_modifier = src_modifier; + m_core->dma_op[channel].dst_modifier = dst_modifier; + m_core->dma_op[channel].src_count = src_count; + m_core->dma_op[channel].dst_count = dst_count; + m_core->dma_op[channel].pmode = pmode; + m_core->dma_op[channel].chain_ptr = 0; - m_dma_op[channel].active = true; + m_core->dma_op[channel].active = true; int cycles = src_count / 4; - m_dma_op[channel].timer->adjust(cycles_to_attotime(cycles), channel); + m_core->dma_op[channel].timer->adjust(cycles_to_attotime(cycles), channel); // enable busy flag - m_dma_status |= (1 << channel); + m_core->dma_status |= (1 << channel); } void adsp21062_device::dma_op(int channel) { int i; - UINT32 src = m_dma_op[channel].src; - UINT32 dst = m_dma_op[channel].dst; - int src_modifier = m_dma_op[channel].src_modifier; - int dst_modifier = m_dma_op[channel].dst_modifier; - int src_count = m_dma_op[channel].src_count; - //int dst_count = m_dma_op[channel].dst_count; - int pmode = m_dma_op[channel].pmode; + UINT32 src = m_core->dma_op[channel].src; + UINT32 dst = m_core->dma_op[channel].dst; + int src_modifier = m_core->dma_op[channel].src_modifier; + int dst_modifier = m_core->dma_op[channel].dst_modifier; + int src_count = m_core->dma_op[channel].src_count; + //int dst_count = m_core->dma_op[channel].dst_count; + int pmode = m_core->dma_op[channel].pmode; - //printf("dma_op: %08X, %08X, %08X, %08X, %08X, %08X, %d\n", src, dst, src_modifier, dst_modifier, src_count, dst_count, pmode); + //printf("dma_op: %08X, %08X, %08X, %08X, %08X, %d\n", src, dst, src_modifier, dst_modifier, src_count, pmode); switch (pmode) { @@ -148,19 +148,19 @@ void adsp21062_device::dma_op(int channel) if (channel == 6) { - m_irptl |= (1 << (channel+10)); + m_core->irptl |= (1 << (channel+10)); /* DMA interrupt */ - if (m_imask & (1 << (channel+10))) + if (m_core->imask & (1 << (channel+10))) { - m_irq_active |= 1 << (channel+10); + m_core->irq_pending |= 1 << (channel+10); } } // clear busy flag - m_dma_status &= ~(1 << channel); + m_core->dma_status &= ~(1 << channel); - m_dma_op[channel].active = false; + m_core->dma_op[channel].active = false; } void adsp21062_device::sharc_dma_exec(int channel) @@ -170,16 +170,16 @@ void adsp21062_device::sharc_dma_exec(int channel) UINT32 src_modifier, dst_modifier; int chen, tran, dtype, pmode, /*mswf, master,*/ ishake, intio/*, ext, flsh*/; - chen = (m_dma[channel].control >> 1) & 0x1; - tran = (m_dma[channel].control >> 2) & 0x1; - dtype = (m_dma[channel].control >> 5) & 0x1; - pmode = (m_dma[channel].control >> 6) & 0x3; - //mswf = (m_dma[channel].control >> 8) & 0x1; - //master = (m_dma[channel].control >> 9) & 0x1; - ishake = (m_dma[channel].control >> 10) & 0x1; - intio = (m_dma[channel].control >> 11) & 0x1; - //ext = (m_dma[channel].control >> 12) & 0x1; - //flsh = (m_dma[channel].control >> 13) & 0x1; + chen = (m_core->dma[channel].control >> 1) & 0x1; + tran = (m_core->dma[channel].control >> 2) & 0x1; + dtype = (m_core->dma[channel].control >> 5) & 0x1; + pmode = (m_core->dma[channel].control >> 6) & 0x3; + //mswf = (m_core->dma[channel].control >> 8) & 0x1; + //master = (m_core->dma[channel].control >> 9) & 0x1; + ishake = (m_core->dma[channel].control >> 10) & 0x1; + intio = (m_core->dma[channel].control >> 11) & 0x1; + //ext = (m_core->dma[channel].control >> 12) & 0x1; + //flsh = (m_core->dma[channel].control >> 13) & 0x1; if (ishake) fatalerror("SHARC: dma_exec: handshake not supported\n"); @@ -189,7 +189,7 @@ void adsp21062_device::sharc_dma_exec(int channel) if (chen) // Chained DMA { - UINT32 dma_chain_ptr = m_dma[channel].chain_ptr & 0x1ffff; + UINT32 dma_chain_ptr = m_core->dma[channel].chain_ptr & 0x1ffff; schedule_chained_dma_op(channel, dma_chain_ptr, tran); } @@ -197,21 +197,21 @@ void adsp21062_device::sharc_dma_exec(int channel) { if (tran) // Transmit to external { - dst = m_dma[channel].ext_index; - dst_modifier = m_dma[channel].ext_modifier; - dst_count = m_dma[channel].ext_count; - src = (m_dma[channel].int_index & 0x1ffff) | 0x20000; - src_modifier = m_dma[channel].int_modifier; - src_count = m_dma[channel].int_count; + dst = m_core->dma[channel].ext_index; + dst_modifier = m_core->dma[channel].ext_modifier; + dst_count = m_core->dma[channel].ext_count; + src = (m_core->dma[channel].int_index & 0x1ffff) | 0x20000; + src_modifier = m_core->dma[channel].int_modifier; + src_count = m_core->dma[channel].int_count; } else // Receive from external { - src = m_dma[channel].ext_index; - src_modifier = m_dma[channel].ext_modifier; - src_count = m_dma[channel].ext_count; - dst = (m_dma[channel].int_index & 0x1ffff) | 0x20000; - dst_modifier = m_dma[channel].int_modifier; - dst_count = m_dma[channel].int_count; + src = m_core->dma[channel].ext_index; + src_modifier = m_core->dma[channel].ext_modifier; + src_count = m_core->dma[channel].ext_count; + dst = (m_core->dma[channel].int_index & 0x1ffff) | 0x20000; + dst_modifier = m_core->dma[channel].int_modifier; + dst_count = m_core->dma[channel].int_count; } if (dtype) @@ -228,19 +228,19 @@ TIMER_CALLBACK_MEMBER(adsp21062_device::sharc_dma_callback) { int channel = param; - m_dma_op[channel].timer->adjust(attotime::never, 0); + m_core->dma_op[channel].timer->adjust(attotime::never, 0); - m_irptl |= (1 << (channel+10)); + m_core->irptl |= (1 << (channel+10)); // DMA interrupt - if (m_imask & (1 << (channel+10))) + if (m_core->imask & (1 << (channel+10))) { - m_irq_active |= 1 << (channel+10); + m_core->irq_pending |= 1 << (channel+10); } dma_op(channel); - if (m_dma_op[channel].chain_ptr != 0) + if (m_core->dma_op[channel].chain_ptr != 0) { - schedule_chained_dma_op(channel, m_dma_op[channel].chain_ptr, m_dma_op[channel].chained_direction); + schedule_chained_dma_op(channel, m_core->dma_op[channel].chain_ptr, m_core->dma_op[channel].chained_direction); } } diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp new file mode 100644 index 00000000000..2f7f3e0fbcb --- /dev/null +++ b/src/devices/cpu/sharc/sharcdrc.cpp @@ -0,0 +1,4909 @@ +// license:BSD-3-Clause +// copyright-holders:Ville Linde + +/****************************************************************************** + + SHARC UML recompiler core + +******************************************************************************/ + +#include "emu.h" +#include "debugger.h" +#include "sharc.h" +#include "sharcfe.h" +#include "cpu/drcfe.h" +#include "cpu/drcuml.h" +#include "cpu/drcumlsh.h" + +using namespace uml; + +#define USE_SWAPDQ 0 +#define WRITE_SNOOP 0 + + +// map variables +#define MAPVAR_PC M0 +#define MAPVAR_CYCLES M1 + +// exit codes +#define EXECUTE_OUT_OF_CYCLES 0 +#define EXECUTE_MISSING_CODE 1 +#define EXECUTE_UNMAPPED_CODE 2 +#define EXECUTE_RESET_CACHE 3 + + +#define REG(reg) m_regmap[reg] +#define DM_I(reg) mem(&m_core->dag1.i[reg]) +#define DM_M(reg) mem(&m_core->dag1.m[reg]) +#define DM_L(reg) mem(&m_core->dag1.l[reg]) +#define DM_B(reg) mem(&m_core->dag1.b[reg]) +#define PM_I(reg) mem(&m_core->dag2.i[reg]) +#define PM_M(reg) mem(&m_core->dag2.m[reg]) +#define PM_L(reg) mem(&m_core->dag2.l[reg]) +#define PM_B(reg) mem(&m_core->dag2.b[reg]) +#define ASTAT_AZ mem(&m_core->astat_drc.az) +#define ASTAT_AV mem(&m_core->astat_drc.av) +#define ASTAT_AN mem(&m_core->astat_drc.an) +#define ASTAT_AC mem(&m_core->astat_drc.ac) +#define ASTAT_AS mem(&m_core->astat_drc.as) +#define ASTAT_AI mem(&m_core->astat_drc.ai) +#define ASTAT_AF mem(&m_core->astat_drc.af) +#define ASTAT_MN mem(&m_core->astat_drc.mn) +#define ASTAT_MV mem(&m_core->astat_drc.mv) +#define ASTAT_MU mem(&m_core->astat_drc.mu) +#define ASTAT_MI mem(&m_core->astat_drc.mi) +#define ASTAT_SV mem(&m_core->astat_drc.sv) +#define ASTAT_SZ mem(&m_core->astat_drc.sz) +#define ASTAT_SS mem(&m_core->astat_drc.ss) +#define ASTAT_BTF mem(&m_core->astat_drc.btf) +#define FLAG0 mem(&m_core->flag[0]) +#define FLAG1 mem(&m_core->flag[1]) +#define FLAG2 mem(&m_core->flag[2]) +#define FLAG3 mem(&m_core->flag[3]) +#define CURLCNTR mem(&m_core->curlcntr) +#define LCNTR mem(&m_core->lcntr) +#define PCSTK mem(&m_core->pcstk) +#define PCSTKP mem(&m_core->pcstkp) +#define STKY mem(&m_core->stky) +#define LSTKP mem(&m_core->lstkp) +#define USTAT1 mem(&m_core->ustat1) +#define USTAT2 mem(&m_core->ustat2) +#define IRPTL mem(&m_core->irptl) +#define MODE1 mem(&m_core->mode1) +#define MODE2 mem(&m_core->mode2) +#define IMASK mem(&m_core->imask) +#define IMASKP mem(&m_core->imaskp) +#define MRF mem(&m_core->mrf) +#define MRB mem(&m_core->mrb) + +#define AZ_CALC_REQUIRED ((desc->regreq[0] & 0x00010000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AV_CALC_REQUIRED ((desc->regreq[0] & 0x00020000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AN_CALC_REQUIRED ((desc->regreq[0] & 0x00040000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AC_CALC_REQUIRED ((desc->regreq[0] & 0x00080000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AS_CALC_REQUIRED ((desc->regreq[0] & 0x00100000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AI_CALC_REQUIRED ((desc->regreq[0] & 0x00200000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define MN_CALC_REQUIRED ((desc->regreq[0] & 0x00400000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define MV_CALC_REQUIRED ((desc->regreq[0] & 0x00800000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define MU_CALC_REQUIRED ((desc->regreq[0] & 0x01000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define MI_CALC_REQUIRED ((desc->regreq[0] & 0x02000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define SV_CALC_REQUIRED ((desc->regreq[0] & 0x04000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define SZ_CALC_REQUIRED ((desc->regreq[0] & 0x08000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define SS_CALC_REQUIRED ((desc->regreq[0] & 0x10000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define BTF_CALC_REQUIRED ((desc->regreq[0] & 0x20000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AF_CALC_REQUIRED ((desc->regreq[0] & 0x40000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) + + +#define IRAM_BLOCK0_START 0x20000 +#define IRAM_BLOCK0_END 0x27fff +#define IRAM_BLOCK1_START 0x28000 +#define IRAM_BLOCK1_END 0x3ffff +#define IRAM_SHORT_BLOCK0_START 0x40000 +#define IRAM_SHORT_BLOCK0_END 0x4ffff +#define IRAM_SHORT_BLOCK1_START 0x50000 +#define IRAM_SHORT_BLOCK1_END 0x7ffff +#define IOP_REGISTER_START 0x00000 +#define IOP_REGISTER_END 0x000ff +#define IRAM_END 0x7ffff + + +inline void adsp21062_device::alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name) +{ + if (*handleptr == nullptr) + *handleptr = drcuml->handle_alloc(name); +} + + + +static void cfunc_unimplemented(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_unimplemented(); +} + +static void cfunc_read_iop(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_read_iop(); +} + +static void cfunc_write_iop(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_write_iop(); +} + +static void cfunc_pcstack_overflow(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_pcstack_overflow(); +} + +static void cfunc_pcstack_underflow(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_pcstack_underflow(); +} + +static void cfunc_loopstack_overflow(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_loopstack_overflow(); +} + +static void cfunc_loopstack_underflow(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_loopstack_underflow(); +} + +static void cfunc_statusstack_overflow(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_statusstack_overflow(); +} + +static void cfunc_statusstack_underflow(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_statusstack_underflow(); +} + +static void cfunc_unimplemented_compute(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_unimplemented_compute(); +} + +static void cfunc_unimplemented_shiftimm(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_unimplemented_shiftimm(); +} + + +#if WRITE_SNOOP +void adsp21062_device::sharc_cfunc_write_snoop() +{ + printf("Write %08X to %08X at %08X\n", m_core->arg0, m_core->arg1, m_core->arg2); +} + +static void cfunc_write_snoop(void *param) +{ + adsp21062_device *sharc = (adsp21062_device *)param; + sharc->sharc_cfunc_write_snoop(); +} +#endif + + +void adsp21062_device::sharc_cfunc_unimplemented() +{ + UINT64 op = m_core->arg64; + fatalerror("PC=%08X: Unimplemented op %04X%08X\n", m_core->pc, (UINT32)(op >> 32), (UINT32)(op)); +} + +void adsp21062_device::sharc_cfunc_unimplemented_compute() +{ + UINT64 op = m_core->arg64; + fatalerror("PC=%08X: Unimplemented compute %04X%08X\n", m_core->pc, (UINT32)(op >> 32), (UINT32)(op)); +} + +void adsp21062_device::sharc_cfunc_unimplemented_shiftimm() +{ + UINT64 op = m_core->arg64; + fatalerror("PC=%08X: Unimplemented shiftimm %04X%08X\n", m_core->pc, (UINT32)(op >> 32), (UINT32)(op)); +} + +void adsp21062_device::sharc_cfunc_read_iop() +{ + m_core->arg1 = sharc_iop_r(m_core->arg0); +} + +void adsp21062_device::sharc_cfunc_write_iop() +{ + sharc_iop_w(m_core->arg0, m_core->arg1); +} + +void adsp21062_device::sharc_cfunc_pcstack_overflow() +{ + fatalerror("SHARC: PCStack overflow"); +} + +void adsp21062_device::sharc_cfunc_pcstack_underflow() +{ + fatalerror("SHARC: PCStack underflow"); +} + +void adsp21062_device::sharc_cfunc_loopstack_overflow() +{ + fatalerror("SHARC: Loop Stack overflow"); +} + +void adsp21062_device::sharc_cfunc_loopstack_underflow() +{ + fatalerror("SHARC: Loop Stack underflow"); +} + +void adsp21062_device::sharc_cfunc_statusstack_overflow() +{ + fatalerror("SHARC: Status Stack overflow"); +} + +void adsp21062_device::sharc_cfunc_statusstack_underflow() +{ + fatalerror("SHARC: Status Stack underflow"); +} + + +bool adsp21062_device::if_condition_always_true(int condition) +{ + if (condition == 0x1f || condition == 0x1e) + return true; + else + return false; +} + +UINT32 adsp21062_device::do_condition_astat_bits(int condition) +{ + UINT32 r = 0; + switch (condition) + { + case 0x00: r = AZ; break; // EQ + case 0x01: r = AZ | AN; break; // LT + case 0x02: r = AZ | AN; break; // LE + case 0x03: r = AC; break; // AC + case 0x04: r = AV; break; // AV + case 0x05: r = MV; break; // MV + case 0x06: r = MN; break; // MS + case 0x07: r = SV; break; // SV + case 0x08: r = SZ; break; // SZ + case 0x0d: r = BTF; break; // TF + case 0x10: r = AZ; break; // NOT EQUAL + case 0x11: r = AZ | AN; break; // GE + case 0x12: r = AZ | AN; break; // GT + case 0x13: r = AC; break; // NOT AC + case 0x14: r = AV; break; // NOT AV + case 0x15: r = MV; break; // NOT MV + case 0x16: r = MN; break; // NOT MS + case 0x17: r = SV; break; // NOT SV + case 0x18: r = SZ; break; // NOT SZ + case 0x1d: r = BTF; break; // NOT TF + } + + return r; +} + + +/*------------------------------------------------- +load_fast_iregs - load any fast integer +registers +-------------------------------------------------*/ + +inline void adsp21062_device::load_fast_iregs(drcuml_block *block) +{ + int regnum; + + for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++) + { + if (m_regmap[regnum].is_int_register()) + { + UML_MOV(block, ireg(m_regmap[regnum].ireg() - REG_I0), mem(&m_core->r[regnum])); + } + } +} + + +/*------------------------------------------------- +save_fast_iregs - save any fast integer +registers +-------------------------------------------------*/ + +void adsp21062_device::save_fast_iregs(drcuml_block *block) +{ + int regnum; + + for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++) + { + if (m_regmap[regnum].is_int_register()) + { + UML_MOV(block, mem(&m_core->r[regnum]), ireg(m_regmap[regnum].ireg() - REG_I0)); + } + } +} + +void adsp21062_device::static_generate_memory_accessor(MEM_ACCESSOR_TYPE type, const char *name, code_handle *&handleptr) +{ + // I0 = read/write data + // I1 = address + // I2 is trashed + + void* block0 = &m_internal_ram_block0[0]; + void* block0_1 = &m_internal_ram_block0[1]; + void* block0_2 = &m_internal_ram_block0[2]; + void* block1 = &m_internal_ram_block1[0]; + void* block1_1 = &m_internal_ram_block1[1]; + void* block1_2 = &m_internal_ram_block1[2]; + + code_label label = 1; + + drcuml_block *block = m_drcuml->begin_block(1024); + + // add a global entry for this + alloc_handle(m_drcuml.get(), &handleptr, name); + UML_HANDLE(block, *handleptr); // handle *handleptr + + switch (type) + { + case MEM_ACCESSOR_PM_READ48: + UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START + UML_JMPc(block, COND_B, label); // jb label1 + UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END + UML_JMPc(block, COND_A, label); // ja label1 + + // 0x20000 ... 0x27fff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff + UML_MULS(block, I1, I1, I1, 3); // muls i1,3 + UML_DLOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // dload i0,[block0],i1,word,scale_x2 + UML_DSHL(block, I0, I0, 32); // dshl i0,i0,32 + UML_DLOAD(block, I2, block0_1, I1, SIZE_WORD, SCALE_x2); // dload i2,[block0_1],i1,word,scale_x2 + UML_DSHL(block, I2, I2, 16); // dshl i2,i2,16 + UML_DOR(block, I0, I0, I2); // dor i0,i0,i2 + UML_DLOAD(block, I2, block0_2, I1, SIZE_WORD, SCALE_x2); // dload i2,[block0_2],i1,word,scale_x2 + UML_DOR(block, I0, I0, I2); // dor i0,i0,i2 + UML_RET(block); // ret + + UML_LABEL(block, label++); // label1: + UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START + UML_JMPc(block, COND_B, label); // jb label2 + UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END + UML_JMPc(block, COND_A, label); // ja label2 + + // 0x28000 ... 0x3ffff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff) + UML_MULS(block, I1, I1, I1, 3); // muls i1,3 + UML_DLOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // dload i0,[block1],i1,word,scale_x2 + UML_DSHL(block, I0, I0, 32); // dshl i0,i0,32 + UML_DLOAD(block, I2, block1_1, I1, SIZE_WORD, SCALE_x2); // dload i2,[block1_1],i1,word,scale_x2 + UML_DSHL(block, I2, I2, 16); // dshl i2,i2,16 + UML_DOR(block, I0, I0, I2); // dor i0,i0,i2 + UML_DLOAD(block, I2, block1_2, I1, SIZE_WORD, SCALE_x2); // dload i2,[block1_2],i1,word,scale_x2 + UML_DOR(block, I0, I0, I2); // dor i0,i0,i2 + UML_RET(block); // ret + + UML_LABEL(block, label++); // label2: + break; + + case MEM_ACCESSOR_PM_WRITE48: + UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START + UML_JMPc(block, COND_B, label); // jb label1 + UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END + UML_JMPc(block, COND_A, label); // ja label1 + + // 0x20000 ... 0x27fff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff + UML_MULS(block, I1, I1, I1, 3); // muls i1,3 + UML_DSTORE(block, block0_2, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block0_2],i1,i0,word,scale_x2 + UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16 + UML_DSTORE(block, block0_1, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block0_1],i1,i0,word,scale_x2 + UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16 + UML_DSTORE(block, block0, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block0],i1,i0,word,scale_x2 + UML_MOV(block, mem(&m_core->force_recompile), 1); + UML_RET(block); // ret + + UML_LABEL(block, label++); // label1: + UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START + UML_JMPc(block, COND_B, label); // jb label2 + UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END + UML_JMPc(block, COND_A, label); // ja label2 + + // 0x28000 ... 0x3ffff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff) + UML_MULS(block, I1, I1, I1, 3); // muls i1,3 + UML_DSTORE(block, block1_2, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block1_2],i1,i0,word,scale_x2 + UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16 + UML_DSTORE(block, block1_1, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block1_1],i1,i0,word,scale_x2 + UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16 + UML_DSTORE(block, block1, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block1],i1,i0,word,scale_x2 + UML_RET(block); // ret + + UML_LABEL(block, label++); // label2: + break; + + case MEM_ACCESSOR_PM_READ32: + UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START + UML_JMPc(block, COND_B, label); // jb label1 + UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END + UML_JMPc(block, COND_A, label); // ja label1 + + // 0x20000 ... 0x27fff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff + UML_MULS(block, I1, I1, I1, 3); // muls i1,3 + UML_LOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // load i0,[block0],i1,word,scale_x2 + UML_SHL(block, I0, I0, 16); // shl i0,i0,16 + UML_LOAD(block, I2, block0_1, I1, SIZE_WORD, SCALE_x2); // load i2,[block0_1],i1,word,scale_x2 + UML_OR(block, I0, I0, I2); // or i0,i0,i2 + UML_RET(block); // ret + + UML_LABEL(block, label++); // label1: + UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START + UML_JMPc(block, COND_B, label); // jb label2 + UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END + UML_JMPc(block, COND_A, label); // ja label2 + + // 0x28000 ... 0x3ffff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff) + UML_MULS(block, I1, I1, I1, 3); // muls i1,3 + UML_LOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // load i0,[block1],i1,word,scale_x2 + UML_SHL(block, I0, I0, 16); // shl i0,i0,16 + UML_LOAD(block, I2, block1_1, I1, SIZE_WORD, SCALE_x2); // load i2,[block1_1],i1,word,scale_x2 + UML_OR(block, I0, I0, I2); // or i0,i0,i2 + UML_RET(block); // ret + + UML_LABEL(block, label++); // label2: + break; + + case MEM_ACCESSOR_PM_WRITE32: + UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START + UML_JMPc(block, COND_B, label); // jb label1 + UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END + UML_JMPc(block, COND_A, label); // ja label1 + + // 0x20000 ... 0x27fff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff + UML_MULS(block, I1, I1, I1, 3); // muls i1,3 + UML_STORE(block, block0_1, I1, I0, SIZE_WORD, SCALE_x2); // store [block0_1],i1,i0,word,scale_x2 + UML_SHR(block, I0, I0, 16); // shr i0,i0,16 + UML_STORE(block, block0, I1, I0, SIZE_WORD, SCALE_x2); // store [block0],i1,i0,word,scale_x2 + UML_RET(block); // ret + + UML_LABEL(block, label++); // label1: + UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START + UML_JMPc(block, COND_B, label); // jb label2 + UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END + UML_JMPc(block, COND_A, label); // ja label2 + + // 0x28000 ... 0x3ffff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff) + UML_MULS(block, I1, I1, I1, 3); // muls i1,3 + UML_STORE(block, block1_1, I1, I0, SIZE_WORD, SCALE_x2); // store [block1_1],i1,i0,word,scale_x2 + UML_SHR(block, I0, I0, 16); // shr i0,i0,16 + UML_STORE(block, block1, I1, I0, SIZE_WORD, SCALE_x2); // store [block1],i1,i0,word,scale_x2 + UML_RET(block); // ret + + UML_LABEL(block, label++); // label2: + break; + + case MEM_ACCESSOR_DM_READ32: + UML_CMP(block, I1, IRAM_END); // cmp i1,IRAM_END + UML_JMPc(block, COND_BE, label); // jbe label1 + // 0x80000 ... + UML_SHL(block, I1, I1, 2); // shl i1,i1,2 + UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA); // read i0,i1,dword,SPACE_DATA + UML_RET(block); + + UML_LABEL(block, label++); // label1: + UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START + UML_JMPc(block, COND_B, label); // jb label2 + UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END + UML_JMPc(block, COND_A, label); // ja label2 + // 0x20000 ... 0x27fff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff + UML_LOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x4); // load i0,[block0],i1,word,scale_x4 + UML_SHL(block, I0, I0, 16); // shl i0,i0,16 + UML_LOAD(block, I2, block0_1, I1, SIZE_WORD, SCALE_x4); // load i2,[block0_1],i1,word,scale_x4 + UML_OR(block, I0, I0, I2); // or i0,i0,i2 + UML_RET(block); + + UML_LABEL(block, label++); // label2: + UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START + UML_JMPc(block, COND_B, label); // jb label3 + UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END + UML_JMPc(block, COND_A, label); // ja label3 + // 0x28000 ... 0x3ffff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff + UML_LOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x4); // load i0,[block1],i1,word,scale_x4 + UML_SHL(block, I0, I0, 16); // shl i0,i0,16 + UML_LOAD(block, I2, block1_1, I1, SIZE_WORD, SCALE_x4); // load i2,[block1_1],i1,word,scale_x4 + UML_OR(block, I0, I0, I2); // or i0,i0,i2 + UML_RET(block); + + UML_LABEL(block, label++); // Label3: + UML_CMP(block, I1, IOP_REGISTER_END); // cmp i1,IOP_REGISTER_END + UML_JMPc(block, COND_A, label); // ja label4 + // IOP registers + UML_MOV(block, mem(&m_core->arg0), I1); // mov [m_core->arg0],i1 + UML_CALLC(block, cfunc_read_iop, this); // callc cfunc_read_iop + UML_MOV(block, I0, mem(&m_core->arg1)); // mov i0,[m_core->arg1] + UML_RET(block); + + UML_LABEL(block, label++); // label4: + UML_CMP(block, I1, IRAM_SHORT_BLOCK0_START); // cmp i1,IRAM_SHORT_BLOCK0_START + UML_JMPc(block, COND_B, label+1); // jb label6 + UML_CMP(block, I1, IRAM_SHORT_BLOCK0_END); // cmp i1,IRAM_SHORT_BLOCK0_END + UML_JMPc(block, COND_A, label+1); // ja label6 + // 0x40000 ... 0x4ffff + UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff + UML_XOR(block, I1, I1, 1); // xor i1,i1,1 + UML_TEST(block, mem(&m_core->mode1), 0x4000); // test [m_core->mode1],0x4000 + UML_JMPc(block, COND_Z, label); // jz label5 + UML_LOADS(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // loads i0,[block0],i1,word,scale_x2 + UML_RET(block); + UML_LABEL(block, label++); // label5: + UML_LOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // load i0,[block0],i1,word,scale_x2 + UML_RET(block); + + UML_LABEL(block, label++); // label6: + UML_CMP(block, I1, IRAM_SHORT_BLOCK1_START); // cmp i1,IRAM_SHORT_BLOCK1_START + UML_JMPc(block, COND_B, label+1); // jb label8 + UML_CMP(block, I1, IRAM_SHORT_BLOCK1_END); // cmp i1,IRAM_SHORT_BLOCK1_END + UML_JMPc(block, COND_A, label+1); // ja label8 + // 0x50000 ... 0x7ffff + UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff + UML_XOR(block, I1, I1, 1); // xor i1,i1,1 + UML_TEST(block, mem(&m_core->mode1), 0x4000); // test [m_core->mode1],0x4000 + UML_JMPc(block, COND_Z, label); // jz label7 + UML_LOADS(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // loads i0,[block1],i1,word,scale_x2 + UML_RET(block); + UML_LABEL(block, label++); // label7: + UML_LOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // load i0,[block1],i1,word,scale_x2 + UML_RET(block); + + UML_LABEL(block, label++); // label8: + break; + + case MEM_ACCESSOR_DM_WRITE32: +#if WRITE_SNOOP + //UML_CMP(block, I1, 0x283eb); + UML_CMP(block, I1, 0x2400047); + UML_JMPc(block, COND_NE, label); + UML_MOV(block, mem(&m_core->arg0), I0); + UML_MOV(block, mem(&m_core->arg1), I1); + UML_MOV(block, mem(&m_core->arg2), mem(&m_core->pc)); + UML_CALLC(block, cfunc_write_snoop, this); + UML_LABEL(block, label++); +#endif + + + UML_CMP(block, I1, IRAM_END); // cmp i1,IRAM_END + UML_JMPc(block, COND_BE, label); // jbe label1 + // 0x80000 ... + UML_SHL(block, I1, I1, 2); // shl i1,i1,2 + UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_DATA); // write i1,i0,dword,SPACE_DATA + UML_RET(block); + + UML_LABEL(block, label++); // label1: + UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START + UML_JMPc(block, COND_B, label); // jb label2 + UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END + UML_JMPc(block, COND_A, label); // ja label2 + // 0x20000 ... 0x27fff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff + UML_STORE(block, block0_1, I1, I0, SIZE_WORD, SCALE_x4); // store [block0_1],i1,i0,word,scale_x4 + UML_SHR(block, I0, I0, 16); // shr i0,i0,16 + UML_STORE(block, block0, I1, I0, SIZE_WORD, SCALE_x4); // store [block0],i1,i0,word,scale_x4 + UML_RET(block); + + UML_LABEL(block, label++); // label2: + UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START + UML_JMPc(block, COND_B, label); // jb label3 + UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END + UML_JMPc(block, COND_A, label); // ja label3 + // 0x28000 ... 0x3ffff + UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff + UML_STORE(block, block1_1, I1, I0, SIZE_WORD, SCALE_x4); // store [block1_1],i1,i0,word,scale_x4 + UML_SHR(block, I0, I0, 16); // shr i0,i0,16 + UML_STORE(block, block1, I1, I0, SIZE_WORD, SCALE_x4); // store [block1],i1,i0,word,scale_x4 + UML_RET(block); + + UML_LABEL(block, label++); // Label3: + UML_CMP(block, I1, IOP_REGISTER_END); // cmp i1,IOP_REGISTER_END + UML_JMPc(block, COND_A, label); // ja label4 + // IOP registers + UML_MOV(block, mem(&m_core->arg0), I1); // mov [m_core->arg0],i1 + UML_MOV(block, mem(&m_core->arg1), I0); // mov [m_core->arg1],i0 + UML_CALLC(block, cfunc_write_iop, this); // callc cfunc_write_iop + UML_RET(block); + + UML_LABEL(block, label++); // label4: + UML_CMP(block, I1, IRAM_SHORT_BLOCK0_START); // cmp i1,IRAM_SHORT_BLOCK0_START + UML_JMPc(block, COND_B, label); // jb label5 + UML_CMP(block, I1, IRAM_SHORT_BLOCK0_END); // cmp i1,IRAM_SHORT_BLOCK0_END + UML_JMPc(block, COND_A, label); // ja label5 + // 0x40000 ... 0x4ffff + UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff + UML_XOR(block, I1, I1, 1); // xor i1,i1,1 + UML_STORE(block, block0, I1, I0, SIZE_WORD, SCALE_x2); // store [block0],i1,i0,word,scale_x2 + UML_RET(block); + + UML_LABEL(block, label++); // label5: + UML_CMP(block, I1, IRAM_SHORT_BLOCK1_START); // cmp i1,IRAM_SHORT_BLOCK1_START + UML_JMPc(block, COND_B, label); // jb label6 + UML_CMP(block, I1, IRAM_SHORT_BLOCK1_END); // cmp i1,IRAM_SHORT_BLOCK1_END + UML_JMPc(block, COND_A, label); // ja label6 + // 0x50000 ... 0x7ffff + UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff + UML_XOR(block, I1, I1, 1); // xor i1,i1,1 + UML_STORE(block, block1, I1, I0, SIZE_WORD, SCALE_x2); // store [block1],i1,i0,word,scale_x2 + UML_RET(block); + + UML_LABEL(block, label++); // label6: + break; + } + + UML_RET(block); + + block->end(); +} + +void adsp21062_device::static_generate_push_pc() +{ + // Push contents of I0 to PC stack + // Trashes I1 + + code_label label = 1; + drcuml_block *block = m_drcuml->begin_block(32); + + // add a global entry for this + alloc_handle(m_drcuml.get(), &m_push_pc, "push_pc"); + UML_HANDLE(block, *m_push_pc); // handle *m_push_pc + + UML_MOV(block, I1, PCSTKP); // mov i1,PCSTKP + UML_ADD(block, I1, I1, 1); // add i1,i1,1 + UML_CMP(block, I1, 32); // cmp i1,32 + UML_JMPc(block, COND_L,label); // jl label1 + UML_CALLC(block, cfunc_pcstack_overflow, this); // callc cfunc_pcstack_overflow + + UML_LABEL(block, label++); // label1: + UML_CMP(block, I1, 0); // cmp i1,0 + UML_JMPc(block, COND_E, label); // je label2 + UML_AND(block, STKY, STKY, ~0x400000); // and STKY,~0x400000 + UML_JMP(block, label + 1); // jmp label3 + UML_LABEL(block, label++); // label2: + UML_OR(block, STKY, STKY, 0x400000); // or STKY,0x400000 + + UML_LABEL(block, label++); // label3: + UML_MOV(block, PCSTK, I0); // mov PCSTK,pc + UML_STORE(block, &m_core->pcstack, I1, I0, SIZE_DWORD, SCALE_x4); // store [m_core->pcstack],i1,i0,dword,scale_x4 + UML_MOV(block, PCSTKP, I1); // mov PCSTKP,i1 + + UML_RET(block); + + block->end(); +} + +void adsp21062_device::static_generate_pop_pc() +{ + // Pop PC stack into I0 + // Trashes I1 + + code_label label = 1; + drcuml_block *block = m_drcuml->begin_block(32); + + // add a global entry for this + alloc_handle(m_drcuml.get(), &m_pop_pc, "pop_pc"); + UML_HANDLE(block, *m_pop_pc); // handle *m_pop_pc + + UML_MOV(block, I1, PCSTKP); // mov i0,PCSTKP + UML_LOAD(block, I0, &m_core->pcstack, I1, SIZE_DWORD, SCALE_x4); // load i1,[m_core->pcstack],i0,dword,scale_x4 + UML_CMP(block, I1, 0); // cmp i1,0 + UML_JMPc(block, COND_NE, label); // jne label1 + UML_CALLC(block, cfunc_pcstack_underflow, this); // callc cfunc_pcstack_underflow + + UML_LABEL(block, label++); // label1: + UML_SUB(block, I1, I1, 1); // sub i1,i1,1 + UML_CMP(block, I1, 0); // cmp i1,0 + UML_JMPc(block, COND_E, label); // je label2 + UML_AND(block, STKY, STKY, ~0x400000); // and STKY,~0x400000 + UML_JMP(block, label + 1); // jmp label3 + UML_LABEL(block, label++); // label2: + UML_OR(block, STKY, STKY, 0x400000); // or STKY,0x400000 + + UML_LABEL(block, label++); // label3: + UML_MOV(block, PCSTKP, I1); // mov PCSTKP,i1 + UML_MOV(block, PCSTK, I0); // mov PCSTK,i0 + + UML_RET(block); + + block->end(); +} + +void adsp21062_device::static_generate_push_loop() +{ + // I0 = counter + // I1 = type/condition/addr + // Trashes I2 + + code_label label = 1; + drcuml_block *block = m_drcuml->begin_block(32); + + // add a global entry for this + alloc_handle(m_drcuml.get(), &m_push_loop, "push_loop"); + UML_HANDLE(block, *m_push_loop); // handle *m_push_loop + + UML_MOV(block, I2, LSTKP); // mov i2,LSTKP + UML_ADD(block, I2, I2, 1); // add i2,1 + UML_CMP(block, I2, 6); // cmp i2,6 + UML_JMPc(block, COND_L, label); // jl label1 + UML_CALLC(block, cfunc_loopstack_overflow, this); // callc cfunc_loopstack_overflow + + UML_LABEL(block, label++); // label1: + UML_CMP(block, I2, 0); // cmp i2,0 + UML_JMPc(block, COND_E, label); // je label2 + UML_AND(block, STKY, STKY, ~0x4000000); // and STKY,~0x4000000 + UML_JMP(block, label + 1); // jmp label3 + UML_LABEL(block, label++); // label2: + UML_OR(block, STKY, STKY, 0x4000000); // or STKY,0x4000000 + + UML_LABEL(block, label++); // label3: + + UML_STORE(block, m_core->lcstack, I2, I0, SIZE_DWORD, SCALE_x4); // store m_core->lcstack,i2,i0,dword,scale_x4 + UML_STORE(block, m_core->lastack, I2, I1, SIZE_DWORD, SCALE_x4); // store m_core->lastack,i2,i1,dword,scale_x4 + UML_MOV(block, CURLCNTR, I0); // mov CURLCNTR,i0 + UML_MOV(block, LSTKP, I2); // mov LSTKP,i2 + + UML_RET(block); + + block->end(); +} + +void adsp21062_device::static_generate_pop_loop() +{ + // Trashes I0,I2 + + code_label label = 1; + drcuml_block *block = m_drcuml->begin_block(32); + + // add a global entry for this + alloc_handle(m_drcuml.get(), &m_pop_loop, "pop_loop"); + UML_HANDLE(block, *m_pop_loop); // handle *m_pop_loop + + UML_MOV(block, I2, LSTKP); // mov i2,LSTKP + UML_CMP(block, I2, 0); // cmp i2,0 + UML_JMPc(block, COND_NE, label); // jne label1 + UML_CALLC(block, cfunc_loopstack_underflow, this); // callc cfunc_loopstack_underflow + + UML_LABEL(block, label++); // label1: + UML_SUB(block, I2, I2, 1); // sub i2,i2,1 + UML_CMP(block, I2, 0); // cmp i2,0 + UML_JMPc(block, COND_E, label); // je label2 + UML_AND(block, STKY, STKY, ~0x4000000); // and STKY,~0x4000000 + UML_JMP(block, label + 1); // jmp label3 + UML_LABEL(block, label++); // label2: + UML_OR(block, STKY, STKY, 0x4000000); // or STKY,0x4000000 + + UML_LABEL(block, label++); // label3: + UML_LOAD(block, I0, m_core->lcstack, I2, SIZE_DWORD, SCALE_x4); // load i0,m_core->lcstack,i2,dword,scale_x4 + UML_MOV(block, CURLCNTR, I0); // mov CURLCNTR,i0 + UML_MOV(block, LSTKP, I2); // mov LSTKP,i2 + + UML_RET(block); + + block->end(); +} + +void adsp21062_device::static_generate_push_status() +{ + // Trashes I2 + + code_label label = 1; + drcuml_block *block = m_drcuml->begin_block(32); + + // add a global entry for this + alloc_handle(m_drcuml.get(), &m_push_status, "push_status"); + UML_HANDLE(block, *m_push_status); // handle *m_push_status + + UML_MOV(block, I2, mem(&m_core->status_stkp)); // mov i2,[status_stkp] + UML_ADD(block, I2, I2, 1); // add i2,1 + UML_CMP(block, I2, 5); // cmp i2,5 + UML_JMPc(block, COND_L, label); // jl label1 + UML_CALLC(block, cfunc_statusstack_overflow, this); // callc cfunc_statusstack_overflow + + UML_LABEL(block, label++); // label1: + UML_CMP(block, I2, 0); // cmp i2,0 + UML_JMPc(block, COND_E, label); // je label2 + UML_AND(block, STKY, STKY, ~0x1000000); // and STKY,~0x1000000 + UML_JMP(block, label + 1); // jmp label3 + UML_LABEL(block, label++); // label2: + UML_OR(block, STKY, STKY, 0x1000000); // or STKY,0x1000000 + + UML_LABEL(block, label++); // label3: + UML_MOV(block, mem(&m_core->status_stkp), I2); // mov [status_stkp],i2 + + //TODO: load MODE1 + //TODO: load ASTAT + + UML_RET(block); + + block->end(); +} + +void adsp21062_device::static_generate_pop_status() +{ + // Trashes I2 + + code_label label = 1; + drcuml_block *block = m_drcuml->begin_block(32); + + // add a global entry for this + alloc_handle(m_drcuml.get(), &m_pop_status, "pop_status"); + UML_HANDLE(block, *m_pop_status); // handle *m_pop_status + + //TODO: store MODE1 + //TODO: store ASTAT + + UML_MOV(block, I2, mem(&m_core->status_stkp)); // mov i2,[status_stkp] + UML_CMP(block, I2, 0); // cmp i2,0 + UML_JMPc(block, COND_NE, label); // jl label1 + UML_CALLC(block, cfunc_statusstack_underflow, this); // callc cfunc_statusstack_underflow + + UML_LABEL(block, label++); // label1: + UML_SUB(block, I2, I2, 1); // sub i2,1 + UML_CMP(block, I2, 0); // cmp i2,0 + UML_JMPc(block, COND_E, label); // je label2 + UML_AND(block, STKY, STKY, ~0x1000000); // and STKY,~0x1000000 + UML_JMP(block, label + 1); // jmp label3 + UML_LABEL(block, label++); // label2: + UML_OR(block, STKY, STKY, 0x1000000); // or STKY,0x1000000 + + UML_LABEL(block, label++); // label3: + UML_MOV(block, mem(&m_core->status_stkp), I2); // mov [status_stkp],i2 + + UML_RET(block); + + block->end(); +} + + +void adsp21062_device::static_generate_exception(UINT8 exception, const char *name) +{ + code_handle *&exception_handle = m_exception[exception]; + + code_label label = 1; + + code_label label_nopush = label++; + + /* begin generating */ + drcuml_block *block = m_drcuml->begin_block(1024); + + /* add a global entry for this */ + alloc_handle(m_drcuml.get(), &exception_handle, name); + UML_HANDLE(block, *exception_handle); // handle name + + UML_AND(block, I3, mem(&m_core->irq_pending), IMASK); // and i3,[irq_pending],IMASK + UML_TZCNT(block, I3, I3); // tzcnt i3,i3 + + UML_MOV(block, I2, 1); // mov i2,1 + UML_SHL(block, I2, I2, I3); // shl i2,i2,i3 + UML_OR(block, IRPTL, IRPTL, I2); // or IRPTL,i2 + UML_XOR(block, mem(&m_core->irq_pending), mem(&m_core->irq_pending), I2); // xor [irq_pending],i2 + UML_MOV(block, mem(&m_core->active_irq_num), I3); // mov [active_irq_num],i3 + UML_MOV(block, mem(&m_core->interrupt_active), 1); // mov [interrupt_active],1 + + UML_CALLH(block, *m_push_pc); // callh m_push_pc + + UML_CMP(block, I3, 6); // cmp i3,6 + UML_JMPc(block, COND_L, label_nopush); // jl label_nopush + UML_CMP(block, I3, 8); // cmp i3,8 + UML_JMPc(block, COND_G, label_nopush); // jg label_nopush + UML_CALLH(block, *m_push_status); // callh m_push_status + + UML_LABEL(block, label_nopush); // label_nopush: + UML_SHL(block, I0, I3, 2); // shl i0,i3,2 + UML_ADD(block, I0, I0, 0x20000); // add i0,0x20000 + UML_HASHJMP(block, 0, I0, *m_nocode); // hashjmp i0,m_nocode + + block->end(); +} + + +void adsp21062_device::static_generate_mode1_ops() +{ + drcuml_block *block; + + // TODO: these could be further optimized with 64-bit or 128-bit swaps + // e.g SWAP128 instruction (swap 128 bits between 2 memory locations) + + block = m_drcuml->begin_block(128); + alloc_handle(m_drcuml.get(), &m_swap_dag1_0_3, "swap_dag1_0_3"); + UML_HANDLE(block, *m_swap_dag1_0_3); // handle name +#if !USE_SWAPDQ + for (int i = 0; i < 4; i++) + { + UML_MOV(block, I0, mem(&m_core->dag1.i[i])); + UML_MOV(block, I1, mem(&m_core->dag1_alt.i[i])); + UML_MOV(block, mem(&m_core->dag1.i[i]), I1); + UML_MOV(block, mem(&m_core->dag1_alt.i[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag1.m[i])); + UML_MOV(block, I1, mem(&m_core->dag1_alt.m[i])); + UML_MOV(block, mem(&m_core->dag1.m[i]), I1); + UML_MOV(block, mem(&m_core->dag1_alt.m[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag1.l[i])); + UML_MOV(block, I1, mem(&m_core->dag1_alt.l[i])); + UML_MOV(block, mem(&m_core->dag1.l[i]), I1); + UML_MOV(block, mem(&m_core->dag1_alt.l[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag1.b[i])); + UML_MOV(block, I1, mem(&m_core->dag1_alt.b[i])); + UML_MOV(block, mem(&m_core->dag1.b[i]), I1); + UML_MOV(block, mem(&m_core->dag1_alt.b[i]), I0); + } +#else + UML_SWAPDQ(block, mem(&m_core->dag1.i[0]), mem(&m_core->dag1_alt.i[0])); + UML_SWAPDQ(block, mem(&m_core->dag1.m[0]), mem(&m_core->dag1_alt.m[0])); + UML_SWAPDQ(block, mem(&m_core->dag1.l[0]), mem(&m_core->dag1_alt.l[0])); + UML_SWAPDQ(block, mem(&m_core->dag1.b[0]), mem(&m_core->dag1_alt.b[0])); +#endif + UML_RET(block); + block->end(); + + block = m_drcuml->begin_block(128); + alloc_handle(m_drcuml.get(), &m_swap_dag1_4_7, "swap_dag1_4_7"); + UML_HANDLE(block, *m_swap_dag1_4_7); // handle name +#if !USE_SWAPDQ + for (int i = 4; i < 8; i++) + { + UML_MOV(block, I0, mem(&m_core->dag1.i[i])); + UML_MOV(block, I1, mem(&m_core->dag1_alt.i[i])); + UML_MOV(block, mem(&m_core->dag1.i[i]), I1); + UML_MOV(block, mem(&m_core->dag1_alt.i[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag1.m[i])); + UML_MOV(block, I1, mem(&m_core->dag1_alt.m[i])); + UML_MOV(block, mem(&m_core->dag1.m[i]), I1); + UML_MOV(block, mem(&m_core->dag1_alt.m[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag1.l[i])); + UML_MOV(block, I1, mem(&m_core->dag1_alt.l[i])); + UML_MOV(block, mem(&m_core->dag1.l[i]), I1); + UML_MOV(block, mem(&m_core->dag1_alt.l[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag1.b[i])); + UML_MOV(block, I1, mem(&m_core->dag1_alt.b[i])); + UML_MOV(block, mem(&m_core->dag1.b[i]), I1); + UML_MOV(block, mem(&m_core->dag1_alt.b[i]), I0); + } +#else + UML_SWAPDQ(block, mem(&m_core->dag1.i[4]), mem(&m_core->dag1_alt.i[4])); + UML_SWAPDQ(block, mem(&m_core->dag1.m[4]), mem(&m_core->dag1_alt.m[4])); + UML_SWAPDQ(block, mem(&m_core->dag1.l[4]), mem(&m_core->dag1_alt.l[4])); + UML_SWAPDQ(block, mem(&m_core->dag1.b[4]), mem(&m_core->dag1_alt.b[4])); +#endif + UML_RET(block); + block->end(); + + block = m_drcuml->begin_block(128); + alloc_handle(m_drcuml.get(), &m_swap_dag2_0_3, "swap_dag2_0_3"); + UML_HANDLE(block, *m_swap_dag2_0_3); // handle name +#if !USE_SWAPDQ + for (int i = 0; i < 4; i++) + { + UML_MOV(block, I0, mem(&m_core->dag2.i[i])); + UML_MOV(block, I1, mem(&m_core->dag2_alt.i[i])); + UML_MOV(block, mem(&m_core->dag2.i[i]), I1); + UML_MOV(block, mem(&m_core->dag2_alt.i[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag2.m[i])); + UML_MOV(block, I1, mem(&m_core->dag2_alt.m[i])); + UML_MOV(block, mem(&m_core->dag2.m[i]), I1); + UML_MOV(block, mem(&m_core->dag2_alt.m[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag2.l[i])); + UML_MOV(block, I1, mem(&m_core->dag2_alt.l[i])); + UML_MOV(block, mem(&m_core->dag2.l[i]), I1); + UML_MOV(block, mem(&m_core->dag2_alt.l[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag2.b[i])); + UML_MOV(block, I1, mem(&m_core->dag2_alt.b[i])); + UML_MOV(block, mem(&m_core->dag2.b[i]), I1); + UML_MOV(block, mem(&m_core->dag2_alt.b[i]), I0); + } +#else + UML_SWAPDQ(block, mem(&m_core->dag2.i[0]), mem(&m_core->dag2_alt.i[0])); + UML_SWAPDQ(block, mem(&m_core->dag2.m[0]), mem(&m_core->dag2_alt.m[0])); + UML_SWAPDQ(block, mem(&m_core->dag2.l[0]), mem(&m_core->dag2_alt.l[0])); + UML_SWAPDQ(block, mem(&m_core->dag2.b[0]), mem(&m_core->dag2_alt.b[0])); +#endif + UML_RET(block); + block->end(); + + block = m_drcuml->begin_block(128); + alloc_handle(m_drcuml.get(), &m_swap_dag2_4_7, "swap_dag2_4_7"); + UML_HANDLE(block, *m_swap_dag2_4_7); // handle name +#if !USE_SWAPDQ + for (int i = 4; i < 8; i++) + { + UML_MOV(block, I0, mem(&m_core->dag2.i[i])); + UML_MOV(block, I1, mem(&m_core->dag2_alt.i[i])); + UML_MOV(block, mem(&m_core->dag2.i[i]), I1); + UML_MOV(block, mem(&m_core->dag2_alt.i[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag2.m[i])); + UML_MOV(block, I1, mem(&m_core->dag2_alt.m[i])); + UML_MOV(block, mem(&m_core->dag2.m[i]), I1); + UML_MOV(block, mem(&m_core->dag2_alt.m[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag2.l[i])); + UML_MOV(block, I1, mem(&m_core->dag2_alt.l[i])); + UML_MOV(block, mem(&m_core->dag2.l[i]), I1); + UML_MOV(block, mem(&m_core->dag2_alt.l[i]), I0); + UML_MOV(block, I0, mem(&m_core->dag2.b[i])); + UML_MOV(block, I1, mem(&m_core->dag2_alt.b[i])); + UML_MOV(block, mem(&m_core->dag2.b[i]), I1); + UML_MOV(block, mem(&m_core->dag2_alt.b[i]), I0); + } +#else + UML_SWAPDQ(block, mem(&m_core->dag2.i[4]), mem(&m_core->dag2_alt.i[4])); + UML_SWAPDQ(block, mem(&m_core->dag2.m[4]), mem(&m_core->dag2_alt.m[4])); + UML_SWAPDQ(block, mem(&m_core->dag2.l[4]), mem(&m_core->dag2_alt.l[4])); + UML_SWAPDQ(block, mem(&m_core->dag2.b[4]), mem(&m_core->dag2_alt.b[4])); +#endif + UML_RET(block); + block->end(); + + block = m_drcuml->begin_block(64); + alloc_handle(m_drcuml.get(), &m_swap_r0_7, "swap_r0_7"); + UML_HANDLE(block, *m_swap_r0_7); // handle name +#if !USE_SWAPDQ + for (int i = 0; i < 8; i++) + { + UML_MOV(block, I0, mem(&m_core->r[i])); + UML_MOV(block, I1, mem(&m_core->reg_alt[i])); + UML_MOV(block, mem(&m_core->r[i]), I1); + UML_MOV(block, mem(&m_core->reg_alt[i]), I0); + } +#else + UML_SWAPDQ(block, mem(&m_core->r[0]), mem(&m_core->reg_alt[0])); + UML_SWAPDQ(block, mem(&m_core->r[4]), mem(&m_core->reg_alt[4])); +#endif + UML_RET(block); + block->end(); + + block = m_drcuml->begin_block(64); + alloc_handle(m_drcuml.get(), &m_swap_r8_15, "swap_r8_15"); + UML_HANDLE(block, *m_swap_r8_15); // handle name +#if !USE_SWAPDQ + for (int i = 8; i < 16; i++) + { + UML_MOV(block, I0, mem(&m_core->r[i])); + UML_MOV(block, I1, mem(&m_core->reg_alt[i])); + UML_MOV(block, mem(&m_core->r[i]), I1); + UML_MOV(block, mem(&m_core->reg_alt[i]), I0); + } +#else + UML_SWAPDQ(block, mem(&m_core->r[8]), mem(&m_core->reg_alt[8])); + UML_SWAPDQ(block, mem(&m_core->r[12]), mem(&m_core->reg_alt[12])); +#endif + UML_RET(block); + block->end(); +} + + + + +void adsp21062_device::execute_run_drc() +{ + drcuml_state *drcuml = m_drcuml.get(); + int execute_result; + +// if (m_cache_dirty) +// printf("SHARC cache reset\n"); + + /* reset the cache if dirty */ + if (m_cache_dirty) + flush_cache(); + + m_cache_dirty = false; + m_core->force_recompile = 0; + + /* execute */ + do + { + execute_result = drcuml->execute(*m_entry); + + /* if we need to recompile, do it */ + if (execute_result == EXECUTE_MISSING_CODE) + { + compile_block(m_core->pc); + } + else if (execute_result == EXECUTE_UNMAPPED_CODE) + { + fatalerror("Attempted to execute unmapped code at PC=%08X\n", m_core->pc); + } + else if (execute_result == EXECUTE_RESET_CACHE) + { + flush_cache(); + } + } while (execute_result != EXECUTE_OUT_OF_CYCLES); +} + + +void adsp21062_device::compile_block(offs_t pc) +{ + compiler_state compiler = { 0 }; + + const opcode_desc *seqhead, *seqlast; + const opcode_desc *desclist; + bool override = false; + + drcuml_block *block; + + desclist = m_drcfe->describe_code(pc); + + bool succeeded = false; + while (!succeeded) + { + try + { + block = m_drcuml->begin_block(4096); + + for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next()) + { + const opcode_desc *curdesc; + UINT32 nextpc; + + /* determine the last instruction in this sequence */ + for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) + if (seqlast->flags & OPFLAG_END_SEQUENCE) + break; + assert(seqlast != nullptr); + + /* if we don't have a hash for this mode/pc, or if we are overriding all, add one */ + if (override || m_drcuml->hash_exists(0, seqhead->pc)) + UML_HASH(block, 0, seqhead->pc); // hash mode,pc + + /* if we already have a hash, and this is the first sequence, assume that we */ + /* are recompiling due to being out of sync and allow future overrides */ + else if (seqhead == desclist) + { + override = true; + UML_HASH(block, 0, seqhead->pc); // hash mode,pc + } + + /* otherwise, redispatch to that fixed PC and skip the rest of the processing */ + else + { + UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc + UML_HASHJMP(block, 0, seqhead->pc, *m_nocode); // hashjmp <0>,seqhead->pc,nocode + continue; + } + + /* label this instruction, if it may be jumped to locally */ + if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc + + /* iterate over instructions in the sequence and compile them */ + for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next()) + generate_sequence_instruction(block, &compiler, curdesc); + + /* if we need to return to the start, do it */ + if (seqlast->flags & OPFLAG_RETURN_TO_START) + nextpc = pc; + /* otherwise we just go to the next instruction */ + else + nextpc = seqlast->pc + (seqlast->skipslots + 1); + + + // force recompilation at end of block, if needed + UML_CMP(block, mem(&m_core->force_recompile), 0); + UML_JMPc(block, COND_Z, compiler.labelnum); + UML_MOV(block, mem(&m_cache_dirty), 1); + UML_MOV(block, mem(&m_core->icount), 0); + UML_LABEL(block, compiler.labelnum++); + + + /* count off cycles and go there */ + generate_update_cycles(block, &compiler, nextpc, TRUE); // + + if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc) + UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp ,nextpc,nocode + } + + block->end(); + succeeded = true; + } + catch (drcuml_block::abort_compilation &) + { + flush_cache(); + } + } +} + + +void adsp21062_device::flush_cache() +{ + /* empty the transient cache contents */ + m_drcuml->reset(); + + m_drcfe->flush(); + + try + { + // generate the entry point and out-of-cycles handlers + static_generate_entry_point(); + static_generate_nocode_handler(); + static_generate_out_of_cycles(); + + // generate utility functions + static_generate_push_pc(); + static_generate_pop_pc(); + static_generate_push_loop(); + static_generate_pop_loop(); + static_generate_push_status(); + static_generate_pop_status(); + static_generate_mode1_ops(); + + // generate exception handlers + static_generate_exception(EXCEPTION_INTERRUPT, "exception_interrupt"); + + // generate memory accessors + static_generate_memory_accessor(MEM_ACCESSOR_PM_READ48, "pm_read48", m_pm_read48); + static_generate_memory_accessor(MEM_ACCESSOR_PM_WRITE48, "pm_write48", m_pm_write48); + static_generate_memory_accessor(MEM_ACCESSOR_PM_READ32, "pm_read32", m_pm_read32); + static_generate_memory_accessor(MEM_ACCESSOR_PM_WRITE32, "pm_write32", m_pm_write32); + static_generate_memory_accessor(MEM_ACCESSOR_DM_READ32, "dm_read32", m_dm_read32); + static_generate_memory_accessor(MEM_ACCESSOR_DM_WRITE32, "dm_write32", m_dm_write32); + } + catch (drcuml_block::abort_compilation &) + { + fatalerror("Error generating SHARC static handlers\n"); + } +} + + +void adsp21062_device::static_generate_entry_point() +{ + code_label skip = 1; + drcuml_block *block; + + /* begin generating */ + block = m_drcuml->begin_block(20); + + /* forward references */ + alloc_handle(m_drcuml.get(), &m_nocode, "nocode"); + alloc_handle(m_drcuml.get(), &m_exception[EXCEPTION_INTERRUPT], "exception_interrupt"); + + alloc_handle(m_drcuml.get(), &m_entry, "entry"); + UML_HANDLE(block, *m_entry); // handle entry + + load_fast_iregs(block); // + + /* check for interrupts */ + UML_CMP(block, mem(&m_core->irq_pending), 0); // cmp [irq_pending],0 + UML_JMPc(block, COND_E, skip); // je skip + UML_CMP(block, mem(&m_core->interrupt_active), 0); // cmp [interrupt_active],0 + UML_JMPc(block, COND_NE, skip); // jne skip + UML_TEST(block, mem(&m_core->irq_pending), IMASK); // test [irq_pending],IMASK + UML_JMPc(block, COND_Z, skip); // jz skip + UML_TEST(block, mem(&m_core->mode1), MODE1_IRPTEN); // test MODE1,MODE1_IRPTEN + UML_JMPc(block, COND_Z, skip); // jz skip + + UML_MOV(block, I0, mem(&m_core->pc)); // mov i0,nextpc + UML_MOV(block, I1, 0); // mov i1,0 + UML_CALLH(block, *m_exception[EXCEPTION_INTERRUPT]); // callh m_exception[EXCEPTION_INTERRUPT] + + UML_LABEL(block, skip); + + /* generate a hash jump via the current mode and PC */ + UML_HASHJMP(block, 0, mem(&m_core->pc), *m_nocode); // hashjmp ,,nocode + + block->end(); +} + + +void adsp21062_device::static_generate_nocode_handler() +{ + drcuml_block *block; + + /* begin generating */ + block = m_drcuml->begin_block(10); + + /* generate a hash jump via the current mode and PC */ + alloc_handle(m_drcuml.get(), &m_nocode, "nocode"); + UML_HANDLE(block, *m_nocode); // handle nocode + UML_GETEXP(block, I0); // getexp i0 + UML_MOV(block, mem(&m_core->pc), I0); // mov [pc],i0 + save_fast_iregs(block); // + UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE + + block->end(); +} + +void adsp21062_device::static_generate_out_of_cycles() +{ + drcuml_block *block; + + /* begin generating */ + block = m_drcuml->begin_block(10); + + /* generate a hash jump via the current mode and PC */ + alloc_handle(m_drcuml.get(), &m_out_of_cycles, "out_of_cycles"); + UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles + UML_GETEXP(block, I0); // getexp i0 + UML_MOV(block, mem(&m_core->pc), I0); // mov ,i0 + save_fast_iregs(block); // + UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES + + block->end(); +} + + +void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + /* add an entry for the log */ +// if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) +// log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); + + /* set the PC map variable */ + UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc + + /* accumulate total cycles */ + compiler->cycles += desc->cycles; + + /* update the icount map variable */ + UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles + + /* if we are debugging, call the debugger */ + if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) + { + UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc + save_fast_iregs(block); // + UML_DEBUG(block, desc->pc); // debug desc->pc + } + + /* if we hit an unmapped address, fatal error */ + if (desc->flags & OPFLAG_COMPILER_UNMAPPED) + { + UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc + save_fast_iregs(block); // + UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE + } + + /* if this is an invalid opcode, generate the exception now */ +// if (desc->flags & OPFLAG_INVALID_OPCODE) +// UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x80000); // exh exception_program,0x80000 + + /* unless this is a virtual no-op, it's a regular instruction */ + if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + { + /* compile the instruction */ + if (!generate_opcode(block, compiler, desc)) + { + UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc + UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); // dmov [arg64],*desc->opptr.q + UML_CALLC(block, cfunc_unimplemented, this); // callc cfunc_unimplemented,ppc + } + } + + + // insert delayed MODE1 operation if needed + if (compiler->mode1_delay.counter > 0) + { + compiler->mode1_delay.counter--; + if (compiler->mode1_delay.counter <= 0) + { + switch (compiler->mode1_delay.mode) + { + case MODE1_WRITE_IMM: + generate_write_mode1_imm(block, compiler, desc, compiler->mode1_delay.data); + break; + case MODE1_WRITE_REG: + fatalerror("MODE1 delay REG"); + break; + case MODE1_SET: + generate_set_mode1_imm(block, compiler, desc, compiler->mode1_delay.data); + break; + case MODE1_CLEAR: + generate_clear_mode1_imm(block, compiler, desc, compiler->mode1_delay.data); + break; + case MODE1_TOGGLE: + fatalerror("MODE1 delay TOGGLE"); + break; + } + } + } + + + // insert loop check at this instruction if needed + if (desc->userflags & OP_USERFLAG_COUNTER_LOOP) + { + code_label label_expire = compiler->labelnum++; + UML_MOV(block, I1, mem(&m_core->lstkp)); // mov i1,[m_core->lstkp] + UML_LOAD(block, I0, m_core->lcstack, I1, SIZE_DWORD, SCALE_x4); // load i0,m_core->lcstack,i1,dword,scale_x4 + UML_SUB(block, I0, I0, 1); // sub i0,1 + UML_STORE(block, m_core->lcstack, I1, I0, SIZE_DWORD, SCALE_x4); // store m_core->lcstack,i1,i0,dword,scale_x4 + UML_SUB(block, CURLCNTR, CURLCNTR, 1); // sub CURLCNTR,1 + UML_JMPc(block, COND_E, label_expire); // jne label_expire + + generate_jump(block, compiler, desc, false, false, false); + + UML_LABEL(block, label_expire); // label_expire: + UML_CALLH(block, *m_pop_pc); // callh m_pop_pc + UML_CALLH(block, *m_pop_loop); // callh m_pop_loop + } + if (desc->userflags & OP_USERFLAG_COND_LOOP) + { + code_label label_expire = compiler->labelnum++; + + int condition = (desc->userflags & OP_USERFLAG_COND_FIELD) >> OP_USERFLAG_COND_FIELD_SHIFT; + generate_do_condition(block, compiler, desc, condition, label_expire, m_core->astat_delay_copy); + + generate_jump(block, compiler, desc, false, false, false); + + UML_LABEL(block, label_expire); + UML_CALLH(block, *m_pop_pc); + UML_CALLH(block, *m_pop_loop); + } + + // copy ASTAT bits over for conditional loop + if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY) + { + if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AZ) + UML_MOV(block, mem(&m_core->astat_delay_copy.az), mem(&m_core->astat_drc.az)); + if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AN) + UML_MOV(block, mem(&m_core->astat_delay_copy.an), mem(&m_core->astat_drc.an)); + if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AV) + UML_MOV(block, mem(&m_core->astat_delay_copy.av), mem(&m_core->astat_drc.av)); + if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AC) + UML_MOV(block, mem(&m_core->astat_delay_copy.ac), mem(&m_core->astat_drc.ac)); + if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_MN) + UML_MOV(block, mem(&m_core->astat_delay_copy.mn), mem(&m_core->astat_drc.mn)); + if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_MV) + UML_MOV(block, mem(&m_core->astat_delay_copy.mv), mem(&m_core->astat_drc.mv)); + if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_SV) + UML_MOV(block, mem(&m_core->astat_delay_copy.sv), mem(&m_core->astat_drc.sv)); + if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_SZ) + UML_MOV(block, mem(&m_core->astat_delay_copy.sz), mem(&m_core->astat_drc.sz)); + if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_BTF) + UML_MOV(block, mem(&m_core->astat_delay_copy.btf), mem(&m_core->astat_drc.btf)); + } +} + +void adsp21062_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, int allow_exception) +{ + /* check full interrupts if pending */ + if (compiler->checkints) + { + code_label skip = compiler->labelnum++; + compiler->checkints = FALSE; + + UML_CMP(block, mem(&m_core->irq_pending), 0); // cmp [irq_pending],0 + UML_JMPc(block, COND_E, skip); // je skip + UML_CMP(block, mem(&m_core->interrupt_active), 0); // cmp [interrupt_active],0 + UML_JMPc(block, COND_NE, skip); // jne skip + UML_TEST(block, mem(&m_core->irq_pending), IMASK); // test [irq_pending],IMASK + UML_JMPc(block, COND_Z, skip); // jz skip + UML_TEST(block, mem(&m_core->mode1), MODE1_IRPTEN); // test MODE1,MODE1_IRPTEN + UML_JMPc(block, COND_Z, skip); // jz skip + + UML_MOV(block, I0, param); // mov i0,nextpc + UML_MOV(block, I1, compiler->cycles); // mov i1,cycles + UML_CALLH(block, *m_exception[EXCEPTION_INTERRUPT]); // callh m_exception[EXCEPTION_INTERRUPT] + + UML_LABEL(block, skip); + } + + /* account for cycles */ + if (compiler->cycles > 0) + { + UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), MAPVAR_CYCLES); // sub icount,icount,cycles + UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0 + if (allow_exception) + UML_EXHc(block, COND_S, *m_out_of_cycles, param); // exh out_of_cycles,nextpc + } + compiler->cycles = 0; +} + +void adsp21062_device::generate_write_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data) +{ + code_label skip; + + // TODO: swap effects + if (data & 0x1) + fatalerror("generate_write_mode1_imm: tried to enable I8 bit reversing"); + if (data & 0x2) + fatalerror("generate_write_mode1_imm: tried to enable I0 bit reversing"); + if (data & 0x4) + fatalerror("generate_write_mode1_imm: tried to enable MR alternate"); + + // DAG1 regs 4-7 + skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x8); + UML_JMPc(block, (data & 0x8) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same + UML_CALLH(block, *m_swap_dag1_4_7); + UML_LABEL(block, skip); + + // DAG1 regs 0-3 + skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x10); + UML_JMPc(block, (data & 0x10) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same + UML_CALLH(block, *m_swap_dag1_0_3); + UML_LABEL(block, skip); + + // DAG2 regs 4-7 + skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x20); + UML_JMPc(block, (data & 0x20) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same + UML_CALLH(block, *m_swap_dag2_4_7); + UML_LABEL(block, skip); + + // DAG2 regs 0-3 + skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x40); + UML_JMPc(block, (data & 0x40) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same + UML_CALLH(block, *m_swap_dag2_0_3); + UML_LABEL(block, skip); + + // REG 8-15 + skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x80); + UML_JMPc(block, (data & 0x80) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same + UML_CALLH(block, *m_swap_r8_15); + UML_LABEL(block, skip); + + // REG 0-7 + skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x400); + UML_JMPc(block, (data & 0x400) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same + UML_CALLH(block, *m_swap_r0_7); + UML_LABEL(block, skip); + + UML_MOV(block, MODE1, data); +} + +void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data) +{ + if (data & 0x1) + fatalerror("generate_set_mode1_imm: tried to enable I8 bit reversing"); + if (data & 0x2) + fatalerror("generate_set_mode1_imm: tried to enable I0 bit reversing"); + if (data & 0x4) + fatalerror("generate_set_mode1_imm: tried to enable MR alternate"); + if (data & 0x8) // DAG1 regs 4-7 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x8); + UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1 + UML_CALLH(block, *m_swap_dag1_4_7); + UML_LABEL(block, skip); + } + if (data & 0x10) // DAG1 regs 0-3 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x10); + UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1 + UML_CALLH(block, *m_swap_dag1_0_3); + UML_LABEL(block, skip); + } + if (data & 0x20) // DAG2 regs 4-7 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x20); + UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1 + UML_CALLH(block, *m_swap_dag2_4_7); + UML_LABEL(block, skip); + } + if (data & 0x40) // DAG1 regs 0-3 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x40); + UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1 + UML_CALLH(block, *m_swap_dag2_0_3); + UML_LABEL(block, skip); + } + if (data & 0x80) // REG 8-15 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x80); + UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1 + UML_CALLH(block, *m_swap_r8_15); + UML_LABEL(block, skip); + } + if (data & 0x400) // REG 0-7 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x400); + UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1 + UML_CALLH(block, *m_swap_r0_7); + UML_LABEL(block, skip); + } + + UML_OR(block, MODE1, MODE1, data); +} + +void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data) +{ + if (data & 0x1) + fatalerror("generate_clear_mode1_imm: tried to disable I8 bit reversing"); + if (data & 0x2) + fatalerror("generate_clear_mode1_imm: tried to disable I0 bit reversing"); + if (data & 0x4) + fatalerror("generate_clear_mode1_imm: tried to disable MR alternate"); + if (data & 0x8) // DAG1 regs 4-7 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x8); + UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0 + UML_CALLH(block, *m_swap_dag1_4_7); + UML_LABEL(block, skip); + } + if (data & 0x10) // DAG1 regs 0-3 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x10); + UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0 + UML_CALLH(block, *m_swap_dag1_0_3); + UML_LABEL(block, skip); + } + if (data & 0x20) // DAG2 regs 4-7 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x20); + UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0 + UML_CALLH(block, *m_swap_dag2_4_7); + UML_LABEL(block, skip); + } + if (data & 0x40) // DAG1 regs 0-3 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x40); + UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0 + UML_CALLH(block, *m_swap_dag2_0_3); + UML_LABEL(block, skip); + } + if (data & 0x80) // REG 8-15 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x80); + UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0 + UML_CALLH(block, *m_swap_r8_15); + UML_LABEL(block, skip); + } + if (data & 0x400) // REG 0-7 + { + code_label skip = compiler->labelnum++; + UML_TEST(block, MODE1, 0x400); + UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0 + UML_CALLH(block, *m_swap_r0_7); + UML_LABEL(block, skip); + } + + UML_AND(block, MODE1, MODE1, ~data); +} + + + +void adsp21062_device::generate_update_circular_buffer(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int g, int i) +{ + // TODO +} + +void adsp21062_device::generate_astat_copy(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + UML_MOV(block, mem(&m_core->astat_drc_copy.az), ASTAT_AZ); + UML_MOV(block, mem(&m_core->astat_drc_copy.av), ASTAT_AV); + UML_MOV(block, mem(&m_core->astat_drc_copy.an), ASTAT_AN); + UML_MOV(block, mem(&m_core->astat_drc_copy.av), ASTAT_AV); + UML_MOV(block, mem(&m_core->astat_drc_copy.as), ASTAT_AS); + UML_MOV(block, mem(&m_core->astat_drc_copy.ai), ASTAT_AI); + UML_MOV(block, mem(&m_core->astat_drc_copy.af), ASTAT_AF); + UML_MOV(block, mem(&m_core->astat_drc_copy.mn), ASTAT_MN); + UML_MOV(block, mem(&m_core->astat_drc_copy.mv), ASTAT_MV); + UML_MOV(block, mem(&m_core->astat_drc_copy.mu), ASTAT_MU); + UML_MOV(block, mem(&m_core->astat_drc_copy.mi), ASTAT_MI); + UML_MOV(block, mem(&m_core->astat_drc_copy.sv), ASTAT_SV); + UML_MOV(block, mem(&m_core->astat_drc_copy.sz), ASTAT_SZ); + UML_MOV(block, mem(&m_core->astat_drc_copy.ss), ASTAT_SS); + UML_MOV(block, mem(&m_core->astat_drc_copy.btf), ASTAT_BTF); + UML_MOV(block, mem(&m_core->astat_drc_copy.cacc), mem(&m_core->astat_drc.cacc)); +} + + + +void adsp21062_device::generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool delayslot) +{ + // I0 = target pc for dynamic branches + + compiler_state compiler_temp = *compiler; + + // save branch target + if (desc->targetpc == BRANCH_TARGET_DYNAMIC) + { + UML_MOV(block, mem(&m_core->jmpdest), I0); // mov [jmpdest],i0 + } + + // compile delay slots if needed + if (delayslot) + { + generate_sequence_instruction(block, &compiler_temp, desc->delay.first()); + generate_sequence_instruction(block, &compiler_temp, desc->delay.last()); + } + + if (delayslot) + UML_MOV(block, I0, desc->pc + 3); + else + UML_MOV(block, I0, desc->pc + 1); + UML_CALLH(block, *m_push_pc); + + // update cycles and hash jump + if (desc->targetpc != BRANCH_TARGET_DYNAMIC) + { + generate_update_cycles(block, &compiler_temp, desc->targetpc, TRUE); + if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000 + else + UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp 0,targetpc,nocode + } + else + { + generate_update_cycles(block, &compiler_temp, mem(&m_core->jmpdest), TRUE); + UML_HASHJMP(block, 0, mem(&m_core->jmpdest), *m_nocode); // hashjmp 0,jmpdest,nocode + } + + // update compiler label + compiler->labelnum = compiler_temp.labelnum; + + /* reset the mapvar to the current cycles and account for skipped slots */ + compiler->cycles += desc->skipslots; + UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles +} + +void adsp21062_device::generate_jump(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool delayslot, bool loopabort, bool clearint) +{ + // I0 = target pc for dynamic branches + + compiler_state compiler_temp = *compiler; + + // save branch target + if (desc->targetpc == BRANCH_TARGET_DYNAMIC) + { + UML_MOV(block, mem(&m_core->jmpdest), I0); // mov [jmpdest],i0 + } + + // compile delay slots if needed + if (delayslot) + { + generate_sequence_instruction(block, &compiler_temp, desc->delay.first()); + generate_sequence_instruction(block, &compiler_temp, desc->delay.last()); + } + + // update cycles and hash jump + if (desc->targetpc != BRANCH_TARGET_DYNAMIC) + { + generate_update_cycles(block, &compiler_temp, desc->targetpc, TRUE); + if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000 + else + UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp 0,targetpc,nocode + } + else + { + generate_update_cycles(block, &compiler_temp, mem(&m_core->jmpdest), TRUE); + UML_HASHJMP(block, 0, mem(&m_core->jmpdest), *m_nocode); // hashjmp 0,jmpdest,nocode + } + + // update compiler label + compiler->labelnum = compiler_temp.labelnum; + + /* reset the mapvar to the current cycles and account for skipped slots */ + compiler->cycles += desc->skipslots; + UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles +} + +/*------------------------------------------------- +generate_write_ureg - UREG is read into I0 +-------------------------------------------------*/ + +void adsp21062_device::generate_read_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool has_compute) +{ + // UREG is read into I0 + + switch (ureg) + { + // REG 0-15 + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + UML_MOV(block, I0, REG(ureg & 0xf)); + break; + // I0-7 + case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: + UML_MOV(block, I0, mem(&m_core->dag1.i[ureg & 7])); + break; + // I8-15 + case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: + UML_MOV(block, I0, mem(&m_core->dag2.i[ureg & 7])); + break; + // M0-7 + case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: + UML_MOV(block, I0, mem(&m_core->dag1.m[ureg & 7])); + break; + // M8-15 + case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: + UML_MOV(block, I0, mem(&m_core->dag2.m[ureg & 7])); + break; + // L0-7 + case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: + UML_MOV(block, I0, mem(&m_core->dag1.l[ureg & 7])); + break; + // L8-15 + case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: + UML_MOV(block, I0, mem(&m_core->dag2.l[ureg & 7])); + break; + // B0-7 + case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: + UML_MOV(block, I0, mem(&m_core->dag1.b[ureg & 7])); + break; + // B8-15 + case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f: + UML_MOV(block, I0, mem(&m_core->dag2.b[ureg & 7])); + break; + + case 0x64: // PCSTK + fatalerror("generate_read_ureg: PCSTK"); + break; + case 0x70: // USTAT1 + UML_MOV(block, I0, mem(&m_core->ustat1)); + break; + case 0x71: // USTAT2 + UML_MOV(block, I0, mem(&m_core->ustat2)); + break; + case 0x79: // IRPTL + UML_MOV(block, I0, mem(&m_core->irptl)); + break; + case 0x7a: // MODE2 + UML_MOV(block, I0, mem(&m_core->mode2)); + break; + case 0x7b: // MODE1 + UML_MOV(block, I0, mem(&m_core->mode1)); + break; + case 0x7c: // ASTAT + // construct from bits + if (!has_compute) + { + // no compute, just read normally from ASTAT + UML_XOR(block, I0, I0, I0); + UML_OR(block, I0, I0, ASTAT_AZ); + UML_SHL(block, I1, ASTAT_AV, 1); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_AN, 2); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_AC, 3); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_AS, 4); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_AI, 5); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_MN, 6); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_MV, 7); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_MU, 8); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_MI, 9); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_AF, 10); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_SV, 11); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_SZ, 12); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_SS, 13); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, ASTAT_BTF, 18); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, FLAG0, 19); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, FLAG1, 20); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, FLAG2, 21); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, FLAG3, 22); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc.cacc), 24); + UML_OR(block, I0, I0, I1); + } + else + { + // read from ASTAT copy if this opcode also does compute + UML_XOR(block, I0, I0, I0); + UML_OR(block, I0, I0, mem(&m_core->astat_drc_copy.az)); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.av), 1); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.an), 2); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.ac), 3); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.as), 4); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.ai), 5); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.mn), 6); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.mv), 7); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.mu), 8); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.mi), 9); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.af), 10); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.sv), 11); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.sz), 12); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.ss), 13); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.btf), 18); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, FLAG0, 19); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, FLAG1, 20); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, FLAG2, 21); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, FLAG3, 22); + UML_OR(block, I0, I0, I1); + UML_SHL(block, I1, mem(&m_core->astat_drc_copy.cacc), 24); + UML_OR(block, I0, I0, I1); + } + break; + case 0x7d: // IMASK + UML_MOV(block, I0, mem(&m_core->imask)); + break; + case 0x7e: // STKY + UML_MOV(block, I0, mem(&m_core->stky)); + break; + case 0xdb: // PX + UML_DMOV(block, I0, mem(&m_core->px)); // NOTE: this returns 64 bits + break; + case 0xdc: // PX1 (bits 0-15 of PX) + UML_MOV(block, I0, mem(&m_core->px)); + UML_AND(block, I0, I0, 0xffff); + break; + case 0xdd: // PX2 (bits 16-47 of PX) + UML_DMOV(block, I0, mem(&m_core->px)); + UML_DSHR(block, I0, I0, 16); + UML_DAND(block, I0, I0, 0xffffffff); + break; + + default: + fatalerror("generate_read_ureg %02X", ureg); + break; + } +} + + +/*------------------------------------------------- + generate_write_ureg - contents of register I0 or 32-bit immediate data are written into UREG +-------------------------------------------------*/ + +void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool imm, UINT32 data) +{ + switch (ureg) + { + // REG 0-15 + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + UML_MOV(block, REG(ureg & 0xf), imm ? data : I0); + break; + // I0-7 + case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: + UML_MOV(block, DM_I(ureg & 7), imm ? data : I0); + break; + // I8-15 + case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: + UML_MOV(block, PM_I(ureg & 7), imm ? data : I0); + break; + // M0-7 + case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: + UML_MOV(block, DM_M(ureg & 7), imm ? data : I0); + break; + // M8-15 + case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: + UML_MOV(block, PM_M(ureg & 7), imm ? data : I0); + break; + // L0-7 + case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: + UML_MOV(block, DM_L(ureg & 7), imm ? data : I0); + break; + // L8-15 + case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: + UML_MOV(block, PM_L(ureg & 7), imm ? data : I0); + break; + // B0-7 + case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: + // Note: loading B also loads the same value in I + UML_MOV(block, DM_B(ureg & 7), imm ? data : I0); + UML_MOV(block, DM_I(ureg & 7), imm ? data : I0); + break; + // B8-15 + case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f: + // Note: loading B also loads the same value in I + UML_MOV(block, PM_B(ureg & 7), imm ? data : I0); + UML_MOV(block, PM_B(ureg & 7), imm ? data : I0); + break; + + case 0x64: // PCSTK + fatalerror("generate_write_ureg: PCSTK"); + break; + case 0x70: // USTAT1 + UML_MOV(block, mem(&m_core->ustat1), imm ? data : I0); + break; + case 0x71: // USTAT2 + UML_MOV(block, mem(&m_core->ustat2), imm ? data : I0); + break; + case 0x79: // IRPTL + UML_MOV(block, mem(&m_core->irptl), imm ? data : I0); + break; + case 0x7a: // MODE2 + UML_MOV(block, mem(&m_core->mode2), imm ? data : I0); + break; + case 0x7b: // MODE1 + // MODE1 needs to be written delayed + if (imm) + { + compiler->mode1_delay.counter = 2; + compiler->mode1_delay.data = data; + compiler->mode1_delay.mode = MODE1_WRITE_IMM; + } + else + { + compiler->mode1_delay.counter = 2; + compiler->mode1_delay.mode = MODE1_WRITE_REG; + UML_MOV(block, mem(&m_core->mode1_delay_data), I0); + } + break; + case 0x7c: // ASTAT + // TODO: needs bit break up + fatalerror("generate_write_ureg: ASTAT"); + break; + case 0x7d: // IMASK + UML_MOV(block, mem(&m_core->imask), imm ? data : I0); + break; + case 0x7e: // STKY + UML_MOV(block, mem(&m_core->stky), imm ? data : I0); + break; + case 0xdb: // PX + if (imm) + { + fatalerror("generate_write_ureg %02X with immediate!", ureg); + } + else + { + UML_DMOV(block, mem(&m_core->px), I0); + } + break; + case 0xdc: // PX1 (bits 0-15 of PX) + if (imm) + { + UML_DAND(block, mem(&m_core->px), mem(&m_core->px), ~0xffff); + UML_DOR(block, mem(&m_core->px), mem(&m_core->px), (UINT64)(data)); + } + else + { + UML_DAND(block, mem(&m_core->px), mem(&m_core->px), ~0xffff); + UML_DXOR(block, I1, I1, I1); + UML_DAND(block, I1, I0, 0xffff); + UML_DOR(block, mem(&m_core->px), mem(&m_core->px), I1); + } + break; + case 0xdd: // PX2 (bits 16-47 of PX) + if (imm) + { + UML_DAND(block, mem(&m_core->px), mem(&m_core->px), 0xffff); + UML_DOR(block, mem(&m_core->px), mem(&m_core->px), (UINT64)(data) << 16); + } + else + { + UML_DAND(block, mem(&m_core->px), mem(&m_core->px), 0xffff); + UML_DSHL(block, I0, I0, 16); + UML_DOR(block, mem(&m_core->px), mem(&m_core->px), I0); + } + break; + + default: + fatalerror("generate_write_ureg %02X", ureg); + break; + } +} + +int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + UINT64 opcode = desc->opptr.q[0]; + + switch ((opcode >> 45) & 7) + { + case 0: // subops + { + UINT32 subop = (opcode >> 40) & 0x1f; + switch (subop) + { + case 0x00: // NOP / idle |000|00000| + if (opcode & U64(0x008000000000)) + { + // IDLE + UML_MOV(block, mem(&m_core->idle), 1); + UML_MOV(block, mem(&m_core->icount), 0); + return TRUE; + } + else + { + // NOP + return TRUE; + } + break; + + case 0x01: // compute |000|00001| + { + int cond = (opcode >> 33) & 0x1f; + + bool has_condition = !if_condition_always_true(cond); + int skip_label = 0; + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + + generate_compute(block, compiler, desc); + + if (has_condition) + UML_LABEL(block, skip_label); + return TRUE; + } + + case 0x02: // immediate shift |000|00010| + { + int shiftop = (opcode >> 16) & 0x3f; + int rn = (opcode >> 4) & 0xf; + int rx = (opcode & 0xf); + int cond = (opcode >> 33) & 0x1f; + int data = ((opcode >> 8) & 0xff) | ((opcode >> 19) & 0xf00); + + bool has_condition = !if_condition_always_true(cond); + int skip_label = 0; + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + + generate_shift_imm(block, compiler, desc, data, shiftop, rn, rx); + + if (has_condition) + UML_LABEL(block, skip_label); + return TRUE; + } + + case 0x04: // compute / modify |000|00100| + { + int cond = (opcode >> 33) & 0x1f; + int compute = opcode & 0x7fffff; + int g = (opcode >> 38) & 0x1; + int m = (opcode >> 27) & 0x7; + int i = (opcode >> 30) & 0x7; + + bool has_condition = !if_condition_always_true(cond); + int skip_label = 0; + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + + generate_compute(block, compiler, desc); + + if (g) + { + // PM + UML_ADD(block, PM_I(i), PM_I(i), PM_M(m)); + } + else + { + // DM + UML_ADD(block, DM_I(i), DM_I(i), DM_M(m)); + } + + generate_update_circular_buffer(block, compiler, desc, g, i); + + if (has_condition) + UML_LABEL(block, skip_label); + + return TRUE; + } + + case 0x06: // direct jump|call |000|00110| + { + int b = (opcode >> 39) & 0x1; + int j = (opcode >> 26) & 0x1; + int la = (opcode >> 38) & 0x1; + int ci = (opcode >> 24) & 0x1; + int cond = (opcode >> 33) & 0x1f; + + bool has_condition = !if_condition_always_true(cond); + int skip_label = 0; + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + if (b) // call + { + generate_call(block, compiler, desc, j != 0); + } + else // jump + { + generate_jump(block, compiler, desc, j != 0, la != 0, ci != 0); + } + if (has_condition) + UML_LABEL(block, skip_label); + return TRUE; + } + + case 0x07: // direct jump|call |000|00111| + { + int b = (opcode >> 39) & 0x1; + int j = (opcode >> 26) & 0x1; + int la = (opcode >> 38) & 0x1; + int ci = (opcode >> 24) & 0x1; + int cond = (opcode >> 33) & 0x1f; + + bool has_condition = !if_condition_always_true(cond); + int skip_label = 0; + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + if (b) // call + { + generate_call(block, compiler, desc, j != 0); + } + else // jump + { + generate_jump(block, compiler, desc, j != 0, la != 0, ci != 0); + } + if (has_condition) + UML_LABEL(block, skip_label); + return TRUE; + } + + case 0x08: // indirect jump|call / compute |000|01000| + { + int la = (opcode >> 38) & 0x1; + int ci = (opcode >> 24) & 0x1; + int b = (opcode >> 39) & 0x1; + int j = (opcode >> 26) & 0x1; + int e = (opcode >> 25) & 0x1; + int pmi = (opcode >> 30) & 0x7; + int pmm = (opcode >> 27) & 0x7; + int cond = (opcode >> 33) & 0x1f; + int compute = opcode & 0x7fffff; + + if (e) + { + // IF ... ELSE + + int label_else = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, label_else); + + UML_ADD(block, I0, PM_I(pmi), PM_M(pmm)); + + if (b) // call + { + generate_call(block, compiler, desc, j != 0); + } + else // jump + { + generate_jump(block, compiler, desc, j != 0, la != 0, ci != 0); + } + + UML_LABEL(block, label_else); + generate_compute(block, compiler, desc); + } + else + { + // IF + bool has_condition = !if_condition_always_true(cond); + int skip_label = 0; + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + generate_compute(block, compiler, desc); + + UML_ADD(block, I0, PM_I(pmi), PM_M(pmm)); + + if (b) // call + { + generate_call(block, compiler, desc, j != 0); + } + else // jump + { + generate_jump(block, compiler, desc, j != 0, la != 0, ci != 0); + } + + if (has_condition) + UML_LABEL(block, skip_label); + } + + return TRUE; + } + + case 0x09: // indirect jump|call / compute |000|01001| + { + int la = (opcode >> 38) & 0x1; + int ci = (opcode >> 24) & 0x1; + int b = (opcode >> 39) & 0x1; + int j = (opcode >> 26) & 0x1; + int e = (opcode >> 25) & 0x1; + int cond = (opcode >> 33) & 0x1f; + int compute = opcode & 0x7fffff; + + if (e) + { + // IF ... ELSE + + int label_else = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, label_else); + + if (b) // call + { + generate_call(block, compiler, desc, j != 0); + } + else // jump + { + generate_jump(block, compiler, desc, j != 0, la != 0, ci != 0); + } + + UML_LABEL(block, label_else); + generate_compute(block, compiler, desc); + } + else + { + // IF + bool has_condition = !if_condition_always_true(cond); + int skip_label = 0; + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + generate_compute(block, compiler, desc); + + if (b) // call + { + generate_call(block, compiler, desc, j != 0); + } + else // jump + { + generate_jump(block, compiler, desc, j != 0, la != 0, ci != 0); + } + + if (has_condition) + UML_LABEL(block, skip_label); + } + + return TRUE; + } + + case 0x0a: // return from subroutine / compute |000|01010| + { + int cond = (opcode >> 33) & 0x1f; + int j = (opcode >> 26) & 0x1; + int e = (opcode >> 25) & 0x1; + //int lr = (opcode >> 24) & 0x1; + int compute = opcode & 0x7fffff; + + // TODO: loop re-entry + + if (e) + { + // IF ... ELSE + + int label_else = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, label_else); + + UML_CALLH(block, *m_pop_pc); + generate_jump(block, compiler, desc, j != 0, false, false); + + UML_LABEL(block, label_else); + generate_compute(block, compiler, desc); + } + else + { + // IF + bool has_condition = !if_condition_always_true(cond); + int skip_label = 0; + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + generate_compute(block, compiler, desc); + + UML_CALLH(block, *m_pop_pc); + generate_jump(block, compiler, desc, j != 0, false, false); + + if (has_condition) + UML_LABEL(block, skip_label); + } + + return TRUE; + } + + case 0x0b: // return from interrupt / compute |000|01011| + { + int cond = (opcode >> 33) & 0x1f; + int j = (opcode >> 26) & 0x1; + int e = (opcode >> 25) & 0x1; + int compute = opcode & 0x7fffff; + + + code_label skip_pop = compiler->labelnum++; + + UML_MOV(block, mem(&m_core->interrupt_active), 0); // mov [interrupt_active],0 + UML_MOV(block, I0, 1); // mov i0,1 + UML_SHL(block, I0, I0, mem(&m_core->active_irq_num)); // shl i0,[active_irq_num] + UML_XOR(block, IRPTL, IRPTL, I0); // xor IRPTL,i0 + UML_CMP(block, mem(&m_core->status_stkp), 0); // cmp [status_stkp],0 + UML_JMPc(block, COND_Z, skip_pop); // jz skip_pop + UML_CALLH(block, *m_pop_status); // callh m_pop_status + + UML_LABEL(block, skip_pop); // skip_pop: + + // TODO: check interrupts + + if (e) + { + // IF ... ELSE + + code_label label_else = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, label_else); + + UML_CALLH(block, *m_pop_pc); + generate_jump(block, compiler, desc, j != 0, false, false); + + UML_LABEL(block, label_else); + generate_compute(block, compiler, desc); + } + else + { + // IF + bool has_condition = !if_condition_always_true(cond); + code_label skip_label = 0; + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + generate_compute(block, compiler, desc); + + UML_CALLH(block, *m_pop_pc); + generate_jump(block, compiler, desc, j != 0, false, false); + + if (has_condition) + UML_LABEL(block, skip_label); + } + + return TRUE; + } + + case 0x0c: // do until counter expired |000|01100| + { + UINT16 data = (UINT16)(opcode >> 24); + int offset = SIGN_EXTEND24(opcode & 0xffffff); + UINT32 address = desc->pc + offset; + + UML_MOV(block, LCNTR, data); + if (data > 0) + { + // push pc + UML_MOV(block, I0, desc->pc + 1); + UML_CALLH(block, *m_push_pc); + + // push loop + UML_MOV(block, I0, data); + UML_MOV(block, I1, address); + UML_CALLH(block, *m_push_loop); + } + return TRUE; + } + + case 0x0d: // do until counter expired |000|01101| + { + int ureg = (opcode >> 32) & 0xff; + int offset = SIGN_EXTEND24(opcode & 0xffffff); + UINT32 address = desc->pc + offset; + + generate_read_ureg(block, compiler, desc, ureg, false); + + UML_AND(block, I3, I0, 0xffff); + UML_MOV(block, LCNTR, I3); + + // push pc + UML_MOV(block, I0, desc->pc + 1); + UML_CALLH(block, *m_push_pc); + + // push loop + UML_MOV(block, I0, I3); + UML_MOV(block, I1, address); + UML_CALLH(block, *m_push_loop); + return TRUE; + } + + case 0x0e: // do until |000|01110| + { + int offset = SIGN_EXTEND24(opcode & 0xffffff); + UINT32 address = desc->pc + offset; + + // push pc + UML_MOV(block, I0, desc->pc + 1); + UML_CALLH(block, *m_push_pc); + + // push loop + UML_MOV(block, I0, 0); + UML_MOV(block, I1, address); + UML_CALLH(block, *m_push_loop); + return TRUE; + } + + case 0x0f: // immediate data -> ureg |000|01111| + { + int ureg = (opcode >> 32) & 0xff; + UINT32 data = (UINT32)opcode; + + generate_write_ureg(block, compiler, desc, ureg, true, data); + return TRUE; + } + + case 0x10: // ureg <-> DM|PM (direct) |000|100|G|D| + case 0x11: + case 0x12: + case 0x13: + { + int ureg = (opcode >> 32) & 0xff; + UINT32 address = (UINT32)(opcode); + int d = (opcode >> 40) & 1; + int g = (opcode >> 41) & 1; + + UML_MOV(block, I1, address); + if (d) + { + generate_read_ureg(block, compiler, desc, ureg, false); + + // write + if (g) + { + // PM + if (ureg == 0xdb) // PX is 48-bit + UML_CALLH(block, *m_pm_write48); + else + UML_CALLH(block, *m_pm_write32); + } + else + { + // DM + UML_CALLH(block, *m_dm_write32); + } + } + else + { + // read + if (g) + { + // PM + if (ureg == 0xdb) // PX is 48-bit + UML_CALLH(block, *m_pm_read48); + else + UML_CALLH(block, *m_pm_read32); + } + else + { + // DM + UML_CALLH(block, *m_dm_read32); + } + + generate_write_ureg(block, compiler, desc, ureg, false, 0); + } + return TRUE; + } + + case 0x14: // system register bit manipulation |000|10100| + { + int bop = (opcode >> 37) & 0x7; + int sreg = (opcode >> 32) & 0xf; + UINT32 data = (UINT32)opcode; + + switch (bop) + { + case 0: // SET + { + switch (sreg) + { + case 0x0: // USTAT1 + UML_OR(block, USTAT1, USTAT1, data); + break; + case 0x1: // USTAT2 + UML_OR(block, USTAT2, USTAT2, data); + break; + case 0x9: // IRPTL + UML_OR(block, IRPTL, IRPTL, data); + break; + case 0xa: // MODE2 + UML_OR(block, MODE2, MODE2, data); + break; + case 0xb: // MODE1 + compiler->mode1_delay.counter = 2; + compiler->mode1_delay.data = data; + compiler->mode1_delay.mode = MODE1_SET; + break; + case 0xc: // ASTAT + return FALSE; + case 0xd: // IMASK + UML_OR(block, IMASK, IMASK, data); + break; + case 0xe: // STKY + UML_OR(block, STKY, STKY, data); + break; + case 0xf: // IMASKP + UML_OR(block, IMASKP, IMASKP, data); + break; + + default: + return FALSE; + } + return TRUE; + } + case 1: // CLEAR + { + switch (sreg) + { + case 0x0: // USTAT1 + UML_AND(block, USTAT1, USTAT1, ~data); + break; + case 0x1: // USTAT2 + UML_AND(block, USTAT2, USTAT2, ~data); + break; + case 0x9: // IRPTL + UML_AND(block, IRPTL, IRPTL, ~data); + break; + case 0xa: // MODE2 + UML_AND(block, MODE2, MODE2, ~data); + break; + case 0xb: // MODE1 + compiler->mode1_delay.counter = 2; + compiler->mode1_delay.data = data; + compiler->mode1_delay.mode = MODE1_CLEAR; + break; + case 0xc: // ASTAT + return FALSE; + case 0xd: // IMASK + UML_AND(block, IMASK, IMASK, ~data); + break; + case 0xe: // STKY + UML_AND(block, STKY, STKY, ~data); + break; + case 0xf: // IMASKP + UML_AND(block, IMASKP, IMASKP, ~data); + break; + + default: + return FALSE; + } + return TRUE; + } + case 2: // TOGGLE + { + switch (sreg) + { + case 0x0: // USTAT1 + UML_XOR(block, USTAT1, USTAT1, data); + break; + case 0x1: // USTAT2 + UML_XOR(block, USTAT2, USTAT2, data); + break; + case 0x9: // IRPTL + UML_XOR(block, IRPTL, IRPTL, data); + break; + case 0xa: // MODE2 + UML_XOR(block, MODE2, MODE2, data); + break; + case 0xb: // MODE1 + compiler->mode1_delay.counter = 2; + compiler->mode1_delay.data = data; + compiler->mode1_delay.mode = MODE1_TOGGLE; + break; + case 0xc: // ASTAT + return FALSE; + case 0xd: // IMASK + UML_XOR(block, IMASK, IMASK, data); + break; + case 0xe: // STKY + UML_XOR(block, STKY, STKY, data); + break; + case 0xf: // IMASKP + UML_XOR(block, IMASKP, IMASKP, data); + break; + + default: + return FALSE; + } + return TRUE; + } + case 4: // TEST + { + switch (sreg) + { + case 0x0: // USTAT1 + UML_AND(block, I0, USTAT1, data); + UML_CMP(block, I0, data); + UML_SETc(block, COND_E, ASTAT_BTF); + break; + case 0x1: // USTAT2 + UML_AND(block, I0, USTAT2, data); + UML_CMP(block, I0, data); + UML_SETc(block, COND_E, ASTAT_BTF); + break; + case 0x9: // IRPTL + UML_AND(block, I0, IRPTL, data); + UML_CMP(block, I0, data); + UML_SETc(block, COND_E, ASTAT_BTF); + break; + case 0xa: // MODE2 + UML_AND(block, I0, MODE2, data); + UML_CMP(block, I0, data); + UML_SETc(block, COND_E, ASTAT_BTF); + break; + case 0xb: // MODE1 + UML_AND(block, I0, MODE1, data); + UML_CMP(block, I0, data); + UML_SETc(block, COND_E, ASTAT_BTF); + break; + case 0xc: // ASTAT + return FALSE; + case 0xd: // IMASK + UML_AND(block, I0, IMASK, data); + UML_CMP(block, I0, data); + UML_SETc(block, COND_E, ASTAT_BTF); + break; + case 0xe: // STKY + UML_AND(block, I0, STKY, data); + UML_CMP(block, I0, data); + UML_SETc(block, COND_E, ASTAT_BTF); + break; + case 0xf: // IMASKP + UML_AND(block, I0, IMASKP, data); + UML_CMP(block, I0, data); + UML_SETc(block, COND_E, ASTAT_BTF); + break; + + default: + return FALSE; + } + return TRUE; + } + case 5: // XOR + { + return FALSE; + } + + default: + return FALSE; + } + return TRUE; + } + + case 0x16: // I register modify / bit-reverse |000|10110| + { + if (opcode & U64(0x008000000000)) // bit reverse + { + return FALSE; + } + else // modify + { + int g = (opcode >> 38) & 0x1; + int i = (opcode >> 32) & 0x7; + INT32 data = (INT32)(opcode); + + if (g) + { + // PM + UML_ADD(block, PM_I(i), PM_I(i), data); + } + else + { + // DM + UML_ADD(block, DM_I(i), DM_I(i), data); + } + generate_update_circular_buffer(block, compiler, desc, g, i); + return TRUE; + } + } + + case 0x17: // push|pop stacks / flush cache |000|10111| + return FALSE; + + case 0x18: // cjump |000|11000| + return FALSE; + + case 0x19: // rframe |000|11001| + return FALSE; + + default: + return FALSE; + } + break; + } + + case 1: // compute / dreg <-> DM / dreg <-> PM |001| + { + return FALSE; + } + + case 2: // compute / ureg <-> DM|PM, register modify |010| + { + int u = (opcode >> 44) & 0x1; + int i = (opcode >> 41) & 0x7; + int m = (opcode >> 38) & 0x7; + int cond = (opcode >> 33) & 0x1f; + int g = (opcode >> 32) & 0x1; + int d = (opcode >> 31) & 0x1; + int ureg = (opcode >> 23) & 0xff; + int compute = opcode & 0x7fffff; + + bool ureg_is_dreg = (ureg >= 0 && ureg < 16); + bool has_condition = !if_condition_always_true(cond); + int skip_label = 0; + + bool ureg_is_astat = (ureg == 0x7c); + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + + if (d) + { + // UREG -> DM|PM + bool temp_ureg = false; + + // save UREG if compute writes to it + if (compute != 0 && ureg_is_dreg && desc->regout[0] & (1 << (ureg & 0xf))) + { + UML_MOV(block, mem(&m_core->dreg_temp), REG(ureg & 0xf)); + temp_ureg = true; + } + + // save a copy of ASTAT if we need to read it + if (ureg_is_astat) + generate_astat_copy(block, compiler, desc); + + // compute + generate_compute(block, compiler, desc); + + // transfer + UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i] + if (u == 0) // pre-modify without update + UML_ADD(block, I1, I1, (g) ? PM_M(m) : DM_M(m)); // add i1,i1,dm|pm[m] + if (temp_ureg) + UML_MOV(block, I0, mem(&m_core->dreg_temp)); // mov i0,[m_core->dreg_temp] + else + generate_read_ureg(block, compiler, desc, ureg, ureg_is_astat); + + if (ureg == 0xdb && (g)) // PX is 48-bit when writing to PM + UML_CALLH(block, *m_pm_write48); // callh pm_write48 + else + UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32 + } + else + { + // DM|PM -> UREG + + // compute + generate_compute(block, compiler, desc); + + // transfer + UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i] + if (u == 0) // pre-modify without update + UML_ADD(block, I1, I1, (g) ? PM_M(m) : DM_M(m)); // add i1,i1,dm|pm[m] + + if (ureg == 0xdb && (g)) // PX is 48-bit when reading from PM + UML_CALLH(block, *m_pm_read48); // callh pm_read48 + else + UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32 + generate_write_ureg(block, compiler, desc, ureg, false, 0); + } + + if (u != 0) // post-modify with update + { + if (g) + UML_ADD(block, PM_I(i), PM_I(i), PM_M(m)); // add pm[i],pm[m] + else + UML_ADD(block, DM_I(i), DM_I(i), DM_M(m)); // add dm[i],dm[m] + + generate_update_circular_buffer(block, compiler, desc, g, i); + } + + if (has_condition) + UML_LABEL(block, skip_label); + + return TRUE; + } + + case 3: + { + if (opcode & U64(0x100000000000)) // compute / ureg <-> ureg |011|1| + { + int src_ureg = (opcode >> 36) & 0xff; + int dst_ureg = (opcode >> 23) & 0xff; + int cond = (opcode >> 31) & 0x1f; + int compute = opcode & 0x7fffff; + + bool has_condition = !if_condition_always_true(cond); + bool src_is_dreg = (src_ureg >= 0 && src_ureg < 16); + int skip_label = 0; + + bool src_ureg_is_astat = (src_ureg == 0x7c); + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + + bool temp_ureg = false; + // save UREG if compute writes to it + if (compute != 0 && src_is_dreg && desc->regout[0] & (1 << (src_ureg & 0xf))) + { + UML_MOV(block, mem(&m_core->dreg_temp), REG(src_ureg & 0xf)); + temp_ureg = true; + } + + // save a copy of ASTAT if we need to read it + if (src_ureg_is_astat) + generate_astat_copy(block, compiler, desc); + + generate_compute(block, compiler, desc); + + if (temp_ureg) + { + UML_MOV(block, I0, mem(&m_core->dreg_temp)); + } + else + { + generate_read_ureg(block, compiler, desc, src_ureg, src_ureg_is_astat); + } + generate_write_ureg(block, compiler, desc, dst_ureg, false, 0); + + if (has_condition) + UML_LABEL(block, skip_label); + + return TRUE; + } + else // compute / dreg <-> DM|PM, immediate modify |011|0| + { + int cond = (opcode >> 33) & 0x1f; + int u = (opcode >> 38) & 0x1; + int d = (opcode >> 39) & 0x1; + int g = (opcode >> 40) & 0x1; + int dreg = (opcode >> 23) & 0xf; + int i = (opcode >> 41) & 0x7; + int mod = SIGN_EXTEND6((opcode >> 27) & 0x3f); + int compute = opcode & 0x7fffff; + + bool has_condition = !if_condition_always_true(cond); + int skip_label = 0; + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + if (d) + { + // DREG -> DM|PM + bool temp_dreg = false; + + // save dreg if compute writes to it + if (compute != 0 && desc->regout[0] & (1 << dreg)) + { + UML_MOV(block, mem(&m_core->dreg_temp), REG(dreg)); + temp_dreg = true; + } + // compute + generate_compute(block, compiler, desc); + + // transfer + UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i] + if (u == 0) // pre-modify without update + UML_ADD(block, I1, I1, mod); // add i1,i1,mod + if (temp_dreg) + UML_MOV(block, I0, mem(&m_core->dreg_temp)); // mov i0,[m_core->dreg_temp] + else + UML_MOV(block, I0, REG(dreg)); // mov i0,reg[dreg] + UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32 + } + else + { + // DM|PM -> DREG + + // compute + generate_compute(block, compiler, desc); + + // transfer + UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i] + if (u == 0) // pre-modify without update + UML_ADD(block, I1, I1, mod); // add i1,i1,mod + UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32 + UML_MOV(block, REG(dreg), I0); // mov reg[dreg],i0 + } + + if (u != 0) // post-modify with update + { + if (g) + UML_ADD(block, PM_I(i), PM_I(i), mod); // add pm[i],mod + else + UML_ADD(block, DM_I(i), DM_I(i), mod); // add dm[i],mod + + generate_update_circular_buffer(block, compiler, desc, g, i); + } + if (has_condition) + UML_LABEL(block, skip_label); + + return TRUE; + } + break; + } + + case 4: + { + if (opcode & U64(0x100000000000)) // immediate data -> DM|PM |100|1| + { + return FALSE; + } + else // immediate shift / dreg <-> DM|PM |100|0| + { + int i = (opcode >> 41) & 0x7; + int m = (opcode >> 38) & 0x7; + int g = (opcode >> 32) & 0x1; + int d = (opcode >> 31) & 0x1; + int dreg = (opcode >> 23) & 0xf; + int cond = (opcode >> 33) & 0x1f; + int data = ((opcode >> 8) & 0xff) | ((opcode >> 19) & 0xf00); + int shiftop = (opcode >> 16) & 0x3f; + int rn = (opcode >> 4) & 0xf; + int rx = (opcode & 0xf); + + bool has_condition = !if_condition_always_true(cond); + int skip_label = 0; + + if (has_condition) + { + skip_label = compiler->labelnum++; + generate_if_condition(block, compiler, desc, cond, skip_label); + } + if (d) + { + // DREG -> DM|PM + bool temp_dreg = false; + + // save dreg if shiftop writes to it + if (desc->regout[0] & (1 << dreg)) + { + UML_MOV(block, mem(&m_core->dreg_temp), REG(dreg)); + temp_dreg = true; + } + // shiftop + generate_shift_imm(block, compiler, desc, data, shiftop, rn, rx); + + // transfer + UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i] + if (temp_dreg) + UML_MOV(block, I0, mem(&m_core->dreg_temp)); // mov i0,[m_core->dreg_temp] + else + UML_MOV(block, I0, REG(dreg)); // mov i0,reg[dreg] + UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32 + } + else + { + // DM|PM -> DREG + + // shiftop + generate_shift_imm(block, compiler, desc, data, shiftop, rn, rx); + + // transfer + UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i] + UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32 + UML_MOV(block, REG(dreg), I0); // mov reg[dreg],i0 + } + + // update I + if (g) + UML_ADD(block, PM_I(i), PM_I(i), PM_M(m)); + else + UML_ADD(block, DM_I(i), DM_I(i), DM_M(m)); + + generate_update_circular_buffer(block, compiler, desc, g, i); + + if (has_condition) + UML_LABEL(block, skip_label); + + return TRUE; + } + break; + } + + case 5: // ureg <-> DM|PM (indirect) |101| + { + int g = (opcode >> 44) & 1; + int d = (opcode >> 40) & 1; + int i = (opcode >> 41) & 0x7; + int ureg = (opcode >> 32) & 0xff; + UINT32 offset = (UINT32)opcode; + + if (d) + { + // UREG -> DM|PM + UML_ADD(block, I1, (g) ? PM_I(i) : DM_I(i), offset); // add i1,dm|pm[i],offset + + generate_read_ureg(block, compiler, desc, ureg, false); + + if (ureg == 0xdb && (g)) // PX is 48-bit when writing to PM + UML_CALLH(block, *m_pm_write48); // callh pm_write48 + else + UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32 + } + else + { + // DM|PM -> UREG + UML_ADD(block, I1, (g) ? PM_I(i) : DM_I(i), offset); // add i1,dm|pm[i],offset + + if (ureg == 0xdb && (g)) // PX is 48-bit when reading from PM + UML_CALLH(block, *m_pm_read48); // callh pm_read48 + else + UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32 + + generate_write_ureg(block, compiler, desc, ureg, false, 0); + } + return TRUE; + } + + case 6: // indirect jump / compute / dreg <-> DM |110| + { + return FALSE; + } + + case 7: // indirect jump / compute / dreg <-> DM |111| + { + return FALSE; + } + } + + return FALSE; +} + +void adsp21062_device::generate_unimplemented_compute(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); + UML_CALLC(block, cfunc_unimplemented_compute, this); +} + +void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + UINT64 opcode = desc->opptr.q[0]; + if ((opcode & 0x7fffff) == 0) + return; + + int rs = (opcode >> 12) & 0xf; + int rn = (opcode >> 8) & 0xf; + int ra = rn; + int rx = (opcode >> 4) & 0xf; + int ry = (opcode >> 0) & 0xf; + int ps = (opcode >> 16) & 0xf; + + if (opcode & 0x400000) // multi-function operation + { + UINT32 multiop = (opcode >> 16) & 0x3f; + int fm = rs; + int fa = rn; + int fxm = (opcode >> 6) & 0x3; // registers 0 - 3 + int fym = ((opcode >> 4) & 0x3) + 4; // registers 4 - 7 + int fxa = ((opcode >> 2) & 0x3) + 8; // registers 8 - 11 + int fya = (opcode & 0x3) + 12; // registers 12 - 15 + + switch (multiop) + { + case 0x00: // Rn = MRxx + { + generate_unimplemented_compute(block, compiler, desc); + return; + } + + case 0x01: // MRxx = Rn + { + int ai = rs; + switch (ai) + { + case 0x00: // MR0F + UML_DAND(block, MRF, MRF, U64(0xffffffff00000000)); + UML_AND(block, I0, REG(rn), 0xffffffff); + UML_DOR(block, MRF, MRF, I0); + break; + case 0x01: // MR1F + UML_DAND(block, MRF, MRF, U64(0x00000000ffffffff)); + UML_DSHL(block, I0, REG(rn), 32); + UML_DOR(block, MRF, MRF, I0); + break; + case 0x04: // MR0B + UML_DAND(block, MRB, MRB, U64(0xffffffff00000000)); + UML_AND(block, I0, REG(rn), 0xffffffff); + UML_DOR(block, MRB, MRB, I0); + break; + case 0x05: // MR1B + UML_DAND(block, MRB, MRB, U64(0x00000000ffffffff)); + UML_DSHL(block, I0, REG(rn), 32); + UML_DOR(block, MRB, MRB, I0); + break; + + case 0x02: // MR2F + case 0x06: // MR2B + generate_unimplemented_compute(block, compiler, desc); + return; + } + return; + } + + case 0x07: // Ra = Rx + Ry, Rs = Rx - Ry + case 0x0f: // Fa = Fx + Fy, Fs = Fx - Fy + case 0x04: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12 + case 0x05: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12 + case 0x06: // Rm = R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2 + case 0x08: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12 + case 0x09: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12 + case 0x0a: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2 + case 0x0c: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12 + case 0x0d: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12 + case 0x0e: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2 + case 0x10: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12 + case 0x11: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12 + case 0x12: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2 + case 0x14: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12 + case 0x15: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12 + case 0x16: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2 + generate_unimplemented_compute(block, compiler, desc); + return; + + case 0x1c: // Fm = F3-0 * F7-4, Fa = (F11-8 + F15-12) / 2 + generate_unimplemented_compute(block, compiler, desc); + return; + + case 0x1d: // Fm = F3-0 * F7-4, Fa = ABS F11-8 + generate_unimplemented_compute(block, compiler, desc); + return; + + case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: + case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: + // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12, Rs = R11-8 - R15-12 + generate_unimplemented_compute(block, compiler, desc); + return; + + case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: + case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: + // Fm = F3-0 * F7-4, Fa = F11-8 + F15-12, Fs = F11-8 - F15-12 + // TODO: denormals + UML_FSCOPYI(block, F0, REG(fxm)); + UML_FSCOPYI(block, F1, REG(fym)); + UML_FSCOPYI(block, F2, REG(fxa)); + UML_FSCOPYI(block, F3, REG(fya)); + UML_FSMUL(block, F0, F0, F1); + UML_FSADD(block, F4, F2, F3); + UML_FSSUB(block, F5, F2, F3); + + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F4, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F5, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, I0); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, I1); + if (AZ_CALC_REQUIRED) UML_OR(block, ASTAT_AZ, ASTAT_AZ, I0); + if (AN_CALC_REQUIRED) UML_OR(block, ASTAT_AN, ASTAT_AN, I1); + + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + + if (MN_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (MN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_MN); + // TODO: MV, MU, MI flags + + UML_ICOPYFS(block, REG(fm), F0); + UML_ICOPYFS(block, REG(fa), F4); + UML_ICOPYFS(block, REG(ps), F5); + return; + + case 0x18: // Fm = F3-0 * F7-4, Fa = F11-8 + F15-12 + // TODO: denormals + UML_FSCOPYI(block, F0, REG(fxm)); + UML_FSCOPYI(block, F1, REG(fym)); + UML_FSCOPYI(block, F2, REG(fxa)); + UML_FSCOPYI(block, F3, REG(fya)); + UML_FSMUL(block, F0, F0, F1); + UML_FSADD(block, F2, F2, F3); + + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F2, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + + if (MN_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (MN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_MN); + // TODO: MV, MU, MI flags + + UML_ICOPYFS(block, REG(fm), F0); + UML_ICOPYFS(block, REG(fa), F2); + return; + + case 0x19: // Fm = F3-0 * F7-4, Fa = F11-8 - F15-12 + // TODO: denormals + UML_FSCOPYI(block, F0, REG(fxm)); + UML_FSCOPYI(block, F1, REG(fym)); + UML_FSCOPYI(block, F2, REG(fxa)); + UML_FSCOPYI(block, F3, REG(fya)); + UML_FSMUL(block, F0, F0, F1); + UML_FSSUB(block, F2, F2, F3); + + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F2, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + + if (MN_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (MN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_MN); + // TODO: MV, MU, MI flags + + UML_ICOPYFS(block, REG(fm), F0); + UML_ICOPYFS(block, REG(fa), F2); + return; + + case 0x1a: // Fm = F3-0 * F7-4, Fa = FLOAT F11-8 BY R15-12 + { + code_label denormal = compiler->labelnum++; + code_label end = compiler->labelnum++; + + // TODO: denormals + UML_FSCOPYI(block, F0, REG(fxm)); + UML_FSCOPYI(block, F1, REG(fym)); + UML_FSMUL(block, F0, F0, F1); + + UML_FSFRINT(block, F2, REG(fxa), SIZE_DWORD); + UML_ICOPYFS(block, I1, F2); + UML_AND(block, I0, I1, 0x7f800000); + UML_AND(block, I1, I1, 0x807fffff); + UML_SHR(block, I0, I0, 23); + UML_SUB(block, I0, I0, 127); + UML_ADD(block, I0, I0, REG(fya)); + UML_CMP(block, I0, -126); + UML_JMPc(block, COND_L, denormal); + + UML_ADD(block, I0, I0, 127); + UML_AND(block, I0, I0, 0xff); + UML_SHL(block, I0, I0, 23); + UML_OR(block, I0, I0, I1); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + UML_JMP(block, end); + + UML_LABEL(block, denormal); + UML_AND(block, I0, I1, 0x80000000); + if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 1); + if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + + UML_LABEL(block, end); + + if (MN_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (MN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_MN); + // TODO: MV, MU, MI flags + + UML_ICOPYFS(block, REG(fm), F0); + UML_MOV(block, REG(fa), I0); + return; + } + + case 0x1b: // Fm = F3-0 * F7-4, Fa = FIX F11-8 BY R15-12 + { + code_label denormal = compiler->labelnum++; + code_label end = compiler->labelnum++; + + // TODO: denormals + UML_FSCOPYI(block, F0, REG(fxm)); + UML_FSCOPYI(block, F1, REG(fym)); + UML_FSMUL(block, F0, F0, F1); + + UML_MOV(block, I1, REG(fxa)); + UML_AND(block, I0, I1, 0x7f800000); + UML_AND(block, I1, I1, 0x807fffff); + UML_SHR(block, I0, I0, 23); + UML_SUB(block, I0, I0, 127); + UML_ADD(block, I0, I0, REG(fya)); + UML_CMP(block, I0, -126); + UML_JMPc(block, COND_L, denormal); + + UML_ADD(block, I0, I0, 127); + UML_AND(block, I0, I0, 0xff); + UML_SHL(block, I0, I0, 23); + UML_OR(block, I0, I0, I1); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + UML_JMP(block, end); + + UML_LABEL(block, denormal); + UML_AND(block, I0, I1, 0x80000000); + if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 1); + if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + + UML_LABEL(block, end); + + UML_FSCOPYI(block, F2, I0); + UML_TEST(block, MODE1, MODE1_TRUNCATE); + UML_JMPc(block, COND_Z, compiler->labelnum); + UML_FSTOINT(block, I0, F2, SIZE_DWORD, ROUND_TRUNC); + UML_JMP(block, compiler->labelnum + 1); + UML_LABEL(block, compiler->labelnum++); + UML_FSTOINT(block, I0, F2, SIZE_DWORD, ROUND_ROUND); + UML_LABEL(block, compiler->labelnum++); + + if (MN_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (MN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_MN); + // TODO: MV, MU, MI flags + + UML_ICOPYFS(block, REG(fm), F0); + UML_MOV(block, REG(fa), I0); + return; + } + + case 0x1e: // Fm = F3-0 * F7-4, Fa = MAX(F11-8, F15-12) + // TODO: denormals + UML_FSCOPYI(block, F0, REG(fxm)); + UML_FSCOPYI(block, F1, REG(fym)); + UML_FSCOPYI(block, F2, REG(fxa)); + UML_FSCOPYI(block, F3, REG(fya)); + UML_FSMUL(block, F0, F0, F1); + + UML_FSMOV(block, F4, F2); + UML_FSCMP(block, F2, F3); + UML_FSMOVc(block, COND_C, F4, F3); + + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F4, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + + if (MN_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (MN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_MN); + // TODO: MV, MU, MI flags + + UML_ICOPYFS(block, REG(fm), F0); + UML_ICOPYFS(block, REG(fa), F4); + return; + + case 0x1f: // Fm = F3-0 * F7-4, Fa = MIN(F11-8, F15-12) + // TODO: denormals + UML_FSCOPYI(block, F0, REG(fxm)); + UML_FSCOPYI(block, F1, REG(fym)); + UML_FSCOPYI(block, F2, REG(fxa)); + UML_FSCOPYI(block, F3, REG(fya)); + UML_FSMUL(block, F0, F0, F1); + + UML_FSMOV(block, F4, F2); + UML_FSCMP(block, F3, F2); + UML_FSMOVc(block, COND_C, F4, F3); + + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F4, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + + if (MN_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (MN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_MN); + // TODO: MV, MU, MI flags + + UML_ICOPYFS(block, REG(fm), F0); + UML_ICOPYFS(block, REG(fa), F4); + return; + + default: + generate_unimplemented_compute(block, compiler, desc); + return; + } + } + else // single-function operation + { + UINT32 operation = (opcode >> 12) & 0xff; + + switch ((opcode >> 20) & 3) + { + case 0: // ALU operations + { + switch (operation) + { + case 0x09: // Rn = (Rx + Ry) / 2 + case 0x61: // Rn = MIN(Rx, Ry) + case 0x63: // Rn = CLIP Rx BY Ry + case 0x92: // Fn = ABS(Fx - Fy) + case 0x89: // Fn = (Fx + Fy) / 2 + case 0xdd: // Rn = TRUNC Fx BY Ry + case 0xe3: // Fn = CLIP Fx BY Fy + case 0xe0: // Fn = Fx COPYSIGN Fy + case 0x05: // Rn = Rx + Ry + CI + case 0x06: // Rn = Rx - Ry + CI - 1 + case 0x25: // Rn = Rx + CI + case 0x26: // Rn = Rx + CI - 1 + case 0x30: // Rn = ABS Rx + case 0x43: // Rn = NOT Rx + case 0xb0: // Fn = ABS(Fx) + case 0xa5: // Fn = RND Fx + case 0xad: // Rn = MANT Fx + case 0xc9: // Rn = FIX Fx + case 0xcd: // Rn = TRUNC Fx + generate_unimplemented_compute(block, compiler, desc); + return; + + case 0x01: // Rn = Rx + Ry + UML_ADD(block, REG(rn), REG(rx), REG(ry)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); + if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0x02: // Rn = Rx - Ry + UML_SUB(block, REG(rn), REG(rx), REG(ry)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); + if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0x0a: // COMP(Rx, Ry) + UML_CMP(block, REG(rx), REG(ry)); + UML_SETc(block, COND_Z, I0); + UML_SETc(block, COND_L, I1); + UML_MOV(block, ASTAT_AZ, I0); + UML_MOV(block, ASTAT_AN, I1); + UML_XOR(block, I0, I0, 1); + UML_XOR(block, I1, I1, 1); + UML_AND(block, I0, I0, I1); + UML_SHL(block, I0, I0, 7); + + UML_MOV(block, I2, mem(&m_core->astat_drc.cacc)); + UML_SHR(block, I2, I2, 1); + UML_OR(block, I2, I2, I0); + UML_MOV(block, mem(&m_core->astat_drc.cacc), I2); + + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0x21: // Rn = PASS Rx + UML_MOV(block, REG(rn), REG(rx)); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_CMP(block, REG(rn), 0); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0x22: // Rn = -Rx + UML_SUB(block, REG(rn), 0, REG(rx)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); + if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0x29: // Rn = Rx + 1 + UML_ADD(block, REG(rn), REG(rx), 1); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); + if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0x2a: // Rn = Rx - 1 + UML_SUB(block, REG(rn), REG(rx), 1); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); + if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0x40: // Rn = Rx AND Ry + UML_AND(block, REG(rn), REG(rx), REG(ry)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0x41: // Rn = Rx OR Ry + UML_OR(block, REG(rn), REG(rx), REG(ry)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0x42: // Rn = Rx XOR Ry + UML_XOR(block, REG(rn), REG(rx), REG(ry)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0x62: // Rn = MAX(Rx, Ry) + UML_MOV(block, REG(rn), REG(rx)); + UML_CMP(block, REG(rx), REG(ry)); + UML_MOVc(block, COND_L, REG(rn), REG(ry)); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_CMP(block, REG(rn), 0); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77: + case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f: + { + /* Fixed-point Dual Add/Subtract */ + UML_ADD(block, I0, REG(rx), REG(ry)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); + if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); + UML_SUB(block, I1, REG(rx), REG(ry)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, mem(&m_core->arg0)); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, mem(&m_core->arg1)); + if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, mem(&m_core->arg2)); + if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, mem(&m_core->arg3)); + if (AZ_CALC_REQUIRED) UML_OR(block, ASTAT_AZ, ASTAT_AZ, mem(&m_core->arg0)); + if (AN_CALC_REQUIRED) UML_OR(block, ASTAT_AN, ASTAT_AN, mem(&m_core->arg1)); + if (AV_CALC_REQUIRED) UML_OR(block, ASTAT_AV, ASTAT_AV, mem(&m_core->arg2)); + if (AC_CALC_REQUIRED) UML_OR(block, ASTAT_AC, ASTAT_AC, mem(&m_core->arg3)); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + UML_MOV(block, REG(ra), I0); + UML_MOV(block, REG(rs), I1); + return; + } + + case 0x81: // Fn = Fx + Fy + // TODO: denormals + UML_FSCOPYI(block, F0, REG(rx)); + UML_FSCOPYI(block, F1, REG(ry)); + UML_FSADD(block, F0, F0, F1); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + UML_ICOPYFS(block, REG(rn), F0); + return; + + case 0x82: // Fn = Fx - Fy + // TODO: denormals + UML_FSCOPYI(block, F0, REG(rx)); + UML_FSCOPYI(block, F1, REG(ry)); + UML_FSSUB(block, F0, F0, F1); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + UML_ICOPYFS(block, REG(rn), F0); + return; + + case 0x8a: // COMP(Fx, Fy) + UML_FSCOPYI(block, F0, REG(rx)); + UML_FSCOPYI(block, F1, REG(ry)); + UML_FSCMP(block, F0, F1); + UML_SETc(block, COND_Z, I0); + UML_SETc(block, COND_C, I1); + UML_MOV(block, ASTAT_AZ, I0); + UML_MOV(block, ASTAT_AN, I1); + UML_XOR(block, I0, I0, 1); + UML_XOR(block, I1, I1, 1); + UML_AND(block, I0, I0, I1); + UML_SHL(block, I0, I0, 7); + + UML_MOV(block, I2, mem(&m_core->astat_drc.cacc)); + UML_SHR(block, I2, I2, 1); + UML_OR(block, I2, I2, I0); + UML_MOV(block, mem(&m_core->astat_drc.cacc), I2); + + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + return; + + case 0x91: // Fn = ABS(Fx + Fy) + // TODO: denormals + UML_FSCOPYI(block, F0, REG(rx)); + UML_FSCOPYI(block, F1, REG(ry)); + UML_FSADD(block, F0, F0, F1); + UML_FSABS(block, F0, F0); + UML_ICOPYFS(block, REG(rn), F0); + if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 0); // TODO + if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + return; + + case 0xa1: // Fn = PASS Fx + UML_MOV(block, REG(rn), REG(rx)); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + { + UML_FSCOPYI(block, F0, REG(rn)); + UML_FSCMP(block, F0, mem(&m_core->fp0)); + } + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + return; + + case 0xa2: // Fn = -Fx + UML_FSCOPYI(block, F0, REG(rx)); + UML_FSNEG(block, F0, F0); + UML_ICOPYFS(block, REG(rn), F0); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + return; + + case 0xbd: // Fn = SCALB Fx BY Ry + // TODO: source = nan, result = denormal + UML_MOV(block, I1, REG(rx)); + UML_AND(block, I0, I1, 0x7f800000); + UML_AND(block, I1, I1, 0x807fffff); + UML_SHR(block, I0, I0, 23); + UML_SUB(block, I0, I0, 127); + UML_ADD(block, I0, I0, REG(ry)); + UML_ADD(block, I0, I0, 127); + UML_AND(block, I0, I0, 0xff); + UML_SHL(block, I0, I0, 23); + UML_OR(block, REG(rn), I0, I1); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + return; + + case 0xc1: // Rn = LOGB Fx + // TODO: source = zero, infinity, nan + UML_SHR(block, I0, REG(rx), 23); + UML_AND(block, I0, I0, 0xff); + UML_SUB(block, REG(rn), I0, 127); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0xc4: // Fn = RECIPS Fx + // TODO: denormals + // TODO: use the bit accurate method from interpreter? + UML_FSCOPYI(block, F0, REG(rx)); + if (AN_CALC_REQUIRED || AV_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AV); + UML_FSCMP(block, F0, mem(&m_core->fp0)); + UML_JMPc(block, COND_Z, compiler->labelnum); + UML_FSRECIP(block, F0, F0); + UML_LABEL(block, compiler->labelnum++); + if (AZ_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + UML_ICOPYFS(block, REG(rn), F0); + return; + + case 0xc5: // Fn = RSQRTS Fx + // TODO: denormals + // TODO: use the bit accurate method from interpreter? + UML_FSCOPYI(block, F0, REG(rx)); + UML_FSCMP(block, F0, mem(&m_core->fp0)); + UML_JMPc(block, COND_Z, compiler->labelnum); + UML_FSRSQRT(block, F0, F0); + UML_LABEL(block, compiler->labelnum++); + UML_ICOPYFS(block, REG(rn), F0); + // TODO: flags! + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + return; + + case 0xca: // Fn = FLOAT Rx + UML_FSFRINT(block, F0, REG(rx), SIZE_DWORD); + UML_ICOPYFS(block, REG(rn), F0); + if (AZ_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + return; + + case 0xd9: // Rn = FIX Fx BY Ry + { + code_label denormal = compiler->labelnum++; + code_label end = compiler->labelnum++; + + UML_MOV(block, I1, REG(rx)); + UML_AND(block, I0, I1, 0x7f800000); + UML_AND(block, I1, I1, 0x807fffff); + UML_SHR(block, I0, I0, 23); + UML_SUB(block, I0, I0, 127); + UML_ADD(block, I0, I0, REG(ry)); + UML_CMP(block, I0, -126); + UML_JMPc(block, COND_L, denormal); + + UML_ADD(block, I0, I0, 127); + UML_AND(block, I0, I0, 0xff); + UML_SHL(block, I0, I0, 23); + UML_OR(block, I0, I0, I1); + + UML_FSCOPYI(block, F2, I0); + UML_TEST(block, MODE1, MODE1_TRUNCATE); + UML_JMPc(block, COND_Z, compiler->labelnum); + UML_FSTOINT(block, I0, F2, SIZE_DWORD, ROUND_TRUNC); + UML_JMP(block, compiler->labelnum + 1); + UML_LABEL(block, compiler->labelnum++); + UML_FSTOINT(block, I0, F2, SIZE_DWORD, ROUND_ROUND); + UML_LABEL(block, compiler->labelnum++); + + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_CMP(block, I0, 0); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + UML_MOV(block, REG(rn), I0); + UML_JMP(block, end); + + UML_LABEL(block, denormal); + UML_AND(block, I0, I1, 0x80000000); + if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 1); + if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + UML_MOV(block, REG(rn), I0); + + UML_LABEL(block, end); + return; + } + + case 0xda: // Fn = FLOAT Rx BY Ry + { + code_label denormal = compiler->labelnum++; + code_label end = compiler->labelnum++; + UML_FSFRINT(block, F0, REG(rx), SIZE_DWORD); + UML_ICOPYFS(block, I1, F0); + UML_AND(block, I0, I1, 0x7f800000); + UML_AND(block, I1, I1, 0x807fffff); + UML_SHR(block, I0, I0, 23); + UML_SUB(block, I0, I0, 127); + UML_ADD(block, I0, I0, REG(ry)); + UML_CMP(block, I0, -126); + UML_JMPc(block, COND_L, denormal); + + UML_ADD(block, I0, I0, 127); + UML_AND(block, I0, I0, 0xff); + UML_SHL(block, I0, I0, 23); + UML_OR(block, REG(rn), I0, I1); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + UML_JMP(block, end); + + UML_LABEL(block, denormal); + UML_AND(block, I0, I1, 0x80000000); + if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 1); + if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + UML_MOV(block, REG(rn), I0); + + UML_LABEL(block, end); + return; + } + + case 0xe1: // Fn = MIN(Fx, Fy) + UML_FSCOPYI(block, F2, REG(rx)); + UML_FSCOPYI(block, F3, REG(ry)); + UML_FSMOV(block, F4, F2); + UML_FSCMP(block, F3, F2); + UML_FSMOVc(block, COND_C, F4, F3); + + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F4, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + UML_ICOPYFS(block, REG(rn), F4); + return; + + case 0xe2: // Fn = MAX(Fx, Fy) + UML_FSCOPYI(block, F2, REG(rx)); + UML_FSCOPYI(block, F3, REG(ry)); + UML_FSMOV(block, F4, F2); + UML_FSCMP(block, F2, F3); + UML_FSMOVc(block, COND_C, F4, F3); + + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F4, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + UML_ICOPYFS(block, REG(rn), F4); + return; + + case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: + case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: + { + /* Floating-point Dual Add/Subtract */ + UML_FSCOPYI(block, F0, REG(rx)); + UML_FSCOPYI(block, F1, REG(ry)); + UML_FSADD(block, F2, F0, F1); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F2, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN); + UML_FSSUB(block, F3, F0, F1); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_FSCMP(block, F2, mem(&m_core->fp0)); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, I0); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, I1); + if (AZ_CALC_REQUIRED) UML_OR(block, ASTAT_AZ, ASTAT_AZ, I0); + if (AN_CALC_REQUIRED) UML_OR(block, ASTAT_AN, ASTAT_AN, I1); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO + UML_ICOPYFS(block, REG(ra), F2); + UML_ICOPYFS(block, REG(rs), F3); + return; + } + + default: + generate_unimplemented_compute(block, compiler, desc); + return; + } + break; + } + + case 1: // multiplier operations + { + switch (operation) + { + case 0x48: // Rn = Rx * Ry (UUF) + case 0x49: // Rn = Rx * Ry (UUFR) + case 0x50: // Rn = Rx * Ry (SUI) + case 0x58: // Rn = Rx * Ry (SUF) + case 0x59: // Rn = Rx * Ry (SUFR) + case 0x60: // Rn = Rx * Ry (USI) + case 0x68: // Rn = Rx * Ry (USF) + case 0x69: // Rn = Rx * Ry (USFR) + case 0x70: // Rn = Rx * Ry (SSI) + case 0x78: // Rn = Rx * Ry (SSF) + case 0x79: // Rn = Rx * Ry (SSFR) + case 0x44: // MRF = Rx * Ry (UUI) + case 0x4c: // MRF = Rx * Ry (UUF) + case 0x4d: // MRF = Rx * Ry (UUFR) + case 0x54: // MRF = Rx * Ry (SUI) + case 0x5c: // MRF = Rx * Ry (SUF) + case 0x5d: // MRF = Rx * Ry (SUFR) + case 0x64: // MRF = Rx * Ry (USI) + case 0x6c: // MRF = Rx * Ry (USF) + case 0x6d: // MRF = Rx * Ry (USFR) + case 0x74: // MRF = Rx * Ry (SSI) + case 0x7c: // MRF = Rx * Ry (SSF) + case 0x7d: // MRF = Rx * Ry (SSFR) + case 0x46: // MRB = Rx * Ry (UUI) + case 0x4e: // MRB = Rx * Ry (UUF) + case 0x4f: // MRB = Rx * Ry (UUFR) + case 0x56: // MRB = Rx * Ry (SUI) + case 0x5e: // MRB = Rx * Ry (SUF) + case 0x5f: // MRB = Rx * Ry (SUFR) + case 0x66: // MRB = Rx * Ry (USI) + case 0x6e: // MRB = Rx * Ry (USF) + case 0x6f: // MRB = Rx * Ry (USFR) + case 0x76: // MRB = Rx * Ry (SSI) + case 0x7e: // MRB = Rx * Ry (SSF) + case 0x7f: // MRB = Rx * Ry (SSFR) + case 0x80: // Rn = MRF + Rx * Ry (UUI) + case 0x88: // Rn = MRF + Rx * Ry (UUF) + case 0x89: // Rn = MRF + Rx * Ry (UUFR) + case 0x90: // Rn = MRF + Rx * Ry (SUI) + case 0x98: // Rn = MRF + Rx * Ry (SUF) + case 0x99: // Rn = MRF + Rx * Ry (SUFR) + case 0xa0: // Rn = MRF + Rx * Ry (USI) + case 0xa8: // Rn = MRF + Rx * Ry (USF) + case 0xa9: // Rn = MRF + Rx * Ry (USFR) + case 0xb8: // Rn = MRF + Rx * Ry (SSF) + case 0xb9: // Rn = MRF + Rx * Ry (SSFR) + case 0x82: // Rn = MRB + Rx * Ry (UUI) + case 0x8a: // Rn = MRB + Rx * Ry (UUF) + case 0x8b: // Rn = MRB + Rx * Ry (UUFR) + case 0x92: // Rn = MRB + Rx * Ry (SUI) + case 0x9a: // Rn = MRB + Rx * Ry (SUF) + case 0x9b: // Rn = MRB + Rx * Ry (SUFR) + case 0xa2: // Rn = MRB + Rx * Ry (USI) + case 0xaa: // Rn = MRB + Rx * Ry (USF) + case 0xab: // Rn = MRB + Rx * Ry (USFR) + case 0xba: // Rn = MRB + Rx * Ry (SSF) + case 0xbb: // Rn = MRB + Rx * Ry (SSFR) + case 0x84: // MRF = MRF + Rx * Ry (UUI) + case 0x8c: // MRF = MRF + Rx * Ry (UUF) + case 0x8d: // MRF = MRF + Rx * Ry (UUFR) + case 0x94: // MRF = MRF + Rx * Ry (SUI) + case 0x9c: // MRF = MRF + Rx * Ry (SUF) + case 0x9d: // MRF = MRF + Rx * Ry (SUFR) + case 0xa4: // MRF = MRF + Rx * Ry (USI) + case 0xac: // MRF = MRF + Rx * Ry (USF) + case 0xad: // MRF = MRF + Rx * Ry (USFR) + case 0xb4: // MRF = MRF + Rx * Ry (SSI) + case 0xbc: // MRF = MRF + Rx * Ry (SSF) + case 0xbd: // MRF = MRF + Rx * Ry (SSFR) + case 0x86: // MRB = MRB + Rx * Ry (UUI) + case 0x8e: // MRB = MRB + Rx * Ry (UUF) + case 0x8f: // MRB = MRB + Rx * Ry (UUFR) + case 0x96: // MRB = MRB + Rx * Ry (SUI) + case 0x9e: // MRB = MRB + Rx * Ry (SUF) + case 0x9f: // MRB = MRB + Rx * Ry (SUFR) + case 0xa6: // MRB = MRB + Rx * Ry (USI) + case 0xae: // MRB = MRB + Rx * Ry (USF) + case 0xaf: // MRB = MRB + Rx * Ry (USFR) + case 0xb6: // MRB = MRB + Rx * Ry (SSI) + case 0xbe: // MRB = MRB + Rx * Ry (SSF) + case 0xbf: // MRB = MRB + Rx * Ry (SSFR) + case 0xc0: // Rn = MRF - Rx * Ry (UUI) + case 0xc8: // Rn = MRF - Rx * Ry (UUF) + case 0xc9: // Rn = MRF - Rx * Ry (UUFR) + case 0xd0: // Rn = MRF - Rx * Ry (SUI) + case 0xd8: // Rn = MRF - Rx * Ry (SUF) + case 0xd9: // Rn = MRF - Rx * Ry (SUFR) + case 0xe0: // Rn = MRF - Rx * Ry (USI) + case 0xe8: // Rn = MRF - Rx * Ry (USF) + case 0xe9: // Rn = MRF - Rx * Ry (USFR) + case 0xf0: // Rn = MRF - Rx * Ry (SSI) + case 0xf8: // Rn = MRF - Rx * Ry (SSF) + case 0xf9: // Rn = MRF - Rx * Ry (SSFR) + case 0xc2: // Rn = MRB - Rx * Ry (UUI) + case 0xca: // Rn = MRB - Rx * Ry (UUF) + case 0xcb: // Rn = MRB - Rx * Ry (UUFR) + case 0xd2: // Rn = MRB - Rx * Ry (SUI) + case 0xda: // Rn = MRB - Rx * Ry (SUF) + case 0xdb: // Rn = MRB - Rx * Ry (SUFR) + case 0xe2: // Rn = MRB - Rx * Ry (USI) + case 0xea: // Rn = MRB - Rx * Ry (USF) + case 0xeb: // Rn = MRB - Rx * Ry (USFR) + case 0xf2: // Rn = MRB - Rx * Ry (SSI) + case 0xfa: // Rn = MRB - Rx * Ry (SSF) + case 0xfb: // Rn = MRB - Rx * Ry (SSFR) + case 0xc4: // MRF = MRF - Rx * Ry (UUI) + case 0xcc: // MRF = MRF - Rx * Ry (UUF) + case 0xcd: // MRF = MRF - Rx * Ry (UUFR) + case 0xd4: // MRF = MRF - Rx * Ry (SUI) + case 0xdc: // MRF = MRF - Rx * Ry (SUF) + case 0xdd: // MRF = MRF - Rx * Ry (SUFR) + case 0xe4: // MRF = MRF - Rx * Ry (USI) + case 0xec: // MRF = MRF - Rx * Ry (USF) + case 0xed: // MRF = MRF - Rx * Ry (USFR) + case 0xf4: // MRF = MRF - Rx * Ry (SSI) + case 0xfc: // MRF = MRF - Rx * Ry (SSF) + case 0xfd: // MRF = MRF - Rx * Ry (SSFR) + case 0xc6: // MRB = MRB - Rx * Ry (UUI) + case 0xce: // MRB = MRB - Rx * Ry (UUF) + case 0xcf: // MRB = MRB - Rx * Ry (UUFR) + case 0xd6: // MRB = MRB - Rx * Ry (SUI) + case 0xde: // MRB = MRB - Rx * Ry (SUF) + case 0xdf: // MRB = MRB - Rx * Ry (SUFR) + case 0xe6: // MRB = MRB - Rx * Ry (USI) + case 0xee: // MRB = MRB - Rx * Ry (USF) + case 0xef: // MRB = MRB - Rx * Ry (USFR) + case 0xf6: // MRB = MRB - Rx * Ry (SSI) + case 0xfe: // MRB = MRB - Rx * Ry (SSF) + case 0xff: // MRB = MRB - Rx * Ry (SSFR) + case 0x00: // Rn = SAT MRF (UI) + case 0x01: // Rn = SAT MRF (SI) + case 0x08: // Rn = SAT MRF (UF) + case 0x09: // Rn = SAT MRF (SF) + case 0x02: // Rn = SAT MRB (UI) + case 0x03: // Rn = SAT MRB (SI) + case 0x0a: // Rn = SAT MRB (UF) + case 0x0b: // Rn = SAT MRB (SF) + case 0x04: // MRF = SAT MRF (UI) + case 0x05: // MRF = SAT MRF (SI) + case 0x0c: // MRF = SAT MRF (UF) + case 0x0d: // MRF = SAT MRF (SF) + case 0x06: // MRB = SAT MRB (UI) + case 0x07: // MRB = SAT MRB (SI) + case 0x0e: // MRB = SAT MRB (UF) + case 0x0f: // MRB = SAT MRB (SF) + case 0x18: // Rn = RND MRF (U) + case 0x19: // Rn = RND MRF (S) + case 0x1a: // Rn = RND MRB (U) + case 0x1b: // Rn = RND MRB (S) + case 0x1c: // MRF = RND MRF (U) + case 0x1d: // MRF = RND MRF (S) + case 0x1e: // MRB = RND MRB (U) + case 0x1f: // MRB = RND MRB (S) + generate_unimplemented_compute(block, compiler, desc); + return; + + case 0x14: // MRF = 0 + UML_DMOV(block, mem(&m_core->mrf), 0); + if (MN_CALC_REQUIRED) UML_MOV(block, ASTAT_MN, 0); + if (MV_CALC_REQUIRED) UML_MOV(block, ASTAT_MV, 0); + if (MU_CALC_REQUIRED) UML_MOV(block, ASTAT_MU, 0); + if (MI_CALC_REQUIRED) UML_MOV(block, ASTAT_MI, 0); + return; + + case 0x16: // MRB = 0 + UML_DMOV(block, mem(&m_core->mrb), 0); + if (MN_CALC_REQUIRED) UML_MOV(block, ASTAT_MN, 0); + if (MV_CALC_REQUIRED) UML_MOV(block, ASTAT_MV, 0); + if (MU_CALC_REQUIRED) UML_MOV(block, ASTAT_MU, 0); + if (MI_CALC_REQUIRED) UML_MOV(block, ASTAT_MI, 0); + return; + + case 0x30: // Fn = Fx * Fy + UML_FSCOPYI(block, F0, REG(rx)); + UML_FSCOPYI(block, F1, REG(ry)); + UML_FSMUL(block, F0, F0, F1); + UML_ICOPYFS(block, REG(rn), F0); + if (MN_CALC_REQUIRED) + UML_FSCMP(block, F0, mem(&m_core->fp0)); + if (MN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_MN); + // TODO: MV, MU, MI flags + return; + + case 0x40: // Rn = Rx * Ry (UUI) + UML_MULU(block, I0, I0, REG(rx), REG(ry)); + UML_MOV(block, REG(rn), I0); + // TODO: flags + return; + + case 0xb0: // Rn = MRF + Rx * Ry (SSI) + UML_DSEXT(block, I0, REG(rx), SIZE_DWORD); + UML_DSEXT(block, I1, REG(ry), SIZE_DWORD); + UML_DMULS(block, I0, I0, I0, I1); + UML_DADD(block, I0, I0, mem(&m_core->mrf)); + UML_MOV(block, REG(rn), I0); + // TODO: flags! + return; + + case 0xb2: // Rn = MRB + Rx * Ry (SSI) + UML_DSEXT(block, I0, REG(rx), SIZE_DWORD); + UML_DSEXT(block, I1, REG(ry), SIZE_DWORD); + UML_DMULS(block, I0, I0, I0, I1); + UML_DADD(block, I0, I0, mem(&m_core->mrb)); + UML_MOV(block, REG(rn), I0); + // TODO: flags! + return; + + default: + generate_unimplemented_compute(block, compiler, desc); + return; + } + break; + } + + case 2: // shifter operations + { + switch (operation) + { + case 0x00: // Rn = LSHIFT Rx BY Ry | + case 0x04: // Rn = ASHIFT Rx BY Ry | + case 0xc4: // Rn = BCLR Rx BY Ry | + case 0x44: // Rn = FDEP Rx BY Ry | : + case 0x4c: // Rn = FDEP Rx BY Ry | : (SE) + case 0x48: // Rn = FEXT Rx BY Ry | : (SE) + case 0x24: // Rn = Rn OR ASHIFT Rx BY Ry | + case 0x64: // Rn = Rn OR FDEP Rx BY Ry | : + case 0x6c: // Rn = Rn OR FDEP Rx BY Ry | : (SE) + case 0x80: // Rn = EXP Rx + case 0x84: // Rn = EXP Rx (EX) + case 0x88: // Rn = LEFTZ Rx + case 0x8c: // Rn = LEFTO Rx + case 0x90: // Rn = FPACK Fx + case 0x94: // Fn = FUNPACK Rx + generate_unimplemented_compute(block, compiler, desc); + return; + + case 0x08: // Rn = ROT Rx BY Ry | + { + code_label shift_neg = compiler->labelnum++; + code_label shift_end = compiler->labelnum++; + + UML_MOV(block, I0, REG(ry)); + UML_CMP(block, I0, 0); + UML_JMPc(block, COND_L, shift_neg); + UML_ROL(block, I1, REG(rx), I0); + UML_JMP(block, shift_end); + UML_LABEL(block, shift_neg); + UML_SUB(block, I2, 0, I0); + UML_ROR(block, I1, REG(rx), I2); + UML_LABEL(block, shift_end); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED) UML_MOV(block, ASTAT_SV, 0); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + UML_MOV(block, REG(rn), I1); + return; + } + + case 0x20: // Rn = Rn OR LSHIFT Rx BY Ry | + { + code_label shift_neg = compiler->labelnum++; + code_label shift_end = compiler->labelnum++; + + UML_MOV(block, I0, REG(ry)); + UML_CMP(block, I0, 0); + UML_JMPc(block, COND_L, shift_neg); + UML_SHL(block, I1, REG(rx), I0); + UML_JMP(block, shift_end); + UML_LABEL(block, shift_neg); + UML_SUB(block, I2, 0, I0); + UML_SHR(block, I1, REG(rx), I2); + UML_LABEL(block, shift_end); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED) + { + UML_CMP(block, I0, 0); + UML_SETc(block, COND_NZ, ASTAT_SV); + } + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + UML_OR(block, REG(rn), REG(rn), I1); + + return; + } + + case 0x40: // Rn = FEXT Rx BY Ry | : + // extraction mask + UML_MOV(block, I0, REG(ry)); + UML_SHR(block, I1, I0, 6); + UML_AND(block, I1, I1, 0x3f); // i1 = len6 + UML_AND(block, I0, I0, 0x3f); // i0 = bit6 + UML_MOV(block, I3, 0xffffffff); + UML_SUB(block, I2, 32, I1); + UML_SHR(block, I3, I3, I2); + UML_SHL(block, I3, I3, I0); + + UML_AND(block, I2, REG(rx), I3); + UML_SHR(block, REG(rn), I2, I0); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED) + { + UML_ADD(block, I0, I0, I1); + UML_CMP(block, I0, 32); + UML_SETc(block, COND_G, ASTAT_SV); + } + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + return; + + case 0xc0: // Rn = BSET Rx BY Ry | + { + UML_MOV(block, I0, REG(ry)); + UML_MOV(block, I1, 1); + UML_SHL(block, I1, I1, I0); + UML_OR(block, REG(rn), REG(rn), I1); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED) + { + UML_CMP(block, I0, 31); + UML_SETc(block, COND_G, ASTAT_SV); + } + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + return; + } + + case 0xcc: // BTST Rx BY Ry | + { + UML_MOV(block, I0, REG(ry)); + UML_MOV(block, I1, 1); + UML_SHL(block, I1, I1, I0); + UML_TEST(block, REG(rx), I1); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED) + UML_CMP(block, I0, 31); + if (SV_CALC_REQUIRED) UML_SETc(block, COND_G, ASTAT_SV); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + return; + } + + default: + generate_unimplemented_compute(block, compiler, desc); + return; + } + break; + } + + default: + generate_unimplemented_compute(block, compiler, desc); + return; + } + } +} + +void adsp21062_device::generate_if_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int condition, int skip_label) +{ + // Jump to skip_label if condition is not true + code_label not_skip; + + switch (condition) + { + case 0x00: /* EQ */ + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x01: /* LT */ + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_NE, skip_label); + UML_TEST(block, ASTAT_AN, 1); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x02: /* LE */ + not_skip = compiler->labelnum++; + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_NZ, not_skip); + UML_TEST(block, ASTAT_AN, 1); + UML_JMPc(block, COND_NZ, not_skip); + UML_JMP(block, skip_label); + UML_LABEL(block, not_skip); + break; + case 0x03: /* AC */ + UML_TEST(block, ASTAT_AC, 1); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x04: /* AV */ + UML_TEST(block, ASTAT_AV, 1); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x05: /* MV */ + UML_TEST(block, ASTAT_MV, 1); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x06: /* MS */ + UML_TEST(block, ASTAT_MN, 1); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x07: /* SV */ + UML_TEST(block, ASTAT_SV, 1); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x08: /* SZ */ + UML_TEST(block, ASTAT_SZ, 1); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x09: /* FLAG0 */ + UML_CMP(block, FLAG0, 0); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x0a: /* FLAG1 */ + UML_CMP(block, FLAG1, 0); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x0b: /* FLAG2 */ + UML_CMP(block, FLAG2, 0); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x0c: /* FLAG3 */ + UML_CMP(block, FLAG3, 0); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x0d: /* TF */ + UML_TEST(block, ASTAT_BTF, 1); + UML_JMPc(block, COND_E, skip_label); + case 0x0e: /* BM */ + UML_JMP(block, skip_label); + case 0x0f: /* NOT LCE */ + UML_CMP(block, CURLCNTR, 1); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x10: /* NOT EQUAL */ + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x11: /* GE */ + not_skip = compiler->labelnum++; + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_NZ, not_skip); + UML_TEST(block, ASTAT_AN, 1); + UML_JMPc(block, COND_Z, not_skip); + UML_JMP(block, skip_label); + UML_LABEL(block, not_skip); + break; + case 0x12: /* GT */ + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_NZ, skip_label); + UML_TEST(block, ASTAT_AN, 1); + UML_JMPc(block, COND_NZ, skip_label); + break; + case 0x13: /* NOT AC */ + UML_TEST(block, ASTAT_AC, 1); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x14: /* NOT AV */ + UML_TEST(block, ASTAT_AV, 1); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x15: /* NOT MV */ + UML_TEST(block, ASTAT_MV, 1); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x16: /* NOT MS */ + UML_TEST(block, ASTAT_MN, 1); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x17: /* NOT SV */ + UML_TEST(block, ASTAT_SV, 1); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x18: /* NOT SZ */ + UML_TEST(block, ASTAT_SZ, 1); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x19: /* NOT FLAG0 */ + UML_CMP(block, FLAG0, 0); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x1a: /* NOT FLAG1 */ + UML_CMP(block, FLAG1, 0); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x1b: /* NOT FLAG2 */ + UML_CMP(block, FLAG2, 0); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x1c: /* NOT FLAG3 */ + UML_CMP(block, FLAG3, 0); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x1d: /* NOT TF */ + UML_TEST(block, ASTAT_BTF, 1); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x1e: /* NOT BM */ + fatalerror("generate_if_condition 0x1e"); // should not happen + break; + case 0x1f: /* TRUE */ + fatalerror("generate_if_condition 0x1f"); // should not happen + break; + } +} + +void adsp21062_device::generate_do_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int condition, int skip_label, ASTAT_DRC &astat) +{ + // Jump to skip_label if condition is true + code_label not_skip; + + UML_JMP(block, skip_label); + return; + + switch (condition) + { + case 0x00: /* EQ */ + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_NZ, skip_label); + break; + case 0x01: /* LT */ + not_skip = compiler->labelnum++; + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_NZ, not_skip); + UML_TEST(block, ASTAT_AN, 1); + UML_JMPc(block, COND_Z, not_skip); + UML_JMP(block, skip_label); + UML_LABEL(block, not_skip); + break; + case 0x02: /* LE */ + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_NZ, skip_label); + UML_TEST(block, ASTAT_AN, 1); + UML_JMPc(block, COND_NZ, skip_label); + break; + case 0x03: /* AC */ + UML_TEST(block, ASTAT_AC, 1); + UML_JMPc(block, COND_NZ, skip_label); + break; + case 0x04: /* AV */ + UML_TEST(block, ASTAT_AV, 1); + UML_JMPc(block, COND_NZ, skip_label); + break; + case 0x05: /* MV */ + UML_TEST(block, ASTAT_MV, 1); + UML_JMPc(block, COND_NZ, skip_label); + break; + case 0x06: /* MS */ + UML_TEST(block, ASTAT_MN, 1); + UML_JMPc(block, COND_NZ, skip_label); + break; + case 0x07: /* SV */ + UML_TEST(block, ASTAT_SV, 1); + UML_JMPc(block, COND_NZ, skip_label); + break; + case 0x08: /* SZ */ + UML_TEST(block, ASTAT_SZ, 1); + UML_JMPc(block, COND_NZ, skip_label); + break; + case 0x09: /* FLAG0 */ + UML_CMP(block, FLAG0, 0); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x0a: /* FLAG1 */ + UML_CMP(block, FLAG1, 0); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x0b: /* FLAG2 */ + UML_CMP(block, FLAG2, 0); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x0c: /* FLAG3 */ + UML_CMP(block, FLAG3, 0); + UML_JMPc(block, COND_NE, skip_label); + break; + case 0x0d: /* TF */ + UML_TEST(block, ASTAT_BTF, 1); + UML_JMPc(block, COND_NZ, skip_label); + break; + case 0x0e: /* BM */ + // infinite loop + break; + case 0x0f: /* LCE */ + fatalerror("generate_do_condition 0x0f"); // this should only be used with counter loops + break; + case 0x10: /* NOT EQUAL */ + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_Z, skip_label); + break; + case 0x11: /* GE */ + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_NZ, skip_label); + UML_TEST(block, ASTAT_AN, 1); + UML_JMPc(block, COND_Z, skip_label); + break; + case 0x12: /* GT */ + not_skip = compiler->labelnum++; + UML_TEST(block, ASTAT_AZ, 1); + UML_JMPc(block, COND_NZ, not_skip); + UML_TEST(block, ASTAT_AN, 1); + UML_JMPc(block, COND_NZ, not_skip); + UML_JMP(block, skip_label); + UML_LABEL(block, not_skip); + break; + case 0x13: /* NOT AC */ + UML_TEST(block, ASTAT_AC, 1); + UML_JMPc(block, COND_Z, skip_label); + break; + case 0x14: /* NOT AV */ + UML_TEST(block, ASTAT_AV, 1); + UML_JMPc(block, COND_Z, skip_label); + break; + case 0x15: /* NOT MV */ + UML_TEST(block, ASTAT_MV, 1); + UML_JMPc(block, COND_Z, skip_label); + break; + case 0x16: /* NOT MS */ + UML_TEST(block, ASTAT_MN, 1); + UML_JMPc(block, COND_Z, skip_label); + break; + case 0x17: /* NOT SV */ + UML_TEST(block, ASTAT_SV, 1); + UML_JMPc(block, COND_Z, skip_label); + break; + case 0x18: /* NOT SZ */ + UML_TEST(block, ASTAT_SZ, 1); + UML_JMPc(block, COND_Z, skip_label); + break; + case 0x19: /* NOT FLAG0 */ + UML_CMP(block, FLAG0, 0); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x1a: /* NOT FLAG1 */ + UML_CMP(block, FLAG1, 0); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x1b: /* NOT FLAG2 */ + UML_CMP(block, FLAG2, 0); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x1c: /* NOT FLAG3 */ + UML_CMP(block, FLAG3, 0); + UML_JMPc(block, COND_E, skip_label); + break; + case 0x1d: /* NOT TF */ + UML_TEST(block, ASTAT_BTF, 1); + UML_JMPc(block, COND_Z, skip_label); + break; + case 0x1e: /* NOT BM */ + // always true + UML_JMP(block, skip_label); + break; + case 0x1f: /* FALSE (FOREVER) */ + // infinite loop + break; + } +} + +void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int data, int shiftop, int rn, int rx) +{ + INT8 shift = data & 0xff; + int bit = data & 0x3f; + int len = (data >> 6) & 0x3f; + + switch (shiftop) + { + case 0x01: // ASHIFT Rx BY + case 0x11: // FDEP Rx BY : + case 0x13: // FDEP Rx BY : (SE) + case 0x1b: // Rn = Rn OR FDEP Rx BY : (SE) + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); + UML_CALLC(block, cfunc_unimplemented_shiftimm, this); + break; + + case 0x00: // LSHIFT Rx BY + if (abs(shift) >= 32) + { + UML_MOV(block, REG(rn), 0); + if (SZ_CALC_REQUIRED) UML_MOV(block, ASTAT_SZ, 1); + if (SV_CALC_REQUIRED) UML_MOV(block, ASTAT_SV, 1); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + } + else + { + if (shift < 0) + UML_SHR(block, REG(rn), REG(rx), -shift); + else + UML_SHL(block, REG(rn), REG(rx), shift); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED && shift != 0) UML_MOV(block, ASTAT_SV, 1); + if (SV_CALC_REQUIRED && shift == 0) UML_MOV(block, ASTAT_SV, 0); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + } + return; + + case 0x02: // ROT Rx BY + UML_ROL(block, REG(rn), REG(rx), (shift < 0) ? 31 - ((-shift) & 0x1f) : shift & 0x1f); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED) UML_MOV(block, ASTAT_SV, 0); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + return; + + case 0x08: // Rn = Rn OR LSHIFT Rx BY + if (abs(shift) >= 32) + { + UML_MOV(block, I0, 0); + if (SZ_CALC_REQUIRED) UML_MOV(block, ASTAT_SZ, 1); + if (SV_CALC_REQUIRED) UML_MOV(block, ASTAT_SV, 1); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + UML_OR(block, REG(rn), REG(rn), I0); + } + else + { + if (shift < 0) + UML_SHR(block, I0, REG(rx), -shift); + else + UML_SHL(block, I0, REG(rx), shift); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED && shift != 0) UML_MOV(block, ASTAT_SV, 1); + if (SV_CALC_REQUIRED && shift == 0) UML_MOV(block, ASTAT_SV, 0); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + UML_OR(block, REG(rn), REG(rn), I0); + } + return; + + case 0x10: // FEXT Rx BY : + if (bit == 0) + { + UML_AND(block, REG(rn), REG(rx), MAKE_EXTRACT_MASK(bit, len)); + } + else + { + UML_AND(block, I0, REG(rx), MAKE_EXTRACT_MASK(bit, len)); + UML_SHR(block, REG(rn), I0, bit); + } + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED && (bit + len) > 32) UML_MOV(block, ASTAT_SV, 1); + if (SV_CALC_REQUIRED && (bit + len) <= 32) UML_MOV(block, ASTAT_SV, 0); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + return; + + case 0x12: // FEXT Rx BY : (SE) + UML_AND(block, I0, REG(rx), MAKE_EXTRACT_MASK(bit, len)); + UML_SHL(block, I0, I0, 32 - (bit + len)); + UML_SAR(block, REG(rn), I0, 32 - (bit + len) + bit); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED && (bit + len) > 32) UML_MOV(block, ASTAT_SV, 1); + if (SV_CALC_REQUIRED && (bit + len) <= 32) UML_MOV(block, ASTAT_SV, 0); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + return; + + case 0x19: // Rn = Rn OR FDEP Rx BY : + UML_AND(block, I0, REG(rx), MAKE_EXTRACT_MASK(0, len)); + if (bit > 0) + UML_SHL(block, I0, I0, bit); + UML_OR(block, REG(rn), REG(rn), I0); + + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED && (bit + len) > 32) UML_MOV(block, ASTAT_SV, 1); + if (SV_CALC_REQUIRED && (bit + len) <= 32) UML_MOV(block, ASTAT_SV, 0); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + return; + + case 0x30: // BSET Rx BY + UML_OR(block, REG(rn), REG(rx), 1 << data); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED && data > 31) UML_MOV(block, ASTAT_SV, 1); + if (SV_CALC_REQUIRED && data <= 31) UML_MOV(block, ASTAT_SV, 0); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + return; + + case 0x31: // BCLR Rx By + UML_AND(block, REG(rn), REG(rx), ~(1 << data)); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED && data > 31) UML_MOV(block, ASTAT_SV, 1); + if (SV_CALC_REQUIRED && data <= 31) UML_MOV(block, ASTAT_SV, 0); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + return; + + case 0x32: // BTGL Rx BY + UML_XOR(block, REG(rn), REG(rx), 1 << data); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED && data > 31) UML_MOV(block, ASTAT_SV, 1); + if (SV_CALC_REQUIRED && data <= 31) UML_MOV(block, ASTAT_SV, 0); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + return; + + case 0x33: // BTST Rx BY + UML_TEST(block, REG(rx), 1 << data); + if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ); + if (SV_CALC_REQUIRED && data > 31) UML_MOV(block, ASTAT_SV, 1); + if (SV_CALC_REQUIRED && data <= 31) UML_MOV(block, ASTAT_SV, 0); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0); + return; + + default: + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); + UML_CALLC(block, cfunc_unimplemented_compute, this); + return; + } +} \ No newline at end of file diff --git a/src/devices/cpu/sharc/sharcdsm.cpp b/src/devices/cpu/sharc/sharcdsm.cpp index af754afe66b..b65bbeb71ea 100644 --- a/src/devices/cpu/sharc/sharcdsm.cpp +++ b/src/devices/cpu/sharc/sharcdsm.cpp @@ -88,14 +88,14 @@ static void compute(UINT32 opcode) case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: { - print("R%d = R%d * R%d (SSFR), R%d = R%d + R%d, R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12, rs, rxa+8, rya+12); + print("R%d = R%d * R%d (SSFR), R%d = R%d + R%d, R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12, (opcode >> 16) & 0xf, rxa+8, rya+12); break; } case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: { - print("F%d = F%d * F%d, F%d = F%d + F%d, F%d = F%d - F%d", rm, rxm, rym+4, ra, rxa+8, rya+12, rs, rxa+8, rya+12); + print("F%d = F%d * F%d, F%d = F%d + F%d, F%d = F%d - F%d", rm, rxm, rym+4, ra, rxa+8, rya+12, (opcode >> 16) & 0xf, rxa+8, rya+12); break; } diff --git a/src/devices/cpu/sharc/sharcfe.cpp b/src/devices/cpu/sharc/sharcfe.cpp new file mode 100644 index 00000000000..37e361a70c8 --- /dev/null +++ b/src/devices/cpu/sharc/sharcfe.cpp @@ -0,0 +1,1830 @@ +// license:BSD-3-Clause +// copyright-holders:Ville Linde + +/****************************************************************************** + + Front-end for SHARC recompiler + +******************************************************************************/ + +#include "emu.h" +#include "sharcfe.h" + +#define REG_USED(desc,x) do { (desc).regin[0] |= 1 << (x); } while(0) +#define REG_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0) + +//#define ASTAT_USED(desc) do { (desc).regin[0] |= 1 << 16; } while(0) +//#define ASTAT_MODIFIED(desc) do { (desc).regout[0] |= 1 << 16; } while(0) + +#define AZ_USED(desc) do { (desc).regin[0] |= 1 << 16; } while(0) +#define AZ_MODIFIED(desc) do { (desc).regout[0] |= 1 << 16; } while(0) +#define AV_USED(desc) do { (desc).regin[0] |= 1 << 17; } while(0) +#define AV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 17; } while(0) +#define AN_USED(desc) do { (desc).regin[0] |= 1 << 18; } while(0) +#define AN_MODIFIED(desc) do { (desc).regout[0] |= 1 << 18; } while(0) +#define AC_USED(desc) do { (desc).regin[0] |= 1 << 19; } while(0) +#define AC_MODIFIED(desc) do { (desc).regout[0] |= 1 << 19; } while(0) +#define AS_USED(desc) do { (desc).regin[0] |= 1 << 20; } while(0) +#define AS_MODIFIED(desc) do { (desc).regout[0] |= 1 << 20; } while(0) +#define AI_USED(desc) do { (desc).regin[0] |= 1 << 21; } while(0) +#define AI_MODIFIED(desc) do { (desc).regout[0] |= 1 << 21; } while(0) +#define MN_USED(desc) do { (desc).regin[0] |= 1 << 22; } while(0) +#define MN_MODIFIED(desc) do { (desc).regout[0] |= 1 << 22; } while(0) +#define MV_USED(desc) do { (desc).regin[0] |= 1 << 23; } while(0) +#define MV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 23; } while(0) +#define MU_USED(desc) do { (desc).regin[0] |= 1 << 24; } while(0) +#define MU_MODIFIED(desc) do { (desc).regout[0] |= 1 << 24; } while(0) +#define MI_USED(desc) do { (desc).regin[0] |= 1 << 25; } while(0) +#define MI_MODIFIED(desc) do { (desc).regout[0] |= 1 << 25; } while(0) +#define SV_USED(desc) do { (desc).regin[0] |= 1 << 26; } while(0) +#define SV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 26; } while(0) +#define SZ_USED(desc) do { (desc).regin[0] |= 1 << 27; } while(0) +#define SZ_MODIFIED(desc) do { (desc).regout[0] |= 1 << 27; } while(0) +#define SS_USED(desc) do { (desc).regin[0] |= 1 << 28; } while(0) +#define SS_MODIFIED(desc) do { (desc).regout[0] |= 1 << 28; } while(0) +#define BTF_USED(desc) do { (desc).regin[0] |= 1 << 29; } while(0) +#define BTF_MODIFIED(desc) do { (desc).regout[0] |= 1 << 29; } while(0) +#define AF_USED(desc) do { (desc).regin[0] |= 1 << 30; } while(0) +#define AF_MODIFIED(desc) do { (desc).regout[0] |= 1 << 30; } while(0) + +#define ALU_FLAGS_MODIFIED(desc) do { AZ_MODIFIED(desc);AN_MODIFIED(desc);AV_MODIFIED(desc);AC_MODIFIED(desc);AS_MODIFIED(desc);AI_MODIFIED(desc); } while(0) +#define MULT_FLAGS_MODIFIED(desc) do { MN_MODIFIED(desc);MV_MODIFIED(desc);MU_MODIFIED(desc);MI_MODIFIED(desc); } while(0) +#define SHIFT_FLAGS_MODIFIED(desc) do { SZ_MODIFIED(desc);SV_MODIFIED(desc);SS_MODIFIED(desc); } while(0) + + +#define PM_I_USED(desc,x) do { (desc).regin[1] |= 1 << (x); } while(0) +#define PM_I_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << (x); } while(0) +#define PM_M_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 8); } while(0) +#define PM_M_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 8); } while(0) +#define PM_B_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 16); } while(0) +#define PM_B_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 16); } while(0) +#define PM_L_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 24); } while(0) +#define PM_L_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 24); } while(0) + +#define DM_I_USED(desc,x) do { (desc).regin[2] |= 1 << (x); } while(0) +#define DM_I_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << (x); } while(0) +#define DM_M_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 8); } while(0) +#define DM_M_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 8); } while(0) +#define DM_B_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 16); } while(0) +#define DM_B_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 16); } while(0) +#define DM_L_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 24); } while(0) +#define DM_L_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 24); } while(0) + + +sharc_frontend::sharc_frontend(adsp21062_device *sharc, UINT32 window_start, UINT32 window_end, UINT32 max_sequence) + : drc_frontend(*sharc, window_start, window_end, max_sequence), + m_sharc(sharc) +{ + m_loopmap = std::make_unique(0x20000); +} + + + +void sharc_frontend::flush() +{ + LOOP_ENTRY* map = m_loopmap.get(); + + memset(map, 0, sizeof(LOOP_ENTRY) * 0x20000); +} + +void sharc_frontend::add_loop_entry(UINT32 pc, UINT8 type, UINT32 start_pc, UINT8 looptype, UINT8 condition) +{ + UINT32 l2 = pc >> 17; + UINT32 l1 = pc & 0x1ffff; + + if (l2 != 0x1) + fatalerror("sharc_frontend::add_loop_entry: PC = %08X", pc); + + LOOP_ENTRY* map = m_loopmap.get(); + UINT32 current_type = map[l1].entrytype; + if (current_type & type) + { + // check for mismatch if the entry is already used + if (map[l1].start_pc != start_pc || + map[l1].looptype != looptype || + map[l1].condition != condition) + { + fatalerror("sharc_frontend::add_loop_entry: existing entry does match: start_pc %08X/%08X, looptype %02X/%02X, cond %02X/%02X", start_pc, map[l1].start_pc, looptype, map[l1].looptype, condition, map[l1].condition); + } + } + + current_type |= type; + + map[l1].entrytype = current_type; + map[l1].looptype = looptype; + map[l1].condition = condition; + map[l1].start_pc = start_pc; +} + +void sharc_frontend::insert_loop(const LOOP_DESCRIPTOR &loopdesc) +{ + add_loop_entry(loopdesc.start_pc, LOOP_ENTRY_START, loopdesc.start_pc, loopdesc.type, loopdesc.condition); + add_loop_entry(loopdesc.end_pc, LOOP_ENTRY_EVALUATION, loopdesc.start_pc, loopdesc.type, loopdesc.condition); + if (loopdesc.astat_check_pc != 0xffffffff) + add_loop_entry(loopdesc.astat_check_pc, LOOP_ENTRY_ASTAT_CHECK, loopdesc.start_pc, loopdesc.type, loopdesc.condition); +} + +bool sharc_frontend::is_loop_evaluation(UINT32 pc) +{ + UINT32 l2 = pc >> 17; + UINT32 l1 = pc & 0x1ffff; + + if (l2 != 0x1) + return false; + + LOOP_ENTRY* map = m_loopmap.get(); + if (map[l1].entrytype & LOOP_ENTRY_EVALUATION) + return true; + + return false; +} + +bool sharc_frontend::is_loop_start(UINT32 pc) +{ + UINT32 l2 = pc >> 17; + UINT32 l1 = pc & 0x1ffff; + + if (l2 != 0x1) + return false; + + LOOP_ENTRY* map = m_loopmap.get(); + if (map[l1].entrytype & LOOP_ENTRY_START) + return true; + + return false; +} + +bool sharc_frontend::is_astat_delay_check(UINT32 pc) +{ + UINT32 l2 = pc >> 17; + UINT32 l1 = pc & 0x1ffff; + + if (l2 != 0x1) + return false; + + LOOP_ENTRY* map = m_loopmap.get(); + if (map[l1].entrytype & LOOP_ENTRY_ASTAT_CHECK) + return true; + + return false; +} + + +bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) +{ + //UINT64 opcode = desc.opptr.q[0] = m_sharc.m_direct->read_qword(desc.physpc, 0); + UINT64 opcode = desc.opptr.q[0] = m_sharc->pm_read48(desc.physpc); + + desc.length = 1; + desc.cycles = 1; + + // handle looping + /* + if (m_loop.size() > 0) + { + for (int i = 0; i < m_loop.size(); i++) + { + LOOP_DESCRIPTOR &loop = m_loop.at(i); + if (loop.start_pc == desc.pc) + { + desc.flags |= OPFLAG_IS_BRANCH_TARGET; + } + if (loop.astat_check_pc == desc.pc) + { + if (loop.type == LOOP_TYPE_CONDITIONAL) + { + UINT32 flags = m_sharc->do_condition_astat_bits(loop.condition); + if (flags & adsp21062_device::ASTAT_FLAGS::AZ) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AZ; + if (flags & adsp21062_device::ASTAT_FLAGS::AN) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AN; + if (flags & adsp21062_device::ASTAT_FLAGS::AV) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AV; + if (flags & adsp21062_device::ASTAT_FLAGS::AC) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AC; + if (flags & adsp21062_device::ASTAT_FLAGS::MN) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_MN; + if (flags & adsp21062_device::ASTAT_FLAGS::MV) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_MV; + if (flags & adsp21062_device::ASTAT_FLAGS::SV) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_SV; + if (flags & adsp21062_device::ASTAT_FLAGS::SZ) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_SZ; + if (flags & adsp21062_device::ASTAT_FLAGS::BTF) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_BTF; + } + } + if (loop.end_pc == desc.pc) + { + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.targetpc = loop.start_pc; + if (loop.type == LOOP_TYPE_COUNTER) + { + desc.userflags |= OP_USERFLAG_COUNTER_LOOP; + } + else if (loop.type == LOOP_TYPE_CONDITIONAL) + { + desc.userflags |= OP_USERFLAG_COND_LOOP; + desc.userflags |= (loop.condition << 2) & OP_USERFLAG_COND_FIELD; + } + m_loop.erase(m_loop.begin()+i); + break; + } + } + }*/ + + if (is_astat_delay_check(desc.pc)) + { + LOOP_ENTRY* map = m_loopmap.get(); + int index = desc.pc & 0x1ffff; + + if (map[index].looptype == LOOP_TYPE_CONDITIONAL) + { + UINT32 flags = m_sharc->do_condition_astat_bits(map[index].condition); + if (flags & adsp21062_device::ASTAT_FLAGS::AZ) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AZ; + if (flags & adsp21062_device::ASTAT_FLAGS::AN) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AN; + if (flags & adsp21062_device::ASTAT_FLAGS::AV) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AV; + if (flags & adsp21062_device::ASTAT_FLAGS::AC) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AC; + if (flags & adsp21062_device::ASTAT_FLAGS::MN) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_MN; + if (flags & adsp21062_device::ASTAT_FLAGS::MV) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_MV; + if (flags & adsp21062_device::ASTAT_FLAGS::SV) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_SV; + if (flags & adsp21062_device::ASTAT_FLAGS::SZ) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_SZ; + if (flags & adsp21062_device::ASTAT_FLAGS::BTF) desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_BTF; + } + } + + if (is_loop_start(desc.pc)) + { + desc.flags |= OPFLAG_IS_BRANCH_TARGET; + } + + if (is_loop_evaluation(desc.pc)) + { + LOOP_ENTRY* map = m_loopmap.get(); + int index = desc.pc & 0x1ffff; + + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.targetpc = map[index].start_pc; + if (map[index].looptype == LOOP_TYPE_COUNTER) + { + desc.userflags |= OP_USERFLAG_COUNTER_LOOP; + } + else if (map[index].looptype == LOOP_TYPE_CONDITIONAL) + { + desc.userflags |= OP_USERFLAG_COND_LOOP; + desc.userflags |= (map[index].condition << 2) & OP_USERFLAG_COND_FIELD; + } + } + + + switch ((opcode >> 45) & 7) + { + case 0: // subops + { + UINT32 subop = (opcode >> 40) & 0x1f; + switch (subop) + { + case 0x00: // NOP / idle |000|00000| + if (opcode & U64(0x008000000000)) + { + // IDLE + desc.flags |= OPFLAG_END_SEQUENCE; + } + else + { + // NOP + } + break; + + case 0x01: // compute |000|00001| + { + int cond = (opcode >> 33) & 0x1f; + describe_if_condition(desc, cond); + + if (!describe_compute(desc, opcode)) + return false; + break; + } + + case 0x02: // immediate shift |000|00010| + { + int shiftop = (opcode >> 16) & 0x3f; + int rn = (opcode >> 4) & 0xf; + int rx = (opcode & 0xf); + int cond = (opcode >> 33) & 0x1f; + + describe_if_condition(desc, cond); + + if (!describe_shiftop_imm(desc, shiftop, rn, rx)) + return false; + break; + } + + case 0x04: // compute / modify |000|00100| + { + int g = (opcode >> 38) & 0x1; + int m = (opcode >> 27) & 0x7; + int i = (opcode >> 30) & 0x7; + int cond = (opcode >> 33) & 0x1f; + + describe_if_condition(desc, cond); + + if (!describe_compute(desc, opcode)) + return false; + + if (g) + { + // PM + PM_I_USED(desc, i); + PM_I_MODIFIED(desc, i); + PM_M_USED(desc, m); + } + else + { + // DM + DM_I_USED(desc, i); + DM_I_MODIFIED(desc, i); + DM_M_USED(desc, m); + } + break; + } + + case 0x06: // direct jump|call |000|00110| + { + int j = (opcode >> 26) & 0x1; + int cond = (opcode >> 33) & 0x1f; + UINT32 address = opcode & 0xffffff; + + if (m_sharc->if_condition_always_true(cond)) + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + else + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + + describe_if_condition(desc, cond); + + desc.targetpc = address; + desc.delayslots = (j) ? 2 : 0; + break; + } + + case 0x07: // direct jump|call |000|00111| + { + int j = (opcode >> 26) & 0x1; + int cond = (opcode >> 33) & 0x1f; + UINT32 address = opcode & 0xffffff; + + if (m_sharc->if_condition_always_true(cond)) + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + else + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + + describe_if_condition(desc, cond); + + desc.targetpc = desc.pc + SIGN_EXTEND24(address); + desc.delayslots = (j) ? 2 : 0; + break; + } + + case 0x08: // indirect jump|call / compute |000|01000| + { + int j = (opcode >> 26) & 0x1; + int pmi = (opcode >> 30) & 0x7; + int pmm = (opcode >> 27) & 0x7; + int cond = (opcode >> 33) & 0x1f; + + if (!describe_compute(desc, opcode)) + return false; + + if (m_sharc->if_condition_always_true(cond)) + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + else + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + + describe_if_condition(desc, cond); + + PM_I_USED(desc, pmi); + PM_M_USED(desc, pmm); + + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.delayslots = (j) ? 2 : 0; + break; + } + + case 0x09: // indirect jump|call / compute |000|01001| + { + int j = (opcode >> 26) & 0x1;; + int cond = (opcode >> 33) & 0x1f; + + if (!describe_compute(desc, opcode)) + return false; + + if (m_sharc->if_condition_always_true(cond)) + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + else + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + + describe_if_condition(desc, cond); + + desc.targetpc = desc.pc + SIGN_EXTEND6((opcode >> 27) & 0x3f); + desc.delayslots = (j) ? 2 : 0; + + break; + } + + case 0x0a: // return from subroutine / compute |000|01010| + { + int cond = (opcode >> 33) & 0x1f; + int j = (opcode >> 26) & 0x1; + + if (!describe_compute(desc, opcode)) + return false; + + if (m_sharc->if_condition_always_true(cond)) + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + else + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + + describe_if_condition(desc, cond); + + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.delayslots = (j) ? 2 : 0; + break; + } + + case 0x0b: // return from interrupt / compute |000|01011| + { + int cond = (opcode >> 33) & 0x1f; + int j = (opcode >> 26) & 0x1; + + if (!describe_compute(desc, opcode)) + return false; + + if (m_sharc->if_condition_always_true(cond)) + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + else + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + + describe_if_condition(desc, cond); + + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.delayslots = (j) ? 2 : 0; + break; + } + + case 0x0c: // do until counter expired |000|01100| + { + int offset = SIGN_EXTEND24(opcode & 0xffffff); + + LOOP_DESCRIPTOR loop; + loop.start_pc = desc.pc + 1; + loop.end_pc = desc.pc + offset; + loop.astat_check_pc = 0xffffffff; + loop.type = LOOP_TYPE_COUNTER; + loop.condition = 0; + + insert_loop(loop); + break; + } + + case 0x0d: // do until counter expired |000|01101| + { + int ureg = (opcode >> 32) & 0xff; + if (!describe_ureg_access(desc, ureg, UREG_READ)) + return false; + + int offset = SIGN_EXTEND24(opcode & 0xffffff); + + LOOP_DESCRIPTOR loop; + loop.start_pc = desc.pc + 1; + loop.end_pc = desc.pc + offset; + loop.astat_check_pc = 0xffffffff; + loop.type = LOOP_TYPE_COUNTER; + loop.condition = 0; + + insert_loop(loop); + break; + } + + case 0x0e: // do until |000|01110| + { + int offset = SIGN_EXTEND24(opcode & 0xffffff); + int cond = (opcode >> 33) & 0x1f; + + LOOP_DESCRIPTOR loop; + loop.start_pc = desc.pc + 1; + loop.end_pc = desc.pc + offset; + loop.type = LOOP_TYPE_CONDITIONAL; + loop.condition = cond; + + loop.astat_check_pc = loop.end_pc - 2; + if (loop.astat_check_pc < loop.start_pc) + fatalerror("describe_compute: conditional loop < 2 at %08X", desc.pc); + + insert_loop(loop); + break; + } + + case 0x0f: // immediate data -> ureg |000|01111| + { + int ureg = (opcode >> 32) & 0xff; + if (!describe_ureg_access(desc, ureg, UREG_WRITE)) + return false; + break; + } + + case 0x10: // ureg <-> DM|PM (direct) |000|100|G|D| + case 0x11: + case 0x12: + case 0x13: + { + int ureg = (opcode >> 32) & 0xff; + int d = (opcode >> 40) & 1; + if (d) + { + if (!describe_ureg_access(desc, ureg, UREG_READ)) + return false; + desc.flags |= OPFLAG_WRITES_MEMORY; + } + else + { + if (!describe_ureg_access(desc, ureg, UREG_WRITE)) + return false; + desc.flags |= OPFLAG_READS_MEMORY; + } + break; + } + + case 0x14: // system register bit manipulation |000|10100| + { + int bop = (opcode >> 37) & 0x7; + int sreg = (opcode >> 32) & 0xf; + UINT32 data = (UINT32)(opcode); + + switch (bop) + { + case 0: // SET + case 1: // CLEAR + case 2: // TOGGLE + if (sreg == 0x7c) // ASTAT + { + if (data & adsp21062_device::AZ) + { + AZ_USED(desc); AZ_MODIFIED(desc); + } + if (data & adsp21062_device::AV) + { + AV_USED(desc); AV_MODIFIED(desc); + } + if (data & adsp21062_device::AN) + { + AN_USED(desc); AN_MODIFIED(desc); + } + if (data & adsp21062_device::AC) + { + AC_USED(desc); AC_MODIFIED(desc); + } + if (data & adsp21062_device::AS) + { + AS_USED(desc); AS_MODIFIED(desc); + } + if (data & adsp21062_device::AI) + { + AI_USED(desc); AI_MODIFIED(desc); + } + if (data & adsp21062_device::MN) + { + MN_USED(desc); MN_MODIFIED(desc); + } + if (data & adsp21062_device::MV) + { + MV_USED(desc); MV_MODIFIED(desc); + } + if (data & adsp21062_device::MU) + { + MU_USED(desc); MU_MODIFIED(desc); + } + if (data & adsp21062_device::MI) + { + MI_USED(desc); MI_MODIFIED(desc); + } + if (data & adsp21062_device::SV) + { + SV_USED(desc); SV_MODIFIED(desc); + } + if (data & adsp21062_device::SZ) + { + SZ_USED(desc); SZ_MODIFIED(desc); + } + if (data & adsp21062_device::SS) + { + SS_USED(desc); SS_MODIFIED(desc); + } + if (data & adsp21062_device::BTF) + { + BTF_USED(desc); BTF_MODIFIED(desc); + } + if (data & adsp21062_device::AF) + { + AF_USED(desc); AF_MODIFIED(desc); + } + } + break; + + case 4: // TEST + case 5: // XOR + BTF_MODIFIED(desc); + break; + + default: + fatalerror("sharc_frontend::describe: system reg bit manipulation %d", bop); + return false; + } + break; + } + + case 0x16: // I register modify / bit-reverse |000|10110| + { + if (opcode & U64(0x008000000000)) // bit reverse + { + fatalerror("sharc_frontend::describe: bit reverse unimplemented"); + } + else // modify + { + int g = (opcode >> 38) & 0x1; + int i = (opcode >> 32) & 0x7; + + if (g) + PM_I_USED(desc, i); + else + DM_I_USED(desc, i); + } + break; + } + + case 0x17: // push|pop stacks / flush cache |000|10111| + break; + + case 0x18: // cjump |000|11000| + fatalerror("sharc_frontend::describe: cjump unimplemented"); + break; + + case 0x19: // rframe |000|11001| + fatalerror("sharc_frontend::describe: rframe unimplemented"); + break; + + default: + fatalerror("sharc_frontend::describe: unknown subop %02X in opcode %04X%08X", subop, (UINT16)(opcode >> 32), (UINT32)(opcode)); + return false; + } + break; + } + + case 1: // compute / dreg <-> DM / dreg <-> PM |001| + { + if (!describe_compute(desc, opcode)) + return false; + + int pm_dreg = (opcode >> 23) & 0xf; + int pmm = (opcode >> 27) & 0x7; + int pmi = (opcode >> 30) & 0x7; + int dm_dreg = (opcode >> 33) & 0xf; + int dmm = (opcode >> 38) & 0x7; + int dmi = (opcode >> 41) & 0x7; + int pmd = (opcode >> 37) & 0x1; + int dmd = (opcode >> 44) & 0x1; + + PM_I_USED(desc, pmi); + PM_I_MODIFIED(desc, pmi); + PM_M_USED(desc, pmm); + + if (pmd) + { + REG_USED(desc, pm_dreg); + desc.flags |= OPFLAG_WRITES_MEMORY; + } + else + { + REG_MODIFIED(desc, pm_dreg); + desc.flags |= OPFLAG_READS_MEMORY; + } + + DM_I_USED(desc, dmi); + DM_I_MODIFIED(desc, dmi); + DM_M_USED(desc, dmm); + + if (dmd) + { + REG_USED(desc, dm_dreg); + desc.flags |= OPFLAG_WRITES_MEMORY; + } + else + { + REG_MODIFIED(desc, dm_dreg); + desc.flags |= OPFLAG_READS_MEMORY; + } + break; + } + + case 2: // compute / ureg <-> DM|PM, register modify |010| + { + if (!describe_compute(desc, opcode)) + return false; + + int i = (opcode >> 41) & 0x7; + int m = (opcode >> 38) & 0x7; + int cond = (opcode >> 33) & 0x1f; + int g = (opcode >> 32) & 0x1; + int d = (opcode >> 31) & 0x1; + int ureg = (opcode >> 23) & 0xff; + + describe_if_condition(desc, cond); + + if (d) + { + if (!describe_ureg_access(desc, ureg, UREG_READ)) + return false; + desc.flags |= OPFLAG_WRITES_MEMORY; + } + else + { + if (!describe_ureg_access(desc, ureg, UREG_WRITE)) + return false; + desc.flags |= OPFLAG_READS_MEMORY; + } + + if (g) + { + // PM + PM_I_USED(desc, i); + PM_M_USED(desc, m); + } + else + { + // DM + DM_I_USED(desc, i); + DM_M_USED(desc, m); + } + + break; + } + + case 3: + { + if (!describe_compute(desc, opcode)) + return false; + + if (opcode & U64(0x100000000000)) // compute / ureg <-> ureg |011|1| + { + int src_ureg = (opcode >> 36) & 0xff; + int dst_ureg = (opcode >> 23) & 0xff; + int cond = (opcode >> 31) & 0x1f; + + describe_if_condition(desc, cond); + + if (!describe_ureg_access(desc, src_ureg, UREG_READ)) + return false; + if (!describe_ureg_access(desc, dst_ureg, UREG_WRITE)) + return false; + } + else // compute / dreg <-> DM|PM, immediate modify |011|0| + { + int u = (opcode >> 38) & 0x1; + int d = (opcode >> 39) & 0x1; + int g = (opcode >> 40) & 0x1; + int dreg = (opcode >> 23) & 0xf; + int i = (opcode >> 41) & 0x7; + int cond = (opcode >> 33) & 0x1f; + + describe_if_condition(desc, cond); + + if (d) + { + REG_USED(desc, dreg); + desc.flags |= OPFLAG_WRITES_MEMORY; + } + else + { + REG_MODIFIED(desc, dreg); + desc.flags |= OPFLAG_READS_MEMORY; + } + + if (g) + { + // PM + PM_I_USED(desc, i); + + if (u) // post-modify with update + { + PM_I_MODIFIED(desc, i); + } + } + else + { + // DM + DM_I_USED(desc, i); + + if (u) // post-modify with update + { + DM_I_MODIFIED(desc, i); + } + } + } + break; + } + + case 4: + { + if (opcode & U64(0x100000000000)) // immediate data -> DM|PM |100|1| + { + int i = (opcode >> 41) & 0x7; + int m = (opcode >> 38) & 0x7; + int g = (opcode >> 37) & 0x1; + + desc.flags |= OPFLAG_WRITES_MEMORY; + + if (g) + { + // PM + PM_I_USED(desc, i); + PM_I_MODIFIED(desc, i); + PM_M_USED(desc, m); + } + else + { + // DM + DM_I_USED(desc, i); + DM_I_MODIFIED(desc, i); + DM_M_USED(desc, m); + } + } + else // immediate shift / dreg <-> DM|PM |100|0| + { + int i = (opcode >> 41) & 0x7; + int m = (opcode >> 38) & 0x7; + int g = (opcode >> 32) & 0x1; + int d = (opcode >> 31) & 0x1; + int dreg = (opcode >> 23) & 0xf; + int shiftop = (opcode >> 16) & 0x3f; + int rn = (opcode >> 4) & 0xf; + int rx = (opcode & 0xf); + int cond = (opcode >> 33) & 0x1f; + + describe_if_condition(desc, cond); + + if (!describe_shiftop_imm(desc, shiftop, rn, rx)) + return false; + + if (d) + { + REG_USED(desc, dreg); + desc.flags |= OPFLAG_WRITES_MEMORY; + } + else + { + REG_MODIFIED(desc, dreg); + desc.flags |= OPFLAG_READS_MEMORY; + } + + if (g) + { + // PM + PM_I_USED(desc, i); + PM_I_MODIFIED(desc, i); + PM_M_USED(desc, m); + } + else + { + // DM + DM_I_USED(desc, i); + DM_I_MODIFIED(desc, i); + DM_M_USED(desc, m); + } + } + break; + } + + case 5: // ureg <-> DM|PM (indirect) |101| + { + int ureg = (opcode >> 32) & 0xff; + int d = (opcode >> 40) & 1; + int i = (opcode >> 41) & 0x7; + int g = (opcode >> 44) & 1; + + if (d) + { + if (!describe_ureg_access(desc, ureg, UREG_READ)) + return false; + desc.flags |= OPFLAG_WRITES_MEMORY; + } + else + { + if (!describe_ureg_access(desc, ureg, UREG_WRITE)) + return false; + desc.flags |= OPFLAG_READS_MEMORY; + } + + if (g) + PM_I_USED(desc, i); + else + DM_I_USED(desc, i); + break; + } + + case 6: // indirect jump / compute / dreg <-> DM |110| + { + int d = (opcode >> 44) & 0x1; + int dmi = (opcode >> 41) & 0x7; + int dmm = (opcode >> 38) & 0x7; + int pmi = (opcode >> 30) & 0x7; + int pmm = (opcode >> 27) & 0x7; + int cond = (opcode >> 33) & 0x1f; + int dreg = (opcode >> 23) & 0xf; + + if (!describe_compute(desc, opcode)) + return false; + + if (m_sharc->if_condition_always_true(cond)) + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + else + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + + describe_if_condition(desc, cond); + + PM_I_USED(desc, pmi); + PM_M_USED(desc, pmm); + DM_I_USED(desc, dmi); + DM_I_MODIFIED(desc, dmi); + DM_M_USED(desc, dmm); + + if (d) + { + REG_USED(desc, dreg); + desc.flags |= OPFLAG_WRITES_MEMORY; + } + else + { + REG_MODIFIED(desc, dreg); + desc.flags |= OPFLAG_READS_MEMORY; + } + + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.delayslots = 0; + break; + } + + case 7: // indirect jump / compute / dreg <-> DM |111| + { + int d = (opcode >> 44) & 0x1; + int dmi = (opcode >> 41) & 0x7; + int dmm = (opcode >> 38) & 0x7; + int cond = (opcode >> 33) & 0x1f; + int dreg = (opcode >> 23) & 0xf; + + if (!describe_compute(desc, opcode)) + return false; + + if (m_sharc->if_condition_always_true(cond)) + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + else + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + + describe_if_condition(desc, cond); + + DM_I_USED(desc, dmi); + DM_I_MODIFIED(desc, dmi); + DM_M_USED(desc, dmm); + + if (d) + { + REG_USED(desc, dreg); + desc.flags |= OPFLAG_WRITES_MEMORY; + } + else + { + REG_MODIFIED(desc, dreg); + desc.flags |= OPFLAG_READS_MEMORY; + } + + desc.targetpc = desc.pc + SIGN_EXTEND6((opcode >> 27) & 0x3f); + desc.delayslots = 0; + break; + } + } + + return true; +} + +bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode) +{ + // skip if no-op + if ((opcode & 0x7fffff) == 0) + return true; + + int rs = (opcode >> 12) & 0xf; + int rn = (opcode >> 8) & 0xf; + int ra = rn; + int rx = (opcode >> 4) & 0xf; + int ry = (opcode >> 0) & 0xf; + + if (opcode & 0x400000) // multi-function operation + { + UINT32 multiop = (opcode >> 16) & 0x3f; + int fm = rs; + int fa = rn; + int fxm = (opcode >> 6) & 0x3; // registers 0 - 3 + int fym = ((opcode >> 4) & 0x3) + 4; // registers 4 - 7 + int fxa = ((opcode >> 2) & 0x3) + 8; // registers 8 - 11 + int fya = (opcode & 0x3) + 12; // registers 12 - 15 + + switch (multiop) + { + case 0x00: // Rn = MRxx + REG_MODIFIED(desc, rn); + break; + case 0x01: // MRxx = Rn + REG_USED(desc, rn); + break; + + case 0x07: // Ra = Rx + Ry, Rs = Rx - Ry + case 0x0f: // Fa = Fx + Fy, Fs = Fx - Fy + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, ra); + REG_MODIFIED(desc, rs); + ALU_FLAGS_MODIFIED(desc); + break; + + case 0x04: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12 + case 0x05: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12 + case 0x06: // Rm = R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2 + REG_USED(desc, fxm); + REG_USED(desc, fym); + REG_USED(desc, fxa); + REG_USED(desc, fya); + REG_MODIFIED(desc, fm); + REG_MODIFIED(desc, fa); + ALU_FLAGS_MODIFIED(desc); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x08: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12 + case 0x09: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12 + case 0x0a: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2 + REG_USED(desc, fxm); + REG_USED(desc, fym); + REG_USED(desc, fxa); + REG_USED(desc, fya); + ALU_FLAGS_MODIFIED(desc); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x0c: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12 + case 0x0d: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12 + case 0x0e: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2 + REG_USED(desc, fxm); + REG_USED(desc, fym); + REG_USED(desc, fxa); + REG_USED(desc, fya); + REG_MODIFIED(desc, fm); + REG_MODIFIED(desc, fa); + ALU_FLAGS_MODIFIED(desc); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x10: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12 + case 0x11: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12 + case 0x12: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2 + REG_USED(desc, fxm); + REG_USED(desc, fym); + REG_USED(desc, fxa); + REG_USED(desc, fya); + ALU_FLAGS_MODIFIED(desc); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x14: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12 + case 0x15: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12 + case 0x16: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2 + REG_USED(desc, fxm); + REG_USED(desc, fym); + REG_USED(desc, fxa); + REG_USED(desc, fya); + REG_MODIFIED(desc, fm); + REG_MODIFIED(desc, fa); + ALU_FLAGS_MODIFIED(desc); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x18: // Fm = F3-0 * F7-4, Fa = F11-8 + F15-12 + case 0x19: // Fm = F3-0 * F7-4, Fa = F11-8 - F15-12 + case 0x1a: // Fm = F3-0 * F7-4, Fa = FLOAT F11-8 BY R15-12 + case 0x1b: // Fm = F3-0 * F7-4, Fa = FIX F11-8 BY R15-12 + case 0x1c: // Fm = F3-0 * F7-4, Fa = (F11-8 + F15-12) / 2 + case 0x1e: // Fm = F3-0 * F7-4, Fa = MAX(F11-8, F15-12) + case 0x1f: // Fm = F3-0 * F7-4, Fa = MIN(F11-8, F15-12) + REG_USED(desc, fxm); + REG_USED(desc, fym); + REG_USED(desc, fxa); + REG_USED(desc, fya); + REG_MODIFIED(desc, fm); + REG_MODIFIED(desc, fa); + ALU_FLAGS_MODIFIED(desc); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x1d: // Fm = F3-0 * F7-4, Fa = ABS F11-8 + REG_USED(desc, fxm); + REG_USED(desc, fym); + REG_USED(desc, fxa); + REG_MODIFIED(desc, fm); + REG_MODIFIED(desc, fa); + ALU_FLAGS_MODIFIED(desc); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: + case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: + // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12, Rs = R11-8 - R15-12 + REG_USED(desc, fxm); + REG_USED(desc, fym); + REG_USED(desc, fxa); + REG_USED(desc, fya); + REG_MODIFIED(desc, fm); + REG_MODIFIED(desc, fa); + REG_MODIFIED(desc, (opcode >> 16) & 0xf); + ALU_FLAGS_MODIFIED(desc); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: + case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: + // Fm = F3-0 * F7-4, Fa = F11-8 + F15-12, Fs = F11-8 - F15-12 + REG_USED(desc, fxm); + REG_USED(desc, fym); + REG_USED(desc, fxa); + REG_USED(desc, fya); + REG_MODIFIED(desc, fm); + REG_MODIFIED(desc, fa); + REG_MODIFIED(desc, (opcode >> 16) & 0xf); + ALU_FLAGS_MODIFIED(desc); + MULT_FLAGS_MODIFIED(desc); + break; + + default: + fatalerror("sharc_frontend::describe_compute: unknown multiop %02X in opcode %04X%08X at %08X", multiop, (UINT16)(opcode >> 32), (UINT32)(opcode), desc.pc); + return false; + } + } + else // single-function operation + { + UINT32 operation = (opcode >> 12) & 0xff; + + switch ((opcode >> 20) & 3) + { + case 0: // ALU operations + { + switch (operation) + { + case 0x01: // Rn = Rx + Ry + case 0x02: // Rn = Rx - Ry + case 0x09: // Rn = (Rx + Ry) / 2 + case 0x40: // Rn = Rx AND Ry + case 0x41: // Rn = Rx OR Ry + case 0x42: // Rn = Rx XOR Ry + case 0x61: // Rn = MIN(Rx, Ry) + case 0x62: // Rn = MAX(Rx, Ry) + case 0x63: // Rn = CLIP Rx BY Ry + case 0x81: // Fn = Fx + Fy + case 0x82: // Fn = Fx - Fy + case 0x91: // Fn = ABS(Fx + Fy) + case 0x92: // Fn = ABS(Fx - Fy) + case 0x89: // Fn = (Fx + Fy) / 2 + case 0xbd: // Fn = SCALB Fx BY Ry + case 0xd9: // Rn = FIX Fx BY Ry + case 0xdd: // Rn = TRUNC Fx BY Ry + case 0xda: // Fn = FLOAT Rx BY Ry + case 0xe1: // Fn = MIN(Fx, Fy) + case 0xe2: // Fn = MAX(Fx, Fy) + case 0xe3: // Fn = CLIP Fx BY Fy + case 0xe0: // Fn = Fx COPYSIGN Fy + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, rn); + ALU_FLAGS_MODIFIED(desc); + break; + + case 0x05: // Rn = Rx + Ry + CI + case 0x06: // Rn = Rx - Ry + CI - 1 + case 0x25: // Rn = Rx + CI + case 0x26: // Rn = Rx + CI - 1 + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, rn); + AC_USED(desc); + ALU_FLAGS_MODIFIED(desc); + break; + + case 0x0a: // COMP(Rx, Ry) + case 0x8a: // COMP(Fx, Fy) + REG_USED(desc, rx); + REG_USED(desc, ry); + ALU_FLAGS_MODIFIED(desc); + break; + + case 0x29: // Rn = Rx + 1 + case 0x2a: // Rn = Rx - 1 + case 0x22: // Rn = -Rx + case 0x30: // Rn = ABS Rx + case 0x21: // Rn = PASS Rx + case 0x43: // Rn = NOT Rx + case 0xb0: // Fn = ABS(Fx) + case 0xa1: // Fn = PASS Fx + case 0xa2: // Fn = -Fx + case 0xa5: // Fn = RND Fx + case 0xad: // Rn = MANT Fx + case 0xc1: // Rn = LOGB Fx + case 0xc9: // Rn = FIX Fx + case 0xcd: // Rn = TRUNC Fx + case 0xca: // Fn = FLOAT Rx + case 0xc4: // Fn = RECIPS Fx + case 0xc5: // Fn = RSQRTS Fx + REG_USED(desc, rx); + REG_MODIFIED(desc, rn); + ALU_FLAGS_MODIFIED(desc); + break; + + case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77: + case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f: + { + /* Fixed-point Dual Add/Subtract */ + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, rn); + REG_MODIFIED(desc, ra); + ALU_FLAGS_MODIFIED(desc); + break; + } + + case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: + case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: + { + /* Floating-point Dual Add/Subtract */ + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, rn); + REG_MODIFIED(desc, ra); + ALU_FLAGS_MODIFIED(desc); + break; + } + + default: + fatalerror("sharc_frontend::describe_compute: unknown ALU op %02X in opcode %04X%08X at %08X", operation, (UINT16)(opcode >> 32), (UINT32)(opcode), desc.pc); + return false; + } + break; + } + + case 1: // multiplier operations + { + switch (operation) + { + case 0x40: // Rn = Rx * Ry (UUI) + case 0x48: // Rn = Rx * Ry (UUF) + case 0x49: // Rn = Rx * Ry (UUFR) + case 0x50: // Rn = Rx * Ry (SUI) + case 0x58: // Rn = Rx * Ry (SUF) + case 0x59: // Rn = Rx * Ry (SUFR) + case 0x60: // Rn = Rx * Ry (USI) + case 0x68: // Rn = Rx * Ry (USF) + case 0x69: // Rn = Rx * Ry (USFR) + case 0x70: // Rn = Rx * Ry (SSI) + case 0x78: // Rn = Rx * Ry (SSF) + case 0x79: // Rn = Rx * Ry (SSFR) + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, rn); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x44: // MRF = Rx * Ry (UUI) + case 0x4c: // MRF = Rx * Ry (UUF) + case 0x4d: // MRF = Rx * Ry (UUFR) + case 0x54: // MRF = Rx * Ry (SUI) + case 0x5c: // MRF = Rx * Ry (SUF) + case 0x5d: // MRF = Rx * Ry (SUFR) + case 0x64: // MRF = Rx * Ry (USI) + case 0x6c: // MRF = Rx * Ry (USF) + case 0x6d: // MRF = Rx * Ry (USFR) + case 0x74: // MRF = Rx * Ry (SSI) + case 0x7c: // MRF = Rx * Ry (SSF) + case 0x7d: // MRF = Rx * Ry (SSFR) + // TODO: track MRF? + REG_USED(desc, rx); + REG_USED(desc, ry); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x46: // MRB = Rx * Ry (UUI) + case 0x4e: // MRB = Rx * Ry (UUF) + case 0x4f: // MRB = Rx * Ry (UUFR) + case 0x56: // MRB = Rx * Ry (SUI) + case 0x5e: // MRB = Rx * Ry (SUF) + case 0x5f: // MRB = Rx * Ry (SUFR) + case 0x66: // MRB = Rx * Ry (USI) + case 0x6e: // MRB = Rx * Ry (USF) + case 0x6f: // MRB = Rx * Ry (USFR) + case 0x76: // MRB = Rx * Ry (SSI) + case 0x7e: // MRB = Rx * Ry (SSF) + case 0x7f: // MRB = Rx * Ry (SSFR) + // TODO: track MRB? + REG_USED(desc, rx); + REG_USED(desc, ry); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x80: // Rn = MRF + Rx * Ry (UUI) + case 0x88: // Rn = MRF + Rx * Ry (UUF) + case 0x89: // Rn = MRF + Rx * Ry (UUFR) + case 0x90: // Rn = MRF + Rx * Ry (SUI) + case 0x98: // Rn = MRF + Rx * Ry (SUF) + case 0x99: // Rn = MRF + Rx * Ry (SUFR) + case 0xa0: // Rn = MRF + Rx * Ry (USI) + case 0xa8: // Rn = MRF + Rx * Ry (USF) + case 0xa9: // Rn = MRF + Rx * Ry (USFR) + case 0xb0: // Rn = MRF + Rx * Ry (SSI) + case 0xb8: // Rn = MRF + Rx * Ry (SSF) + case 0xb9: // Rn = MRF + Rx * Ry (SSFR) + // TODO: track MRF? + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, rn); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x82: // Rn = MRB + Rx * Ry (UUI) + case 0x8a: // Rn = MRB + Rx * Ry (UUF) + case 0x8b: // Rn = MRB + Rx * Ry (UUFR) + case 0x92: // Rn = MRB + Rx * Ry (SUI) + case 0x9a: // Rn = MRB + Rx * Ry (SUF) + case 0x9b: // Rn = MRB + Rx * Ry (SUFR) + case 0xa2: // Rn = MRB + Rx * Ry (USI) + case 0xaa: // Rn = MRB + Rx * Ry (USF) + case 0xab: // Rn = MRB + Rx * Ry (USFR) + case 0xb2: // Rn = MRB + Rx * Ry (SSI) + case 0xba: // Rn = MRB + Rx * Ry (SSF) + case 0xbb: // Rn = MRB + Rx * Ry (SSFR) + // TODO: track MRB? + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, rn); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x84: // MRF = MRF + Rx * Ry (UUI) + case 0x8c: // MRF = MRF + Rx * Ry (UUF) + case 0x8d: // MRF = MRF + Rx * Ry (UUFR) + case 0x94: // MRF = MRF + Rx * Ry (SUI) + case 0x9c: // MRF = MRF + Rx * Ry (SUF) + case 0x9d: // MRF = MRF + Rx * Ry (SUFR) + case 0xa4: // MRF = MRF + Rx * Ry (USI) + case 0xac: // MRF = MRF + Rx * Ry (USF) + case 0xad: // MRF = MRF + Rx * Ry (USFR) + case 0xb4: // MRF = MRF + Rx * Ry (SSI) + case 0xbc: // MRF = MRF + Rx * Ry (SSF) + case 0xbd: // MRF = MRF + Rx * Ry (SSFR) + // TODO: track MRF? + REG_USED(desc, rx); + REG_USED(desc, ry); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x86: // MRB = MRB + Rx * Ry (UUI) + case 0x8e: // MRB = MRB + Rx * Ry (UUF) + case 0x8f: // MRB = MRB + Rx * Ry (UUFR) + case 0x96: // MRB = MRB + Rx * Ry (SUI) + case 0x9e: // MRB = MRB + Rx * Ry (SUF) + case 0x9f: // MRB = MRB + Rx * Ry (SUFR) + case 0xa6: // MRB = MRB + Rx * Ry (USI) + case 0xae: // MRB = MRB + Rx * Ry (USF) + case 0xaf: // MRB = MRB + Rx * Ry (USFR) + case 0xb6: // MRB = MRB + Rx * Ry (SSI) + case 0xbe: // MRB = MRB + Rx * Ry (SSF) + case 0xbf: // MRB = MRB + Rx * Ry (SSFR) + break; + // TODO: track MRB? + REG_USED(desc, rx); + REG_USED(desc, ry); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0xc0: // Rn = MRF - Rx * Ry (UUI) + case 0xc8: // Rn = MRF - Rx * Ry (UUF) + case 0xc9: // Rn = MRF - Rx * Ry (UUFR) + case 0xd0: // Rn = MRF - Rx * Ry (SUI) + case 0xd8: // Rn = MRF - Rx * Ry (SUF) + case 0xd9: // Rn = MRF - Rx * Ry (SUFR) + case 0xe0: // Rn = MRF - Rx * Ry (USI) + case 0xe8: // Rn = MRF - Rx * Ry (USF) + case 0xe9: // Rn = MRF - Rx * Ry (USFR) + case 0xf0: // Rn = MRF - Rx * Ry (SSI) + case 0xf8: // Rn = MRF - Rx * Ry (SSF) + case 0xf9: // Rn = MRF - Rx * Ry (SSFR) + // TODO: track MRF? + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, rn); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0xc2: // Rn = MRB - Rx * Ry (UUI) + case 0xca: // Rn = MRB - Rx * Ry (UUF) + case 0xcb: // Rn = MRB - Rx * Ry (UUFR) + case 0xd2: // Rn = MRB - Rx * Ry (SUI) + case 0xda: // Rn = MRB - Rx * Ry (SUF) + case 0xdb: // Rn = MRB - Rx * Ry (SUFR) + case 0xe2: // Rn = MRB - Rx * Ry (USI) + case 0xea: // Rn = MRB - Rx * Ry (USF) + case 0xeb: // Rn = MRB - Rx * Ry (USFR) + case 0xf2: // Rn = MRB - Rx * Ry (SSI) + case 0xfa: // Rn = MRB - Rx * Ry (SSF) + case 0xfb: // Rn = MRB - Rx * Ry (SSFR) + // TODO: track MRB? + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, rn); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0xc4: // MRF = MRF - Rx * Ry (UUI) + case 0xcc: // MRF = MRF - Rx * Ry (UUF) + case 0xcd: // MRF = MRF - Rx * Ry (UUFR) + case 0xd4: // MRF = MRF - Rx * Ry (SUI) + case 0xdc: // MRF = MRF - Rx * Ry (SUF) + case 0xdd: // MRF = MRF - Rx * Ry (SUFR) + case 0xe4: // MRF = MRF - Rx * Ry (USI) + case 0xec: // MRF = MRF - Rx * Ry (USF) + case 0xed: // MRF = MRF - Rx * Ry (USFR) + case 0xf4: // MRF = MRF - Rx * Ry (SSI) + case 0xfc: // MRF = MRF - Rx * Ry (SSF) + case 0xfd: // MRF = MRF - Rx * Ry (SSFR) + // TODO: track MRF? + REG_USED(desc, rx); + REG_USED(desc, ry); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0xc6: // MRB = MRB - Rx * Ry (UUI) + case 0xce: // MRB = MRB - Rx * Ry (UUF) + case 0xcf: // MRB = MRB - Rx * Ry (UUFR) + case 0xd6: // MRB = MRB - Rx * Ry (SUI) + case 0xde: // MRB = MRB - Rx * Ry (SUF) + case 0xdf: // MRB = MRB - Rx * Ry (SUFR) + case 0xe6: // MRB = MRB - Rx * Ry (USI) + case 0xee: // MRB = MRB - Rx * Ry (USF) + case 0xef: // MRB = MRB - Rx * Ry (USFR) + case 0xf6: // MRB = MRB - Rx * Ry (SSI) + case 0xfe: // MRB = MRB - Rx * Ry (SSF) + case 0xff: // MRB = MRB - Rx * Ry (SSFR) + // TODO: track MRB? + REG_USED(desc, rx); + REG_USED(desc, ry); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x00: // Rn = SAT MRF (UI) + case 0x01: // Rn = SAT MRF (SI) + case 0x08: // Rn = SAT MRF (UF) + case 0x09: // Rn = SAT MRF (SF) + // TODO: track MRF? + REG_MODIFIED(desc, rn); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x02: // Rn = SAT MRB (UI) + case 0x03: // Rn = SAT MRB (SI) + case 0x0a: // Rn = SAT MRB (UF) + case 0x0b: // Rn = SAT MRB (SF) + // TODO: track MRB? + REG_MODIFIED(desc, rn); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x04: // MRF = SAT MRF (UI) + case 0x05: // MRF = SAT MRF (SI) + case 0x0c: // MRF = SAT MRF (UF) + case 0x0d: // MRF = SAT MRF (SF) + // TODO: track MRF? + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x06: // MRB = SAT MRB (UI) + case 0x07: // MRB = SAT MRB (SI) + case 0x0e: // MRB = SAT MRB (UF) + case 0x0f: // MRB = SAT MRB (SF) + // TODO: track MRB? + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x18: // Rn = RND MRF (U) + case 0x19: // Rn = RND MRF (S) + REG_MODIFIED(desc, rn); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x1a: // Rn = RND MRB (U) + case 0x1b: // Rn = RND MRB (S) + REG_MODIFIED(desc, rn); + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x1c: // MRF = RND MRF (U) + case 0x1d: // MRF = RND MRF (S) + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x1e: // MRB = RND MRB (U) + case 0x1f: // MRB = RND MRB (S) + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x14: // MRF = 0 + MULT_FLAGS_MODIFIED(desc); + break; + case 0x16: // MRB = 0 + MULT_FLAGS_MODIFIED(desc); + break; + + case 0x30: // Fn = Fx * Fy + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, rn); + MULT_FLAGS_MODIFIED(desc); + break; + + default: + fatalerror("sharc_frontend::describe_compute: unknown mult op %02X in opcode %04X%08X at %08X", operation, (UINT16)(opcode >> 32), (UINT32)(opcode), desc.pc); + } + break; + } + + case 2: // shifter operations + { + switch (operation) + { + case 0x00: // Rn = LSHIFT Rx BY Ry | + case 0x04: // Rn = ASHIFT Rx BY Ry | + case 0x08: // Rn = ROT Rx BY Ry | + case 0xc4: // Rn = BCLR Rx BY Ry | + case 0xc0: // Rn = BSET Rx BY Ry | + case 0x44: // Rn = FDEP Rx BY Ry | : + case 0x4c: // Rn = FDEP Rx BY Ry | : (SE) + case 0x40: // Rn = FEXT Rx BY Ry | : + case 0x48: // Rn = FEXT Rx BY Ry | : (SE) + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_MODIFIED(desc, rn); + SHIFT_FLAGS_MODIFIED(desc); + break; + + case 0x20: // Rn = Rn OR LSHIFT Rx BY Ry | + case 0x24: // Rn = Rn OR ASHIFT Rx BY Ry | + case 0x64: // Rn = Rn OR FDEP Rx BY Ry | : + case 0x6c: // Rn = Rn OR FDEP Rx BY Ry | : (SE) + REG_USED(desc, rx); + REG_USED(desc, ry); + REG_USED(desc, rn); + REG_MODIFIED(desc, rn); + SHIFT_FLAGS_MODIFIED(desc); + break; + + case 0xcc: // BTST Rx BY Ry | + REG_USED(desc, rx); + REG_USED(desc, ry); + SHIFT_FLAGS_MODIFIED(desc); + break; + + case 0x80: // Rn = EXP Rx + case 0x84: // Rn = EXP Rx (EX) + case 0x88: // Rn = LEFTZ Rx + case 0x8c: // Rn = LEFTO Rx + case 0x90: // Rn = FPACK Fx + case 0x94: // Fn = FUNPACK Rx + REG_USED(desc, rx); + REG_MODIFIED(desc, rn); + SHIFT_FLAGS_MODIFIED(desc); + break; + + default: + fatalerror("sharc_frontend::describe_compute: unknown shift op %02X in opcode %04X%08X at %08X", operation, (UINT16)(opcode >> 32), (UINT32)(opcode), desc.pc); + } + break; + } + + default: + fatalerror("sharc_frontend::describe_compute: unknown operation type in opcode %04X%08X at %08X", (UINT16)(opcode >> 32), (UINT32)(opcode), desc.pc); + return false; + } + } + + return true; +} + +bool sharc_frontend::describe_ureg_access(opcode_desc &desc, int reg, UREG_ACCESS access) +{ + switch (reg) + { + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: + if (access == UREG_READ) + REG_USED(desc, reg); + else + REG_MODIFIED(desc, reg); + break; + + case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: + if (access == UREG_READ) + DM_I_USED(desc, reg & 7); + else + DM_I_MODIFIED(desc, reg & 7); + break; + case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: + if (access == UREG_READ) + PM_I_USED(desc, reg & 7); + else + PM_I_MODIFIED(desc, reg & 7); + break; + + case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: + if (access == UREG_READ) + DM_M_USED(desc, reg & 7); + else + DM_M_MODIFIED(desc, reg & 7); + break; + case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: + if (access == UREG_READ) + PM_M_USED(desc, reg & 7); + else + PM_M_MODIFIED(desc, reg & 7); + break; + + case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: + if (access == UREG_READ) + DM_L_USED(desc, reg & 7); + else + DM_L_MODIFIED(desc, reg & 7); + break; + case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: + if (access == UREG_READ) + PM_L_USED(desc, reg & 7); + else + PM_L_MODIFIED(desc, reg & 7); + break; + + case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: + if (access == UREG_READ) + DM_B_USED(desc, reg & 7); + else + DM_B_MODIFIED(desc, reg & 7); + break; + case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f: + if (access == UREG_READ) + PM_B_USED(desc, reg & 7); + else + PM_B_MODIFIED(desc, reg & 7); + break; + + case 0x60: // FADDR + break; + case 0x61: // DADDR + break; + case 0x63: // PC + break; + case 0x64: // PCSTK + break; + case 0x65: // PCSTKP + break; + case 0x66: // LADDR + break; + case 0x67: // CURLCNTR + break; + case 0x68: // LCNTR + break; + case 0x70: // USTAT1 + break; + case 0x71: // USTAT2 + break; + case 0x79: // IRPTL + break; + case 0x7a: // MODE1 + break; + case 0x7b: // MODE2 + break; + + case 0x7c: // ASTAT + if (access == UREG_READ) + { + AZ_USED(desc); + AN_USED(desc); + AV_USED(desc); + AC_USED(desc); + AS_USED(desc); + AI_USED(desc); + MN_USED(desc); + MV_USED(desc); + MU_USED(desc); + MI_USED(desc); + SV_USED(desc); + SZ_USED(desc); + SS_USED(desc); + BTF_USED(desc); + AF_USED(desc); + } + else + { + ALU_FLAGS_MODIFIED(desc); + MULT_FLAGS_MODIFIED(desc); + SHIFT_FLAGS_MODIFIED(desc); + BTF_MODIFIED(desc); + AF_MODIFIED(desc); + } + break; + + case 0x7d: // IMASK + break; + case 0x7e: // STKY + break; + case 0x7f: // IMASKP + break; + case 0xdb: // PX + break; + case 0xdc: // PX1 + break; + case 0xdd: // PX2 + break; + + default: + fatalerror("sharc_frontend::describe_ureg_access: unknown UREG %02X", reg); + return false; + } + + return true; +} + +bool sharc_frontend::describe_shiftop_imm(opcode_desc &desc, int shiftop, int rn, int rx) +{ + switch (shiftop) + { + case 0x00: // LSHIFT Rx BY + case 0x01: // ASHIFT Rx BY + case 0x02: // ROT Rx BY + case 0x10: // FEXT Rx BY + case 0x11: // FDEP Rx BY + case 0x12: // FEXT Rx BY : (SE) + case 0x13: // FDEP Rx BY : (SE) + case 0x30: // BSET Rx BY + case 0x31: // BCLR Rx By + case 0x32: // BTGL Rx BY + REG_USED(desc, rx); + REG_MODIFIED(desc, rn); + SHIFT_FLAGS_MODIFIED(desc); + break; + + case 0x08: // Rn = Rn OR LSHIFT Rx BY + case 0x19: // Rn = Rn OR FDEP Rx BY : + case 0x1b: // Rn = Rn OR FDEP Rx BY : (SE) + REG_USED(desc, rx); + REG_USED(desc, rn); + REG_MODIFIED(desc, rn); + SHIFT_FLAGS_MODIFIED(desc); + break; + + case 0x33: // BTST Rx BY + REG_USED(desc, rx); + SHIFT_FLAGS_MODIFIED(desc); + break; + + default: + fatalerror("sharc_frontend::describe_shiftop_imm: unknown op %02X at %08X", shiftop, desc.pc); + return false; + } + + return true; +} + +void sharc_frontend::describe_if_condition(opcode_desc &desc, int condition) +{ + switch (condition) + { + case 0x00: AZ_USED(desc); break; /* EQ */ + case 0x01: AZ_USED(desc); AN_USED(desc); break; /* LT */ + case 0x02: AZ_USED(desc); AN_USED(desc); break; /* LE */ + case 0x03: AC_USED(desc); break; /* AC */ + case 0x04: AV_USED(desc); break; /* AV */ + case 0x05: MV_USED(desc); break; /* MV */ + case 0x06: MN_USED(desc); break; /* MS */ + case 0x07: SV_USED(desc); break; /* SV */ + case 0x08: SZ_USED(desc); break; /* SZ */ + case 0x0d: BTF_USED(desc); break; /* TF */ + case 0x10: AZ_USED(desc); break; /* NOT EQUAL */ + case 0x11: AZ_USED(desc); AN_USED(desc); break; /* GE */ + case 0x12: AZ_USED(desc); AN_USED(desc); break; /* GT */ + case 0x13: AC_USED(desc); break; /* NOT AC */ + case 0x14: AV_USED(desc); break; /* NOT AV */ + case 0x15: MV_USED(desc); break; /* NOT MV */ + case 0x16: MN_USED(desc); break; /* NOT MS */ + case 0x17: SV_USED(desc); break; /* NOT SV */ + case 0x18: SZ_USED(desc); break; /* NOT SZ */ + case 0x1d: BTF_USED(desc); break; /* NOT TF */ + } +} \ No newline at end of file diff --git a/src/devices/cpu/sharc/sharcfe.h b/src/devices/cpu/sharc/sharcfe.h new file mode 100644 index 00000000000..b383e122606 --- /dev/null +++ b/src/devices/cpu/sharc/sharcfe.h @@ -0,0 +1,81 @@ +// license:BSD-3-Clause +// copyright-holders:Ville Linde + +/****************************************************************************** + + Front-end for SHARC recompiler + +******************************************************************************/ + +#pragma once + +#include "sharc.h" +#include "cpu/drcfe.h" + +#ifndef __SHARCFE_H__ +#define __SHARCFE_H__ + +class sharc_frontend : public drc_frontend +{ +public: + sharc_frontend(adsp21062_device *sharc, UINT32 window_start, UINT32 window_end, UINT32 max_sequence); + void flush(); + + enum UREG_ACCESS + { + UREG_READ, + UREG_WRITE + }; + + enum LOOP_TYPE + { + LOOP_TYPE_COUNTER, + LOOP_TYPE_CONDITIONAL + }; + + enum LOOP_ENTRY_TYPE + { + LOOP_ENTRY_START = 0x1, + LOOP_ENTRY_EVALUATION = 0x2, + LOOP_ENTRY_ASTAT_CHECK = 0x4, + }; + + struct LOOP_ENTRY + { + UINT16 entrytype; + UINT8 looptype; + UINT8 condition; + UINT32 start_pc; + }; + + struct LOOP_DESCRIPTOR + { + UINT32 start_pc; + UINT32 end_pc; + UINT32 astat_check_pc; + LOOP_TYPE type; + int condition; + }; + +protected: + // required overrides + virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; + +private: + bool describe_compute(opcode_desc &desc, UINT64 opcode); + bool describe_ureg_access(opcode_desc &desc, int reg, UREG_ACCESS access); + bool describe_shiftop_imm(opcode_desc &desc, int shiftop, int rn, int rx); + void describe_if_condition(opcode_desc &desc, int condition); + + void insert_loop(const LOOP_DESCRIPTOR &loopdesc); + void add_loop_entry(UINT32 pc, UINT8 type, UINT32 start_pc, UINT8 looptype, UINT8 condition); + bool is_loop_evaluation(UINT32 pc); + bool is_loop_start(UINT32 pc); + bool is_astat_delay_check(UINT32 pc); + + adsp21062_device *m_sharc; + + std::unique_ptr m_loopmap; +}; + +#endif /* __SHARCFE_H__ */ diff --git a/src/devices/cpu/sharc/sharcmem.hxx b/src/devices/cpu/sharc/sharcmem.hxx index 3427e0346b8..f48c1ba3608 100644 --- a/src/devices/cpu/sharc/sharcmem.hxx +++ b/src/devices/cpu/sharc/sharcmem.hxx @@ -20,12 +20,13 @@ UINT32 adsp21062_device::pm_read32(UINT32 address) (m_internal_ram_block1[addr + 1]); } else { - fatalerror("SHARC: PM Bus Read32 %08X at %08X\n", address, m_pc); + fatalerror("SHARC: PM Bus Read32 %08X at %08X\n", address, m_core->pc); } } void adsp21062_device::pm_write32(UINT32 address, UINT32 data) { +// printf("PM Write32 %08X, %08X at %08X\n", data, address, m_core->pc); if (address >= 0x20000 && address < 0x28000) { UINT32 addr = (address & 0x7fff) * 3; @@ -44,7 +45,8 @@ void adsp21062_device::pm_write32(UINT32 address, UINT32 data) return; } else { - fatalerror("SHARC: PM Bus Write32 %08X, %08X at %08X\n", address, data, m_pc); + debugger_break(machine()); + //fatalerror("SHARC: PM Bus Write32 %08X, %08X at %08X\n", address, data, m_core->pc); } } @@ -68,7 +70,7 @@ UINT64 adsp21062_device::pm_read48(UINT32 address) ((UINT64)(m_internal_ram_block1[addr + 2]) << 0); } else { - fatalerror("SHARC: PM Bus Read48 %08X at %08X\n", address, m_pc); + fatalerror("SHARC: PM Bus Read48 %08X at %08X\n", address, m_core->pc); } return 0; @@ -76,6 +78,7 @@ UINT64 adsp21062_device::pm_read48(UINT32 address) void adsp21062_device::pm_write48(UINT32 address, UINT64 data) { +// printf("PM Write48 %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), address, m_core->pc); if ((address >= 0x20000 && address < 0x28000)) { UINT32 addr = (address & 0x7fff) * 3; @@ -96,7 +99,7 @@ void adsp21062_device::pm_write48(UINT32 address, UINT64 data) return; } else { - fatalerror("SHARC: PM Bus Write48 %08X, %04X%08X at %08X\n", address, (UINT16)(data >> 32),(UINT32)data, m_pc); + fatalerror("SHARC: PM Bus Write48 %08X, %04X%08X at %08X\n", address, (UINT16)(data >> 32),(UINT32)data, m_core->pc); } } @@ -128,7 +131,7 @@ UINT32 adsp21062_device::dm_read32(UINT32 address) UINT32 addr = address & 0xffff; UINT16 r = m_internal_ram_block0[addr ^ 1]; - if (m_mode1 & 0x4000) + if (m_core->mode1 & 0x4000) { // sign-extend return (INT32)(INT16)(r); @@ -144,7 +147,7 @@ UINT32 adsp21062_device::dm_read32(UINT32 address) UINT32 addr = address & 0xffff; UINT16 r = m_internal_ram_block1[addr ^ 1]; - if (m_mode1 & 0x4000) + if (m_core->mode1 & 0x4000) { // sign-extend return (INT32)(INT16)(r); diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx index 5bcc9765f1c..0400319d10e 100644 --- a/src/devices/cpu/sharc/sharcops.hxx +++ b/src/devices/cpu/sharc/sharcops.hxx @@ -3,14 +3,14 @@ #define SIGN_EXTEND6(x) (((x) & 0x20) ? (0xffffffc0 | (x)) : (x)) #define SIGN_EXTEND24(x) (((x) & 0x800000) ? (0xff000000 | (x)) : (x)) -#define PM_REG_I(x) (m_dag2.i[x]) -#define PM_REG_M(x) (m_dag2.m[x]) -#define PM_REG_B(x) (m_dag2.b[x]) -#define PM_REG_L(x) (m_dag2.l[x]) -#define DM_REG_I(x) (m_dag1.i[x]) -#define DM_REG_M(x) (m_dag1.m[x]) -#define DM_REG_B(x) (m_dag1.b[x]) -#define DM_REG_L(x) (m_dag1.l[x]) +#define PM_REG_I(x) (m_core->dag2.i[x]) +#define PM_REG_M(x) (m_core->dag2.m[x]) +#define PM_REG_B(x) (m_core->dag2.b[x]) +#define PM_REG_L(x) (m_core->dag2.l[x]) +#define DM_REG_I(x) (m_core->dag1.i[x]) +#define DM_REG_M(x) (m_core->dag1.m[x]) +#define DM_REG_B(x) (m_core->dag1.b[x]) +#define DM_REG_L(x) (m_core->dag1.l[x]) // ASTAT flags #define AZ 0x1 /* ALU result zero */ @@ -33,44 +33,6 @@ #define FLG2 0x200000 /* FLAG2 */ #define FLG3 0x400000 /* FLAG3 */ -// STKY flags -#define AUS 0x1 /* ALU floating-point underflow */ -#define AVS 0x2 /* ALU floating-point overflow */ -#define AOS 0x4 /* ALU fixed-point overflow */ -#define AIS 0x20 /* ALU floating-point invalid operation */ - -// MODE1 flags -#define MODE1_BR8 0x1 /* Bit-reverse for I8 */ -#define MODE1_BR0 0x2 /* Bit-reverse for I0 */ -#define MODE1_SRCU 0x4 /* Alternate register select for computational units */ -#define MODE1_SRD1H 0x8 /* DAG alternate register select (7-4) */ -#define MODE1_SRD1L 0x10 /* DAG alternate register select (3-0) */ -#define MODE1_SRD2H 0x20 /* DAG alternate register select (15-12) */ -#define MODE1_SRD2L 0x40 /* DAG alternate register select (11-8) */ -#define MODE1_SRRFH 0x80 /* Register file alternate select for R(15-8) */ -#define MODE1_SRRFL 0x400 /* Register file alternate select for R(7-0) */ -#define MODE1_NESTM 0x800 /* Interrupt nesting enable */ -#define MODE1_IRPTEN 0x1000 /* Global interrupt enable */ -#define MODE1_ALUSAT 0x2000 /* Enable ALU fixed-point saturation */ -#define MODE1_SSE 0x4000 /* Enable short word sign extension */ -#define MODE1_TRUNCATE 0x8000 /* (1) Floating-point truncation / (0) round to nearest */ -#define MODE1_RND32 0x10000 /* (1) 32-bit floating-point rounding / (0) 40-bit rounding */ -#define MODE1_CSEL 0x60000 /* CSelect */ - -// MODE2 flags -#define MODE2_IRQ0E 0x1 /* IRQ0 (1) Edge sens. / (0) Level sens. */ -#define MODE2_IRQ1E 0x2 /* IRQ1 (1) Edge sens. / (0) Level sens. */ -#define MODE2_IRQ2E 0x4 /* IRQ2 (1) Edge sens. / (0) Level sens. */ -#define MODE2_CADIS 0x10 /* Cache disable */ -#define MODE2_TIMEN 0x20 /* Timer enable */ -#define MODE2_BUSLK 0x40 /* External bus lock */ -#define MODE2_FLG0O 0x8000 /* FLAG0 (1) Output / (0) Input */ -#define MODE2_FLG1O 0x10000 /* FLAG1 (1) Output / (0) Input */ -#define MODE2_FLG2O 0x20000 /* FLAG2 (1) Output / (0) Input */ -#define MODE2_FLG3O 0x40000 /* FLAG3 (1) Output / (0) Input */ -#define MODE2_CAFRZ 0x80000 /* Cache freeze */ - - #define REG_PC 0x63 #define REG_PCSTK 0x64 #define REG_PCSTKP 0x65 @@ -89,8 +51,8 @@ -#define REG(x) (m_r[x].r) -#define FREG(x) (m_r[x].f) +#define REG(x) (m_core->r[x].r) +#define FREG(x) (m_core->r[x].f) #define UPDATE_CIRCULAR_BUFFER_PM(x) \ { \ @@ -127,16 +89,16 @@ void adsp21062_device::add_systemreg_write_latency_effect(int sysreg, UINT32 data, UINT32 prev_data) { - if (m_systemreg_latency_cycles > 0) + if (m_core->systemreg_latency_cycles > 0) { - //fatalerror("SHARC: add_systemreg_write_latency_effect: already scheduled! (reg: %02X, data: %08X, PC: %08X)\n", systemreg_latency_reg, systemreg_latency_data, m_pc); + //fatalerror("SHARC: add_systemreg_write_latency_effect: already scheduled! (reg: %02X, data: %08X, PC: %08X)\n", systemreg_latency_reg, systemreg_latency_data, m_core->pc); systemreg_write_latency_effect(); } - m_systemreg_latency_cycles = 2; - m_systemreg_latency_reg = sysreg; - m_systemreg_latency_data = data; - m_systemreg_previous_data = prev_data; + m_core->systemreg_latency_cycles = 2; + m_core->systemreg_latency_reg = sysreg; + m_core->systemreg_latency_data = data; + m_core->systemreg_previous_data = prev_data; } void adsp21062_device::swap_register(UINT32 *a, UINT32 *b) @@ -149,15 +111,15 @@ void adsp21062_device::swap_register(UINT32 *a, UINT32 *b) void adsp21062_device::systemreg_write_latency_effect() { int i; - UINT32 data = m_systemreg_latency_data; - UINT32 old_data = m_systemreg_previous_data; + UINT32 data = m_core->systemreg_latency_data; + UINT32 old_data = m_core->systemreg_previous_data; - switch(m_systemreg_latency_reg) + switch(m_core->systemreg_latency_reg) { case 0xb: /* MODE1 */ { UINT32 oldreg = old_data; - m_mode1 = data; + m_core->mode1 = data; if ((data & 0x1) != (oldreg & 0x1)) { @@ -174,96 +136,96 @@ void adsp21062_device::systemreg_write_latency_effect() if ((data & 0x8) != (oldreg & 0x8)) /* Switch DAG1 7-4 */ { - swap_register(&m_dag1.i[4], &m_dag1_alt.i[4]); - swap_register(&m_dag1.i[5], &m_dag1_alt.i[5]); - swap_register(&m_dag1.i[6], &m_dag1_alt.i[6]); - swap_register(&m_dag1.i[7], &m_dag1_alt.i[7]); - swap_register(&m_dag1.m[4], &m_dag1_alt.m[4]); - swap_register(&m_dag1.m[5], &m_dag1_alt.m[5]); - swap_register(&m_dag1.m[6], &m_dag1_alt.m[6]); - swap_register(&m_dag1.m[7], &m_dag1_alt.m[7]); - swap_register(&m_dag1.l[4], &m_dag1_alt.l[4]); - swap_register(&m_dag1.l[5], &m_dag1_alt.l[5]); - swap_register(&m_dag1.l[6], &m_dag1_alt.l[6]); - swap_register(&m_dag1.l[7], &m_dag1_alt.l[7]); - swap_register(&m_dag1.b[4], &m_dag1_alt.b[4]); - swap_register(&m_dag1.b[5], &m_dag1_alt.b[5]); - swap_register(&m_dag1.b[6], &m_dag1_alt.b[6]); - swap_register(&m_dag1.b[7], &m_dag1_alt.b[7]); + swap_register(&m_core->dag1.i[4], &m_core->dag1_alt.i[4]); + swap_register(&m_core->dag1.i[5], &m_core->dag1_alt.i[5]); + swap_register(&m_core->dag1.i[6], &m_core->dag1_alt.i[6]); + swap_register(&m_core->dag1.i[7], &m_core->dag1_alt.i[7]); + swap_register(&m_core->dag1.m[4], &m_core->dag1_alt.m[4]); + swap_register(&m_core->dag1.m[5], &m_core->dag1_alt.m[5]); + swap_register(&m_core->dag1.m[6], &m_core->dag1_alt.m[6]); + swap_register(&m_core->dag1.m[7], &m_core->dag1_alt.m[7]); + swap_register(&m_core->dag1.l[4], &m_core->dag1_alt.l[4]); + swap_register(&m_core->dag1.l[5], &m_core->dag1_alt.l[5]); + swap_register(&m_core->dag1.l[6], &m_core->dag1_alt.l[6]); + swap_register(&m_core->dag1.l[7], &m_core->dag1_alt.l[7]); + swap_register(&m_core->dag1.b[4], &m_core->dag1_alt.b[4]); + swap_register(&m_core->dag1.b[5], &m_core->dag1_alt.b[5]); + swap_register(&m_core->dag1.b[6], &m_core->dag1_alt.b[6]); + swap_register(&m_core->dag1.b[7], &m_core->dag1_alt.b[7]); } if ((data & 0x10) != (oldreg & 0x10)) /* Switch DAG1 3-0 */ { - swap_register(&m_dag1.i[0], &m_dag1_alt.i[0]); - swap_register(&m_dag1.i[1], &m_dag1_alt.i[1]); - swap_register(&m_dag1.i[2], &m_dag1_alt.i[2]); - swap_register(&m_dag1.i[3], &m_dag1_alt.i[3]); - swap_register(&m_dag1.m[0], &m_dag1_alt.m[0]); - swap_register(&m_dag1.m[1], &m_dag1_alt.m[1]); - swap_register(&m_dag1.m[2], &m_dag1_alt.m[2]); - swap_register(&m_dag1.m[3], &m_dag1_alt.m[3]); - swap_register(&m_dag1.l[0], &m_dag1_alt.l[0]); - swap_register(&m_dag1.l[1], &m_dag1_alt.l[1]); - swap_register(&m_dag1.l[2], &m_dag1_alt.l[2]); - swap_register(&m_dag1.l[3], &m_dag1_alt.l[3]); - swap_register(&m_dag1.b[0], &m_dag1_alt.b[0]); - swap_register(&m_dag1.b[1], &m_dag1_alt.b[1]); - swap_register(&m_dag1.b[2], &m_dag1_alt.b[2]); - swap_register(&m_dag1.b[3], &m_dag1_alt.b[3]); + swap_register(&m_core->dag1.i[0], &m_core->dag1_alt.i[0]); + swap_register(&m_core->dag1.i[1], &m_core->dag1_alt.i[1]); + swap_register(&m_core->dag1.i[2], &m_core->dag1_alt.i[2]); + swap_register(&m_core->dag1.i[3], &m_core->dag1_alt.i[3]); + swap_register(&m_core->dag1.m[0], &m_core->dag1_alt.m[0]); + swap_register(&m_core->dag1.m[1], &m_core->dag1_alt.m[1]); + swap_register(&m_core->dag1.m[2], &m_core->dag1_alt.m[2]); + swap_register(&m_core->dag1.m[3], &m_core->dag1_alt.m[3]); + swap_register(&m_core->dag1.l[0], &m_core->dag1_alt.l[0]); + swap_register(&m_core->dag1.l[1], &m_core->dag1_alt.l[1]); + swap_register(&m_core->dag1.l[2], &m_core->dag1_alt.l[2]); + swap_register(&m_core->dag1.l[3], &m_core->dag1_alt.l[3]); + swap_register(&m_core->dag1.b[0], &m_core->dag1_alt.b[0]); + swap_register(&m_core->dag1.b[1], &m_core->dag1_alt.b[1]); + swap_register(&m_core->dag1.b[2], &m_core->dag1_alt.b[2]); + swap_register(&m_core->dag1.b[3], &m_core->dag1_alt.b[3]); } if ((data & 0x20) != (oldreg & 0x20)) /* Switch DAG2 15-12 */ { - swap_register(&m_dag2.i[4], &m_dag2_alt.i[4]); - swap_register(&m_dag2.i[5], &m_dag2_alt.i[5]); - swap_register(&m_dag2.i[6], &m_dag2_alt.i[6]); - swap_register(&m_dag2.i[7], &m_dag2_alt.i[7]); - swap_register(&m_dag2.m[4], &m_dag2_alt.m[4]); - swap_register(&m_dag2.m[5], &m_dag2_alt.m[5]); - swap_register(&m_dag2.m[6], &m_dag2_alt.m[6]); - swap_register(&m_dag2.m[7], &m_dag2_alt.m[7]); - swap_register(&m_dag2.l[4], &m_dag2_alt.l[4]); - swap_register(&m_dag2.l[5], &m_dag2_alt.l[5]); - swap_register(&m_dag2.l[6], &m_dag2_alt.l[6]); - swap_register(&m_dag2.l[7], &m_dag2_alt.l[7]); - swap_register(&m_dag2.b[4], &m_dag2_alt.b[4]); - swap_register(&m_dag2.b[5], &m_dag2_alt.b[5]); - swap_register(&m_dag2.b[6], &m_dag2_alt.b[6]); - swap_register(&m_dag2.b[7], &m_dag2_alt.b[7]); + swap_register(&m_core->dag2.i[4], &m_core->dag2_alt.i[4]); + swap_register(&m_core->dag2.i[5], &m_core->dag2_alt.i[5]); + swap_register(&m_core->dag2.i[6], &m_core->dag2_alt.i[6]); + swap_register(&m_core->dag2.i[7], &m_core->dag2_alt.i[7]); + swap_register(&m_core->dag2.m[4], &m_core->dag2_alt.m[4]); + swap_register(&m_core->dag2.m[5], &m_core->dag2_alt.m[5]); + swap_register(&m_core->dag2.m[6], &m_core->dag2_alt.m[6]); + swap_register(&m_core->dag2.m[7], &m_core->dag2_alt.m[7]); + swap_register(&m_core->dag2.l[4], &m_core->dag2_alt.l[4]); + swap_register(&m_core->dag2.l[5], &m_core->dag2_alt.l[5]); + swap_register(&m_core->dag2.l[6], &m_core->dag2_alt.l[6]); + swap_register(&m_core->dag2.l[7], &m_core->dag2_alt.l[7]); + swap_register(&m_core->dag2.b[4], &m_core->dag2_alt.b[4]); + swap_register(&m_core->dag2.b[5], &m_core->dag2_alt.b[5]); + swap_register(&m_core->dag2.b[6], &m_core->dag2_alt.b[6]); + swap_register(&m_core->dag2.b[7], &m_core->dag2_alt.b[7]); } if ((data & 0x40) != (oldreg & 0x40)) /* Switch DAG2 11-8 */ { - swap_register(&m_dag2.i[0], &m_dag2_alt.i[0]); - swap_register(&m_dag2.i[1], &m_dag2_alt.i[1]); - swap_register(&m_dag2.i[2], &m_dag2_alt.i[2]); - swap_register(&m_dag2.i[3], &m_dag2_alt.i[3]); - swap_register(&m_dag2.m[0], &m_dag2_alt.m[0]); - swap_register(&m_dag2.m[1], &m_dag2_alt.m[1]); - swap_register(&m_dag2.m[2], &m_dag2_alt.m[2]); - swap_register(&m_dag2.m[3], &m_dag2_alt.m[3]); - swap_register(&m_dag2.l[0], &m_dag2_alt.l[0]); - swap_register(&m_dag2.l[1], &m_dag2_alt.l[1]); - swap_register(&m_dag2.l[2], &m_dag2_alt.l[2]); - swap_register(&m_dag2.l[3], &m_dag2_alt.l[3]); - swap_register(&m_dag2.b[0], &m_dag2_alt.b[0]); - swap_register(&m_dag2.b[1], &m_dag2_alt.b[1]); - swap_register(&m_dag2.b[2], &m_dag2_alt.b[2]); - swap_register(&m_dag2.b[3], &m_dag2_alt.b[3]); + swap_register(&m_core->dag2.i[0], &m_core->dag2_alt.i[0]); + swap_register(&m_core->dag2.i[1], &m_core->dag2_alt.i[1]); + swap_register(&m_core->dag2.i[2], &m_core->dag2_alt.i[2]); + swap_register(&m_core->dag2.i[3], &m_core->dag2_alt.i[3]); + swap_register(&m_core->dag2.m[0], &m_core->dag2_alt.m[0]); + swap_register(&m_core->dag2.m[1], &m_core->dag2_alt.m[1]); + swap_register(&m_core->dag2.m[2], &m_core->dag2_alt.m[2]); + swap_register(&m_core->dag2.m[3], &m_core->dag2_alt.m[3]); + swap_register(&m_core->dag2.l[0], &m_core->dag2_alt.l[0]); + swap_register(&m_core->dag2.l[1], &m_core->dag2_alt.l[1]); + swap_register(&m_core->dag2.l[2], &m_core->dag2_alt.l[2]); + swap_register(&m_core->dag2.l[3], &m_core->dag2_alt.l[3]); + swap_register(&m_core->dag2.b[0], &m_core->dag2_alt.b[0]); + swap_register(&m_core->dag2.b[1], &m_core->dag2_alt.b[1]); + swap_register(&m_core->dag2.b[2], &m_core->dag2_alt.b[2]); + swap_register(&m_core->dag2.b[3], &m_core->dag2_alt.b[3]); } if ((data & 0x80) != (oldreg & 0x80)) { for (i=8; i<16; i++) - swap_register((UINT32*)&m_r[i].r, (UINT32*)&m_reg_alt[i].r); + swap_register((UINT32*)&m_core->r[i].r, (UINT32*)&m_core->reg_alt[i].r); } if ((data & 0x400) != (oldreg & 0x400)) { for (i=0; i<8; i++) - swap_register((UINT32*)&m_r[i].r, (UINT32*)&m_reg_alt[i].r); + swap_register((UINT32*)&m_core->r[i].r, (UINT32*)&m_core->reg_alt[i].r); } break; } - default: fatalerror("SHARC: systemreg_latency_op: unknown register %02X at %08X\n", m_systemreg_latency_reg, m_pc); + default: fatalerror("SHARC: systemreg_latency_op: unknown register %02X at %08X\n", m_core->systemreg_latency_reg, m_core->pc); } - m_systemreg_latency_reg = -1; + m_core->systemreg_latency_reg = -1; } UINT32 adsp21062_device::GET_UREG(int ureg) @@ -273,18 +235,18 @@ UINT32 adsp21062_device::GET_UREG(int ureg) { case 0x0: /* R0 - R15 */ { - return m_r[reg].r; + return m_core->r[reg].r; } case 0x1: { if (reg & 0x8) /* I8 - I15 */ { - return m_dag2.i[reg & 0x7]; + return m_core->dag2.i[reg & 0x7]; } else /* I0 - I7 */ { - return m_dag1.i[reg & 0x7]; + return m_core->dag1.i[reg & 0x7]; } } @@ -292,14 +254,14 @@ UINT32 adsp21062_device::GET_UREG(int ureg) { if (reg & 0x8) /* M8 - M15 */ { - INT32 r = m_dag2.m[reg & 0x7]; + INT32 r = m_core->dag2.m[reg & 0x7]; if (r & 0x800000) r |= 0xff000000; return r; } else /* M0 - M7 */ { - return m_dag1.m[reg & 0x7]; + return m_core->dag1.m[reg & 0x7]; } } @@ -307,11 +269,11 @@ UINT32 adsp21062_device::GET_UREG(int ureg) { if (reg & 0x8) /* L8 - L15 */ { - return m_dag2.l[reg & 0x7]; + return m_core->dag2.l[reg & 0x7]; } else /* L0 - L7 */ { - return m_dag1.l[reg & 0x7]; + return m_core->dag1.l[reg & 0x7]; } } @@ -319,11 +281,11 @@ UINT32 adsp21062_device::GET_UREG(int ureg) { if (reg & 0x8) /* B8 - B15 */ { - return m_dag2.b[reg & 0x7]; + return m_core->dag2.b[reg & 0x7]; } else /* B0 - B7 */ { - return m_dag1.b[reg & 0x7]; + return m_core->dag1.b[reg & 0x7]; } } @@ -331,8 +293,8 @@ UINT32 adsp21062_device::GET_UREG(int ureg) { switch(reg) { - case 0x4: return m_pcstack[m_pcstkp]; /* PCSTK */ - default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_pc); + case 0x4: return m_core->pcstack[m_core->pcstkp]; /* PCSTK */ + default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); } break; } @@ -341,24 +303,24 @@ UINT32 adsp21062_device::GET_UREG(int ureg) { switch(reg) { - case 0x0: return m_ustat1; /* USTAT1 */ - case 0x1: return m_ustat2; /* USTAT2 */ - case 0x9: return m_irptl; /* IRPTL */ - case 0xa: return m_mode2; /* MODE2 */ - case 0xb: return m_mode1; /* MODE1 */ + case 0x0: return m_core->ustat1; /* USTAT1 */ + case 0x1: return m_core->ustat2; /* USTAT2 */ + case 0x9: return m_core->irptl; /* IRPTL */ + case 0xa: return m_core->mode2; /* MODE2 */ + case 0xb: return m_core->mode1; /* MODE1 */ case 0xc: /* ASTAT */ { - UINT32 r = m_astat; + UINT32 r = m_core->astat; r &= ~0x00780000; - r |= (m_flag[0] << 19); - r |= (m_flag[1] << 20); - r |= (m_flag[2] << 21); - r |= (m_flag[3] << 22); + r |= (m_core->flag[0] << 19); + r |= (m_core->flag[1] << 20); + r |= (m_core->flag[2] << 21); + r |= (m_core->flag[3] << 22); return r; } - case 0xd: return m_imask; /* IMASK */ - case 0xe: return m_stky; /* STKY */ - default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_pc); + case 0xd: return m_core->imask; /* IMASK */ + case 0xe: return m_core->stky; /* STKY */ + default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); } break; } @@ -368,15 +330,15 @@ UINT32 adsp21062_device::GET_UREG(int ureg) switch(reg) { /* PX needs to be handled separately if the whole 48 bits are needed */ - case 0xb: return (UINT32)(m_px); /* PX */ - case 0xc: return (UINT16)(m_px); /* PX1 */ - case 0xd: return (UINT32)(m_px >> 16); /* PX2 */ - default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_pc); + case 0xb: return (UINT32)(m_core->px); /* PX */ + case 0xc: return (UINT16)(m_core->px); /* PX1 */ + case 0xd: return (UINT32)(m_core->px >> 16); /* PX2 */ + default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); } break; } - default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_pc); + default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); } } @@ -386,39 +348,39 @@ void adsp21062_device::SET_UREG(int ureg, UINT32 data) switch((ureg >> 4) & 0xf) { case 0x0: /* R0 - R15 */ - m_r[reg].r = data; + m_core->r[reg].r = data; break; case 0x1: if (reg & 0x8) /* I8 - I15 */ { - m_dag2.i[reg & 0x7] = data; + m_core->dag2.i[reg & 0x7] = data; } else /* I0 - I7 */ { - m_dag1.i[reg & 0x7] = data; + m_core->dag1.i[reg & 0x7] = data; } break; case 0x2: if (reg & 0x8) /* M8 - M15 */ { - m_dag2.m[reg & 0x7] = data; + m_core->dag2.m[reg & 0x7] = data; } else /* M0 - M7 */ { - m_dag1.m[reg & 0x7] = data; + m_core->dag1.m[reg & 0x7] = data; } break; case 0x3: if (reg & 0x8) /* L8 - L15 */ { - m_dag2.l[reg & 0x7] = data; + m_core->dag2.l[reg & 0x7] = data; } else /* L0 - L7 */ { - m_dag1.l[reg & 0x7] = data; + m_core->dag1.l[reg & 0x7] = data; } break; @@ -426,73 +388,73 @@ void adsp21062_device::SET_UREG(int ureg, UINT32 data) // Note: loading B also loads the same value in I if (reg & 0x8) /* B8 - B15 */ { - m_dag2.b[reg & 0x7] = data; - m_dag2.i[reg & 0x7] = data; + m_core->dag2.b[reg & 0x7] = data; + m_core->dag2.i[reg & 0x7] = data; } else /* B0 - B7 */ { - m_dag1.b[reg & 0x7] = data; - m_dag1.i[reg & 0x7] = data; + m_core->dag1.b[reg & 0x7] = data; + m_core->dag1.i[reg & 0x7] = data; } break; case 0x6: switch (reg) { - case 0x5: m_pcstkp = data; break; /* PCSTKP */ - case 0x8: m_lcntr = data; break; /* LCNTR */ - default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_pc); + case 0x5: m_core->pcstkp = data; break; /* PCSTKP */ + case 0x8: m_core->lcntr = data; break; /* LCNTR */ + default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); } break; case 0x7: /* system regs */ switch(reg) { - case 0x0: m_ustat1 = data; break; /* USTAT1 */ - case 0x1: m_ustat2 = data; break; /* USTAT2 */ + case 0x0: m_core->ustat1 = data; break; /* USTAT1 */ + case 0x1: m_core->ustat2 = data; break; /* USTAT2 */ - case 0x9: m_irptl = data; break; /* IRPTL */ - case 0xa: m_mode2 = data; break; /* MODE2 */ + case 0x9: m_core->irptl = data; break; /* IRPTL */ + case 0xa: m_core->mode2 = data; break; /* MODE2 */ case 0xb: /* MODE1 */ { - add_systemreg_write_latency_effect(reg, data, m_mode1); - m_mode1 = data; + add_systemreg_write_latency_effect(reg, data, m_core->mode1); + m_core->mode1 = data; break; } - case 0xc: m_astat = data; break; /* ASTAT */ + case 0xc: m_core->astat = data; break; /* ASTAT */ case 0xd: /* IMASK */ { check_interrupts(); - m_imask = data; + m_core->imask = data; break; } - case 0xe: m_stky = data; break; /* STKY */ - default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_pc); + case 0xe: m_core->stky = data; break; /* STKY */ + default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); } break; case 0xd: switch(reg) { - case 0xc: m_px &= U64(0xffffffffffff0000); m_px |= (data & 0xffff); break; /* PX1 */ - case 0xd: m_px &= U64(0x000000000000ffff); m_px |= (UINT64)data << 16; break; /* PX2 */ - default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_pc); + case 0xc: m_core->px &= U64(0xffffffffffff0000); m_core->px |= (data & 0xffff); break; /* PX1 */ + case 0xd: m_core->px &= U64(0x000000000000ffff); m_core->px |= (UINT64)data << 16; break; /* PX2 */ + default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); } break; - default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_pc); + default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); } } /*****************************************************************************/ -#define SET_FLAG_SV_LSHIFT(x, shift) if((x) & ((UINT32)0xffffffff << shift)) m_astat |= SV -#define SET_FLAG_SV_RSHIFT(x, shift) if((x) & ((UINT32)0xffffffff >> shift)) m_astat |= SV +#define SET_FLAG_SV_LSHIFT(x, shift) if((x) & ((UINT32)0xffffffff << shift)) m_core->astat |= SV +#define SET_FLAG_SV_RSHIFT(x, shift) if((x) & ((UINT32)0xffffffff >> shift)) m_core->astat |= SV -#define SET_FLAG_SZ(x) if((x) == 0) m_astat |= SZ +#define SET_FLAG_SZ(x) if((x) == 0) m_core->astat |= SZ #define MAKE_EXTRACT_MASK(start_bit, length) ((0xffffffff << start_bit) & (((UINT32)0xffffffff) >> (32 - (start_bit + length)))) @@ -502,7 +464,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx int bit = data & 0x3f; int len = (data >> 6) & 0x3f; - m_astat &= ~(SZ|SV|SS); + m_core->astat &= ~(SZ|SV|SS); switch(shiftop) { @@ -514,7 +476,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx REG(rn) = (shift < 32) ? (REG(rx) << shift) : 0; if (shift > 0) { - m_astat |= SV; + m_core->astat |= SV; } } SET_FLAG_SZ(REG(rn)); @@ -532,7 +494,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx REG(rn) = (shift < 32) ? ((INT32)REG(rx) << shift) : 0; if (shift > 0) { - m_astat |= SV; + m_core->astat |= SV; } } SET_FLAG_SZ(REG(rn)); @@ -566,7 +528,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx r = (shift < 32) ? (REG(rx) << shift) : 0; if (shift > 0) { - m_astat |= SV; + m_core->astat |= SV; } } SET_FLAG_SZ(r); @@ -583,7 +545,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx SET_FLAG_SZ(REG(rn)); if (bit+len > 32) { - m_astat |= SV; + m_core->astat |= SV; } break; } @@ -602,7 +564,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx SET_FLAG_SZ(REG(rn)); if (bit+len > 32) { - m_astat |= SV; + m_core->astat |= SV; } break; } @@ -618,7 +580,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx SET_FLAG_SZ(REG(rn)); if (bit+len > 32) { - m_astat |= SV; + m_core->astat |= SV; } break; } @@ -632,7 +594,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx SET_FLAG_SZ(REG(rn)); if (bit+len > 32) { - m_astat |= SV; + m_core->astat |= SV; } break; } @@ -646,7 +608,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx } else { - m_astat |= SV; + m_core->astat |= SV; } SET_FLAG_SZ(REG(rn)); break; @@ -661,7 +623,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx } else { - m_astat |= SV; + m_core->astat |= SV; } SET_FLAG_SZ(REG(rn)); break; @@ -676,7 +638,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx } else { - m_astat |= SV; + m_core->astat |= SV; } SET_FLAG_SZ(REG(rn)); break; @@ -692,12 +654,12 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx } else { - m_astat |= SZ | SV; + m_core->astat |= SZ | SV; } break; } - default: fatalerror("SHARC: unimplemented shift operation %02X at %08X\n", shiftop, m_pc); + default: fatalerror("SHARC: unimplemented shift operation %02X at %08X\n", shiftop, m_core->pc); } } @@ -795,7 +757,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) } default: - fatalerror("SHARC: compute: multi-function opcode %02X not implemented ! (%08X, %08X)\n", multiop, m_pc, opcode); + fatalerror("SHARC: compute: multi-function opcode %02X not implemented ! (%08X, %08X)\n", multiop, m_core->pc, opcode); break; } } @@ -863,7 +825,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) break; } - default: fatalerror("SHARC: compute: unimplemented ALU operation %02X (%08X, %08X)\n", op, m_pc, opcode); + default: fatalerror("SHARC: compute: unimplemented ALU operation %02X (%08X, %08X)\n", op, m_core->pc, opcode); } break; } @@ -874,8 +836,8 @@ void adsp21062_device::COMPUTE(UINT32 opcode) { switch(op) { - case 0x14: m_mrf = 0; break; - case 0x16: m_mrb = 0; break; + case 0x14: m_core->mrf = 0; break; + case 0x16: m_core->mrb = 0; break; case 0x30: compute_fmul(rn, rx, ry); break; case 0x40: compute_mul_uuin(rn, rx, ry); break; @@ -885,7 +847,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) case 0xb2: REG(rn) = compute_mrb_plus_mul_ssin(rx, ry); break; default: - fatalerror("SHARC: compute: multiplier operation %02X not implemented ! (%08X, %08X)\n", op, m_pc, opcode); + fatalerror("SHARC: compute: multiplier operation %02X not implemented ! (%08X, %08X)\n", op, m_core->pc, opcode); break; } break; @@ -895,7 +857,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) /* Shifter operations */ case 2: { - m_astat &= ~(SZ|SV|SS); + m_core->astat &= ~(SZ|SV|SS); op >>= 2; switch(op) @@ -912,7 +874,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) REG(rn) = (shift < 32) ? (REG(rx) << shift) : 0; if (shift > 0) { - m_astat |= SV; + m_core->astat |= SV; } } SET_FLAG_SZ(REG(rn)); @@ -935,7 +897,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) (((UINT32)REG(rx) >> (32-s)) & ((UINT32)(0xffffffff) >> (32-s))); if (shift > 0) { - m_astat |= SV; + m_core->astat |= SV; } } SET_FLAG_SZ(REG(rn)); @@ -951,7 +913,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) REG(rn) = REG(rn) | ((shift < 32) ? (REG(rx) << shift) : 0); if (shift > 0) { - m_astat |= SV; + m_core->astat |= SV; } } SET_FLAG_SZ(REG(rn)); @@ -968,7 +930,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) SET_FLAG_SZ(REG(rn)); if (bit+len > 32) { - m_astat |= SV; + m_core->astat |= SV; } break; } @@ -986,7 +948,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) SET_FLAG_SZ(REG(rn)); if (bit+len > 32) { - m_astat |= SV; + m_core->astat |= SV; } break; } @@ -1002,7 +964,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) SET_FLAG_SZ(REG(rn)); if (bit+len > 32) { - m_astat |= SV; + m_core->astat |= SV; } break; } @@ -1017,7 +979,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) } else { - m_astat |= SV; + m_core->astat |= SV; } SET_FLAG_SZ(REG(rn)); break; @@ -1033,7 +995,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode) } else { - m_astat |= SV; + m_core->astat |= SV; } SET_FLAG_SZ(REG(rn)); break; @@ -1050,13 +1012,13 @@ void adsp21062_device::COMPUTE(UINT32 opcode) } else { - m_astat |= SZ | SV; + m_core->astat |= SZ | SV; } break; } default: - fatalerror("SHARC: compute: shift operation %02X not implemented ! (%08X, %08X)\n", op, m_pc, opcode); + fatalerror("SHARC: compute: shift operation %02X not implemented ! (%08X, %08X)\n", op, m_core->pc, opcode); } break; } @@ -1069,143 +1031,143 @@ void adsp21062_device::COMPUTE(UINT32 opcode) void adsp21062_device::PUSH_PC(UINT32 pc) { - m_pcstkp++; - if(m_pcstkp >= 32) + m_core->pcstkp++; + if(m_core->pcstkp >= 32) { fatalerror("SHARC: PC Stack overflow!\n"); } - if (m_pcstkp == 0) + if (m_core->pcstkp == 0) { - m_stky |= 0x400000; + m_core->stky |= 0x400000; } else { - m_stky &= ~0x400000; + m_core->stky &= ~0x400000; } - m_pcstk = pc; - m_pcstack[m_pcstkp] = pc; + m_core->pcstk = pc; + m_core->pcstack[m_core->pcstkp] = pc; } UINT32 adsp21062_device::POP_PC() { - m_pcstk = m_pcstack[m_pcstkp]; + m_core->pcstk = m_core->pcstack[m_core->pcstkp]; - if(m_pcstkp == 0) + if(m_core->pcstkp == 0) { fatalerror("SHARC: PC Stack underflow!\n"); } - m_pcstkp--; + m_core->pcstkp--; - if (m_pcstkp == 0) + if (m_core->pcstkp == 0) { - m_stky |= 0x400000; + m_core->stky |= 0x400000; } else { - m_stky &= ~0x400000; + m_core->stky &= ~0x400000; } - return m_pcstk; + return m_core->pcstk; } UINT32 adsp21062_device::TOP_PC() { - return m_pcstack[m_pcstkp]; + return m_core->pcstack[m_core->pcstkp]; } void adsp21062_device::PUSH_LOOP(UINT32 addr, UINT32 code, UINT32 type, UINT32 count) { - m_lstkp++; - if(m_lstkp >= 6) + m_core->lstkp++; + if(m_core->lstkp >= 6) { fatalerror("SHARC: Loop Stack overflow!\n"); } - if (m_lstkp == 0) + if (m_core->lstkp == 0) { - m_stky |= 0x4000000; + m_core->stky |= 0x4000000; } else { - m_stky &= ~0x4000000; + m_core->stky &= ~0x4000000; } - m_lcstack[m_lstkp] = count; - m_lastack[m_lstkp] = (type << 30) | (code << 24) | addr; - m_curlcntr = count; + m_core->lcstack[m_core->lstkp] = count; + m_core->lastack[m_core->lstkp] = (type << 30) | (code << 24) | addr; + m_core->curlcntr = count; - m_laddr.addr = addr; - m_laddr.code = code; - m_laddr.loop_type = type; + m_core->laddr.addr = addr; + m_core->laddr.code = code; + m_core->laddr.loop_type = type; } void adsp21062_device::POP_LOOP() { - if(m_lstkp == 0) + if(m_core->lstkp == 0) { fatalerror("SHARC: Loop Stack underflow!\n"); } - m_lstkp--; + m_core->lstkp--; - if (m_lstkp == 0) + if (m_core->lstkp == 0) { - m_stky |= 0x4000000; + m_core->stky |= 0x4000000; } else { - m_stky &= ~0x4000000; + m_core->stky &= ~0x4000000; } - m_curlcntr = m_lcstack[m_lstkp]; + m_core->curlcntr = m_core->lcstack[m_core->lstkp]; - m_laddr.addr = m_lastack[m_lstkp] & 0xffffff; - m_laddr.code = (m_lastack[m_lstkp] >> 24) & 0x1f; - m_laddr.loop_type = (m_lastack[m_lstkp] >> 30) & 0x3; + m_core->laddr.addr = m_core->lastack[m_core->lstkp] & 0xffffff; + m_core->laddr.code = (m_core->lastack[m_core->lstkp] >> 24) & 0x1f; + m_core->laddr.loop_type = (m_core->lastack[m_core->lstkp] >> 30) & 0x3; } void adsp21062_device::PUSH_STATUS_STACK() { - m_status_stkp++; - if (m_status_stkp >= 5) + m_core->status_stkp++; + if (m_core->status_stkp >= 5) { fatalerror("SHARC: Status stack overflow!\n"); } - if (m_status_stkp == 0) + if (m_core->status_stkp == 0) { - m_stky |= 0x1000000; + m_core->stky |= 0x1000000; } else { - m_stky &= ~0x1000000; + m_core->stky &= ~0x1000000; } - m_status_stack[m_status_stkp].mode1 = GET_UREG(REG_MODE1); - m_status_stack[m_status_stkp].astat = GET_UREG(REG_ASTAT); + m_core->status_stack[m_core->status_stkp].mode1 = GET_UREG(REG_MODE1); + m_core->status_stack[m_core->status_stkp].astat = GET_UREG(REG_ASTAT); } void adsp21062_device::POP_STATUS_STACK() { - SET_UREG(REG_MODE1, m_status_stack[m_status_stkp].mode1); - SET_UREG(REG_ASTAT, m_status_stack[m_status_stkp].astat); + SET_UREG(REG_MODE1, m_core->status_stack[m_core->status_stkp].mode1); + SET_UREG(REG_ASTAT, m_core->status_stack[m_core->status_stkp].astat); - m_status_stkp--; - if (m_status_stkp < 0) + m_core->status_stkp--; + if (m_core->status_stkp < 0) { fatalerror("SHARC: Status stack underflow!\n"); } - if (m_status_stkp == 0) + if (m_core->status_stkp == 0) { - m_stky |= 0x1000000; + m_core->stky |= 0x1000000; } else { - m_stky &= ~0x1000000; + m_core->stky &= ~0x1000000; } } @@ -1213,36 +1175,36 @@ int adsp21062_device::IF_CONDITION_CODE(int cond) { switch(cond) { - case 0x00: return m_astat & AZ; /* EQ */ - case 0x01: return !(m_astat & AZ) && (m_astat & AN); /* LT */ - case 0x02: return (m_astat & AZ) || (m_astat & AN); /* LE */ - case 0x03: return (m_astat & AC); /* AC */ - case 0x04: return (m_astat & AV); /* AV */ - case 0x05: return (m_astat & MV); /* MV */ - case 0x06: return (m_astat & MN); /* MS */ - case 0x07: return (m_astat & SV); /* SV */ - case 0x08: return (m_astat & SZ); /* SZ */ - case 0x09: return (m_flag[0] != 0); /* FLAG0 */ - case 0x0a: return (m_flag[1] != 0); /* FLAG1 */ - case 0x0b: return (m_flag[2] != 0); /* FLAG2 */ - case 0x0c: return (m_flag[3] != 0); /* FLAG3 */ - case 0x0d: return (m_astat & BTF); /* TF */ + case 0x00: return m_core->astat & AZ; /* EQ */ + case 0x01: return !(m_core->astat & AZ) && (m_core->astat & AN); /* LT */ + case 0x02: return (m_core->astat & AZ) || (m_core->astat & AN); /* LE */ + case 0x03: return (m_core->astat & AC); /* AC */ + case 0x04: return (m_core->astat & AV); /* AV */ + case 0x05: return (m_core->astat & MV); /* MV */ + case 0x06: return (m_core->astat & MN); /* MS */ + case 0x07: return (m_core->astat & SV); /* SV */ + case 0x08: return (m_core->astat & SZ); /* SZ */ + case 0x09: return (m_core->flag[0] != 0); /* FLAG0 */ + case 0x0a: return (m_core->flag[1] != 0); /* FLAG1 */ + case 0x0b: return (m_core->flag[2] != 0); /* FLAG2 */ + case 0x0c: return (m_core->flag[3] != 0); /* FLAG3 */ + case 0x0d: return (m_core->astat & BTF); /* TF */ case 0x0e: return 0; /* BM */ - case 0x0f: return (m_curlcntr!=1); /* NOT LCE */ - case 0x10: return !(m_astat & AZ); /* NOT EQUAL */ - case 0x11: return (m_astat & AZ) || !(m_astat & AN); /* GE */ - case 0x12: return !(m_astat & AZ) && !(m_astat & AN); /* GT */ - case 0x13: return !(m_astat & AC); /* NOT AC */ - case 0x14: return !(m_astat & AV); /* NOT AV */ - case 0x15: return !(m_astat & MV); /* NOT MV */ - case 0x16: return !(m_astat & MN); /* NOT MS */ - case 0x17: return !(m_astat & SV); /* NOT SV */ - case 0x18: return !(m_astat & SZ); /* NOT SZ */ - case 0x19: return (m_flag[0] == 0); /* NOT FLAG0 */ - case 0x1a: return (m_flag[1] == 0); /* NOT FLAG1 */ - case 0x1b: return (m_flag[2] == 0); /* NOT FLAG2 */ - case 0x1c: return (m_flag[3] == 0); /* NOT FLAG3 */ - case 0x1d: return !(m_astat & BTF); /* NOT TF */ + case 0x0f: return (m_core->curlcntr!=1); /* NOT LCE */ + case 0x10: return !(m_core->astat & AZ); /* NOT EQUAL */ + case 0x11: return (m_core->astat & AZ) || !(m_core->astat & AN); /* GE */ + case 0x12: return !(m_core->astat & AZ) && !(m_core->astat & AN); /* GT */ + case 0x13: return !(m_core->astat & AC); /* NOT AC */ + case 0x14: return !(m_core->astat & AV); /* NOT AV */ + case 0x15: return !(m_core->astat & MV); /* NOT MV */ + case 0x16: return !(m_core->astat & MN); /* NOT MS */ + case 0x17: return !(m_core->astat & SV); /* NOT SV */ + case 0x18: return !(m_core->astat & SZ); /* NOT SZ */ + case 0x19: return (m_core->flag[0] == 0); /* NOT FLAG0 */ + case 0x1a: return (m_core->flag[1] == 0); /* NOT FLAG1 */ + case 0x1b: return (m_core->flag[2] == 0); /* NOT FLAG2 */ + case 0x1c: return (m_core->flag[3] == 0); /* NOT FLAG3 */ + case 0x1d: return !(m_core->astat & BTF); /* NOT TF */ case 0x1e: return 1; /* NOT BM */ case 0x1f: return 1; /* TRUE */ } @@ -1253,36 +1215,36 @@ int adsp21062_device::DO_CONDITION_CODE(int cond) { switch(cond) { - case 0x00: return m_astat & AZ; /* EQ */ - case 0x01: return !(m_astat & AZ) && (m_astat & AN); /* LT */ - case 0x02: return (m_astat & AZ) || (m_astat & AN); /* LE */ - case 0x03: return (m_astat & AC); /* AC */ - case 0x04: return (m_astat & AV); /* AV */ - case 0x05: return (m_astat & MV); /* MV */ - case 0x06: return (m_astat & MN); /* MS */ - case 0x07: return (m_astat & SV); /* SV */ - case 0x08: return (m_astat & SZ); /* SZ */ - case 0x09: return (m_flag[0] != 0); /* FLAG0 */ - case 0x0a: return (m_flag[1] != 0); /* FLAG1 */ - case 0x0b: return (m_flag[2] != 0); /* FLAG2 */ - case 0x0c: return (m_flag[3] != 0); /* FLAG3 */ - case 0x0d: return (m_astat & BTF); /* TF */ + case 0x00: return m_core->astat & AZ; /* EQ */ + case 0x01: return !(m_core->astat & AZ) && (m_core->astat & AN); /* LT */ + case 0x02: return (m_core->astat & AZ) || (m_core->astat & AN); /* LE */ + case 0x03: return (m_core->astat & AC); /* AC */ + case 0x04: return (m_core->astat & AV); /* AV */ + case 0x05: return (m_core->astat & MV); /* MV */ + case 0x06: return (m_core->astat & MN); /* MS */ + case 0x07: return (m_core->astat & SV); /* SV */ + case 0x08: return (m_core->astat & SZ); /* SZ */ + case 0x09: return (m_core->flag[0] != 0); /* FLAG0 */ + case 0x0a: return (m_core->flag[1] != 0); /* FLAG1 */ + case 0x0b: return (m_core->flag[2] != 0); /* FLAG2 */ + case 0x0c: return (m_core->flag[3] != 0); /* FLAG3 */ + case 0x0d: return (m_core->astat & BTF); /* TF */ case 0x0e: return 0; /* BM */ - case 0x0f: return (m_curlcntr==1); /* LCE */ - case 0x10: return !(m_astat & AZ); /* NOT EQUAL */ - case 0x11: return (m_astat & AZ) || !(m_astat & AN); /* GE */ - case 0x12: return !(m_astat & AZ) && !(m_astat & AN); /* GT */ - case 0x13: return !(m_astat & AC); /* NOT AC */ - case 0x14: return !(m_astat & AV); /* NOT AV */ - case 0x15: return !(m_astat & MV); /* NOT MV */ - case 0x16: return !(m_astat & MN); /* NOT MS */ - case 0x17: return !(m_astat & SV); /* NOT SV */ - case 0x18: return !(m_astat & SZ); /* NOT SZ */ - case 0x19: return (m_flag[0] == 0); /* NOT FLAG0 */ - case 0x1a: return (m_flag[1] == 0); /* NOT FLAG1 */ - case 0x1b: return (m_flag[2] == 0); /* NOT FLAG2 */ - case 0x1c: return (m_flag[3] == 0); /* NOT FLAG3 */ - case 0x1d: return !(m_astat & BTF); /* NOT TF */ + case 0x0f: return (m_core->curlcntr==1); /* LCE */ + case 0x10: return !(m_core->astat & AZ); /* NOT EQUAL */ + case 0x11: return (m_core->astat & AZ) || !(m_core->astat & AN); /* GE */ + case 0x12: return !(m_core->astat & AZ) && !(m_core->astat & AN); /* GT */ + case 0x13: return !(m_core->astat & AC); /* NOT AC */ + case 0x14: return !(m_core->astat & AV); /* NOT AV */ + case 0x15: return !(m_core->astat & MV); /* NOT MV */ + case 0x16: return !(m_core->astat & MN); /* NOT MS */ + case 0x17: return !(m_core->astat & SV); /* NOT SV */ + case 0x18: return !(m_core->astat & SZ); /* NOT SZ */ + case 0x19: return (m_core->flag[0] == 0); /* NOT FLAG0 */ + case 0x1a: return (m_core->flag[1] == 0); /* NOT FLAG1 */ + case 0x1b: return (m_core->flag[2] == 0); /* NOT FLAG2 */ + case 0x1c: return (m_core->flag[3] == 0); /* NOT FLAG3 */ + case 0x1d: return !(m_core->astat & BTF); /* NOT TF */ case 0x1e: return 1; /* NOT BM */ case 0x1f: return 0; /* FALSE (FOREVER) */ } @@ -1295,15 +1257,15 @@ int adsp21062_device::DO_CONDITION_CODE(int cond) /* compute / dreg <-> DM / dreg <-> PM */ void adsp21062_device::sharcop_compute_dreg_dm_dreg_pm() { - int pm_dreg = (m_opcode >> 23) & 0xf; - int pmm = (m_opcode >> 27) & 0x7; - int pmi = (m_opcode >> 30) & 0x7; - int dm_dreg = (m_opcode >> 33) & 0xf; - int dmm = (m_opcode >> 38) & 0x7; - int dmi = (m_opcode >> 41) & 0x7; - int pmd = (m_opcode >> 37) & 0x1; - int dmd = (m_opcode >> 44) & 0x1; - int compute = m_opcode & 0x7fffff; + int pm_dreg = (m_core->opcode >> 23) & 0xf; + int pmm = (m_core->opcode >> 27) & 0x7; + int pmi = (m_core->opcode >> 30) & 0x7; + int dm_dreg = (m_core->opcode >> 33) & 0xf; + int dmm = (m_core->opcode >> 38) & 0x7; + int dmi = (m_core->opcode >> 41) & 0x7; + int pmd = (m_core->opcode >> 37) & 0x1; + int dmd = (m_core->opcode >> 44) & 0x1; + int compute = m_core->opcode & 0x7fffff; /* due to parallelity issues, source DREGs must be saved */ /* because the compute operation may change them */ @@ -1348,8 +1310,8 @@ void adsp21062_device::sharcop_compute_dreg_dm_dreg_pm() /* compute */ void adsp21062_device::sharcop_compute() { - int cond = (m_opcode >> 33) & 0x1f; - int compute = m_opcode & 0x7fffff; + int cond = (m_core->opcode >> 33) & 0x1f; + int compute = m_core->opcode & 0x7fffff; if (IF_CONDITION_CODE(cond) && compute != 0) { @@ -1363,13 +1325,13 @@ void adsp21062_device::sharcop_compute() /* compute / ureg <-> DM|PM, pre-modify */ void adsp21062_device::sharcop_compute_ureg_dmpm_premod() { - int i = (m_opcode >> 41) & 0x7; - int m = (m_opcode >> 38) & 0x7; - int cond = (m_opcode >> 33) & 0x1f; - int g = (m_opcode >> 32) & 0x1; - int d = (m_opcode >> 31) & 0x1; - int ureg = (m_opcode >> 23) & 0xff; - int compute = m_opcode & 0x7fffff; + int i = (m_core->opcode >> 41) & 0x7; + int m = (m_core->opcode >> 38) & 0x7; + int cond = (m_core->opcode >> 33) & 0x1f; + int g = (m_core->opcode >> 32) & 0x1; + int d = (m_core->opcode >> 31) & 0x1; + int ureg = (m_core->opcode >> 23) & 0xff; + int compute = m_core->opcode & 0x7fffff; if (IF_CONDITION_CODE(cond)) { @@ -1388,7 +1350,7 @@ void adsp21062_device::sharcop_compute_ureg_dmpm_premod() { if (ureg == 0xdb) /* PX register access is always 48-bit */ { - pm_write48(PM_REG_I(i)+PM_REG_M(m), m_px); + pm_write48(PM_REG_I(i)+PM_REG_M(m), m_core->px); } else { @@ -1399,7 +1361,7 @@ void adsp21062_device::sharcop_compute_ureg_dmpm_premod() { if (ureg == 0xdb) /* PX register access is always 48-bit */ { - m_px = pm_read48(PM_REG_I(i)+PM_REG_M(m)); + m_core->px = pm_read48(PM_REG_I(i)+PM_REG_M(m)); } else { @@ -1424,13 +1386,13 @@ void adsp21062_device::sharcop_compute_ureg_dmpm_premod() /* compute / ureg <-> DM|PM, post-modify */ void adsp21062_device::sharcop_compute_ureg_dmpm_postmod() { - int i = (m_opcode >> 41) & 0x7; - int m = (m_opcode >> 38) & 0x7; - int cond = (m_opcode >> 33) & 0x1f; - int g = (m_opcode >> 32) & 0x1; - int d = (m_opcode >> 31) & 0x1; - int ureg = (m_opcode >> 23) & 0xff; - int compute = m_opcode & 0x7fffff; + int i = (m_core->opcode >> 41) & 0x7; + int m = (m_core->opcode >> 38) & 0x7; + int cond = (m_core->opcode >> 33) & 0x1f; + int g = (m_core->opcode >> 32) & 0x1; + int d = (m_core->opcode >> 31) & 0x1; + int ureg = (m_core->opcode >> 23) & 0xff; + int compute = m_core->opcode & 0x7fffff; if(IF_CONDITION_CODE(cond)) { @@ -1449,7 +1411,7 @@ void adsp21062_device::sharcop_compute_ureg_dmpm_postmod() { if (ureg == 0xdb) /* PX register access is always 48-bit */ { - pm_write48(PM_REG_I(i), m_px); + pm_write48(PM_REG_I(i), m_core->px); } else { @@ -1462,7 +1424,7 @@ void adsp21062_device::sharcop_compute_ureg_dmpm_postmod() { if (ureg == 0xdb) /* PX register access is always 48-bit */ { - m_px = pm_read48(PM_REG_I(i)); + m_core->px = pm_read48(PM_REG_I(i)); } else { @@ -1496,12 +1458,12 @@ void adsp21062_device::sharcop_compute_ureg_dmpm_postmod() /* compute / dreg <- DM, immediate modify */ void adsp21062_device::sharcop_compute_dm_to_dreg_immmod() { - int cond = (m_opcode >> 33) & 0x1f; - int u = (m_opcode >> 38) & 0x1; - int dreg = (m_opcode >> 23) & 0xf; - int i = (m_opcode >> 41) & 0x7; - int mod = SIGN_EXTEND6((m_opcode >> 27) & 0x3f); - int compute = m_opcode & 0x7fffff; + int cond = (m_core->opcode >> 33) & 0x1f; + int u = (m_core->opcode >> 38) & 0x1; + int dreg = (m_core->opcode >> 23) & 0xf; + int i = (m_core->opcode >> 41) & 0x7; + int mod = SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f); + int compute = m_core->opcode & 0x7fffff; if (IF_CONDITION_CODE(cond)) { @@ -1526,12 +1488,12 @@ void adsp21062_device::sharcop_compute_dm_to_dreg_immmod() /* compute / dreg -> DM, immediate modify */ void adsp21062_device::sharcop_compute_dreg_to_dm_immmod() { - int cond = (m_opcode >> 33) & 0x1f; - int u = (m_opcode >> 38) & 0x1; - int dreg = (m_opcode >> 23) & 0xf; - int i = (m_opcode >> 41) & 0x7; - int mod = SIGN_EXTEND6((m_opcode >> 27) & 0x3f); - int compute = m_opcode & 0x7fffff; + int cond = (m_core->opcode >> 33) & 0x1f; + int u = (m_core->opcode >> 38) & 0x1; + int dreg = (m_core->opcode >> 23) & 0xf; + int i = (m_core->opcode >> 41) & 0x7; + int mod = SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f); + int compute = m_core->opcode & 0x7fffff; /* due to parallelity issues, source REG must be saved */ /* because the shift operation may change it */ @@ -1560,12 +1522,12 @@ void adsp21062_device::sharcop_compute_dreg_to_dm_immmod() /* compute / dreg <- PM, immediate modify */ void adsp21062_device::sharcop_compute_pm_to_dreg_immmod() { - int cond = (m_opcode >> 33) & 0x1f; - int u = (m_opcode >> 38) & 0x1; - int dreg = (m_opcode >> 23) & 0xf; - int i = (m_opcode >> 41) & 0x7; - int mod = SIGN_EXTEND6((m_opcode >> 27) & 0x3f); - int compute = m_opcode & 0x7fffff; + int cond = (m_core->opcode >> 33) & 0x1f; + int u = (m_core->opcode >> 38) & 0x1; + int dreg = (m_core->opcode >> 23) & 0xf; + int i = (m_core->opcode >> 41) & 0x7; + int mod = SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f); + int compute = m_core->opcode & 0x7fffff; if (IF_CONDITION_CODE(cond)) { @@ -1590,12 +1552,12 @@ void adsp21062_device::sharcop_compute_pm_to_dreg_immmod() /* compute / dreg -> PM, immediate modify */ void adsp21062_device::sharcop_compute_dreg_to_pm_immmod() { - int cond = (m_opcode >> 33) & 0x1f; - int u = (m_opcode >> 38) & 0x1; - int dreg = (m_opcode >> 23) & 0xf; - int i = (m_opcode >> 41) & 0x7; - int mod = SIGN_EXTEND6((m_opcode >> 27) & 0x3f); - int compute = m_opcode & 0x7fffff; + int cond = (m_core->opcode >> 33) & 0x1f; + int u = (m_core->opcode >> 38) & 0x1; + int dreg = (m_core->opcode >> 23) & 0xf; + int i = (m_core->opcode >> 41) & 0x7; + int mod = SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f); + int compute = m_core->opcode & 0x7fffff; /* due to parallelity issues, source REG must be saved */ /* because the compute operation may change it */ @@ -1627,10 +1589,10 @@ void adsp21062_device::sharcop_compute_dreg_to_pm_immmod() /* compute / ureg <-> ureg */ void adsp21062_device::sharcop_compute_ureg_to_ureg() { - int src_ureg = (m_opcode >> 36) & 0xff; - int dst_ureg = (m_opcode >> 23) & 0xff; - int cond = (m_opcode >> 31) & 0x1f; - int compute = m_opcode & 0x7fffff; + int src_ureg = (m_core->opcode >> 36) & 0xff; + int dst_ureg = (m_core->opcode >> 23) & 0xff; + int cond = (m_core->opcode >> 31) & 0x1f; + int compute = m_core->opcode & 0x7fffff; if (IF_CONDITION_CODE(cond)) { @@ -1653,16 +1615,16 @@ void adsp21062_device::sharcop_compute_ureg_to_ureg() /* immediate shift / dreg <-> DM|PM */ void adsp21062_device::sharcop_imm_shift_dreg_dmpm() { - int i = (m_opcode >> 41) & 0x7; - int m = (m_opcode >> 38) & 0x7; - int g = (m_opcode >> 32) & 0x1; - int d = (m_opcode >> 31) & 0x1; - int dreg = (m_opcode >> 23) & 0xf; - int cond = (m_opcode >> 33) & 0x1f; - int data = ((m_opcode >> 8) & 0xff) | ((m_opcode >> 19) & 0xf00); - int shiftop = (m_opcode >> 16) & 0x3f; - int rn = (m_opcode >> 4) & 0xf; - int rx = (m_opcode & 0xf); + int i = (m_core->opcode >> 41) & 0x7; + int m = (m_core->opcode >> 38) & 0x7; + int g = (m_core->opcode >> 32) & 0x1; + int d = (m_core->opcode >> 31) & 0x1; + int dreg = (m_core->opcode >> 23) & 0xf; + int cond = (m_core->opcode >> 33) & 0x1f; + int data = ((m_core->opcode >> 8) & 0xff) | ((m_core->opcode >> 19) & 0xf00); + int shiftop = (m_core->opcode >> 16) & 0x3f; + int rn = (m_core->opcode >> 4) & 0xf; + int rx = (m_core->opcode & 0xf); if (IF_CONDITION_CODE(cond)) { @@ -1711,11 +1673,11 @@ void adsp21062_device::sharcop_imm_shift_dreg_dmpm() /* immediate shift */ void adsp21062_device::sharcop_imm_shift() { - int cond = (m_opcode >> 33) & 0x1f; - int data = ((m_opcode >> 8) & 0xff) | ((m_opcode >> 19) & 0xf00); - int shiftop = (m_opcode >> 16) & 0x3f; - int rn = (m_opcode >> 4) & 0xf; - int rx = (m_opcode & 0xf); + int cond = (m_core->opcode >> 33) & 0x1f; + int data = ((m_core->opcode >> 8) & 0xff) | ((m_core->opcode >> 19) & 0xf00); + int shiftop = (m_core->opcode >> 16) & 0x3f; + int rn = (m_core->opcode >> 4) & 0xf; + int rx = (m_core->opcode & 0xf); if (IF_CONDITION_CODE(cond)) { @@ -1729,11 +1691,11 @@ void adsp21062_device::sharcop_imm_shift() /* compute / modify */ void adsp21062_device::sharcop_compute_modify() { - int cond = (m_opcode >> 33) & 0x1f; - int compute = m_opcode & 0x7fffff; - int g = (m_opcode >> 38) & 0x1; - int m = (m_opcode >> 27) & 0x7; - int i = (m_opcode >> 30) & 0x7; + int cond = (m_core->opcode >> 33) & 0x1f; + int compute = m_core->opcode & 0x7fffff; + int g = (m_core->opcode >> 38) & 0x1; + int m = (m_core->opcode >> 27) & 0x7; + int i = (m_core->opcode >> 30) & 0x7; if (IF_CONDITION_CODE(cond)) { @@ -1761,22 +1723,22 @@ void adsp21062_device::sharcop_compute_modify() /* direct call to absolute address */ void adsp21062_device::sharcop_direct_call() { - int j = (m_opcode >> 26) & 0x1; - int cond = (m_opcode >> 33) & 0x1f; - UINT32 address = m_opcode & 0xffffff; + int j = (m_core->opcode >> 26) & 0x1; + int cond = (m_core->opcode >> 33) & 0x1f; + UINT32 address = m_core->opcode & 0xffffff; if (IF_CONDITION_CODE(cond)) { if (j) { - //PUSH_PC(m_pc+3); /* 1 instruction + 2 delayed instructions */ - PUSH_PC(m_nfaddr); /* 1 instruction + 2 delayed instructions */ + //PUSH_PC(m_core->pc+3); /* 1 instruction + 2 delayed instructions */ + PUSH_PC(m_core->nfaddr); /* 1 instruction + 2 delayed instructions */ CHANGE_PC_DELAYED(address); } else { - //PUSH_PC(m_pc+1); - PUSH_PC(m_daddr); + //PUSH_PC(m_core->pc+1); + PUSH_PC(m_core->daddr); CHANGE_PC(address); } } @@ -1785,11 +1747,11 @@ void adsp21062_device::sharcop_direct_call() /* direct jump to absolute address */ void adsp21062_device::sharcop_direct_jump() { - int la = (m_opcode >> 38) & 0x1; - int ci = (m_opcode >> 24) & 0x1; - int j = (m_opcode >> 26) & 0x1; - int cond = (m_opcode >> 33) & 0x1f; - UINT32 address = m_opcode & 0xffffff; + int la = (m_core->opcode >> 38) & 0x1; + int ci = (m_core->opcode >> 24) & 0x1; + int j = (m_core->opcode >> 26) & 0x1; + int cond = (m_core->opcode >> 33) & 0x1f; + UINT32 address = m_core->opcode & 0xffffff; if(IF_CONDITION_CODE(cond)) { @@ -1797,13 +1759,13 @@ void adsp21062_device::sharcop_direct_jump() if (ci) { // TODO: anything else? - if (m_status_stkp > 0) + if (m_core->status_stkp > 0) { POP_STATUS_STACK(); } - m_interrupt_active = 0; - m_irptl &= ~(1 << m_active_irq_num); + m_core->interrupt_active = 0; + m_core->irptl &= ~(1 << m_core->active_irq_num); } if (la) @@ -1829,21 +1791,21 @@ void adsp21062_device::sharcop_direct_jump() /* direct call to relative address */ void adsp21062_device::sharcop_relative_call() { - int j = (m_opcode >> 26) & 0x1; - int cond = (m_opcode >> 33) & 0x1f; - UINT32 address = m_opcode & 0xffffff; + int j = (m_core->opcode >> 26) & 0x1; + int cond = (m_core->opcode >> 33) & 0x1f; + UINT32 address = m_core->opcode & 0xffffff; if (IF_CONDITION_CODE(cond)) { if (j) { - PUSH_PC(m_pc+3); /* 1 instruction + 2 delayed instructions */ - CHANGE_PC_DELAYED(m_pc + SIGN_EXTEND24(address)); + PUSH_PC(m_core->pc+3); /* 1 instruction + 2 delayed instructions */ + CHANGE_PC_DELAYED(m_core->pc + SIGN_EXTEND24(address)); } else { - PUSH_PC(m_pc+1); - CHANGE_PC(m_pc + SIGN_EXTEND24(address)); + PUSH_PC(m_core->pc+1); + CHANGE_PC(m_core->pc + SIGN_EXTEND24(address)); } } } @@ -1851,11 +1813,11 @@ void adsp21062_device::sharcop_relative_call() /* direct jump to relative address */ void adsp21062_device::sharcop_relative_jump() { - int la = (m_opcode >> 38) & 0x1; - int ci = (m_opcode >> 24) & 0x1; - int j = (m_opcode >> 26) & 0x1; - int cond = (m_opcode >> 33) & 0x1f; - UINT32 address = m_opcode & 0xffffff; + int la = (m_core->opcode >> 38) & 0x1; + int ci = (m_core->opcode >> 24) & 0x1; + int j = (m_core->opcode >> 26) & 0x1; + int cond = (m_core->opcode >> 33) & 0x1f; + UINT32 address = m_core->opcode & 0xffffff; if (IF_CONDITION_CODE(cond)) { @@ -1863,13 +1825,13 @@ void adsp21062_device::sharcop_relative_jump() if (ci) { // TODO: anything else? - if (m_status_stkp > 0) + if (m_core->status_stkp > 0) { POP_STATUS_STACK(); } - m_interrupt_active = 0; - m_irptl &= ~(1 << m_active_irq_num); + m_core->interrupt_active = 0; + m_core->irptl &= ~(1 << m_core->active_irq_num); } if (la) @@ -1880,11 +1842,11 @@ void adsp21062_device::sharcop_relative_jump() if (j) { - CHANGE_PC_DELAYED(m_pc + SIGN_EXTEND24(address)); + CHANGE_PC_DELAYED(m_core->pc + SIGN_EXTEND24(address)); } else { - CHANGE_PC(m_pc + SIGN_EXTEND24(address)); + CHANGE_PC(m_core->pc + SIGN_EXTEND24(address)); } } } @@ -1895,26 +1857,26 @@ void adsp21062_device::sharcop_relative_jump() /* indirect jump */ void adsp21062_device::sharcop_indirect_jump() { - int la = (m_opcode >> 38) & 0x1; - int ci = (m_opcode >> 24) & 0x1; - int j = (m_opcode >> 26) & 0x1; - int e = (m_opcode >> 25) & 0x1; - int pmi = (m_opcode >> 30) & 0x7; - int pmm = (m_opcode >> 27) & 0x7; - int cond = (m_opcode >> 33) & 0x1f; - int compute = m_opcode & 0x7fffff; + int la = (m_core->opcode >> 38) & 0x1; + int ci = (m_core->opcode >> 24) & 0x1; + int j = (m_core->opcode >> 26) & 0x1; + int e = (m_core->opcode >> 25) & 0x1; + int pmi = (m_core->opcode >> 30) & 0x7; + int pmm = (m_core->opcode >> 27) & 0x7; + int cond = (m_core->opcode >> 33) & 0x1f; + int compute = m_core->opcode & 0x7fffff; // Clear Interrupt if (ci) { // TODO: anything else? - if (m_status_stkp > 0) + if (m_core->status_stkp > 0) { POP_STATUS_STACK(); } - m_interrupt_active = 0; - m_irptl &= ~(1 << m_active_irq_num); + m_core->interrupt_active = 0; + m_core->irptl &= ~(1 << m_core->active_irq_num); } if (e) /* IF...ELSE */ @@ -1974,12 +1936,12 @@ void adsp21062_device::sharcop_indirect_jump() /* indirect call */ void adsp21062_device::sharcop_indirect_call() { - int j = (m_opcode >> 26) & 0x1; - int e = (m_opcode >> 25) & 0x1; - int pmi = (m_opcode >> 30) & 0x7; - int pmm = (m_opcode >> 27) & 0x7; - int cond = (m_opcode >> 33) & 0x1f; - int compute = m_opcode & 0x7fffff; + int j = (m_core->opcode >> 26) & 0x1; + int e = (m_core->opcode >> 25) & 0x1; + int pmi = (m_core->opcode >> 30) & 0x7; + int pmm = (m_core->opcode >> 27) & 0x7; + int cond = (m_core->opcode >> 33) & 0x1f; + int compute = m_core->opcode & 0x7fffff; if (e) /* IF...ELSE */ { @@ -1987,14 +1949,14 @@ void adsp21062_device::sharcop_indirect_call() { if (j) { - //PUSH_PC(m_pc+3); /* 1 instruction + 2 delayed instructions */ - PUSH_PC(m_nfaddr); /* 1 instruction + 2 delayed instructions */ + //PUSH_PC(m_core->pc+3); /* 1 instruction + 2 delayed instructions */ + PUSH_PC(m_core->nfaddr); /* 1 instruction + 2 delayed instructions */ CHANGE_PC_DELAYED(PM_REG_I(pmi) + PM_REG_M(pmm)); } else { - //PUSH_PC(m_pc+1); - PUSH_PC(m_daddr); + //PUSH_PC(m_core->pc+1); + PUSH_PC(m_core->daddr); CHANGE_PC(PM_REG_I(pmi) + PM_REG_M(pmm)); } } @@ -2017,14 +1979,14 @@ void adsp21062_device::sharcop_indirect_call() if (j) { - //PUSH_PC(m_pc+3); /* 1 instruction + 2 delayed instructions */ - PUSH_PC(m_nfaddr); /* 1 instruction + 2 delayed instructions */ + //PUSH_PC(m_core->pc+3); /* 1 instruction + 2 delayed instructions */ + PUSH_PC(m_core->nfaddr); /* 1 instruction + 2 delayed instructions */ CHANGE_PC_DELAYED(PM_REG_I(pmi) + PM_REG_M(pmm)); } else { - //PUSH_PC(m_pc+1); - PUSH_PC(m_daddr); + //PUSH_PC(m_core->pc+1); + PUSH_PC(m_core->daddr); CHANGE_PC(PM_REG_I(pmi) + PM_REG_M(pmm)); } } @@ -2037,24 +1999,24 @@ void adsp21062_device::sharcop_indirect_call() /* indirect jump to relative address */ void adsp21062_device::sharcop_relative_jump_compute() { - int la = (m_opcode >> 38) & 0x1; - int ci = (m_opcode >> 24) & 0x1; - int j = (m_opcode >> 26) & 0x1; - int e = (m_opcode >> 25) & 0x1; - int cond = (m_opcode >> 33) & 0x1f; - int compute = m_opcode & 0x7fffff; + int la = (m_core->opcode >> 38) & 0x1; + int ci = (m_core->opcode >> 24) & 0x1; + int j = (m_core->opcode >> 26) & 0x1; + int e = (m_core->opcode >> 25) & 0x1; + int cond = (m_core->opcode >> 33) & 0x1f; + int compute = m_core->opcode & 0x7fffff; // Clear Interrupt if (ci) { // TODO: anything else? - if (m_status_stkp > 0) + if (m_core->status_stkp > 0) { POP_STATUS_STACK(); } - m_interrupt_active = 0; - m_irptl &= ~(1 << m_active_irq_num); + m_core->interrupt_active = 0; + m_core->irptl &= ~(1 << m_core->active_irq_num); } if (e) /* IF...ELSE */ @@ -2069,11 +2031,11 @@ void adsp21062_device::sharcop_relative_jump_compute() if (j) { - CHANGE_PC_DELAYED(m_pc + SIGN_EXTEND6((m_opcode >> 27) & 0x3f)); + CHANGE_PC_DELAYED(m_core->pc + SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f)); } else { - CHANGE_PC(m_pc + SIGN_EXTEND6((m_opcode >> 27) & 0x3f)); + CHANGE_PC(m_core->pc + SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f)); } } else @@ -2101,11 +2063,11 @@ void adsp21062_device::sharcop_relative_jump_compute() if (j) { - CHANGE_PC_DELAYED(m_pc + SIGN_EXTEND6((m_opcode >> 27) & 0x3f)); + CHANGE_PC_DELAYED(m_core->pc + SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f)); } else { - CHANGE_PC(m_pc + SIGN_EXTEND6((m_opcode >> 27) & 0x3f)); + CHANGE_PC(m_core->pc + SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f)); } } } @@ -2114,10 +2076,10 @@ void adsp21062_device::sharcop_relative_jump_compute() /* indirect call to relative address */ void adsp21062_device::sharcop_relative_call_compute() { - int j = (m_opcode >> 26) & 0x1; - int e = (m_opcode >> 25) & 0x1; - int cond = (m_opcode >> 33) & 0x1f; - int compute = m_opcode & 0x7fffff; + int j = (m_core->opcode >> 26) & 0x1; + int e = (m_core->opcode >> 25) & 0x1; + int cond = (m_core->opcode >> 33) & 0x1f; + int compute = m_core->opcode & 0x7fffff; if (e) /* IF...ELSE */ { @@ -2125,15 +2087,15 @@ void adsp21062_device::sharcop_relative_call_compute() { if (j) { - //PUSH_PC(m_pc+3); /* 1 instruction + 2 delayed instructions */ - PUSH_PC(m_nfaddr); /* 1 instruction + 2 delayed instructions */ - CHANGE_PC_DELAYED(m_pc + SIGN_EXTEND6((m_opcode >> 27) & 0x3f)); + //PUSH_PC(m_core->pc+3); /* 1 instruction + 2 delayed instructions */ + PUSH_PC(m_core->nfaddr); /* 1 instruction + 2 delayed instructions */ + CHANGE_PC_DELAYED(m_core->pc + SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f)); } else { - //PUSH_PC(m_pc+1); - PUSH_PC(m_daddr); - CHANGE_PC(m_pc + SIGN_EXTEND6((m_opcode >> 27) & 0x3f)); + //PUSH_PC(m_core->pc+1); + PUSH_PC(m_core->daddr); + CHANGE_PC(m_core->pc + SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f)); } } else @@ -2155,15 +2117,15 @@ void adsp21062_device::sharcop_relative_call_compute() if (j) { - //PUSH_PC(m_pc+3); /* 1 instruction + 2 delayed instructions */ - PUSH_PC(m_nfaddr); /* 1 instruction + 2 delayed instructions */ - CHANGE_PC_DELAYED(m_pc + SIGN_EXTEND6((m_opcode >> 27) & 0x3f)); + //PUSH_PC(m_core->pc+3); /* 1 instruction + 2 delayed instructions */ + PUSH_PC(m_core->nfaddr); /* 1 instruction + 2 delayed instructions */ + CHANGE_PC_DELAYED(m_core->pc + SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f)); } else { - //PUSH_PC(m_pc+1); - PUSH_PC(m_daddr); - CHANGE_PC(m_pc + SIGN_EXTEND6((m_opcode >> 27) & 0x3f)); + //PUSH_PC(m_core->pc+1); + PUSH_PC(m_core->daddr); + CHANGE_PC(m_core->pc + SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f)); } } } @@ -2175,13 +2137,13 @@ void adsp21062_device::sharcop_relative_call_compute() /* indirect jump / compute / dreg <-> DM */ void adsp21062_device::sharcop_indirect_jump_compute_dreg_dm() { - int d = (m_opcode >> 44) & 0x1; - int dmi = (m_opcode >> 41) & 0x7; - int dmm = (m_opcode >> 38) & 0x7; - int pmi = (m_opcode >> 30) & 0x7; - int pmm = (m_opcode >> 27) & 0x7; - int cond = (m_opcode >> 33) & 0x1f; - int dreg = (m_opcode >> 23) & 0xf; + int d = (m_core->opcode >> 44) & 0x1; + int dmi = (m_core->opcode >> 41) & 0x7; + int dmm = (m_core->opcode >> 38) & 0x7; + int pmi = (m_core->opcode >> 30) & 0x7; + int pmm = (m_core->opcode >> 27) & 0x7; + int cond = (m_core->opcode >> 33) & 0x1f; + int dreg = (m_core->opcode >> 23) & 0xf; if (IF_CONDITION_CODE(cond)) { @@ -2189,7 +2151,7 @@ void adsp21062_device::sharcop_indirect_jump_compute_dreg_dm() } else { - UINT32 compute = m_opcode & 0x7fffff; + UINT32 compute = m_core->opcode & 0x7fffff; /* due to parallelity issues, source REG must be saved */ /* because the compute operation may change it */ UINT32 parallel_dreg = REG(dreg); @@ -2220,19 +2182,19 @@ void adsp21062_device::sharcop_indirect_jump_compute_dreg_dm() /* relative jump / compute / dreg <-> DM */ void adsp21062_device::sharcop_relative_jump_compute_dreg_dm() { - int d = (m_opcode >> 44) & 0x1; - int dmi = (m_opcode >> 41) & 0x7; - int dmm = (m_opcode >> 38) & 0x7; - int cond = (m_opcode >> 33) & 0x1f; - int dreg = (m_opcode >> 23) & 0xf; + int d = (m_core->opcode >> 44) & 0x1; + int dmi = (m_core->opcode >> 41) & 0x7; + int dmm = (m_core->opcode >> 38) & 0x7; + int cond = (m_core->opcode >> 33) & 0x1f; + int dreg = (m_core->opcode >> 23) & 0xf; if (IF_CONDITION_CODE(cond)) { - CHANGE_PC(m_pc + SIGN_EXTEND6((m_opcode >> 27) & 0x3f)); + CHANGE_PC(m_core->pc + SIGN_EXTEND6((m_core->opcode >> 27) & 0x3f)); } else { - UINT32 compute = m_opcode & 0x7fffff; + UINT32 compute = m_core->opcode & 0x7fffff; /* due to parallelity issues, source REG must be saved */ /* because the compute operation may change it */ UINT32 parallel_dreg = REG(dreg); @@ -2263,11 +2225,11 @@ void adsp21062_device::sharcop_relative_jump_compute_dreg_dm() /* return from subroutine / compute */ void adsp21062_device::sharcop_rts() { - int cond = (m_opcode >> 33) & 0x1f; - int j = (m_opcode >> 26) & 0x1; - int e = (m_opcode >> 25) & 0x1; - //int lr = (m_opcode >> 24) & 0x1; - int compute = m_opcode & 0x7fffff; + int cond = (m_core->opcode >> 33) & 0x1f; + int j = (m_core->opcode >> 26) & 0x1; + int e = (m_core->opcode >> 25) & 0x1; + //int lr = (m_core->opcode >> 24) & 0x1; + int compute = m_core->opcode & 0x7fffff; //if(lr) // fatalerror("SHARC: rts: loop reentry not implemented!\n"); @@ -2320,12 +2282,12 @@ void adsp21062_device::sharcop_rts() /* return from interrupt / compute */ void adsp21062_device::sharcop_rti() { - int cond = (m_opcode >> 33) & 0x1f; - int j = (m_opcode >> 26) & 0x1; - int e = (m_opcode >> 25) & 0x1; - int compute = m_opcode & 0x7fffff; + int cond = (m_core->opcode >> 33) & 0x1f; + int j = (m_core->opcode >> 26) & 0x1; + int e = (m_core->opcode >> 25) & 0x1; + int compute = m_core->opcode & 0x7fffff; - m_irptl &= ~(1 << m_active_irq_num); + m_core->irptl &= ~(1 << m_core->active_irq_num); if(e) /* IF...ELSE */ { @@ -2368,12 +2330,12 @@ void adsp21062_device::sharcop_rti() } } - if (m_status_stkp > 0) + if (m_core->status_stkp > 0) { POP_STATUS_STACK(); } - m_interrupt_active = 0; + m_core->interrupt_active = 0; check_interrupts(); } @@ -2383,9 +2345,9 @@ void adsp21062_device::sharcop_rti() /* do until counter expired, LCNTR immediate */ void adsp21062_device::sharcop_do_until_counter_imm() { - UINT16 data = (UINT16)(m_opcode >> 24); - int offset = SIGN_EXTEND24(m_opcode & 0xffffff); - UINT32 address = m_pc + offset; + UINT16 data = (UINT16)(m_core->opcode >> 24); + int offset = SIGN_EXTEND24(m_core->opcode & 0xffffff); + UINT32 address = m_core->pc + offset; int type; int cond = 0xf; /* until LCE (loop counter expired */ int distance = abs(offset); @@ -2403,11 +2365,11 @@ void adsp21062_device::sharcop_do_until_counter_imm() type = 3; } - m_lcntr = data; - if (m_lcntr > 0) + m_core->lcntr = data; + if (m_core->lcntr > 0) { - PUSH_PC(m_pc+1); - PUSH_LOOP(address, cond, type, m_lcntr); + PUSH_PC(m_core->pc+1); + PUSH_LOOP(address, cond, type, m_core->lcntr); } } @@ -2417,9 +2379,9 @@ void adsp21062_device::sharcop_do_until_counter_imm() /* do until counter expired, LCNTR from UREG */ void adsp21062_device::sharcop_do_until_counter_ureg() { - int ureg = (m_opcode >> 32) & 0xff; - int offset = SIGN_EXTEND24(m_opcode & 0xffffff); - UINT32 address = m_pc + offset; + int ureg = (m_core->opcode >> 32) & 0xff; + int offset = SIGN_EXTEND24(m_core->opcode & 0xffffff); + UINT32 address = m_core->pc + offset; int type; int cond = 0xf; /* until LCE (loop counter expired */ int distance = abs(offset); @@ -2437,11 +2399,11 @@ void adsp21062_device::sharcop_do_until_counter_ureg() type = 3; } - m_lcntr = GET_UREG(ureg); - if (m_lcntr > 0) + m_core->lcntr = GET_UREG(ureg); + if (m_core->lcntr > 0) { - PUSH_PC(m_pc+1); - PUSH_LOOP(address, cond, type, m_lcntr); + PUSH_PC(m_core->pc+1); + PUSH_LOOP(address, cond, type, m_core->lcntr); } } @@ -2451,11 +2413,11 @@ void adsp21062_device::sharcop_do_until_counter_ureg() /* do until */ void adsp21062_device::sharcop_do_until() { - int cond = (m_opcode >> 33) & 0x1f; - int offset = SIGN_EXTEND24(m_opcode & 0xffffff); - UINT32 address = (m_pc + offset); + int cond = (m_core->opcode >> 33) & 0x1f; + int offset = SIGN_EXTEND24(m_core->opcode & 0xffffff); + UINT32 address = (m_core->pc + offset); - PUSH_PC(m_pc+1); + PUSH_PC(m_core->pc+1); PUSH_LOOP(address, cond, 0, 0); } @@ -2465,8 +2427,8 @@ void adsp21062_device::sharcop_do_until() /* ureg <- DM (direct addressing) */ void adsp21062_device::sharcop_dm_to_ureg_direct() { - int ureg = (m_opcode >> 32) & 0xff; - UINT32 address = (UINT32)(m_opcode); + int ureg = (m_core->opcode >> 32) & 0xff; + UINT32 address = (UINT32)(m_core->opcode); SET_UREG(ureg, dm_read32(address)); } @@ -2474,8 +2436,8 @@ void adsp21062_device::sharcop_dm_to_ureg_direct() /* ureg -> DM (direct addressing) */ void adsp21062_device::sharcop_ureg_to_dm_direct() { - int ureg = (m_opcode >> 32) & 0xff; - UINT32 address = (UINT32)(m_opcode); + int ureg = (m_core->opcode >> 32) & 0xff; + UINT32 address = (UINT32)(m_core->opcode); dm_write32(address, GET_UREG(ureg)); } @@ -2483,12 +2445,12 @@ void adsp21062_device::sharcop_ureg_to_dm_direct() /* ureg <- PM (direct addressing) */ void adsp21062_device::sharcop_pm_to_ureg_direct() { - int ureg = (m_opcode >> 32) & 0xff; - UINT32 address = (UINT32)(m_opcode); + int ureg = (m_core->opcode >> 32) & 0xff; + UINT32 address = (UINT32)(m_core->opcode); if (ureg == 0xdb) // PX is 48-bit { - m_px = pm_read48(address); + m_core->px = pm_read48(address); } else { @@ -2499,12 +2461,12 @@ void adsp21062_device::sharcop_pm_to_ureg_direct() /* ureg -> PM (direct addressing) */ void adsp21062_device::sharcop_ureg_to_pm_direct() { - int ureg = (m_opcode >> 32) & 0xff; - UINT32 address = (UINT32)(m_opcode); + int ureg = (m_core->opcode >> 32) & 0xff; + UINT32 address = (UINT32)(m_core->opcode); if (ureg == 0xdb) // PX is 48-bit { - pm_write48(address, m_px); + pm_write48(address, m_core->px); } else { @@ -2518,9 +2480,9 @@ void adsp21062_device::sharcop_ureg_to_pm_direct() /* ureg <- DM (indirect addressing) */ void adsp21062_device::sharcop_dm_to_ureg_indirect() { - int ureg = (m_opcode >> 32) & 0xff; - UINT32 offset = (UINT32)m_opcode; - int i = (m_opcode >> 41) & 0x7; + int ureg = (m_core->opcode >> 32) & 0xff; + UINT32 offset = (UINT32)m_core->opcode; + int i = (m_core->opcode >> 41) & 0x7; SET_UREG(ureg, dm_read32(DM_REG_I(i) + offset)); } @@ -2528,9 +2490,9 @@ void adsp21062_device::sharcop_dm_to_ureg_indirect() /* ureg -> DM (indirect addressing) */ void adsp21062_device::sharcop_ureg_to_dm_indirect() { - int ureg = (m_opcode >> 32) & 0xff; - UINT32 offset = (UINT32)m_opcode; - int i = (m_opcode >> 41) & 0x7; + int ureg = (m_core->opcode >> 32) & 0xff; + UINT32 offset = (UINT32)m_core->opcode; + int i = (m_core->opcode >> 41) & 0x7; dm_write32(DM_REG_I(i) + offset, GET_UREG(ureg)); } @@ -2538,13 +2500,13 @@ void adsp21062_device::sharcop_ureg_to_dm_indirect() /* ureg <- PM (indirect addressing) */ void adsp21062_device::sharcop_pm_to_ureg_indirect() { - int ureg = (m_opcode >> 32) & 0xff; - UINT32 offset = m_opcode & 0xffffff; - int i = (m_opcode >> 41) & 0x7; + int ureg = (m_core->opcode >> 32) & 0xff; + UINT32 offset = m_core->opcode & 0xffffff; + int i = (m_core->opcode >> 41) & 0x7; if (ureg == 0xdb) /* PX is 48-bit */ { - m_px = pm_read48(PM_REG_I(i) + offset); + m_core->px = pm_read48(PM_REG_I(i) + offset); } else { @@ -2555,13 +2517,13 @@ void adsp21062_device::sharcop_pm_to_ureg_indirect() /* ureg -> PM (indirect addressing) */ void adsp21062_device::sharcop_ureg_to_pm_indirect() { - int ureg = (m_opcode >> 32) & 0xff; - UINT32 offset = (UINT32)m_opcode; - int i = (m_opcode >> 41) & 0x7; + int ureg = (m_core->opcode >> 32) & 0xff; + UINT32 offset = (UINT32)m_core->opcode; + int i = (m_core->opcode >> 41) & 0x7; if (ureg == 0xdb) /* PX is 48-bit */ { - pm_write48(PM_REG_I(i) + offset, m_px); + pm_write48(PM_REG_I(i) + offset, m_core->px); } else { @@ -2575,10 +2537,10 @@ void adsp21062_device::sharcop_ureg_to_pm_indirect() /* immediate data -> DM|PM */ void adsp21062_device::sharcop_imm_to_dmpm() { - int i = (m_opcode >> 41) & 0x7; - int m = (m_opcode >> 38) & 0x7; - int g = (m_opcode >> 37) & 0x1; - UINT32 data = (UINT32)m_opcode; + int i = (m_core->opcode >> 41) & 0x7; + int m = (m_core->opcode >> 38) & 0x7; + int g = (m_core->opcode >> 37) & 0x1; + UINT32 data = (UINT32)m_core->opcode; if (g) { @@ -2602,8 +2564,8 @@ void adsp21062_device::sharcop_imm_to_dmpm() /* immediate data -> ureg */ void adsp21062_device::sharcop_imm_to_ureg() { - int ureg = (m_opcode >> 32) & 0xff; - UINT32 data = (UINT32)m_opcode; + int ureg = (m_core->opcode >> 32) & 0xff; + UINT32 data = (UINT32)m_core->opcode; SET_UREG(ureg, data); } @@ -2614,9 +2576,9 @@ void adsp21062_device::sharcop_imm_to_ureg() /* system register bit manipulation */ void adsp21062_device::sharcop_sysreg_bitop() { - int bop = (m_opcode >> 37) & 0x7; - int sreg = (m_opcode >> 32) & 0xf; - UINT32 data = (UINT32)m_opcode; + int bop = (m_core->opcode >> 37) & 0x7; + int sreg = (m_core->opcode >> 32) & 0xf; + UINT32 data = (UINT32)m_core->opcode; UINT32 src = GET_UREG(0x70 | sreg); @@ -2641,11 +2603,11 @@ void adsp21062_device::sharcop_sysreg_bitop() { if ((src & data) == data) { - m_astat |= BTF; + m_core->astat |= BTF; } else { - m_astat &= ~BTF; + m_core->astat &= ~BTF; } break; } @@ -2653,11 +2615,11 @@ void adsp21062_device::sharcop_sysreg_bitop() { if (src == data) { - m_astat |= BTF; + m_core->astat |= BTF; } else { - m_astat &= ~BTF; + m_core->astat &= ~BTF; } break; } @@ -2675,9 +2637,9 @@ void adsp21062_device::sharcop_sysreg_bitop() /* I register modify */ void adsp21062_device::sharcop_modify() { - int g = (m_opcode >> 38) & 0x1; - int i = (m_opcode >> 32) & 0x7; - INT32 data = (m_opcode); + int g = (m_core->opcode >> 38) & 0x1; + int i = (m_core->opcode >> 32) & 0x7; + INT32 data = (m_core->opcode); if (g) // PM { @@ -2706,29 +2668,29 @@ void adsp21062_device::sharcop_bit_reverse() /* push/pop stacks / flush cache */ void adsp21062_device::sharcop_push_pop_stacks() { - if (m_opcode & U64(0x008000000000)) + if (m_core->opcode & U64(0x008000000000)) { fatalerror("sharcop_push_pop_stacks: push loop not implemented\n"); } - if (m_opcode & U64(0x004000000000)) + if (m_core->opcode & U64(0x004000000000)) { fatalerror("sharcop_push_pop_stacks: pop loop not implemented\n"); } - if (m_opcode & U64(0x002000000000)) + if (m_core->opcode & U64(0x002000000000)) { //fatalerror("sharcop_push_pop_stacks: push sts not implemented\n"); PUSH_STATUS_STACK(); } - if (m_opcode & U64(0x001000000000)) + if (m_core->opcode & U64(0x001000000000)) { //fatalerror("sharcop_push_pop_stacks: pop sts not implemented\n"); POP_STATUS_STACK(); } - if (m_opcode & U64(0x000800000000)) + if (m_core->opcode & U64(0x000800000000)) { - PUSH_PC(m_pcstk); + PUSH_PC(m_core->pcstk); } - if (m_opcode & U64(0x000400000000)) + if (m_core->opcode & U64(0x000400000000)) { POP_PC(); } @@ -2746,13 +2708,13 @@ void adsp21062_device::sharcop_nop() void adsp21062_device::sharcop_idle() { - //CHANGE_PC(m_pc); + //CHANGE_PC(m_core->pc); - m_daddr = m_pc; - m_faddr = m_pc+1; - m_nfaddr = m_pc+2; + m_core->daddr = m_core->pc; + m_core->faddr = m_core->pc+1; + m_core->nfaddr = m_core->pc+2; - m_idle = 1; + m_core->idle = 1; } /*****************************************************************************/ @@ -2761,7 +2723,7 @@ void adsp21062_device::sharcop_unimplemented() { extern CPU_DISASSEMBLE(sharc); char dasm[1000]; - CPU_DISASSEMBLE_NAME(sharc)(nullptr, dasm, m_pc, nullptr, nullptr, 0); - osd_printf_debug("SHARC: %08X: %s\n", m_pc, dasm); - fatalerror("SHARC: Unimplemented opcode %04X%08X at %08X\n", (UINT16)(m_opcode >> 32), (UINT32)(m_opcode), m_pc); + CPU_DISASSEMBLE_NAME(sharc)(nullptr, dasm, m_core->pc, nullptr, nullptr, 0); + osd_printf_debug("SHARC: %08X: %s\n", m_core->pc, dasm); + fatalerror("SHARC: Unimplemented opcode %04X%08X at %08X\n", (UINT16)(m_core->opcode >> 32), (UINT32)(m_core->opcode), m_core->pc); } From cc87a10563fb115e6d6366efd2e73faf687aebdc Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Sat, 28 May 2016 13:09:29 -0300 Subject: [PATCH 02/14] Me Tarzan, you Jane.... --- src/mame/drivers/magicfly.cpp | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/mame/drivers/magicfly.cpp b/src/mame/drivers/magicfly.cpp index 149f3864806..4dec074f4ed 100644 --- a/src/mame/drivers/magicfly.cpp +++ b/src/mame/drivers/magicfly.cpp @@ -253,23 +253,23 @@ ******************************************************************************* - After check the last bit of $1800, code jump into a loop ($DA30)... + After check the last bit of $1800, the code jumps into a loop ($DA30)... BEHAVIOUR OF BOOT CHECK (magicfly): - 1) Fill the video RAM with spaces (0x20), and color RAM with 0x15. - 2) Check bit 7 of $1800 (video RAM, 1st offset) if activated. + 1) Fills the video RAM with spaces (0x20), and color RAM with 0x15. + 2) Checks bit 7 of $1800 (video RAM, 1st offset) if it's active. 3) If true, go to $DA30 (incremented fill infinite loop). - 4) If not, fill the video RAM with spaces (0x20), and color RAM with 0x1F. - 5) Check bit 7 of $1800 (video RAM, 1st offset) if activated. + 4) If not, fills the video RAM with spaces (0x20), and color RAM with 0x1F. + 5) Checks bit 7 of $1800 (video RAM, 1st offset) if it's active. 6) If not, go to $DA30 (incremented fill infinite loop). - 7) If true, returns and continue to NORMAL GAME. + 7) If true, returns and continues to NORMAL GAME. Since bits 0-2 are for regular colors, seems that bit 3 in color RAM (bit 2 for 7mezzo) is mirrored to bit 7 through a kind of device. This is the only explanation I found to allow a normal boot, and seems to be - created as a protection method that don't allow owners to use a ROM-swap on + created as a protection method that doesn't allow owners to do a ROM-swap on their boards, converting from one game to another. From a2c71b889f572978c3d1d3f77fd53accc933f034 Mon Sep 17 00:00:00 2001 From: ppriest Date: Sat, 28 May 2016 19:59:21 +0100 Subject: [PATCH 03/14] Create .drone.yml Add file for Windows/Docker CI for MSYS2/MingW64 --- .drone.yml | 7 +++++++ 1 file changed, 7 insertions(+) create mode 100644 .drone.yml diff --git a/.drone.yml b/.drone.yml new file mode 100644 index 00000000000..d0de9eb5961 --- /dev/null +++ b/.drone.yml @@ -0,0 +1,7 @@ +# Build configure for https://www.tea-ci.org (fork of Drone CI with Msys2 support) +build: + image: teaci/msys64 + shell: mingw64 + pull: true + commands: + - make SUBTARGET=tiny MINGW64=/c/msys64/mingw64 From 093116cc875c773dc17ce2d4cb383bd73791e0ef Mon Sep 17 00:00:00 2001 From: Scott Stone Date: Sat, 28 May 2016 17:29:58 -0400 Subject: [PATCH 04/14] Compile fix (uninitialized variable) (nw) --- src/devices/cpu/sharc/sharcdrc.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp index 2f7f3e0fbcb..9fc09c87bb0 100644 --- a/src/devices/cpu/sharc/sharcdrc.cpp +++ b/src/devices/cpu/sharc/sharcdrc.cpp @@ -2189,7 +2189,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi case 0x04: // compute / modify |000|00100| { int cond = (opcode >> 33) & 0x1f; - int compute = opcode & 0x7fffff; +// int compute = opcode & 0x7fffff; int g = (opcode >> 38) & 0x1; int m = (opcode >> 27) & 0x7; int i = (opcode >> 30) & 0x7; @@ -2292,7 +2292,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi int pmi = (opcode >> 30) & 0x7; int pmm = (opcode >> 27) & 0x7; int cond = (opcode >> 33) & 0x1f; - int compute = opcode & 0x7fffff; +// int compute = opcode & 0x7fffff; if (e) { @@ -2354,7 +2354,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi int j = (opcode >> 26) & 0x1; int e = (opcode >> 25) & 0x1; int cond = (opcode >> 33) & 0x1f; - int compute = opcode & 0x7fffff; +// int compute = opcode & 0x7fffff; if (e) { @@ -2410,7 +2410,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi int j = (opcode >> 26) & 0x1; int e = (opcode >> 25) & 0x1; //int lr = (opcode >> 24) & 0x1; - int compute = opcode & 0x7fffff; +// int compute = opcode & 0x7fffff; // TODO: loop re-entry @@ -2455,7 +2455,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi int cond = (opcode >> 33) & 0x1f; int j = (opcode >> 26) & 0x1; int e = (opcode >> 25) & 0x1; - int compute = opcode & 0x7fffff; +// int compute = opcode & 0x7fffff; code_label skip_pop = compiler->labelnum++; From d6bcc086f95ea892ae5b5f7b380c4083b20f8617 Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 29 May 2016 00:58:28 +0200 Subject: [PATCH 05/14] New clone added ----------------- Electronic Battleship (1982 version) [hap, Sean Riddle] --- src/mame/drivers/hh_cop400.cpp | 192 +++++++++++++++++++++++++--- src/mame/layout/bship82.lay | 223 +++++++++++++++++++++++++++++++++ src/mame/mame.lst | 1 + 3 files changed, 401 insertions(+), 15 deletions(-) create mode 100644 src/mame/layout/bship82.lay diff --git a/src/mame/drivers/hh_cop400.cpp b/src/mame/drivers/hh_cop400.cpp index bbd409c0542..4f4eceeb301 100644 --- a/src/mame/drivers/hh_cop400.cpp +++ b/src/mame/drivers/hh_cop400.cpp @@ -15,8 +15,10 @@ #include "emu.h" #include "cpu/cop400/cop400.h" #include "sound/speaker.h" +#include "sound/dac.h" // internal artwork +#include "bship82.lh" // clickable #include "ctstein.lh" // clickable #include "einvaderc.lh" // test-layout(but still playable) #include "funjacks.lh" @@ -53,7 +55,7 @@ public: int m_sk; // MCU SK line state UINT16 m_inp_mux; // multiplexed inputs mask - UINT8 read_inputs(int columns); + UINT16 read_inputs(int columns); // display common int m_display_wait; // led/lamp off-delay in microseconds (default 33ms) @@ -92,7 +94,7 @@ void hh_cop400_state::machine_start() m_d = 0; m_so = 0; m_sk = 0; - m_inp_mux = 0; + m_inp_mux = ~0; // register for savestates save_item(NAME(m_display_maxy)); @@ -224,14 +226,14 @@ void hh_cop400_state::display_matrix(int maxx, int maxy, UINT32 setx, UINT32 set // generic input handlers -UINT8 hh_cop400_state::read_inputs(int columns) +UINT16 hh_cop400_state::read_inputs(int columns) { // active low - UINT8 ret = 0xff; + UINT16 ret = 0xffff; // read selected input rows for (int i = 0; i < columns; i++) - if (m_inp_mux >> i & 1) + if (~m_inp_mux >> i & 1) ret &= m_inp_matrix[i]->read(); return ret; @@ -274,7 +276,7 @@ public: WRITE8_MEMBER(ctstein_state::write_g) { // G0-G2: input mux - m_inp_mux = ~data & 7; + m_inp_mux = data & 7; } WRITE8_MEMBER(ctstein_state::write_l) @@ -322,7 +324,7 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( ctstein, ctstein_state ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", COP421, 860000) // approximation - RC osc. R=12K to +6V, C=100pf to GND + MCFG_CPU_ADD("maincpu", COP421, 860000) // approximation - RC osc. R=12K, C=100pf MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_COP400_WRITE_G_CB(WRITE8(ctstein_state, write_g)) MCFG_COP400_WRITE_L_CB(WRITE8(ctstein_state, write_l)) @@ -380,7 +382,7 @@ WRITE8_MEMBER(h2hbaskb_state::write_d) WRITE8_MEMBER(h2hbaskb_state::write_g) { // G: led select, input mux - m_inp_mux = ~data; + m_inp_mux = data; m_g = data & 0xf; } @@ -451,7 +453,7 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( h2hbaskb, h2hbaskb_state ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", COP420, 1600000) // approximation - RC osc. R=43K to +9V, C=101pf to GND + MCFG_CPU_ADD("maincpu", COP420, 1600000) // approximation - RC osc. R=43K, C=101pf MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_COP400_WRITE_D_CB(WRITE8(h2hbaskb_state, write_d)) MCFG_COP400_WRITE_G_CB(WRITE8(h2hbaskb_state, write_g)) @@ -566,7 +568,7 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( einvaderc, einvaderc_state ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", COP444, 1000000) // approximation - RC osc. R=47K to +9V, C=100pf to GND(-9V) + MCFG_CPU_ADD("maincpu", COP444, 1000000) // approximation - RC osc. R=47K, C=100pf MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_COP400_READ_IN_CB(IOPORT("IN.0")) MCFG_COP400_WRITE_D_CB(WRITE8(einvaderc_state, write_d)) @@ -615,7 +617,8 @@ public: WRITE8_MEMBER(funjacks_state::write_d) { // D: led grid + input mux - m_d = m_inp_mux = data ^ 0xf; + m_inp_mux = data; + m_d = data ^ 0xf; display_matrix(2, 4, m_l, m_d); } @@ -837,7 +840,7 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( plus1, plus1_state ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", COP410, 1000000) // approximation - RC osc. R=51K to +5V, C=100pf to GND + MCFG_CPU_ADD("maincpu", COP410, 1000000) // approximation - RC osc. R=51K, C=100pf MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true) // guessed MCFG_COP400_WRITE_D_CB(WRITE8(plus1_state, write_d)) MCFG_COP400_READ_G_CB(IOPORT("IN.0")) @@ -929,7 +932,7 @@ WRITE_LINE_MEMBER(lightfgt_state::write_sk) READ8_MEMBER(lightfgt_state::read_g) { // G: multiplexed inputs - m_inp_mux = (m_so | m_d << 1) ^ 0x1f; + m_inp_mux = m_d << 1 | m_so; return read_inputs(5); } @@ -971,7 +974,7 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( lightfgt, lightfgt_state ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", COP421, 950000) // approximation - RC osc. R=82K to +6V, C=56pf to GND(-6V) + MCFG_CPU_ADD("maincpu", COP421, 950000) // approximation - RC osc. R=82K, C=56pf MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_COP400_WRITE_SO_CB(WRITELINE(lightfgt_state, write_so)) MCFG_COP400_WRITE_D_CB(WRITE8(lightfgt_state, write_d)) @@ -992,6 +995,155 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Milton Bradley Electronic Battleship (1982 version) + * COP420 MCU label COP420-JWE/N + + This is a simplified hardware revision to the 1977/1979 version. The game + board looks almost identical. + +***************************************************************************/ + +class bship82_state : public hh_cop400_state +{ +public: + bship82_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_cop400_state(mconfig, type, tag), + m_dac(*this, "dac") + { } + + required_device m_dac; + + DECLARE_WRITE8_MEMBER(write_d); + DECLARE_WRITE8_MEMBER(write_g); + DECLARE_READ8_MEMBER(read_l); + DECLARE_READ8_MEMBER(read_in); + DECLARE_WRITE_LINE_MEMBER(write_so); +}; + +// handlers + +WRITE8_MEMBER(bship82_state::write_d) +{ + // D: input mux + m_inp_mux = data; +} + +WRITE8_MEMBER(bship82_state::write_g) +{ + // G: 4-bit signed DAC + if (~data & 8) data ^= 7; + m_dac->write_signed8(data << 4); +} + +READ8_MEMBER(bship82_state::read_l) +{ + // L: multiplexed inputs + return read_inputs(4) & 0xff; +} + +READ8_MEMBER(bship82_state::read_in) +{ + // IN: multiplexed inputs + return read_inputs(4) >> 8 & 0xf; +} + +WRITE_LINE_MEMBER(bship82_state::write_so) +{ + // SO: led + display_matrix(1, 1, state, 1); +} + + +// config + +static INPUT_PORTS_START( bship82 ) + PORT_START("IN.0") // D0 ports L,IN + PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_BACKSPACE) PORT_NAME("P1 Clear Last Entry") // CLE + PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_A) PORT_NAME("P1 A") + PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_B) PORT_NAME("P1 B") + PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_C) PORT_NAME("P1 C") + PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_D) PORT_NAME("P1 D") + PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_E) PORT_NAME("P1 E") + PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_F) PORT_NAME("P1 F") + PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_G) PORT_NAME("P1 G") + PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_H) PORT_NAME("P1 H") + PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_I) PORT_NAME("P1 I") + PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_J) PORT_NAME("P1 J") + PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("IN.1") // D1 ports L,IN + PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_DEL) PORT_NAME("P1 Clear Memory") // CM + PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("P1 1") + PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("P1 2") + PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("P1 3") + PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("P1 4") + PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("P1 5") + PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("P1 6") + PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_7) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("P1 7") + PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_8) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("P1 8") + PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) PORT_CODE(KEYCODE_9_PAD) PORT_NAME("P1 9") + PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_0) PORT_CODE(KEYCODE_0_PAD) PORT_NAME("P1 10") + PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_ENTER) PORT_CODE(KEYCODE_ENTER_PAD) PORT_NAME("P1 Fire") + + PORT_START("IN.2") // D2 ports L,IN + PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Clear Last Entry") // CLE + PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 A") + PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 B") + PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 C") + PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 D") + PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 E") + PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 F") + PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 G") + PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 H") + PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 I") + PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 J") + PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("IN.3") // D3 ports L,IN + PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Clear Memory") // CM + PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 1") + PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 2") + PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 3") + PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 4") + PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 5") + PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 6") + PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 7") + PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 8") + PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 9") + PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 10") + PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("P2 Fire") + + PORT_START("IN.4") // SI + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_TOGGLE PORT_CODE(KEYCODE_F1) PORT_NAME("Load/Go") // switch +INPUT_PORTS_END + +static MACHINE_CONFIG_START( bship82, bship82_state ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", COP420, 3000000) // approximation - RC osc. R=14K, C=100pf + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed + MCFG_COP400_WRITE_D_CB(WRITE8(bship82_state, write_d)) + MCFG_COP400_WRITE_G_CB(WRITE8(bship82_state, write_g)) + MCFG_COP400_READ_L_CB(READ8(bship82_state, read_l)) + MCFG_COP400_READ_IN_CB(READ8(bship82_state, read_in)) + MCFG_COP400_WRITE_SO_CB(WRITELINE(bship82_state, write_so)) + MCFG_COP400_READ_SI_CB(IOPORT("IN.4")) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_cop400_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_bship82) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_DAC_ADD("dac") + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Game driver(s) @@ -1040,6 +1192,12 @@ ROM_START( lightfgt ) ROM_END +ROM_START( bship82 ) + ROM_REGION( 0x0400, "maincpu", 0 ) + ROM_LOAD( "cop420-jwe_n", 0x0000, 0x0400, CRC(5ea8111a) SHA1(34931463b806b48dce4f8ae2361512510bae0ebf) ) +ROM_END + + /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY, FULLNAME, FLAGS */ CONS( 1979, ctstein, 0, 0, ctstein, ctstein, driver_device, 0, "Castle Toy", "Einstein (Castle Toy)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) @@ -1051,5 +1209,9 @@ CONS( 1981, einvaderc, einvader, 0, einvaderc, einvaderc, driver_device, 0, "Ent CONS( 1979, funjacks, 0, 0, funjacks, funjacks, driver_device, 0, "Mattel", "Funtronics Jacks", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) CONS( 1979, funrlgl, 0, 0, funrlgl, funrlgl, driver_device, 0, "Mattel", "Funtronics Red Light Green Light", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -CONS( 1980, plus1, 0, 0, plus1, plus1, driver_device, 0, "Milton Bradley", "Plus One", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +CONS( 1980, plus1, 0, 0, plus1, plus1, driver_device, 0, "Milton Bradley", "Plus One", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // *** CONS( 1981, lightfgt, 0, 0, lightfgt, lightfgt, driver_device, 0, "Milton Bradley", "Lightfight", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) +CONS( 1982, bship82, bship, 0, bship82, bship82, driver_device, 0, "Milton Bradley", "Electronic Battleship (1982 version)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // *** + +// ***: As far as MAME is concerned, the game is emulated fine. But for it to be playable, it requires interaction +// with other, unemulatable, things eg. game board/pieces, playing cards, pen & paper, etc. diff --git a/src/mame/layout/bship82.lay b/src/mame/layout/bship82.lay new file mode 100644 index 00000000000..625973fabd7 --- /dev/null +++ b/src/mame/layout/bship82.lay @@ -0,0 +1,223 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/mame.lst b/src/mame/mame.lst index cfcb221225e..fb5f403ba56 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -13947,6 +13947,7 @@ hexion // GX122 (c) 1992 hexionb // bootleg @source:hh_cop400.cpp +bship82 // Milton Bradley ctstein // Castle Toy einvaderc // Entex funjacks // Mattel From 89ec9644c8428dd260e60365e04eeed6bef2a9fd Mon Sep 17 00:00:00 2001 From: ppriest Date: Sun, 29 May 2016 07:44:01 +0100 Subject: [PATCH 06/14] [skip CI] Update tea-ci.org settings 32-bit due to Cygwin 64-bit bug that bites occasionally. Add -validate with output on success For the secrets, need to update the YAML to enable, the generate the secrets file, containing the hash of this YAML file once tea-ci is updated to support this. --- .drone.yml | 29 ++++++++++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-) diff --git a/.drone.yml b/.drone.yml index d0de9eb5961..c941a11a2cd 100644 --- a/.drone.yml +++ b/.drone.yml @@ -1,7 +1,30 @@ # Build configure for https://www.tea-ci.org (fork of Drone CI with Msys2 support) +# 32-bit until release including https://sourceware.org/git/gitweb.cgi?p=newlib-cygwin.git;a=commitdiff;h=0aa738220bb9dea2ad479e484560767b36701947 build: - image: teaci/msys64 - shell: mingw64 + image: teaci/msys32 + shell: mingw32 pull: true + branches: + -master + environment: + - SUBTARGET=tiny + - MINGW32=/c/msys32/mingw32 + - MAME_EXE=tiny.exe +# - SOURCES=src/mame/drivers/pacman.cpp commands: - - make SUBTARGET=tiny MINGW64=/c/msys64/mingw64 + - make + - ./$MAME_EXE -validate || echo "Validation successful" + +# Need to create secrets file from within tea-ci.org +#notify: +# email: +# from: git@mamedev.org +# host: $$EMAIL_SERVER +# username: $$EMAIL_USERNAME +# password: $$EMAIL_PASSWORD +# recipients: +# - $$EMAIL_LISTADDR +# when: +# success: false +# failure: false +# change: true From 904ddcd4fde82d9ad3bda67d77f2877cd9e7cf7e Mon Sep 17 00:00:00 2001 From: ppriest Date: Sun, 29 May 2016 08:36:05 +0100 Subject: [PATCH 07/14] Fix target exe (nw) --- .drone.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.drone.yml b/.drone.yml index c941a11a2cd..51c4f305c64 100644 --- a/.drone.yml +++ b/.drone.yml @@ -9,7 +9,7 @@ build: environment: - SUBTARGET=tiny - MINGW32=/c/msys32/mingw32 - - MAME_EXE=tiny.exe + - MAME_EXE=mametiny.exe # - SOURCES=src/mame/drivers/pacman.cpp commands: - make From 4a5895661c976d257f4884ab573a44d16e2c48a2 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Sun, 29 May 2016 10:10:41 +0200 Subject: [PATCH 08/14] update gitignore (nw) --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index aec8b94c19b..652b23db20c 100644 --- a/.gitignore +++ b/.gitignore @@ -27,6 +27,7 @@ !/tests/ !/doxygen/ !/web/ +!/.drone.yml !/.gitattributes !/.gitignore !/.travis.yml From bded10179b142ab7e534a70ee0a163dc4e0e02aa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Miodrag=20Milanovi=C4=87?= Date: Sun, 29 May 2016 10:19:05 +0200 Subject: [PATCH 09/14] Update README.md --- README.md | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/README.md b/README.md index bd89327d5db..b4552b2f9d9 100644 --- a/README.md +++ b/README.md @@ -3,6 +3,14 @@ [![Join the chat at https://gitter.im/mamedev/mame](https://badges.gitter.im/Join%20Chat.svg)](https://gitter.im/mamedev/mame?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge) +Build status for tiny build only, containing just core parts of project + +| OS/Compiler | Status | +| ------------- |:-------------:| +|Linux GCC / OSX Clang| [![Build Status](https://travis-ci.org/mamedev/mame.svg?branch=master)](https://travis-ci.org/mamedev/mame) | +|Windows MinGW | [![Build Status](https://tea-ci.org/api/badges/mamedev/mame/status.svg)](https://tea-ci.org/mamedev/mame) | + + What is MAME? ============= From 141e1c77700dcc49d686e4768c46493d7efec2c3 Mon Sep 17 00:00:00 2001 From: Justin Kerk Date: Sun, 29 May 2016 08:27:55 +0000 Subject: [PATCH 10/14] Emscripten tweaks (nw) --- scripts/src/main.lua | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/scripts/src/main.lua b/scripts/src/main.lua index 31b9090d6b1..50469f0e384 100644 --- a/scripts/src/main.lua +++ b/scripts/src/main.lua @@ -115,7 +115,7 @@ end targetextension ".bc" if os.getenv("EMSCRIPTEN") then local emccopts = "" - .. " -O3" + .. " -O" .. _OPTIONS["OPTIMIZE"] .. " -s USE_SDL=2" .. " -s USE_SDL_TTF=2" .. " --memory-init-file 0" @@ -132,7 +132,9 @@ end .. " --embed-file " .. _MAKE.esc(MAME_DIR) .. "artwork/slot-mask.png@artwork/slot-mask.png" if _OPTIONS["SYMBOLS"]~=nil and _OPTIONS["SYMBOLS"]~="0" then - emccopts = emccopts .. " -g" .. _OPTIONS["SYMLEVEL"] + emccopts = emccopts + .. " -g" .. _OPTIONS["SYMLEVEL"] + .. " -s DEMANGLE_SUPPORT=1" end if _OPTIONS["ARCHOPTS"] then From 9f5fb1fab5d0b83f8fea1542ba02d86931b53f6b Mon Sep 17 00:00:00 2001 From: Paul Priest Date: Sun, 29 May 2016 10:03:56 +0100 Subject: [PATCH 11/14] [skip CI] Add irc bot notification for tea-ci (nw) Encrypted file contains secrets generated from tea-ci.org interface. --- .drone.sec | 1 + .drone.yml | 17 ++++++++++++++++- 2 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 .drone.sec diff --git a/.drone.sec b/.drone.sec new file mode 100644 index 00000000000..5fc79c939f0 --- /dev/null +++ b/.drone.sec @@ -0,0 +1 @@ +eyJhbGciOiJSU0EtT0FFUCIsImVuYyI6IkExMjhHQ00ifQ.doN0hM3F1JcAqSRhxCrxPkeVEUj0cLHZ74LchLsP7JFE4-9udW0VQRRVEeQ8rrqtOb7X2am-hI2s9aLp6nq9duMdToFP5bJaUC0yxtAPCZbMgEZVB1BBxl04pgafswVXHUVR_yC4ToZlzuiKvsz1tjB2wFmyxowqqfbJILJVScobwYvIt5Mxp60A9vqBb1Xg77pR9EqYRmUiff_3Vrs4CEm2l39MXVuG8kwy9NOmJ3EStiVCh8iP0JwD-ZLBi3IMGGcGX73RyrNPAyFgwoXDEvSBflURc7ge3336wjfi2e7edeVmHBP-BhrI6Tng1BqyaNplZMtxZZ9vN-NqWYsXMg.4fOuhgSIsHgPVx6P.l9pmIM652sG1JvnBGjj-Aqr9k1U243w4acruslIkWcAzD9rxQOBK18011eQ3QyuFW4T1EjPvQMKflfGJNaPA74B2Is7HmSzG1NWrBkS0hv7uyf_WNwA83kdcoD0lyahtMG_td8AN4L7dlh0rh8BmOaPYHQ.VX42VcsvXuj9zYiZ41rzGg diff --git a/.drone.yml b/.drone.yml index 51c4f305c64..d387a0d8bb8 100644 --- a/.drone.yml +++ b/.drone.yml @@ -14,7 +14,22 @@ build: commands: - make - ./$MAME_EXE -validate || echo "Validation successful" - + +notify: + irc: + prefix: build + nick: $$IRC_USER + channel: #mame-dev + server: + host: $$IRC_HOST + port: $$IRC_PORT + password: $$IRC_PASS + tls: true + when: + success: false + failure: true + change: true + # Need to create secrets file from within tea-ci.org #notify: # email: From c378eb2f8fbedb16d2c14b5fdeede2e45d29d95f Mon Sep 17 00:00:00 2001 From: etabeta78 Date: Sun, 29 May 2016 11:37:15 +0200 Subject: [PATCH 12/14] psx.xml: Added CHD images of redump.org USA disc set. [Aeternal] psx.xml: Added more information and small fixes to Japanese discs. [Fabio Priuli] --- hash/psx.xml | 48577 ++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 42313 insertions(+), 6264 deletions(-) diff --git a/hash/psx.xml b/hash/psx.xml index d802fcb42df..b92b294dd4b 100755 --- a/hash/psx.xml +++ b/hash/psx.xml @@ -1,8 +1,35369 @@ + - + + + + + 007 Racing (USA) + 2000 + Electronic Arts + + + + + + + + + + + + 007 - Tomorrow Never Dies (USA) + 1999 + Electronic Arts + + + + + + + + + + + + 007 - The World Is Not Enough (USA) + 2000 + Electronic Arts + + + + + + + + + + + + Thousand Arms (USA) + 1999 + Atlus U.S.A. + + + + + + + + + + + + + + + + + Disney's 101 Dalmatians II - Patch's London Adventure (USA) + 2003 + Eidos Interactive + + + + + + + + + + + + Disney's 102 Dalmatians - Puppies to the Rescue (USA) + 2000 + Eidos Interactive + + + + + + + + + + + + Ten Pin Alley (USA) + 1996 + ASC Games + + + + + + + + + + + + 1Xtreme (USA) + 1995 + Sony Computer Entertainment America + + + + + + + + + + + + 2Xtreme (USA) + 1996 + Sony Computer Entertainment America + + + + + + + + + + + + 3D Baseball (USA) + 1996 + Crystal Dynamics + + + + + + + + + + + + 3D Lemmings (USA) + 1997 + Psygnosis + + + + + + + + + + + + The Three Stooges (USA) + 2003 + Metro3D + + + + + + + + + + + + 3Xtreme (USA) + 1999 + 989 Studios + + + + + + + + + + + + 40 Winks (USA) + 1999 + GT Interactive Software + + + + + + + + + + + + The Fifth Element (USA) + 1998 + Activision + + + + + + + + + + + + Area 51 (USA, v1.1) + 1997 + Atari Interactive + + + + + + + + + + + + Area 51 (USA, v1.0) + 1996 + Atari Interactive + + + + + + + + + + + + Ace Combat 2 (USA) + 1997 + Namco Hometek + + + + + + + + + + + + Ace Combat 3 - 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America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 24 (USA) + 1999 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 25 (USA) + 1999 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 26 (USA) + 1999 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 27 (USA) + 1999 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 28 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 29 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 30 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 31 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 32 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 33 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 34 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 35 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 36 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 37 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 38 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 39 (USA) + 2000 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 40 (USA) + 2001 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 41 (USA) + 2001 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 42 (USA) + 2001 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 43 (USA, No EDC) + 2001 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 43 (USA, EDC) + 2001 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 44 (USA) + 2001 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 45 (USA) + 2001 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 46 (USA) + 2001 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 47 (USA) + 2001 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 48 (USA) + 2001 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 50 (USA) + 2001 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 52 (USA) + 2002 + Sony Computer Entertainment America + + + + + + + + + + + + Official U.S. PlayStation Magazine Demo Disc 54 (USA) + 2002 + Sony Computer Entertainment America + + + + + + + + + + + + + + + + Front Mission 1st (Jpn) + 2003 + Square Enix + + + + + + + + + + + + + + Leading Jockey Highbred (Jpn) + 1996 + Harvest One + + + + + + + + + + + + + + Raiden DX (Jpn, Major Wave Series) + 2000 + Hamster + + + + + + + + + + + + + + Raiden DX (Jpn) + 1997 + Nihon System + + + + + + + + + + + + + + + Raiden Project (Jpn) + 1995 + Nihon System + + + + + + + + + + + + + + Side by Side Special 2000 (Jpn) + 1999 + Taito + + + + + + + + + + + + + + World Neverland - Olerud Oukoku Monogatari (Jpn) + 1997 + Riverhill Soft + + + + + + + + + + + + Interactive CD Sampler Disc - Volume 01 (M Rated) @@ -15,50 +35376,6 @@ - - Interactive CD Sampler Disc - Volume 02 - 1996 - SCEA - - - - - - - - - Interactive CD Sampler Disc - Volume 03 (1.0) - 1996 - SCEA - - - - - - - - - Interactive CD Sampler Disc - Volume 03 (1.1) - 1996 - SCEA - - - - - - - - - Interactive CD Sampler Disc - Volume 03 (1.2) - 1996 - SCEA - - - - - - - Interactive CD Sampler Disc - Volume 04 1997 @@ -147,27 +35464,6 @@ - - Toys R Us - Interactive CD Sampler Disc - 1998 - SCEA - - - - - - - - - Final Fantasy VII Interactive Sampler CD - 1996 - SCEA - - - - - - - + Dance Dance Revolution - Disney Mix (Pirate) 2001 @@ -216,8 +35512,8 @@ A few comments on these: Bubble Bobble II (Prototype) 1995 @@ -231,12 +35527,12 @@ A few comments on these: Baldur's Gate (USA, Prototype) 19?? @@ -261,10 +35557,10 @@ A few comments on these: - + BioHazard (Jpn, Prototype 19950804) 1995 @@ -276,10 +35572,10 @@ A few comments on these: - + BioHazard (Jpn, Prototype 19951004) 1995 @@ -291,10 +35587,10 @@ A few comments on these: - + BioHazard (Jpn, Prototype 19960131) 1996 @@ -306,12 +35602,11 @@ A few comments on these: - + BioHazard 2 (Prototype) 1998 @@ -323,10 +35618,10 @@ A few comments on these: - + BioHazard 2 (Prototype, Alt) 1998 @@ -340,10 +35635,9 @@ A few comments on these: Breakneck (Prototype) 19?? @@ -355,11 +35649,11 @@ A few comments on these: - + Crash Bandicoot (Prototype, 19960408) 1996 @@ -373,12 +35667,12 @@ A few comments on these: Deuce (USA, Prototype) 2000 - <unknown> + Midway @@ -386,10 +35680,10 @@ A few comments on these: - + Diablo (Prototype) 1997 @@ -401,9 +35695,9 @@ A few comments on these: - + Driver (Prototype Demo) 19?? @@ -415,10 +35709,10 @@ A few comments on these: - + Duke Nukem Time to Kill (USA, Prototype) 1998 @@ -432,8 +35726,8 @@ A few comments on these: Global Domination (USA, Prototype) 1998? @@ -445,9 +35739,9 @@ A few comments on these: - + Legacy of Kain - Soul Reaver (USA, Prototype 19990628) 1999 @@ -459,11 +35753,11 @@ A few comments on these: - + Legacy of Kain - Soul Reaver (USA, Prototype 19990512) 1999 @@ -477,8 +35771,8 @@ A few comments on these: Madden NFL 96 (USA, Prototype) 1995 @@ -492,8 +35786,8 @@ A few comments on these: Metal Gear Solid (Pilot Disk) 1998 @@ -506,11 +35800,11 @@ A few comments on these: - + Persona 2 - Eternal Punishment (Prototype? Debug) 2000 @@ -522,10 +35816,10 @@ A few comments on these: - + Rockman 8 (Jpn, Prototype v1) 1996 @@ -537,10 +35831,10 @@ A few comments on these: - + Rockman 8 (Jpn, Prototype 1) 1996 @@ -552,10 +35846,10 @@ A few comments on these: - + Rockman 8 (Jpn, Prototype 2) 1996 @@ -569,7 +35863,7 @@ A few comments on these: Rockman Dash (Capcom Friendly Club Demo) 1997 @@ -582,10 +35876,10 @@ A few comments on these: - + Rockman X6 (Jpn, Prototype 20010928) 2001 @@ -597,10 +35891,10 @@ A few comments on these: - + Silent Hill (USA, Prototype) 1999 @@ -614,8 +35908,8 @@ A few comments on these: Spirit Master (USA, Prototype) 19?? @@ -629,9 +35923,9 @@ A few comments on these: StarCon (Prototype) 1998 @@ -645,8 +35939,8 @@ A few comments on these: Thrill Kill (USA, Prototype) 1998 @@ -660,10 +35954,10 @@ A few comments on these: Thrill Kill (USA, Prototype Earlier?) 1998 @@ -675,10 +35969,10 @@ A few comments on these: - + Tomb Raider (Prototype, 19960722) 1996 @@ -690,12 +35984,12 @@ A few comments on these: - + Tomb Raider II (USA, Prototype) 1997 @@ -707,10 +36001,10 @@ A few comments on these: - + Tony Hawk's Pro Skater (USA, Prototype) 1999 @@ -724,11 +36018,11 @@ A few comments on these: Torc - Legend of the Ogre Crown (Prototype) 19?? - <unknown> + Head Games @@ -738,10 +36032,10 @@ A few comments on these: Virtuoso (Prototype, 19960514) 1996 @@ -753,10 +36047,10 @@ A few comments on these: - + WWF Smackdown! (USA, Prototype 20000106) 2000 @@ -771,10 +36065,10 @@ A few comments on these: - + Resident Evil 2 Preview (Euro, CD Consoles No.38) 1997 @@ -787,10 +36081,10 @@ A few comments on these: - + Resident Evil 3 (Euro, Demo) 1999 @@ -805,8 +36099,8 @@ A few comments on these: Bounty Arms Demo (Jpn, Demo Demo No.5?, 199504) 1995 @@ -818,11 +36112,11 @@ A few comments on these: - + Castlevania - Symphony of the Night (E3 Demo, 1997) 1997 @@ -834,27 +36128,11 @@ A few comments on these: - - - Duke Nukem Time to Kill (USA, Demo) - 1998 - GT Interactive - - - - - - - - - + Tomb Raider (E3 Demo, 19960520) 1996 @@ -866,88 +36144,22 @@ A few comments on these: - - - - - Raiden DX (Jpn, v1.1) - 199? - Seibu / Hamster - - - - - - - - - - - Raiden DX (Jpn, v1.0) - 199? - Seibu - - - - - - - - - - - Raiden Project (USA) - 199? - Seibu - - - - - - - - - - - - Raiden Project (Jpn) - 1995 - Nihon System - - - - - - - - - + - + 007 - Tomorrow Never Dies (Jpn) - 1999 - Electronic Arts - + 2000 + Electronic Arts Square + + @@ -956,16 +36168,17 @@ A few comments on these: - + 1-on-1 - Single Basketball (Jpn) 1998 Jorudan - + + @@ -976,28 +36189,29 @@ A few comments on these: - 10101 - Will the Starship (Jpn) + 10101 - "Will" the Starship (Jpn) 1997 Sound Technology Japan - + + @@ -1006,16 +36220,17 @@ A few comments on these: - + - 19 ji 03 pun Ueno Hatsu Yakou Ressha (Jpn) + 19-ji 03-pun Ueno Hatsu Yakou Ressha (Jpn) 1999 Visit - + + @@ -1024,16 +36239,17 @@ A few comments on these: - + - 20 Seiki Striker Retsuden - The 20th Century's Strikers (Jpn) + 20 Seiki Striker Retsuden - The 20th Century's Real Strikers (Jpn) 2000 - Virgin Interactive + DaZZ + + - @@ -1042,25 +36258,26 @@ A few comments on these: - + 70's Robot Anime - Geppy-X - The Super Boosted Armor (Jpn) 1999 Aroma - - + + + @@ -1084,22 +36301,23 @@ A few comments on these: - + - A Ressha de Ikou Z Mezase - Tairiku Oudan (Jpn) + A Ressha de Ikou Z - Mezase! Tairiku Oudan (Jpn) 1999 Artdink - + + @@ -1108,23 +36326,25 @@ A few comments on these: - + + - A5 - A Ressha de Ikou 5 (Jpn) - 1997 + A5 - A Ressha de Ikou 5 (Jpn, Playstation the Best) + 1999 Artdink + + - @@ -1133,16 +36353,17 @@ A few comments on these: - + Abe a GoGo (Jpn) 1997 - Gamebank - + GameBank + + @@ -1151,16 +36372,17 @@ A few comments on these: - + Acid (Jpn) 1999 Taki - + + @@ -1171,17 +36393,18 @@ A few comments on these: Aconcagua (Jpn) 2000 SCEI + + - @@ -1196,16 +36419,17 @@ A few comments on these: - + - Action Puzzle - Prism Land (Jpn) + Action Puzzle - Prism Land (Jpn, Honkakuha de 1300Yen Series) 2000 HECT - + + @@ -1216,15 +36440,16 @@ A few comments on these: Ad Lib Ouji ...to Fuyukai na Nakamatachi!? (Jpn) 2002 - Nippon Telenet - + Nihon Telenet + + @@ -1236,15 +36461,16 @@ A few comments on these: Advan Racing (Jpn) 1998 Atlus - + + @@ -1253,17 +36479,19 @@ A few comments on these: + Advanced V.G. 2 (Jpn, SuperLite 1500 Series) 2003 TGL + + - @@ -1274,34 +36502,35 @@ A few comments on these: - Advanced Variable Geo (Jpn) + Advanced V.G. (Jpn) 1996 TGL - + + @@ -1310,26 +36539,27 @@ A few comments on these: - + Afraid Gear (Jpn) 1998 Asmik Ace - + + @@ -1338,16 +36568,17 @@ A few comments on these: - + Afraid Gear Another (Jpn) 2001 - Asmik Ace - + Office Create + + @@ -1356,16 +36587,17 @@ A few comments on these: - + - Agent Armstrong (Jpn) + Agent Armstrong - Himitsu Shirei Daisakusen (Jpn) 1997 - We Net + WENet + + - @@ -1376,41 +36608,42 @@ A few comments on these: Airgrave (Jpn) 1996 Santos - + + @@ -1419,16 +36652,17 @@ A few comments on these: - + The Airs (Jpn) 1999 Victor Interactive Software - + + @@ -1439,36 +36673,37 @@ A few comments on these: Aitakute... Your Smiles in My Heart (Jpn) 2000 Konami - - + + + @@ -1492,16 +36727,17 @@ A few comments on these: - + - Aizouban Houshinengi (Jpn) + Aizouban Houshin Engi (Jpn) 1999 - KOEI - + Koei + + @@ -1509,14 +36745,34 @@ A few comments on these: + + + + Akagawa Jirou Majo-tachi no Nemuri - Fukkatsu Matsuri (Jpn) + 1999 + Victor Interactive Software + + + + + + + + + + Akagawa Jirou - Yasoukyoku 2 (Jpn) 2001 - Victor - + Victor Interactive Software + + @@ -1525,16 +36781,17 @@ A few comments on these: - + Pop de Cute na Shinri Test - Alabama (Jpn) 2000 D3 Publisher - + + @@ -1543,16 +36800,17 @@ A few comments on these: - + Alice in Cyberland (Jpn) 1996 Glams - + + @@ -1561,22 +36819,23 @@ A few comments on these: - + Alive (Jpn) 1998 - General + General Entertainment + + - @@ -1595,16 +36854,17 @@ A few comments on these: - + Alundra 2 - Mashinka no Nazo (Jpn) 1999 - Sony - + SCEI + + @@ -1615,14 +36875,15 @@ A few comments on these: A Nanjarin (Jpn) 1998 To One - + + @@ -1631,19 +36892,20 @@ A few comments on these: - + Ancient Roman - Power of the Dark Side (Jpn) 1998 Nihon Systems - - + + + @@ -1657,18 +36919,19 @@ A few comments on these: - + - Angel Blade - Neo Tokyo Guardians (Jpn) + Angel Blade (Jpn) 1997 - On Dimand - + On DiMand + + @@ -1677,17 +36940,18 @@ A few comments on these: - + - Angel Graffiti - Anatahe no Profile (Jpn) + Angel Graffiti - Anata e no Profile (Jpn) 1996 Coconuts Japan - + + @@ -1696,16 +36960,17 @@ A few comments on these: - + Angelique Duet (Jpn) 1998 - KOEI - + Koei + + @@ -1714,18 +36979,19 @@ A few comments on these: - + Angelique Special (Jpn) 1996 - KOEI - + Koei + + @@ -1734,16 +37000,17 @@ A few comments on these: - + Angelique Special 2 (Jpn) 1997 - KOEI - + Koei + + @@ -1752,16 +37019,17 @@ A few comments on these: - + Angelique Tenkuu no Requiem (Jpn) 1999 - KOEI - + Koei + + @@ -1770,16 +37038,17 @@ A few comments on these: - + - Anglomois '99 (Jpn, Superlite 1500 Series) + Angolmois '99 (Jpn, SuperLite 1500 Series) 1999 Success - + + @@ -1788,18 +37057,19 @@ A few comments on these: - + Another Memories (Jpn) 1998 Hearty Robin - + + @@ -1808,19 +37078,20 @@ A few comments on these: - + - Ao No Rokugou - Antarctica (Jpn) + Ao no Roku-gou - Antarctica (Jpn) 2000 Bandai - - + + + @@ -1834,16 +37105,17 @@ A few comments on these: - + - Ao Zora To Nakama Tachi - Yume No Bouken (Jpn) + Ao Zora to Nakama Tachi - Yume No Bouken (Jpn) 2003 MTO - + + @@ -1852,16 +37124,17 @@ A few comments on these: - + - Aoki Ookami to Shiroki Mezika - Genchou Hishi (Jpn) + Aoki Ookami to Shiroki Mejika - Genchou Hishi (Jpn) 1998 - KOEI - + Koei + + @@ -1872,14 +37145,15 @@ A few comments on these: Aqua Paradise - Boku no Suizokukan (Jpn) 2000 Victor Interactive Software - + + @@ -1888,17 +37162,18 @@ A few comments on these: - + Aquanaut no Kyuujitsu 2 (Jpn) 1999 Artdink - + + @@ -1909,16 +37184,17 @@ A few comments on these: Aquarian Age - Tokyo Wars (Jpn) 2000 ESP Software - + + @@ -1927,16 +37203,17 @@ A few comments on these: - + Arcade Hits - Crazy Climber (Jpn, Major Wave Series) 2002 Hamster - + + @@ -1947,14 +37224,15 @@ A few comments on these: Arcade Hits - Frisky Tom (Jpn, Major Wave Serie) 2002 Hamster - + + @@ -1963,18 +37241,19 @@ A few comments on these: - + Arkana Senki Ludo (Jpn) 1998 Pai - + + @@ -1983,16 +37262,17 @@ A few comments on these: - + Arkanoid R 2000 (Jpn) 1999 Taito - - + + + @@ -2001,34 +37281,17 @@ A few comments on these: - + - Armored Core (Jpn, Demo) - 1997 - From Software - - - - - - - - - - - - Armed Fighter (Jpn) - 1998 + 1999 Banpresto - + + @@ -2037,16 +37300,17 @@ A few comments on these: - + - Soukou Kihei Votoms - Lightning Slash / Armored Trooper Votoms - Lightning Slash (Jpn) + Soukou Kihei Votoms - Lightning Slash (Jpn) 1999 Takara - + + @@ -2055,16 +37319,17 @@ A few comments on these: - + - Art Camion - Geijutsuden (Jpn, Taito the Best) + Art Camion - Geijutsuden (Jpn, Re-release 2002) 2002 - Alpha Unit/TYO - + TYO + + @@ -2072,17 +37337,18 @@ A few comments on these: - - + + - Art Camion - Geijutsuden (Jpn, Alt) + Art Camion - Geijutsuden (Jpn) 1999 - Alpha Unit/TYO - + TYO + + @@ -2091,34 +37357,35 @@ A few comments on these: - + - Arthur To Astaroth No Nazo Maikamura - Incredible Toons (Jpn) + Arthur to Astaroth no Nazo Maikamura - Incredible Toons (Jpn) 1996 Capcom - + + @@ -2127,17 +37394,18 @@ A few comments on these: - + - Arubarea no Otome - Uruwashi no Seishikitachi (Jpn) + Albalea no Otome - Uruwashi no Seishikitachi (Jpn) 1998 Masaya - + + @@ -2148,17 +37416,18 @@ A few comments on these: Astronoka (Jpn) 1998 Enix + + - @@ -2172,17 +37441,18 @@ A few comments on these: - + - Asuka 120% Burning Fest. Excellent (Jpn) + Asuka 120% Burning Fest. Excellent (Jpn) 1997 Family Soft - + + @@ -2191,16 +37461,17 @@ A few comments on these: - + - Asuka 120% Burning Fest. Final (Jpn) + Asuka 120% Burning Fest. Final (Jpn) 1999 Family Soft - + + @@ -2209,40 +37480,41 @@ A few comments on these: - + - Asuka 120% Burning Fest. Special (Jpn) + Asuka 120% Burning Fest. Special (Jpn) 1996 Family Soft - + + @@ -2251,45 +37523,47 @@ A few comments on these: - + + - Asuncia - Strategic Fantasy Role Playing Game (Jpn) + Asuncia - Matsue no Jubaku (Jpn, XING Maru-yasu Series) 2000 Xing - + + @@ -2300,22 +37574,23 @@ A few comments on these: - Athena - Awakening from the Ordinary Life (Jpn) + Athena - Awakening from the Ordinary Life (Jpn, Koei the Best) 1999 SNK - - + + + @@ -2334,16 +37609,17 @@ A few comments on these: - + - Aura Battler Dunbine (Jpn) + Aura Battler Dunbine - Seisenshi Densetsu (Jpn) 2000 Bandai - + + @@ -2352,19 +37628,20 @@ A few comments on these: - + Ayakashi Ninden Kunoichiban (Jpn) 1997 Shoeisha + + - @@ -2378,23 +37655,24 @@ A few comments on these: - + Azito (Jpn) 1997 - Astec 21 - + Astec21 + + @@ -2403,17 +37681,18 @@ A few comments on these: - + Azito 3 (Jpn) 2000 Banpresto - + + @@ -2424,14 +37703,15 @@ A few comments on these: Azumanga Donjara Daiou (Jpn) 2002 Bandai - + + @@ -2440,16 +37720,17 @@ A few comments on these: - + b.l.u.e. - Legend of Water (Jpn) 1998 Hudson - + + @@ -2458,22 +37739,23 @@ A few comments on these: - + - Back Guiner - Yomigaeru Yuusha Tachi - Hishou Hen Uragiri no Senjou (Jpn) + BackGuiner - Yomigaeru Yuusha-tachi - Hishou-hen 'Uragiri no Senjou' (Jpn) 1998 Ving + + - @@ -2495,15 +37777,16 @@ A few comments on these: Bakumatsu Roman - Gekka no Kenshi (Jpn) 1999 SNK - + + @@ -2512,16 +37795,17 @@ A few comments on these: - + - Bakuretsu Akindo (Jpn) + Uchuu Goushou-den - Bakuretsu Akindo (Jpn) 1996 Astec21 - + + @@ -2530,16 +37814,17 @@ A few comments on these: - + Bakuretsu Hunter - Mahjong Special (Jpn) 1996 Banpresto - + + @@ -2551,14 +37836,15 @@ A few comments on these: - Bakuryuu (Jpn) + Bakuryu (Jpn) 2000 Fujimic - + + @@ -2568,16 +37854,17 @@ A few comments on these: - + - Bamin Kids (Jpn) + Vermin Kids (Jpn) 1996 Electronic Arts - + + @@ -2588,14 +37875,15 @@ A few comments on these: - Kids Station Barbapapa (Jpn) + Barbapapa (Jpn) 2001 Sunsoft - + + @@ -2605,16 +37893,17 @@ A few comments on these: - + Bardysh (Jpn) 1999 - Imadeio - + Imadio + + @@ -2623,16 +37912,17 @@ A few comments on these: - + - Baroque (Jpn) + Baroque - Yuganda Mousou (Jpn) 1999 Sting - + + @@ -2641,16 +37931,17 @@ A few comments on these: - + Baroque Syndrome (Jpn) 2000 Sting - + + @@ -2659,16 +37950,17 @@ A few comments on these: - + Baseball Simulation - ID Pro Yakyuu (Jpn) 2001 Konami + + - @@ -2677,16 +37969,17 @@ A few comments on these: - + - Bass Fisherman (Jpn) + Bass Fisherman - Texas (Jpn) 1998 Sammy - + + @@ -2695,16 +37988,18 @@ A few comments on these: - + + - Battle Master (Jpn) + Battle Master (Jpn, Major Wave Series) 2000 Hamster - + + @@ -2713,16 +38008,17 @@ A few comments on these: - + - Battle Sugoroku - The Hunter (Jpn, SuperLite 1500 Series) + Battle "Sugoroku" - The Hunter - A.R.0062 (Jpn, SuperLite 1500 Series) 1999 Success - + + @@ -2734,14 +38030,15 @@ A few comments on these: Bealphareth (Jpn) 2000 - Sony - + SCEI + + @@ -2752,14 +38049,15 @@ A few comments on these: Beat Planet Music (Jpn) 2000 - Sony - + SCEI + + @@ -2768,16 +38066,18 @@ A few comments on these: + Beatmania - Append 3rd Mix Mini (Jpn) - 199? + 1998 Konami - - + + + @@ -2788,14 +38088,15 @@ A few comments on these: Beatmania - Append 5th Mix - Time to Get Down (Jpn) 2000 Konami - - + + + @@ -2806,14 +38107,15 @@ A few comments on these: Beatmania - Append Club Mix (Jpn) - 199? + 2000 Konami - - + + + @@ -2824,14 +38126,15 @@ A few comments on these: Beatmania - Best Hits (Jpn) 2000 Konami - - + + + @@ -2842,14 +38145,15 @@ A few comments on these: Beatmania - featuring Dreams Come True (Jpn) 2000 Konami - - + + + @@ -2860,14 +38164,15 @@ A few comments on these: Beatmania Append Gottamix 2 - Going Global (Jpn) 2000 Konami - - + + + @@ -2878,14 +38183,15 @@ A few comments on these: - Beatmania - The Sound of Tokyo! (Jpn) + Beatmania - The Sound of Tokyo! - Produced by Konishi Yasuharu (Jpn) 2001 Konami - - + + + @@ -2896,14 +38202,15 @@ A few comments on these: Beatmania Append 6th Mix + Core Remix (Jpn) 2002 Konami - - + + + @@ -2912,16 +38219,17 @@ A few comments on these: - + - Beavis and Butt-head in Virtual Stupidity / MTV's Beavis and Butt-Head - Virtual Aho Shoukougun (Jpn) + MTV's Beavis and Butt-Head in Virtual Stupidity (Jpn) 1998 B-Factory - + + @@ -2930,16 +38238,18 @@ A few comments on these: - + + - Bishi Bashi Special (Jpn) + Bishi Bashi Special (Jpn, Konami the Best) 2001 Konami - - + + + @@ -2948,16 +38258,17 @@ A few comments on these: - + Bishi Bashi Special 2 (Jpn) 1999 Konami + + - @@ -2966,16 +38277,17 @@ A few comments on these: - + Bishi Bashi Special 3 - Step Champ (Jpn) 2000 Konami - - + + + @@ -2984,16 +38296,17 @@ A few comments on these: - + - Bishoujo Senshi Sailor Moon Super S - Shin Shuyaku Soudatsusen (Jpn) + Bishoujo Senshi Sailormoon Super S - Shin Shuyaku Soudatsusen (Jpn, Genteiban) 1996 Angel - + + @@ -3002,19 +38315,20 @@ A few comments on these: - + - Black Matrix 00 (Jpn, Limited Edition) + Black Matrix Zero OO (Jpn, Shokai Genteiban) 2004 NEC Interchannel - - + + + @@ -3028,19 +38342,20 @@ A few comments on these: - + Black Matrix Cross (Jpn) 2000 NEC Interchannel - - + + + @@ -3056,14 +38371,15 @@ A few comments on these: - Blackjack vs. Matsuda Jun (Jpn) + Black Jack vs. Matsuda Jun (Jpn) 2000 Pony Canyon - + + @@ -3074,14 +38390,15 @@ A few comments on these: - Blade Arts (Jpn) + Blade Arts - Tasogare no Miyako R'lyeh (Jpn) 2000 Enix - + + @@ -3092,14 +38409,15 @@ A few comments on these: - Blademaker: Arms Shop (Jpn) + BladeMaker (Jpn) 1999 Shoeisha - + + @@ -3108,16 +38426,17 @@ A few comments on these: - + - Blam! Machinehead (Jpn) + Blam! -MachineHead (Jpn) 1997 Virgin Interactive - + + @@ -3126,16 +38445,17 @@ A few comments on these: - + Blaze & Blade - Eternal Quest (Jpn) 1998 T&E Soft - + + @@ -3144,16 +38464,17 @@ A few comments on these: - + - Blaze & Blade Busters (Jpn) + Blaze & Blade - Busters (Jpn) 1998 T&E Soft - + + @@ -3164,14 +38485,15 @@ A few comments on these: - Blend X Brand (Jpn) + Blend x Brand - Odekake Gousei RPG (Jpn) 2000 - Tonkin House (Tokyo Shoseki) - + Tonkin House + + @@ -3181,16 +38503,17 @@ A few comments on these: - + Block Kuzushi 2 (Jpn) 2000 Marvelous Entertaiment - + + @@ -3200,16 +38523,17 @@ A few comments on these: - + - Block Kuzushi Kowashite Help! (Jpn) + Block Kuzushi - Kowashite Help! (Jpn) 2000 - Media Group - + Media Gallop + + @@ -3218,16 +38542,17 @@ A few comments on these: - + Blood Factory (Jpn) 1996 Interplay - + + @@ -3236,16 +38561,17 @@ A few comments on these: - + Blue Breaker Burst - Egao no Asuni (Jpn) 1998 Human - + + @@ -3254,31 +38580,32 @@ A few comments on these: - + - Blue Knight Bersaga Story - Soukou Kihei Votoms Gaiden (Jpn) + Soukou Kihei Votoms Gaiden - Ao no Kishi Berserga Monogatari (Jpn) 1997 - Takura - + Takara + + @@ -3287,16 +38614,17 @@ A few comments on these: - + The Blue Marlin (Jpn) 2000 - Starfish Software - + Starfish + + @@ -3305,16 +38633,17 @@ A few comments on these: - + - Boku ha Koukuu Kanseikan (Jpn) + Boku wa Koukuu Kanseikan (Jpn) 1999 Syscom - + + @@ -3323,16 +38652,17 @@ A few comments on these: - + Boku no Choro-Q (Jpn) 2002 Takara - + + @@ -3341,16 +38671,17 @@ A few comments on these: - + Bokujyou Keieiteki Board Game Umapoly (Jpn) 1999 Konami + + - @@ -3362,14 +38693,15 @@ A few comments on these: Bonogurashi (Jpn) 1996 - Amuze - + Amuse + + @@ -3378,16 +38710,17 @@ A few comments on these: - + Boundary Gate - Daughter of Kingdom (Jpn) 1997 - Pack-In-Soft (Victor) - + Pack-In-Soft + + @@ -3396,16 +38729,17 @@ A few comments on these: - + Brave Prove (Jpn) 1998 Data West - + + @@ -3416,14 +38750,15 @@ A few comments on these: Shin Sedai Robot Senki - Brave Saga (Jpn) 1998 Takara - + + @@ -3432,19 +38767,20 @@ A few comments on these: - + Brave Saga 2 (Jpn) 2000 Takara - - + + + @@ -3458,16 +38794,17 @@ A few comments on these: - + Brave Sword (Jpn) 2000 Sammy - + + @@ -3476,16 +38813,17 @@ A few comments on these: - + Break Volley (Jpn) 1999 Aqua Rouge - + + @@ -3494,17 +38832,18 @@ A few comments on these: - + Breath of Fire III (Jpn) 1997 Capcom - + + @@ -3516,14 +38855,15 @@ A few comments on these: Buckle Up! (Jpn) 1998 Shangri-La - + + @@ -3533,16 +38873,17 @@ A few comments on these: - + Bugi (Jpn) 1998 Konami + + - @@ -3552,16 +38893,17 @@ A few comments on these: - + Burn Out (Jpn, SuperLite 1500 Series) 2000 Success - + + @@ -3571,16 +38913,17 @@ A few comments on these: - + Burning Road (Jpn) 1997 Vic Tokai - + + @@ -3591,14 +38934,15 @@ A few comments on these: Buttsubushi (Jpn) 2001 Selen + + - @@ -3607,16 +38951,17 @@ A few comments on these: - + C1 Circuit (Jpn) 1996 Invex - + + @@ -3626,16 +38971,17 @@ A few comments on these: - + - Calcolo! (Jpn) + Calcolo! - Ochimo no Shooting (Jpn) 1997 Clef Inventor - + + @@ -3645,16 +38991,17 @@ A few comments on these: - + Captain Commando (Jpn) 1998 Capcom - + + @@ -3663,16 +39010,17 @@ A few comments on these: - + Captain Tsubasa - Aratanaru Densetsu Joshou (Jpn) 2002 Konami + + - @@ -3681,16 +39029,17 @@ A few comments on these: - + - Captain Tsubasa J - Get In The Tomorrow (Jpn) + Captain Tsubasa J - Get in the Tomorrow (Jpn) 1996 Bandai - + + @@ -3699,18 +39048,19 @@ A few comments on these: - + - Carnage Heart - Easy Zapping (Jpn) + Carnage Heart EZ - Easy Zapping (Jpn) 1997 - Artdink Corporation - + Artdink + + @@ -3719,16 +39069,17 @@ A few comments on these: - + Carom Shot 2 (Jpn) 1998 Argent - + + @@ -3737,16 +39088,17 @@ A few comments on these: - + Carton-kun (Jpn) 2000 - Irem Software Engineering - + Irem + + @@ -3757,14 +39109,15 @@ A few comments on these: Chaos Control (Jpn) 1996 Virgin Interactive - + + @@ -3773,16 +39126,17 @@ A few comments on these: - + Chiisana Kyojin Microman (Jpn) 1999 Takara - + + @@ -3791,16 +39145,17 @@ A few comments on these: - + Chiisana Oukoku Erutoria (Jpn) 2000 KSS - + + @@ -3809,16 +39164,17 @@ A few comments on these: - + Chiki Chiki Machine Mou Race - Wacky Races (Jpn) 2001 - Hudson/Infogrames - + Infogrames Hudson + + @@ -3827,16 +39183,17 @@ A few comments on these: - + Chippoke Ralph no Daibouken - The Adventure of Little Ralph (Jpn) 1999 - New Corporation - + New + + @@ -3847,14 +39204,15 @@ A few comments on these: Chocolate Kiss (Jpn) 2002 DigiCube - + + @@ -3863,16 +39221,17 @@ A few comments on these: - + Choro-Q (Jpn) 1996 Takara - + + @@ -3881,16 +39240,17 @@ A few comments on these: - + Choro-Q Wonderful! (Jpn) 1999 Takara - + + @@ -3899,16 +39259,17 @@ A few comments on these: - + Chou Hatsumei Boy Kanipan - Hirameki Wonderland (Jpn) 1999 Taito + + - @@ -3917,17 +39278,18 @@ A few comments on these: - + - Chou-Aniki - Kyuukyoku Muteki Ginga Saikyou Otoko (Jpn) + Chou Aniki - Kyuukyoku Muteki Ginga Saikyou Otoko (Jpn) 1995 - Nippon Computer System - + NCS + + @@ -3936,16 +39298,17 @@ A few comments on these: - + Chou-Kousoku Grandoll (Jpn) 1997 Bandai - + + @@ -3954,16 +39317,17 @@ A few comments on these: - + Choujin Gakuen Gowcaizer (Jpn) 1997 Urban Plant - + + @@ -3974,14 +39338,15 @@ A few comments on these: - Kuroi Hitomi no noir - Cielgris Fantasm (Jpn) + Kuroi Hitomi no Noir - Cielgris Fantasm (Jpn) 1999 Gust - + + @@ -3991,16 +39356,17 @@ A few comments on these: - + Circuit Beat (Jpn) - 1995 + 1996 Prism Arts - + + @@ -4010,16 +39376,17 @@ A few comments on these: - + Cleopatra's Fortune (Jpn) 2001 Altron - + + @@ -4028,16 +39395,17 @@ A few comments on these: - + Click Manga - Click Nohi (Jpn) - 1998 + 1999 Tokuma Shoten - + + @@ -4046,16 +39414,17 @@ A few comments on these: - + Click Manga - Dynamic Robot Taisen 1 (Jpn) 1999 Tokuma Shoten - + + @@ -4064,16 +39433,17 @@ A few comments on these: - + Click Manga - Dynamic Robot Taisen 2 (Jpn) 1999 Tokuma Shoten - + + @@ -4082,16 +39452,17 @@ A few comments on these: - + Clock Tower - Ghost Head (Jpn) 1998 Human - + + @@ -4100,34 +39471,17 @@ A few comments on these: - + - Clock Tower 2 (Jpn, Demo) - 1996 - Human - - - - - - - - - - - - - Colorful Logic 3 (Jpn) + Colorful Logic 3 - Fushigi na Henkei Logic (Jpn) 2001 Altron - + + @@ -4136,16 +39490,17 @@ A few comments on these: - + Community Pom (Jpn) 1997 - Fill-In Café - + Fill-In Café + + @@ -4154,16 +39509,17 @@ A few comments on these: - + Community Pom - Omoide o Dakishimete (Jpn) 1999 Family Soft - + + @@ -4172,17 +39528,18 @@ A few comments on these: - + The Conveni Special - 3-tsu no Sekai o Dokusen Seyo (Jpn) 1998 Ardink - + + @@ -4193,14 +39550,15 @@ A few comments on these: - Honoo no Ryourinin Cooking Fighter Tao (Jpn) + Honoo no Ryourinin - Cooking Fighter Tao (Jpn) 1998 Nippon Ichi Software - + + @@ -4209,16 +39567,17 @@ A few comments on these: - + Cosmic Race (Jpn) 1995 Neorex - + + @@ -4229,14 +39588,15 @@ A few comments on these: Cosmowarrior Zero (Jpn) 2000 Taito + + - @@ -4246,17 +39606,18 @@ A few comments on these: - + - Cotton 100% (Jpn, Superlite 1500 Series) + Märchen Adventure Cotton 100% (Jpn, SuperLite 1500 Series) 2003 Success - + + @@ -4265,16 +39626,17 @@ A few comments on these: - + Crazy Climber 2000 (Jpn) 2000 Nihon Bussan - + + @@ -4283,19 +39645,20 @@ A few comments on these: - + Creature Shock (Jpn) 1996 Data East - - + + + @@ -4309,16 +39672,17 @@ A few comments on these: - + Crime Crackers 2 (Jpn) 1997 - Sony - + SCEI + + @@ -4328,16 +39692,17 @@ A few comments on these: - + Croc Adventure (Jpn) 1999 - KOEI - + Koei + + @@ -4346,16 +39711,18 @@ A few comments on these: - + + Cross Tantei Monogatari 1 - Kouhen (Jpn, Major Wave Series) 2000 WorkJam - + + @@ -4364,25 +39731,26 @@ A few comments on these: - + CRW - Counter Revolution War (Jpn) 1996 Acclaim - + + @@ -4391,16 +39759,17 @@ A few comments on these: - + Cu-On-Pa (Jpn) 1997 - T&E Soft - + T&E Soft + + @@ -4409,16 +39778,18 @@ A few comments on these: - + + - Cyber Daisenryaku (Jpn, Superlite 1500 Series) + Cyber Daisenryaku - Shutsugeki! Harukatai (Jpn, SuperLite 1500 Series) 2000 Success - + + @@ -4429,20 +39800,21 @@ A few comments on these: Cyber War (Jpn) 1995 Coconuts Japan + + - @@ -4461,19 +39833,20 @@ A few comments on these: - + Cybernetic Empire (Jpn) 1999 Telenet + + - @@ -4487,16 +39860,17 @@ A few comments on these: - + Daibouken Deluxe - Harukanaru Umi (Jpn) 1997 Soft Office - + + @@ -4505,16 +39879,17 @@ A few comments on these: - + Daikoukai Jidai Gaiden (Jpn) 1997 - KOEI - + Koei + + @@ -4523,16 +39898,17 @@ A few comments on these: - + Daikoukai Jidai II (Jpn) 1996 - KOEI - + Koei + + @@ -4543,14 +39919,15 @@ A few comments on these: Dakar '97 (Jpn) 1997 Virgin Interactive - + + @@ -4559,16 +39936,17 @@ A few comments on these: - + Dance Dance Revolution - 2nd Remix Append Club Version Vol. 2 (Jpn) 1999 Konami - - + + + @@ -4577,17 +39955,18 @@ A few comments on these: - + Dance Dance Revolution - 5th Mix (Jpn) 2001 Konami - - + + + @@ -4596,16 +39975,17 @@ A few comments on these: - + Dance Dance Revolution - Best Hits (Jpn) 2000 Konami - - + + + @@ -4614,16 +39994,17 @@ A few comments on these: - + Dance Dance Revolution - Extra Mix (Jpn) 2001 Konami - - + + + @@ -4632,22 +40013,23 @@ A few comments on these: - + - Dancing Blade 2 - Katteni Momotenshi II - Tears of Eden (Jpn) + Dancing Blade - Katteni Momotenshi II - Tears of Eden (Jpn) 1999 Konami - - + + + @@ -4666,22 +40048,23 @@ A few comments on these: - + Dancing Blade - Katteni Momotenshi! (Jpn) 1998 Konami - - + + + @@ -4700,16 +40083,17 @@ A few comments on these: - + Dancing Stage featuring Dreams Come True (Jpn) 2000 Konami - - + + + @@ -4718,28 +40102,29 @@ A few comments on these: - + - Dancing Stage featuring True Kiss Destination (Jpn) + Dancing Stage featuring TRUE KiSS DESTiNATiON (Jpn) 1999 Konami - - + + + @@ -4748,16 +40133,17 @@ A few comments on these: - + Dangan (Jpn) 2000 KSS - + + @@ -4766,16 +40152,17 @@ A few comments on these: - + Dark Hunter - Ge Youma No Mori (Jpn) 1997 - KOEI - + Koei + + @@ -4786,14 +40173,15 @@ A few comments on these: Dark Tales from the Lost Soul (Jpn) - 199? + 1999 Sammy - + + @@ -4802,16 +40190,17 @@ A few comments on these: - + Darkseed II (Jpn) 1997 B-Factory - + + @@ -4823,14 +40212,15 @@ A few comments on these: Deadly Skies (Jpn) 1997 Coconuts Japan - + + @@ -4840,16 +40230,17 @@ A few comments on these: - + Death Wing (Jpn) 1996 Cybertech Designs - + + @@ -4858,16 +40249,17 @@ A few comments on these: - + Defeat Lightning (Jpn) 1997 D Cruise - + + @@ -4878,14 +40270,15 @@ A few comments on these: Denpa Shounenteki Game (Jpn) 1998 Hudson - + + @@ -4894,16 +40287,17 @@ A few comments on these: - + - Hole of the Legend Monster - Monster Complete World Ver.2 (Jpn) + Hole of the Legend Monster - Densetsu Kemono no Ana - Monster Complete World Ver.2 (Jpn) 1999 Idea Factory - + + @@ -4912,16 +40306,17 @@ A few comments on these: - + - Densha Daisuki (Jpn) + Densha Daisuki - Play Rail ga Ippai (Jpn) 1998 Tomy - + + @@ -4930,16 +40325,17 @@ A few comments on these: - + - Densha de Go! Nagoya Railroad - Let's Go By Train (Jpn) + Densha de Go! Nagoya Railroad (Jpn) 2000 Taito + + - @@ -4950,14 +40346,15 @@ A few comments on these: Derby Jockey 2001 (Jpn) 2001 Asmik Ace - + + @@ -4966,16 +40363,17 @@ A few comments on these: - + Descent (Jpn) 1996 Interplay - + + @@ -4985,16 +40383,17 @@ A few comments on these: - + Destruction Derby 2 (Jpn) 1997 - Sony - + SCEI + + @@ -5005,14 +40404,15 @@ A few comments on these: Devicereign (Jpn) 1999 - Media Works - + MediaWorks + + @@ -5023,17 +40423,18 @@ A few comments on these: Dezaemon Kids! (Jpn) 1998 Athena - - + + + @@ -5047,17 +40448,18 @@ A few comments on these: - + Dezaemon Plus (Jpn) 1996 Athena - + + @@ -5068,15 +40470,16 @@ A few comments on these: Digical League (Jpn) 1997 Squaresoft - + + @@ -5085,16 +40488,17 @@ A few comments on these: - + Digimon Tamers - Battle Evolution (Jpn) 2001 Bandai - + + @@ -5103,16 +40507,17 @@ A few comments on these: - + Digimon World (Jpn) 1999 Bandai - + + @@ -5122,16 +40527,17 @@ A few comments on these: - + Docchi Mecha! (Jpn) 2000 - Sony - + SCEI + + @@ -5140,16 +40546,17 @@ A few comments on these: - + Dodge de Ball! (Jpn) 1998 Yumedia - + + @@ -5158,16 +40565,17 @@ A few comments on these: - + The Dog Master (Jpn) 2003 Visit - + + @@ -5176,16 +40584,17 @@ A few comments on these: - + - Doki Doki Shutter Chance (Jpn) + Doki Doki Shutter Chance - Koi no Puzzle o Kumitatete (Jpn) 1997 Nippon Ichi Software - + + @@ -5196,14 +40605,15 @@ A few comments on these: Dokomademo Aoku... (Jpn, Limited Edition) 2002 KID - + + @@ -5212,16 +40622,17 @@ A few comments on these: - + Dolphin's Dream (Jpn) 1998 Konami + + - @@ -5231,16 +40642,17 @@ A few comments on these: - + - Domino-Kun o Tomenaide (Jpn) + Domino-kun o Tomenaide. (Jpn) 1998 - ArtDink - + Artdink + + @@ -5252,14 +40664,15 @@ A few comments on these: DonPachi (Jpn) 1996 SPS + + - @@ -5270,14 +40683,15 @@ A few comments on these: - Doraemon - Nobitaito Fukkatsu no hoshi (Jpn) + Doraemon - Nobita to Fukkatsu no Hoshi (Jpn) 1996 Epoch - + + @@ -5286,16 +40700,17 @@ A few comments on these: - + Doraemon 2 - SOS! Otogi no Kuni (Jpn) 1997 Epoch - + + @@ -5307,33 +40722,34 @@ A few comments on these: Double Dragon (Jpn) - 199? + 1996 Technos Japan - + + @@ -5342,16 +40758,17 @@ A few comments on these: - + Doukyuusei 2 (Jpn) 1997 Banpresto - + + @@ -5360,16 +40777,17 @@ A few comments on these: - + Doukyuusei Mahjong (Jpn) 1997 - Aroma - + Yumedia + + @@ -5378,16 +40796,17 @@ A few comments on these: - + Dr. Slump (Jpn) 1999 Bandai - + + @@ -5396,16 +40815,17 @@ A few comments on these: - + Dragon Ball Z - Ultimate Battle 22 (Jpn) 1995 Bandai - + + @@ -5415,17 +40835,18 @@ A few comments on these: - + - Dragon Drive (Jpn) + Dragon Drive Tactics Break (Jpn) 2002 Bandai - + + @@ -5434,16 +40855,17 @@ A few comments on these: - + Dragon Knight 4 (Jpn) 1997 Banpresto - + + @@ -5452,16 +40874,17 @@ A few comments on these: - + Dragon Knights Glorious (Jpn) 1999 Pandora - + + @@ -5470,16 +40893,17 @@ A few comments on these: - + Dragon Money (Jpn) 1999 Micro Cabin - + + @@ -5488,19 +40912,20 @@ A few comments on these: - + Dragon Valor (Jpn) 1999 Namco + + - @@ -5516,14 +40941,15 @@ A few comments on these: The Drug Store - Matsumoto Kiyoshi de Okaimono! (Jpn) 1998 Human - + + @@ -5532,16 +40958,17 @@ A few comments on these: - + Druid - Yamie no Tsuisekisha (Jpn) 1998 - KOEI - + Koei + + @@ -5552,14 +40979,15 @@ A few comments on these: DX Jinsei Game IV - The Game of Life (Jpn) 2001 Takara - + + @@ -5570,14 +40998,15 @@ A few comments on these: DX Jinsei Game V - The Game of Life (Jpn) 2002 Takara - + + @@ -5586,16 +41015,17 @@ A few comments on these: - + DX Monopoly (Jpn) 2000 Takara - + + @@ -5604,16 +41034,17 @@ A few comments on these: - + DX Okuman Chouja Game II - The Money Battle (Jpn) 1998 Takara - + + @@ -5624,14 +41055,15 @@ A few comments on these: DX Shachou Game (Jpn) 1999 Takara - + + @@ -5642,14 +41074,15 @@ A few comments on these: Dynamite Boxing (Jpn) 1998 Victor Interactive Software - + + @@ -5658,16 +41091,17 @@ A few comments on these: - + Dynamite Soccer 2002 (Jpn) 2002 A-Max - + + @@ -5677,16 +41111,17 @@ A few comments on these: - + Dynamite Soccer 2004 Final (Jpn) 2004 A-Max - + + @@ -5695,16 +41130,17 @@ A few comments on these: - + - Eggs of Steel - Hello Charlie!! (Jpn) + Hello Charlie!! (Jpn) 1998 Enix - + + @@ -5713,16 +41149,17 @@ A few comments on these: - + Eikan ha Kimini 4 (Jpn) 1999 - ArtDink - + Artdink + + @@ -5731,16 +41168,17 @@ A few comments on these: - + Eisei Meijin (Jpn) 1995 Konami - + + @@ -5749,16 +41187,17 @@ A few comments on these: - + - Élan (Jpn) + élan (Jpn) 1999 Visco - + + @@ -5769,14 +41208,15 @@ A few comments on these: - Élan Plus (Jpn) + élan plus (Jpn) 2000 Visco - + + @@ -5785,16 +41225,17 @@ A few comments on these: - + Elder Gate (Jpn) 2000 Konami - - + + + @@ -5803,22 +41244,23 @@ A few comments on these: - + - Elf wo Karu Monotachi II (Jpn) + Elf wo Karu Mono-tachi II (Jpn) 1998 Altron + + - @@ -5837,16 +41279,17 @@ A few comments on these: - + Emmyrea (Jpn) 2001 - Kid - + KID + + @@ -5855,16 +41298,17 @@ A few comments on these: - + End Sector (Jpn) 1998 ASCII - + + @@ -5873,16 +41317,17 @@ A few comments on these: - + Engacho! (Jpn) 1999 Nihon Application - + + @@ -5891,19 +41336,20 @@ A few comments on these: - + Enigma (Jpn) 1998 - KOEI - - + Koei + + + @@ -5917,16 +41363,17 @@ A few comments on these: - + EOS - Edge of Skyhigh (Jpn) 1997 Micronet - + + @@ -5935,16 +41382,17 @@ A few comments on these: - + Epica Stella (Jpn) 1998 Human - + + @@ -5953,22 +41401,23 @@ A few comments on these: - + EVE - The Fatal Attraction (Jpn) 2001 Game Village - - + + + @@ -5987,22 +41436,23 @@ A few comments on these: - + - Eve Zero (Jpn) + EVE Zero (Jpn) 2000 - NetVillage - - + Game Village + + + @@ -6021,16 +41471,17 @@ A few comments on these: - + Evergreen Avenue (Jpn) 2001 - Mediaworks/Datam Polystar - + MediaWorks / Datam Polystar + + @@ -6039,16 +41490,17 @@ A few comments on these: - + Exciting Bass (Jpn) 1998 Konami + + - @@ -6057,16 +41509,17 @@ A few comments on these: - + Exciting Bass 2 (Jpn) 1999 Konami + + - @@ -6075,16 +41528,17 @@ A few comments on these: - + Expert (Jpn) 1996 - Nichibutsu (Nihon Bussan) - + Nihon Bussan + + @@ -6093,16 +41547,17 @@ A few comments on these: - + Extra Bright (Jpn) 1996 ASCII - + + @@ -6111,16 +41566,17 @@ A few comments on these: - + Family Diamond (Jpn) 2002 Magnolia - + + @@ -6131,14 +41587,15 @@ A few comments on these: The Family Restaurant - Shijou Saikyou no Menu (Jpn) 1998 Human - + + @@ -6147,16 +41604,17 @@ A few comments on these: - + Farland Saga - Toki no Michishirube (Jpn) 1999 TGL - + + @@ -6165,16 +41623,17 @@ A few comments on these: - + Farland Story - Yottsu no Fuuin (Jpn) 1997 TGL - + + @@ -6183,16 +41642,17 @@ A few comments on these: - + Favorite Dear - Enkan no Monogatari (Jpn) 2001 NEC Interchannel + + - @@ -6201,16 +41661,17 @@ A few comments on these: - + - Favorite Dear - Junshiro no Yogenmono (The everlasting voices) (Jpn) + Favorite Dear - Junpaku no Yogenmono (Jpn) 2000 NEC Interchannel - - + + + @@ -6219,15 +41680,17 @@ A few comments on these: - + Feda 2 - White Surge - the Platoon (Jpn) 1997 Yanoman Games + + @@ -6236,16 +41699,17 @@ A few comments on these: - + Fighters' Impact (Jpn) 1997 Taito - + + @@ -6254,16 +41718,17 @@ A few comments on these: - + Fighting Illusion - K-1 Grand Prix '98 (Jpn) 1998 Xing - + + @@ -6273,16 +41738,17 @@ A few comments on these: - + Final Doom (Jpn) 1997 Soft Bank - + + @@ -6291,16 +41757,17 @@ A few comments on these: - + Final Fantasy (Jpn) 2002 Squaresoft - + + @@ -6309,34 +41776,17 @@ A few comments on these: - + - Final Fantasy Extra Collection (Jpn) - 199? - Squaresoft - - - - - - - - - - - - Final Fantasy II (Jpn) 2002 Squaresoft - + + @@ -6345,16 +41795,17 @@ A few comments on these: - + Final Round (Jpn) 1998 Atlus - + + @@ -6363,16 +41814,17 @@ A few comments on these: - + Fire Woman Matoigumi (Jpn) 1998 Tokuma Shoten - + + @@ -6384,14 +41836,15 @@ A few comments on these: The Firemen 2 - Pete & Danny (Jpn) - 199? + 1995 Human - + + @@ -6400,19 +41853,20 @@ A few comments on these: - + First Kiss Monogatari (Jpn) 1998 HuneX - - + + + @@ -6426,16 +41880,17 @@ A few comments on these: - + - First Queen IV (Jpn) + First Queen IV - Varcia Senki (Jpn) 1996 - Kure Software Koubou - + KSK + + @@ -6444,16 +41899,17 @@ A few comments on these: - + Fish Eyes II (Jpn) 2000 - Victor - + Victor Interactive Software + + @@ -6462,16 +41918,17 @@ A few comments on these: - + Fisher's Road (Jpn) 1999 BPS - + + @@ -6480,16 +41937,17 @@ A few comments on these: - + Fishing Freaks - BassRise (Jpn) 1999 Bandai - + + @@ -6498,16 +41956,17 @@ A few comments on these: - + Fist (Jpn) 1996 Imageneer - + + @@ -6516,16 +41975,17 @@ A few comments on these: - + Forget me not - Palette (Jpn) 2001 Enterbrain - + + @@ -6534,16 +41994,17 @@ A few comments on these: - + Formula Circus (Jpn) 1997 - Nichibutsu (Nihon Bussan) - + Nichibutsu + + @@ -6552,16 +42013,17 @@ A few comments on these: - + Formula Grand Prix 1997 - Team Unei Simulation 2 (Jpn) 1997 Coconuts Japan - + + @@ -6571,16 +42033,17 @@ A few comments on these: - + Formula Nippon '99 (Jpn) 1999 TYO - + + @@ -6591,14 +42054,15 @@ A few comments on these: Fox Junction (Jpn) - 1997 + 1998 Trips - + + @@ -6607,16 +42071,18 @@ A few comments on these: + Free Talk Studio - Mari no Kimama na Oshaberi (Jpn, Best of the Best) 2000 - Media - + Media Entertainment + + @@ -6625,34 +42091,17 @@ A few comments on these: - + - Front Mission 1St (Jpn) - 2003 - Squaresoft - - - - - - - - - - - - - Fun! Fun! Pingu (Jpn, Limited Edition) + Fun! Fun! Pingu - *Youkoso! Nankyoku e* (Jpn, Limited Edition) 1999 - Sony - + Sony Music Entertainment + + @@ -6661,16 +42110,17 @@ A few comments on these: - + - Fushigi Deka (Fushigi Keiji) (Jpn) + Fushigi Keiji (Jpn) 2000 Capcom - + + @@ -6679,16 +42129,17 @@ A few comments on these: - + Fuujin Ryouiki Eretzvaju (Jpn) 1999 - Yuke's - + Yuke's + + @@ -6699,14 +42150,15 @@ A few comments on these: Fuuraiki (Jpn) 2001 - Fog (Full On Games) - + FOG + + @@ -6715,16 +42167,17 @@ A few comments on these: - + - Fuuun Gokuu Ninjin (Jpn) + Fuuun Gokuu Ninden (Jpn) 1996 - Aicom - + AiCOM + + @@ -6733,19 +42186,20 @@ A few comments on these: - + G-Police (Jpn) 1998 - Psygnosis - - + SCEI + + + @@ -6759,16 +42213,17 @@ A few comments on these: - + - G1 Jockey 2000 (Jpn) + GI Jockey 2000 (Jpn) 2000 - KOEI - + Koei + + @@ -6780,42 +42235,43 @@ A few comments on these: Gaia Seed - Project Seed Trap (Jpn) 1996 Techno Soleil - + + @@ -6824,16 +42280,17 @@ A few comments on these: - + - Gakkou Deatta Kowai Hanashi S (Jpn) - 1997 + Gakkou de Atta Kowai Hanashi S (Jpn) + 1996 Banpresto - + + @@ -6842,16 +42299,17 @@ A few comments on these: - + - Gakkou no Kowai Uwasa - Hanako Sangakita!! (Jpn) + Gakkou no Kowai Uwasa - Hanako-san ga Kita!! (Jpn) 1995 Capcom - + + @@ -6860,16 +42318,17 @@ A few comments on these: - + Gakkou wo Tsukurou!! 2 (Jpn) 1998 Victor Interactive Software - + + @@ -6878,16 +42337,17 @@ A few comments on these: - + - Gakkou o Tsukurou!! Koushou Sensei Monogatari (Jpn) + Gakkou wo Tsukurou!! Koushou Sensei Monogatari (Jpn) 2000 Victor Interactive Software - + + @@ -6896,16 +42356,17 @@ A few comments on these: - + Gakuen Sentai Solblast (Jpn) 1999 Creative Heads - + + @@ -6914,17 +42375,18 @@ A few comments on these: - + Galaxy Fight - Universal Warriors (Jpn) 1996 Sunsoft - + + @@ -6933,16 +42395,17 @@ A few comments on these: - + - Galeoz (Jpn) + ΓΑΛΕΟΖ (Jpn) 1996 Atlus - + + @@ -6951,16 +42414,17 @@ A few comments on these: - + Gallop Racer 2000 (Jpn) 2000 Tecmo - + + @@ -6969,16 +42433,17 @@ A few comments on these: - + - Gambler Jiko Chuushinka Ippatsushoubu! Tokyo Mahjong Land (Jpn) + Gambler Jikochuushinha Ippatsu Shoubu! (Jpn) 2000 Game Arts - + + @@ -6987,16 +42452,17 @@ A few comments on these: - + The Game Maker (Jpn) 1998 Axela - + + @@ -7005,16 +42471,17 @@ A few comments on these: - + Gamera 2000 (Jpn) 1997 Virgin Interactive - + + @@ -7023,16 +42490,17 @@ A few comments on these: - + Gamesoft wo Tsukurou - Let's Be a Super Game Creator (Jpn) 1999 Imageneer - + + @@ -7041,16 +42509,17 @@ A few comments on these: - + Ganbare Goemon - Ooedo Daikaiten (Jpn) 2001 Konami + + - @@ -7059,16 +42528,17 @@ A few comments on these: - + Ganbare Goemon - Uchuu Kaizoku Akogingu (Jpn) 1996 Konami + + - @@ -7079,14 +42549,15 @@ A few comments on these: Gangway Monsters (Jpn) 1998 - Sony - + Sony Music Entertainment + + @@ -7097,17 +42568,18 @@ A few comments on these: Gate Keepers (Jpn) - 1998 + 1999 Kadokawa Shoten + + - @@ -7121,17 +42593,18 @@ A few comments on these: - + Gear Fighter Dendoh (Jpn) 2001 Bandai - + + @@ -7140,16 +42613,17 @@ A few comments on these: - + - Gegege no Kitarou - Gyakushuu! Youkai Daikessen (Jpn) + GeGeGe no Kitarou - Gyakushuu! Youkai Daikessen (Jpn) 2003 Konami + + - @@ -7158,24 +42632,25 @@ A few comments on these: - + - Gegege no Kitarou - Nonoi no Nikuto Katachi Tachi (Jpn) + GeGeGe no Kitarou (Jpn) 1997 Bandai - + + @@ -7185,16 +42660,17 @@ A few comments on these: - + - Geki-Oh ShienRyu (Jpn) + Geki-Oh Shienryu (Jpn) 1999 Warashi - + + @@ -7203,16 +42679,17 @@ A few comments on these: - + Gekisou Tomarunner (Jpn) 1999 - Sony - + SCEI + + @@ -7221,16 +42698,17 @@ A few comments on these: - + - Gekitotsu Toma L'Arc - L'Arc-en-Ciel vs. Tomarunner (Jpn) + Gekitotsu Toma L'Arc - Tomarunner vs. L'Arc~en~Ciel (Jpn) 2000 Sony - + + @@ -7241,31 +42719,32 @@ A few comments on these: Genei Tougi - Shadow Struggle (Jpn) 1996 Banpresto - + + @@ -7274,16 +42753,17 @@ A few comments on these: - + - Gensomaden Saiyuki - Harukanaru Nishi He (Jpn) + Gensou Maden Saiyuuki - Harukanaru Nishi e (Jpn) 2002 J-Wing - + + @@ -7292,16 +42772,17 @@ A few comments on these: - + Gensou no Altemis - Actress School Mystery Adventure (Jpn) 2000 Shoeisha - + + @@ -7310,16 +42791,17 @@ A few comments on these: - + - Get Backers Dakkanya (Jpn) + GetBackers Dakkanya (Jpn) 2001 Konami + + - @@ -7328,16 +42810,17 @@ A few comments on these: - + Ginga Eiyuu Densetsu (Jpn) 1998 Tokuma Shoten - + + @@ -7346,16 +42829,17 @@ A few comments on these: - + - Ginga o Jousama Densetsu Yuna - Final Edition (Jpn) + Ginga Ojousama Densetsu Yuna - Final Edition (Jpn) 1998 Hudson - + + @@ -7364,16 +42848,17 @@ A few comments on these: - + Glint Glitters (Jpn) 1999 Konami + + - @@ -7382,16 +42867,17 @@ A few comments on these: - + Goemon - Shin Sedai Shuumei (Jpn) 2001 Konami - - + + + @@ -7400,35 +42886,36 @@ A few comments on these: - + Goiken Muyou II (Jpn) 1998 KSS - + + @@ -7437,16 +42924,17 @@ A few comments on these: - + Gokuu Densetsu - Magic Beast Warriors (Jpn) - 1996 - Alyume System - + 1995 + Allumer + + @@ -7457,13 +42945,15 @@ A few comments on these: - Golgo 13 - 1 - Karairu no Yabou (Jpn) + Golgo 13 (1) - Karairu no Yabou (Jpn) 1998 Daiki + + @@ -7472,16 +42962,17 @@ A few comments on these: - + Goo! Goo! Soundy (Jpn) 1999 Konami + + - @@ -7490,45 +42981,29 @@ A few comments on these: - + - Granstream Denki (Jpn, Demo) - 1997 - <unknown> - - - - - - - - - - - - The Great Battle VI (Jpn) 1997 Banpresto + + @@ -7537,16 +43012,17 @@ A few comments on these: - + - Gritz - The Primordial Adventure (Jpn) + Gritz - The Pyramid Adventure (Jpn) 1997 Sanyo - + + @@ -7555,17 +43031,18 @@ A few comments on these: - + Groove Adventure Rave - Mikan no Hiseki (Jpn) 2002 Konami + + - @@ -7574,16 +43051,17 @@ A few comments on these: - + Groove Adventure Rave - Yuukyuu no Kizuna (Jpn) 2002 Konami + + - @@ -7592,16 +43070,17 @@ A few comments on these: - + Groove Jigoku V - Sweepstation Version (Jpn) 1998 - Sony - + Kioon Sony Records + + @@ -7612,17 +43091,18 @@ A few comments on these: Growlanser (Jpn) 1999 Atlus + + - @@ -7636,16 +43116,17 @@ A few comments on these: - + Googootrops (Jpn) 1999 Enix - + + @@ -7655,16 +43136,17 @@ A few comments on these: - + Guilty Gear (Jpn) 1998 Arc System Works - + + @@ -7673,16 +43155,17 @@ A few comments on these: - + Guitar Freaks Append 2nd Mix (Jpn) 2000 Konami - - + + + @@ -7691,17 +43174,18 @@ A few comments on these: - + Gunbare! Game Tengoku - The Game Paradise 2 (Jpn) 1998 Jaleco - + + @@ -7711,16 +43195,17 @@ A few comments on these: - + Gunbird (Jpn) 1995 Atlus - + + @@ -7731,14 +43216,15 @@ A few comments on these: Gung-Ho Brigade (Jpn) 2000 Tomy - + + @@ -7749,14 +43235,15 @@ A few comments on these: - Gunparade March (Jpn) + Kou Kidou Gensou - Gunparade March (Jpn) 2000 - Sony - + SCEI + + @@ -7767,14 +43254,15 @@ A few comments on these: Hai-Shin-2 (Jpn) 1998 Aques - + + @@ -7783,16 +43271,17 @@ A few comments on these: - + Hakaioh - King of Crusher (Jpn) 1998 - FAB Communication - + FAB Communications + + @@ -7801,38 +43290,39 @@ A few comments on these: - + Hanabi Fantast (Jpn) 1998 - Magical Company - + Magical + + @@ -7841,16 +43331,17 @@ A few comments on these: - + Happy Hotel (Jpn) 1997 Tohoku Shinsha - + + @@ -7859,51 +43350,53 @@ A few comments on these: - + + Happy Salvage (Jpn, Disc 1 Only) 2000 - Media Works - + MediaWorks + + - - +--> Hard Boiled (Jpn) 1998 - Siege - + Sieg + + @@ -7913,16 +43406,17 @@ A few comments on these: - + Harmful Park (Jpn) 1997 Sky Think Systems - + + @@ -7933,14 +43427,15 @@ A few comments on these: Harukanaru Toki no Naka de (Jpn) 2000 - KOEI - + Koei + + @@ -7951,14 +43446,15 @@ A few comments on these: Harukanaru Toki no Naka de - Banjou Yuugi (Jpn, Premium Box) 2003 - KOEI - + Koei + + @@ -7967,16 +43463,17 @@ A few comments on these: - + Hashiriya - Ookamitachi no Densetsu (Jpn) 1997 - Nichibutsu (Nihon Bussan) - + Nichibutsu + + @@ -7985,16 +43482,17 @@ A few comments on these: - + - Hatsukoi Valentine / Hatsukoi Barentain (Jpn) + Hatsukoi Valentine (Jpn) 1997 Family Soft - + + @@ -8003,16 +43501,17 @@ A few comments on these: - + - Haunted Junction Seitokai Batch o Oe! (Jpn) + Haunted Junction - Seitokai Batch o Oe! (Jpn) 1997 - Media Works - + MediaWorks + + @@ -8021,16 +43520,17 @@ A few comments on these: - + Heaven's Gate (Jpn) 1996 Atlus - + + @@ -8039,16 +43539,17 @@ A few comments on these: - + The Heiwa Otenki Studio (Jpn) 2001 Aqua Rouge - + + @@ -8057,16 +43558,17 @@ A few comments on these: - + Heiwa Pachinko Graffiti Vol.1 (Jpn) 1999 Aqua Rouge - + + @@ -8077,14 +43579,15 @@ A few comments on these: Heiwa Parlor! Pro Dolphin Ring Special (Jpn) 2000 Nihon Telenet - + + @@ -8095,14 +43598,15 @@ A few comments on these: Heiwa Parlor! Pro Lupin Sansei Special (Jpn) 2000 Nihon Telenet - + + @@ -8113,14 +43617,15 @@ A few comments on these: Heiwa Parlor! Pro Tsunatori Monogatari Special (Jpn) 2002 Nihon Telenet - + + @@ -8131,45 +43636,46 @@ A few comments on these: Hello Kitty - White Present (Jpn) 1998 Hudson - + + @@ -8180,14 +43686,15 @@ A few comments on these: Hello Kitty's Cube De Cute (Jpn) 1998 Culture Publishing - + + @@ -8198,14 +43705,15 @@ A few comments on these: Henry Explorers (Jpn) 1997 Konami + + - @@ -8214,16 +43722,17 @@ A few comments on these: - + Hermie Hopperhead - Scrap Panic (Jpn, Playstation the Best) 1996 Sony - + + @@ -8232,16 +43741,17 @@ A few comments on these: - + High School of Blitz (Jpn) 1999 MediaWorks - + + @@ -8250,16 +43760,17 @@ A few comments on these: - + - Hikari No Shima - Seven Lithograhs in Shining Island (Jpn) + Hikari no Shima - Seven Lithographs in Shining Island (Jpn) 1999 Affect - + + @@ -8268,16 +43779,17 @@ A few comments on these: - + Hikaru no Go - Heian Gensou Ibunroku (Jpn) 2002 Konami + + - @@ -8288,14 +43800,15 @@ A few comments on these: Hikaru no Go - Insei Choujou Kessen (Jpn) 2002 Konami + + - @@ -8304,22 +43817,23 @@ A few comments on these: - + Himiko-Den (Jpn) 1999 Hakuhodo + + - @@ -8338,35 +43852,44 @@ A few comments on these: - - + + Himitsu Sentai Metamor V Deluxe (Jpn, Disc 1 Only) 1998 Mycom - + + + - + Hissatsu Pachi-Slot Station 2 (Jpn) 1999 Sunsoft - + + @@ -8375,16 +43898,17 @@ A few comments on these: - + Hissatsu Pachi-Slot Station 4 (Jpn) 2000 Sunsoft - + + @@ -8393,16 +43917,17 @@ A few comments on these: - + Hissatsu Pachi-Slot Station 5 (Jpn) 2000 Sunsoft - + + @@ -8411,16 +43936,17 @@ A few comments on these: - + Hissatsu Pachi-Slot Station SP (Jpn) 1999 Sunsoft - + + @@ -8429,16 +43955,17 @@ A few comments on these: - + Hit Back (Jpn) 1999 Tomy - + + @@ -8449,14 +43976,15 @@ A few comments on these: Hiza no Ue no Partner - Kitty On Your Lap (Jpn) 1998 - Culture Publishers / Kaneko - + Culture Publishers + + @@ -8465,16 +43993,17 @@ A few comments on these: - + Hokuto no Ken (Jpn) 1996 Banpresto - + + @@ -8485,14 +44014,15 @@ A few comments on these: Hooockey!! (Jpn, SuperLite 1500 Series) 2000 Success - + + @@ -8501,16 +44031,17 @@ A few comments on these: - + Hoshi no Oka Gakuen Monogatari - Gakuensai (Jpn) 1998 MediaWorks - + + @@ -8519,16 +44050,17 @@ A few comments on these: - + Hoshigami - Shizumiyuku Aoki Daichi (Jpn) 2002 MaxFive - + + @@ -8537,16 +44069,17 @@ A few comments on these: - + Houma Hunter Lime - Special Collection Vol.1 (Jpn) 1994 Asmik - + + @@ -8555,16 +44088,17 @@ A few comments on these: - + Hunter X Hunter - Maboroshi no Greed Island (Jpn) 2000 Konami - - + + + @@ -8573,16 +44107,17 @@ A few comments on these: - + Hunter X Hunter - Ubawareta Aura Stone (Jpn) 2001 Konami - - + + + @@ -8591,16 +44126,17 @@ A few comments on these: - + Hyakujuu Sentai Gaoranger (Jpn) 2001 - Konami - + Bandai + + @@ -8609,16 +44145,17 @@ A few comments on these: - + - Hyouryuu Ki - The Reportage Beyond The Sea (Jpn) + Hyouryuu Ki - The Reportage Beyond the Sea (Jpn) 1999 KSS - + + @@ -8627,16 +44164,17 @@ A few comments on these: - + Hyper Crazy Climber (Jpn) 1996 Nichibutsu - + + @@ -8645,16 +44183,17 @@ A few comments on these: - + Hyper Securities 2 (Jpn) - 1996 + 1998 Victor Interactive Software - + + @@ -8664,16 +44203,17 @@ A few comments on these: - + - Hyper-Rally (Jpn) + Hyper Rally (Jpn) 1996 Harvest One - + + @@ -8684,14 +44224,15 @@ A few comments on these: Ichigeki - Hagane no Hito (Jpn) 1999 Bandai - + + @@ -8700,16 +44241,17 @@ A few comments on these: - + Ide Yousuke no Mahjong Kyoshitsu (Jpn) 1999 Athena - + + @@ -8718,22 +44260,23 @@ A few comments on these: - + Idol Janshi Suchie-Pai II Limited (Jpn) 1996 Jaleco - - + + + @@ -8752,16 +44295,17 @@ A few comments on these: - + Idol Janshi Suchie-Pai Limited (Jpn) 1995 Jaleco - + + @@ -8770,16 +44314,17 @@ A few comments on these: - + - Image Fight & X-Multiply (Jpn) + Arcade Gears - Image Fight & X-Multiply (Jpn) 1998 Xing - + + @@ -8788,16 +44333,17 @@ A few comments on these: - + Inagawa Junji - Kyoufu no Yashiki (Jpn) 1999 Visit - + + @@ -8807,16 +44353,17 @@ A few comments on these: - + Indy 500 (Jpn) 1997 Tomy - + + @@ -8827,14 +44374,15 @@ A few comments on these: - Inuyasha RPG (Jpn) + Inuyasha (Jpn) 2001 Bandai - + + @@ -8843,16 +44391,17 @@ A few comments on these: - + - InuYasha - Sengoku Otogi Kassen (Jpn) + Inuyasha - Sengoku Otogi Kassen (Jpn) 2002 Bandai - + + @@ -8861,16 +44410,17 @@ A few comments on these: - + Irem Arcade Classics (Jpn) 1996 I'Max - + + @@ -8879,16 +44429,17 @@ A few comments on these: - + Itadaki Street - Gorgeous King (Jpn) 1998 Enix - + + @@ -8897,19 +44448,20 @@ A few comments on these: - + JailBreaker (Jpn) 1999 NEC Interchannel + + - @@ -8923,16 +44475,17 @@ A few comments on these: - + Jaleco Collection Vol.1 (Jpn) 2003 - Pacific Century Cyber Work - + PCCW + + @@ -8941,16 +44494,16 @@ A few comments on these: - + Jellyfish - The Healing Friend (Jpn) 2000 Visit - + @@ -8959,16 +44512,18 @@ A few comments on these: - + + - Jigsaw World (Jpn, Honkakuha de Series) + Jigsaw World (Jpn, Honkakuha de 1300Yen Series) 1999 Hect - + + @@ -8977,34 +44532,17 @@ A few comments on these: - - - Jiro Akagawa - Majotachi No Nemuri - Fukkatsu Matsuri (Jpn) - 1999 - Victor - - - - - - - - - - - Jounetsu Nekketsus - Nakimushi Coach no Nikki (Jpn) + Jounetsu Nekketsu Athletes - Nakimushi Coach no Nikki (Jpn) 1997 Asmik - + + @@ -9013,16 +44551,17 @@ A few comments on these: - + Jungle Park (Jpn) 1998 Digitalogue - + + @@ -9031,16 +44570,17 @@ A few comments on these: - + - Juusou Kihei Valken 2 (Jpn) + Assault Suits Valken 2 - Juusou Kihei Valken 2 (Jpn) 1999 Masaya - + + @@ -9049,16 +44589,17 @@ A few comments on these: - + Kaeru no Ehon - Nakushita Kioku o Motomete (Jpn) 1999 - Victor - + Victor Interactive Software + + @@ -9067,16 +44608,17 @@ A few comments on these: - + Kaikan Phrase - Datenshi Kourin (Jpn) 2000 Enix - + + @@ -9085,16 +44627,17 @@ A few comments on these: - + Kain the Vampire (Jpn) 1997 - BMG - + BMG Japan + + @@ -9103,16 +44646,17 @@ A few comments on these: - + Kaisoku Tenshi - The Rapid Angel (Jpn) 1998 Techno Soleil - + + @@ -9123,14 +44667,15 @@ A few comments on these: Kaitohranma Miyabi (Jpn) 1999 Imageneer - + + @@ -9139,16 +44684,17 @@ A few comments on these: - + Kakugo no Susume (Jpn) 1997 Tomy - + + @@ -9159,93 +44705,94 @@ A few comments on these: Kamen Rider (Jpn) 1998 Bandai - + + @@ -9256,14 +44803,15 @@ A few comments on these: Kamen Rider Agito (Jpn) 2001 Bandai - + + @@ -9274,14 +44822,15 @@ A few comments on these: Kamen Rider Kuuga (Jpn) 2000 Bandai - + + @@ -9292,14 +44841,15 @@ A few comments on these: Kamen Rider Ryuki (Jpn) 2002 Bandai - + + @@ -9310,14 +44860,15 @@ A few comments on these: Kanako Enomoto - Junk Brain Diagnosis (Jpn) 1999 Oracion - + + @@ -9326,16 +44877,17 @@ A few comments on these: - + - Kato Hifumi Ku-dan - Shogi Club (Jpn, Honkakuha de 1300 Yen) + Kato Hifumi Kudan - Shogi Club (Jpn, Honkakuha de 1300Yen Series) 1999 - ASCII - + Hect + + @@ -9344,16 +44896,17 @@ A few comments on these: - + Kattobi Tune (Jpn) 1998 Genki - + + @@ -9362,17 +44915,18 @@ A few comments on these: - + - Kaze no Notam - Notam of Wind (Jpn) + Kaze no Notam - Notam of Wind (Jpn) 1997 - ArtDink - + Artdink + + @@ -9381,16 +44935,17 @@ A few comments on these: - + - Keiba Eito '98 Akifuyu (Jpn) + Keiba Eight '98 Akifuyu (Jpn) 1998 Shangri-La - + + @@ -9399,16 +44954,17 @@ A few comments on these: - + - Keiba Eito '98 Haru Natsu (Jpn) + Keiba Eight '98 Haru Natsu (Jpn) 1998 Shangri-La - + + @@ -9417,16 +44973,17 @@ A few comments on these: - + Keiba Saishou no Housoku '95 (Jpn) 1995 Copya System - + + @@ -9437,14 +44994,15 @@ A few comments on these: Kenki Ippatsu! Crane Master ni Narou! (Jpn) 2000 FAB Communication - + + @@ -9453,16 +45011,17 @@ A few comments on these: - + Kero Kero King (Jpn) 2000 Media Factory - + + @@ -9471,16 +45030,17 @@ A few comments on these: - + Khamrai (Jpn) 2000 Namco - + + @@ -9489,16 +45049,17 @@ A few comments on these: - + - Kidou Keisatsu Patlabor - Mobile Police Patlabor - Game Edition (Jpn) + Kidou Keisatsu Patlabor - Mobile Police Patlabor - Game Edition (Jpn) 2000 Bandai - + + @@ -9507,14 +45068,14 @@ A few comments on these: - + Kidou Senshi Z-Gundam (Jpn, Demo) - 199? - <unknown> + 1997 + Bandai @@ -9524,16 +45085,17 @@ A few comments on these: - + - Kids Station - Bishoujo Senshi Sailor Moon World - Chibi-Usa to Tanoshii Mainichi (Jpn) + Kids Station - Bishoujo Senshi Sailormoon World - Chibiusa to Tanoshii Mainichi (Jpn) 2001 Bandai - + + @@ -9542,16 +45104,17 @@ A few comments on these: - + Kids Station - Digimon Park (Jpn) 2001 Bandai - + + @@ -9560,16 +45123,17 @@ A few comments on these: - + Kids Station - Kamen Rider Heroes (Jpn) 2002 Bandai - + + @@ -9578,16 +45142,17 @@ A few comments on these: - + Kids Station - Motto! Oja Majo Dorami - MAHO-dou Smile Party (Jpn) 2001 Bandai - + + @@ -9596,16 +45161,17 @@ A few comments on these: - + - Kids Station - Soreike Anpanman 2 - Anpanman To Daibouken! (Jpn) + Kids Station - Soreike! Anpanman 2 - Anpanman to Daibouken! (Jpn) 2001 Bandai - + + @@ -9614,16 +45180,17 @@ A few comments on these: - + Killer Bass (Jpn) 2000 - Magical Company - + Magical + + @@ -9632,19 +45199,20 @@ A few comments on these: - + Kindaichi Shounen no Jikenbo 3 - Seiryuu Densetsu Satsujin Jiken (Jpn) 1999 Kodansha + + - @@ -9659,16 +45227,17 @@ A few comments on these: - + King of Bowling 2 - Professional-Hen (Jpn) 1998 Coconuts Japan - + + @@ -9677,57 +45246,58 @@ A few comments on these: - + The King of Fighters '95 (Jpn) 1996 SNK - + + @@ -9738,54 +45308,55 @@ A few comments on these: The King of Fighters '96 (Jpn) 1997 SNK - + + @@ -9796,14 +45367,15 @@ A few comments on these: The King of Fighters '98 - Dream Match Never Ends (Jpn) 1999 SNK - + + @@ -9812,17 +45384,18 @@ A few comments on these: - + The King of Fighters '99 (Jpn) 2000 SNK - + + @@ -9833,17 +45406,18 @@ A few comments on these: The King of Fighters Kyo (Jpn) 1998 SNK - + + @@ -9854,14 +45428,15 @@ A few comments on these: Kisya de Go! (Jpn) 2000 Taito + + - @@ -9870,16 +45445,17 @@ A few comments on these: - + Kitchen Panic (Jpn) 1998 Panther Software - + + @@ -9888,16 +45464,17 @@ A few comments on these: - + Knight & Baby (Jpn) 1998 Tamsoft - + + @@ -9906,16 +45483,17 @@ A few comments on these: - + - Kochira Katsushikaku Kameari Kouenzen (Jpn) + Kochira Katsushikaku Kameari Kouenzen Hashutsujo - High Tech Building Shinkou Soshi Sakusen! no Ma (Jpn) 1997 Bandai - + + @@ -9924,16 +45502,17 @@ A few comments on these: - + Kohni Shogun (Jpn) 2000 ASK - + + @@ -9944,14 +45523,15 @@ A few comments on these: - Kojin Kyouju - La Lecon Particuliere (Jpn) + Kojin Kyouju - La Leçon Particulière (Jpn) 1998 MyCom - + + @@ -9962,14 +45542,15 @@ A few comments on these: Komotchi (Jpn) 2001 - Victor - + Victor Interactive Software + + @@ -9978,16 +45559,17 @@ A few comments on these: - + Konami 80's Arcade Gallery (Jpn) 1999 Konami - - + + + @@ -9996,16 +45578,17 @@ A few comments on these: - + Konami Antiques - MSX Collection Vol.1 (Jpn) 1997 Konami + + - @@ -10014,16 +45597,17 @@ A few comments on these: - + Konami Antiques - MSX Collection Vol.2 (Jpn) 1998 Konami + + - @@ -10032,16 +45616,17 @@ A few comments on these: - + Korokoro Post Nin (Jpn) 2002 - Media - + Media Entertainment + + @@ -10050,16 +45635,17 @@ A few comments on these: - + Kosodate Quiz Motto My Angel (Jpn) 1999 Namco - + + @@ -10068,16 +45654,17 @@ A few comments on these: - + Kotetsu Reiki - Steel Dom (Jpn) 1996 TecnoSoft - + + @@ -10086,34 +45673,17 @@ A few comments on these: - + - Koudelka (Jpn, Demo) - 199? - SNK - - - - - - - - - - - - - Koukroseatro - Yuukyuu no Hitomi (Jpn) + Koukλoθεαtρo - Yuukyuu no Hitomi (Jpn) 1999 Sunsoft - + + @@ -10122,16 +45692,17 @@ A few comments on these: - + Kouryuuki (Jpn) 1998 - KOEI - + Koei + + @@ -10140,16 +45711,17 @@ A few comments on these: - + Koyasai - A Sherd of Youthful Memories (Jpn) 1999 Shoeisha - + + @@ -10160,14 +45732,15 @@ A few comments on these: Kunoichi Torimonocho (Jpn) 1999 GMF - + + @@ -10178,14 +45751,15 @@ A few comments on these: - Ku-Ron Jo (Jpn) + Ku-Ron Jo - Fukyuu Ban (Jpn) 2000 Media Rings - + + @@ -10194,16 +45768,17 @@ A few comments on these: - + Kuro no Ken - Blade of the Darkness (Jpn) 1997 CD Bros. - + + @@ -10214,14 +45789,15 @@ A few comments on these: Kurumi Miracle (Jpn) 1997 Banpresto - + + @@ -10232,41 +45808,42 @@ A few comments on these: Kururin Pa! (Jpn) 1995 Sky Think System - + + @@ -10275,16 +45852,17 @@ A few comments on these: - + Kuubo Senki (Jpn) 1999 Unbalance - + + @@ -10294,16 +45872,17 @@ A few comments on these: - + Kyorochan no Purikura Daisakusen (Jpn) 1999 Tomy - + + @@ -10312,16 +45891,17 @@ A few comments on these: - + Kyuin (Jpn) 1996 - Media + Media Entertainment + + - @@ -10332,14 +45912,15 @@ A few comments on these: Lagnacure (Jpn) 1997 - Sony - + Sony Music Entertainment + + @@ -10350,14 +45931,15 @@ A few comments on these: Lagnacure Legend (Jpn) 2000 - ArtDink - + Artdink + + @@ -10366,16 +45948,17 @@ A few comments on these: - + - Lake Masters Pro (Jpn) + Lake Masters Pro - Nihon Juudan Kuro Masu Kikou (Jpn) 1999 DaZZ + + - @@ -10384,34 +45967,17 @@ A few comments on these: - + - Lalala PlayStation Trial Disk 1998 Summer (Jpn, Demo) - 199? - <unknown> - - - - - - - - - - - - Langrisser I & II (Jpn) 1997 - Masaya (NCS) - + Masaya + + @@ -10420,19 +45986,20 @@ A few comments on these: - + Langrisser IV & V Final Edition (Jpn) 1999 - Masaya (NCS) - - + Masaya + + + @@ -10446,61 +46013,26 @@ A few comments on these: - + - Leading Jockey Highbred (Jpn) - 1996 - Harvest One - - - - - - - - - + + - - - Legaia Densetsu (Jpn, Demo) - 199? - <unknown> - - - - - - - - - + + - - The Legend of Dragoon (Jpn) 1999 - Sony + SCEI + + - @@ -10524,16 +46056,17 @@ A few comments on these: - + Libero Grande 2 (Jpn) 2000 Namco - + + @@ -10542,16 +46075,17 @@ A few comments on these: - + - Linda 3 Cube Again (Jpn) + Linda³ Again (Jpn) 1997 Sony - + + @@ -10562,14 +46096,15 @@ A few comments on these: Ling Rise (Jpn) 1999 Epoch - + + @@ -10578,19 +46113,20 @@ A few comments on these: - + - Little Princess +1 - Maru Oukoku no Ningyou Hime 2 (Jpn) + Little Princess +1 - Marl Oukoku no Ningyou Hime 2 (Jpn) 2000 Nippon Ichi Software + + - @@ -10604,16 +46140,17 @@ A few comments on these: - + Little Princess - Marl Oukoku no Ningyou Hime 2 (Jpn) 1999 Nippon Ichi Software - + + @@ -10622,16 +46159,17 @@ A few comments on these: - + - Lode Runner 2 (Jpn, SuperLite 1500 Serie) + Lode Runner 2 (Jpn, SuperLite 1500 Series) 2000 Success - + + @@ -10640,16 +46178,17 @@ A few comments on these: - + Lode Runner Extra (Jpn) 1997 Patra - + + @@ -10660,14 +46199,15 @@ A few comments on these: Lone Soldier (Jpn) 1996 Virgin Interactive Entertainment - + + @@ -10676,16 +46216,17 @@ A few comments on these: - + Lord of Fist (Jpn) 1999 - Media Works - + MediaWorks + + @@ -10696,14 +46237,15 @@ A few comments on these: Love & Destroy (Jpn) 1999 - Sony - + SCEI + + @@ -10714,28 +46256,29 @@ A few comments on these: Love Love Truck (Jpn) 1999 TYO - + + @@ -10744,16 +46287,17 @@ A few comments on these: - + LSD - Dream Emulator (Jpn, Limited Edition) 1998 Asmik Ace - + + @@ -10762,22 +46306,23 @@ A few comments on these: - + Lucifer Ring (Jpn) 1998 Toshiba EMI - + + @@ -10786,22 +46331,23 @@ A few comments on these: - + Lunar 2 - Eternal Blue (Jpn) 1999 Kadokawa Shoten + + - @@ -10820,16 +46366,17 @@ A few comments on these: - + - Lunar Wing (Jpn) + Lunar Wing - Toki o Koeta Seisen (Jpn) 2001 Shoeisha - + + @@ -10840,15 +46387,16 @@ A few comments on these: Lunatic Dawn III (Jpn) 1998 - ArtDink - + Artdink + + @@ -10857,17 +46405,18 @@ A few comments on these: - + Lunatic Dawn Odyssey (Jpn) 1999 - ArtDink - + Artdink + + @@ -10878,14 +46427,15 @@ A few comments on these: Lup Salad - Lupupu Cube (Jpn) 1996 Datam Polystar - + + @@ -10897,38 +46447,39 @@ A few comments on these: Mad Panic Coaster (Jpn) 1997 Hakuhodo - + + @@ -10939,25 +46490,26 @@ A few comments on these: Mad Stalker - Full Metal Force (Jpn) 1997 Family Soft - + + @@ -10966,16 +46518,17 @@ A few comments on these: - + The Maestro Music (Japan, with Baton Stick) 2000 Global A - + + @@ -10984,16 +46537,17 @@ A few comments on these: - + The Maestro Music - Merry Christmas - Append Disc (Jpn) 2000 Global A - + + @@ -11003,16 +46557,17 @@ A few comments on these: - + - Magical Drop F - Daibouken mo Rakujyanai! (Jpn) + Magical Drop F - Daibouken mo Rakujanai! (Jpn) 1999 Data East - + + @@ -11021,16 +46576,17 @@ A few comments on these: - + Magical Medical (Jpn) 1998 Konami + + - @@ -11039,16 +46595,17 @@ A few comments on these: - + Magical Tetris Challenge featuring Mickey Mouse (Jpn) 1999 Capcom - + + @@ -11057,16 +46614,17 @@ A few comments on these: - + Mahjong Yarouze! (Jpn) 1999 Konami - - + + + @@ -11075,16 +46633,17 @@ A few comments on these: - + Mahoutsukai ni Naru Houhou (Jpn) - 199? + 1999 TGL - + + @@ -11093,16 +46652,17 @@ A few comments on these: - + Majokko Daisakusen - Little Witching Mischiefs (Jpn) 1999 Bandai - + + @@ -11111,45 +46671,46 @@ A few comments on these: - + Makeruna! Makendo 2 (Jpn) 1995 Datam Polystar - + + @@ -11160,14 +46721,15 @@ A few comments on these: Marionette Company (Jpn) 1999 Micro Cabin - + + @@ -11176,16 +46738,17 @@ A few comments on these: - + Marionette Company 2 Chu! (Jpn) 2000 Micro Cabin - + + @@ -11196,14 +46759,15 @@ A few comments on these: Marl Jong!! (Jpn, Limited Edition) 2003 Nippon Ichi Software - + + @@ -11212,16 +46776,17 @@ A few comments on these: - + Marvel Super Heroes (Jpn) 1997 Capcom - + + @@ -11230,16 +46795,17 @@ A few comments on these: - + Marvel Super Heroes vs. Street Fighter - EX Edition (Jpn) 1999 Capcom - + + @@ -11248,16 +46814,17 @@ A few comments on these: - + Marvel vs. Capcom - Clash of Super Heroes - EX Edition (Jpn) 1999 Capcom - + + @@ -11266,16 +46833,17 @@ A few comments on these: - + The Master's Fighter (Jpn) 1997 Cinema Supply - + + @@ -11284,16 +46852,17 @@ A few comments on these: - + Masumon Kids - The Another World of The Master of Monsters (Jpn) 1998 Toshiba EMI - + + @@ -11302,16 +46871,18 @@ A few comments on these: - + + Hiroki Matsukata Presents - World Fishing (Jpn, BPS The Choice) 1999 - Bullet-Proof Software - + BPS + + @@ -11320,19 +46891,20 @@ A few comments on these: - + - Matsumoto Reiji - Story of Galaxy Express 999 (Jpn) + Matsumoto Leiji - Story of Galaxy Express 999 (Jpn) 2001 Banpresto + + - @@ -11348,14 +46920,15 @@ A few comments on these: MaxRacer (Jpn) 1997 PD - + + @@ -11366,14 +46939,15 @@ A few comments on these: Maze Heroes - Meikyuu Densetsu (Jpn) 2002 - Media - + Media Entertainment + + @@ -11384,18 +46958,19 @@ A few comments on these: Medarot R (Jpn) 1999 Imageneer - + + @@ -11404,19 +46979,20 @@ A few comments on these: - + Medarot R - Parts Collection (Jpn) 2000 Imageneer - + + @@ -11427,14 +47003,15 @@ A few comments on these: Megatudo 2096 (Jpn) 1996 Banpresto - + + @@ -11443,16 +47020,17 @@ A few comments on these: - + - Meisha Retsuden - Greatest 70's (Jpn) + Ikuzawa Touru Kanshuu - Meisha Retsuden - Greatest 70's (Jpn) 1997 Epoch - + + @@ -11461,16 +47039,17 @@ A few comments on these: - + - Meitantei Conan - Saikou No Aibou (Jpn) + Meitantei Conan - Saikou no Aibou (Jpn) 2002 Bandai - + + @@ -11479,16 +47058,17 @@ A few comments on these: - + Meitantei Conan - Trick Trick Vol.1 (Jpn) 2003 Bandai - + + @@ -11497,19 +47077,20 @@ A few comments on these: - + - Melty Lancer - The 3rd Planet (Jpn) + MeltyLancer - The 3rd Planet (Jpn) 1999 Konami + + - @@ -11523,16 +47104,17 @@ A few comments on these: - + - Menkyo O Torou (Get The License) (Jpn) + Menkyo o Torou (Jpn) 2000 Twilight Express - + + @@ -11541,16 +47123,17 @@ A few comments on these: - + Meremanoid (Jpn) 1999 Xing - + + @@ -11559,22 +47142,23 @@ A few comments on these: - + - Mermaid No Kisetsu - The Season of Mermaid (Jpn) + Mermaid no Kisetsu - The Season of Mermaid (Jpn) 2001 - Gamevillage + GameVillage + + - @@ -11593,19 +47177,20 @@ A few comments on these: - + - Meta-Ph-List Gamma X 2097 (Jpn) + Meta-Ph-List μ.χ.2297 (Jpn) 1997 - ADM - - + A.D.M + + + @@ -11619,19 +47204,20 @@ A few comments on these: - + Metal Angel 3 (Jpn) 1997 Pack-in-Soft + + - @@ -11645,16 +47231,17 @@ A few comments on these: - + Metal Fist (Jpn) 1998 Electronic Arts - + + @@ -11663,16 +47250,17 @@ A few comments on these: - + Mezase! Senkyuuou (Jpn) 1996 - Nihon System - + Seibu Kaihatsu + + @@ -11683,14 +47271,15 @@ A few comments on these: - Michinoku Hitou Koi monogatari - Bishoujo Hanafuda Kikou (Jpn) + Michinoku Hitou Koi Monogatari - Bishoujo Hanafuda Kikou (Jpn) 1997 FOG - + + @@ -11701,14 +47290,15 @@ A few comments on these: - Michinoku Hitou Koi monogatari Kai (Jpn) + Michinoku Hitou Koi Monogatari Kai (Jpn) 1999 FOG - + + @@ -11717,16 +47307,17 @@ A few comments on these: - + - Mini Moni Shaker & Tambourine! Dapyon! (Jpn) + Mini Moni. Shaker & Tambourine! Dapyon! (Jpn) 2002 Sega - + + @@ -11735,16 +47326,17 @@ A few comments on these: - + - Mini Moni - Step Pyon Pyon Pyon (Jpn) + Mini Moni. - Step Pyon Pyon Pyon (Jpn) 2002 Konami + + - @@ -11755,14 +47347,15 @@ A few comments on these: Mini-Yonku Bakusou Kyoudai Let's & Go!! - WGP Hyper Heat (Jpn) 1997 Jaleco - + + @@ -11771,16 +47364,17 @@ A few comments on these: - + Minna Atsumore! Igo Kyoushitsu (Jpn) 2003 - I.Magic - + I.Magic. + + @@ -11791,14 +47385,15 @@ A few comments on these: - Misaki-Aggressive! (Jpn) + Misaki Aggressive! (Jpn) 1998 Shoeisha - + + @@ -11807,16 +47402,17 @@ A few comments on these: - + - Rock-Climbing - Mitouhou e no Chousen - Alps-Hen (Jpn) + Rock Climbing - Mitouhou e no Chousen - Alps-Hen (Jpn) 1997 - We Net + WENet + + - @@ -11827,14 +47423,15 @@ A few comments on these: Mizzurna Falls (Jpn) 1998 Human - + + @@ -11843,16 +47440,17 @@ A few comments on these: - + Momotarou Densetsu (Jpn) 1998 Hudson - + + @@ -11861,16 +47459,17 @@ A few comments on these: - + Momotarou Matsuri (Jpn) 2001 Hudson - + + @@ -11879,26 +47478,27 @@ A few comments on these: - + Money Idol Exchanger (Jpn) 1998 Athena - + + @@ -11907,16 +47507,17 @@ A few comments on these: - + Monster Collection - Kamen no Madoushi (Jpn) 1999 - Kadokawa Shote - + Kadokawa Shoten + + @@ -11925,16 +47526,17 @@ A few comments on these: - + Monster Farm - Battle Card Professional (Jpn) 2000 Tecmo - + + @@ -11943,16 +47545,17 @@ A few comments on these: - + - Monster Paradise (Jpn) + Kaibutsu Para-Dice (Jpn) 1997 Make Software - + + @@ -11961,16 +47564,17 @@ A few comments on these: - + Mori no Oukoku - Kingdom of Forest (Jpn) 1999 Asmik Ace - + + @@ -11979,16 +47583,17 @@ A few comments on these: - + Mouri Motonari - Chikai no Sanshi (Jpn) 1998 Koei - + + @@ -11998,16 +47603,17 @@ A few comments on these: - + Mr. Driller G (Jpn) 2001 Namco - + + @@ -12016,16 +47622,17 @@ A few comments on these: - + - Muscle Ranking - Kinniku Banzuke Vol.2 - Aratanaru Genkai e No Chousen! (Jpn) + Muscle Ranking - Kinniku Banzuke Vol.2 - Aratanaru Genkai e no Chousen! (Jpn) 2000 Konami - - + + + @@ -12034,16 +47641,17 @@ A few comments on these: - + My Home Dream 2 - Niwatsuki Ikkodate De, Ikou! (Jpn) 1999 Victor - + + @@ -12052,16 +47660,17 @@ A few comments on these: - + Mystic Ark - Maboroshi Gekijou (Jpn) 1999 Enix - + + @@ -12070,16 +47679,17 @@ A few comments on these: - + The Mystic Dragoons (Jpn) 1999 Xing - + + @@ -12090,14 +47700,15 @@ A few comments on these: Nage Libre - Rasen No Soukoku 1997 Varie - + + @@ -12106,16 +47717,17 @@ A few comments on these: - + - Namjabu no Daibouken - My Favorite Namjatown (Jpn) + Najavu no Daibouken - My Favorite Namjatown (Jpn) 2000 Namco - + + @@ -12124,22 +47736,23 @@ A few comments on these: - + Nanatsu no Hikan (Jpn) 1996 - KOEI + Koei + + - @@ -12158,16 +47771,17 @@ A few comments on these: - + Naniwa no Akindo - Futte Nanbo no Saikoro Jinsei (Jpn) 1997 - Sony - + Sony Music Entertainment + + @@ -12178,14 +47792,15 @@ A few comments on these: Nankuro (Jpn, SuperLite 1500 Series) 1999 Success - + + @@ -12194,68 +47809,77 @@ A few comments on these: - + Natsuiro Kenjutsu Komachi (Jpn, Limited Edition, Disc 1 Only) 2000 - NEC - - + NEC Interchannel + + + + - + Navit (Jpn) 1998 Artdink - + + @@ -12264,16 +47888,17 @@ A few comments on these: - + NBA Power Dunkers 4 (Jpn) 1999 Konami + + - @@ -12282,15 +47907,17 @@ A few comments on these: - + Nemuru Mayu - Sleeping Cocoon (Jpn) 2000 Asmik Ace + + @@ -12299,19 +47926,20 @@ A few comments on these: - + Neorude (Jpn) 1997 TechnoSoft - - + + + @@ -12327,14 +47955,15 @@ A few comments on these: Neorude 2 (Jpn) 1997 TechnoSoft - + + @@ -12345,14 +47974,15 @@ A few comments on these: Next King - Koi no Sennen Oukoku (Jpn) 1997 Bandai - + + @@ -12362,16 +47992,17 @@ A few comments on these: - + The Next Tetris - Deluxe DLX (Jpn) 1999 BPS - + + @@ -12381,16 +48012,17 @@ A few comments on these: - + The Next Tetris (Jpn) 1999 Bullet Proof - + + @@ -12399,16 +48031,17 @@ A few comments on these: - + Nichibutsu Arcade Classics (Jpn) 1995 Nichibutsu - + + @@ -12419,14 +48052,15 @@ A few comments on these: Night Raid (Jpn) 2002 Takumi - + + @@ -12435,16 +48069,17 @@ A few comments on these: - + Nijiiro Dodgeball - Otometachi no Seishun (Jpn) 2002 Atlus - + + @@ -12453,16 +48088,17 @@ A few comments on these: - + Ningyo no Rakuin (Jpn) 2000 NEC Interchannel + + - @@ -12473,14 +48109,15 @@ A few comments on these: - Ninja Jaja Marukun - Onigiri Ninpoucho (Jpn) + Ninja Jajamaru-kun - Onigiri Ninpouchou (Jpn) 1997 Jaleco - + + @@ -12489,16 +48126,17 @@ A few comments on these: - + Ninku (Jpn) 1995 Tomy - + + @@ -12507,17 +48145,18 @@ A few comments on these: - + Ninpu Sentai Harikenger (Jpn) 2002 Bandai - + + @@ -12528,14 +48167,15 @@ A few comments on these: - Nobunaga no Yabou - Reppuuden (Jpn) + Nobunaga no Yabou - Retsuupuden (Jpn) 1999 - KOEI - + Koei + + @@ -12544,22 +48184,23 @@ A few comments on these: - + - Noël 3 - Mission on the Line (Jpn) + NOëL 3 - Mission on the Line (Jpn) 1999 - Pioneer - - + Pioneer LDC + + + @@ -12578,16 +48219,17 @@ A few comments on these: - + Not Treasure Hunter (Jpn) 1996 Acti-Art - + + @@ -12596,19 +48238,20 @@ A few comments on these: - + Novastorm (Jpn) - 1995 - Victor + 1996 + Victor Entertainment + + - @@ -12622,16 +48265,17 @@ A few comments on these: - + Nya Nyan ga Nyan - Light Fantasy Gaiden (Jpn) 1999 Tonkin House - + + @@ -12640,16 +48284,17 @@ A few comments on these: - + Oasis Road (Jpn) 1999 Idea Factory - + + @@ -12658,16 +48303,17 @@ A few comments on these: - + Oda Nobunaga Den (Jpn) 1998 - KOEI - + Koei + + @@ -12676,16 +48322,17 @@ A few comments on these: - + Odo Odo Oddity (Jpn) 1997 - IDC - + I.D.C. + + @@ -12694,16 +48341,17 @@ A few comments on these: - + - Oja Majo Do-Re-Mi Dokkaan! Nijiiro Para-Dice (Jpn) + Ojamajo Doremi Dokka~n! Nijiiro Para-Dice (Jpn) 2002 Bandai - + + @@ -12714,17 +48362,18 @@ A few comments on these: Ojousama Express (Jpn) 1998 - Media Works + MediaWorks + + - @@ -12738,16 +48387,17 @@ A few comments on these: - + Olympia Yamasa - Virtua Pachi-Slot II - Jissen! Bishoujo Kouryaku Hou (Jpn) 1997 Map Japan - + + @@ -12758,14 +48408,15 @@ A few comments on these: - Omiaikomandoh Bakappuru Ni Tukkomi Wo (Jpn) + Omiai Commando - Bakappuru ni Tsukkomi o (Jpn) 2000 Enix + + - @@ -12774,16 +48425,17 @@ A few comments on these: - + Omise de Tensyu (Jpn) 1999 TechnoSoft - + + @@ -12792,16 +48444,17 @@ A few comments on these: - + One (Jpn) 1999 Capcom - + + @@ -12810,16 +48463,17 @@ A few comments on these: - + - One Two Smash - Tanoshii Tennis (Jpn) + One Two Smash - Tanoshii Tennis (Jpn, Honkakuha de 1300Yen Series) 2000 Hect - + + @@ -12828,16 +48482,17 @@ A few comments on these: - + - Ongaku Tsukuru - Kanade-Ru 2 (Jpn) + Ongaku Tsukuru Kanadeeru 2 (Jpn) 1998 ASCII - + + @@ -12846,16 +48501,17 @@ A few comments on these: - + Ongaku Tsukuru 3 (Jpn) 2001 EnterBrain - + + @@ -12864,26 +48520,27 @@ A few comments on these: - + - OPTION Tuning Car Battle Spec-R (Jpn) + Option Tuning Car Battle Spec-R (Jpn) 2000 MTO - + + @@ -12892,16 +48549,17 @@ A few comments on these: - + - Ore No Ryouri (Jpn) + Ore no Ryouri (Jpn) 1999 - Sony - + SCEI + + @@ -12910,16 +48568,17 @@ A few comments on these: - + Ore! Tomba (Jpn) 1997 Whoopee Camp - + + @@ -12928,16 +48587,17 @@ A few comments on these: - + Oshigotoshiki Jinsei Game - Mezase Shokugyou-oh (Jpn) 2000 Takara - + + @@ -12946,16 +48606,17 @@ A few comments on these: - + - Ouji-Sama Lv1 (Jpn) + Ouji-sama LV1 (Jpn) 2002 KID - + + @@ -12964,16 +48625,17 @@ A few comments on these: - + - Oukyuu no Hihou - Tenshon (Jpn) + Oukyuu no Hihou - Tension (Jpn) 1996 VAP - + + @@ -12982,16 +48644,17 @@ A few comments on these: - + Oumagatoki (Jpn) 2001 - Victor - + Victor Interactive Software + + @@ -13000,16 +48663,17 @@ A few comments on these: - + Out Live - Be Eliminate Yesterday (Jpn) 1997 Sunsoft - + + @@ -13018,16 +48682,17 @@ A few comments on these: - + - Pacapaca Passion (Jpn) + Paca Paca Passion (Jpn) 1999 Produce! - + + @@ -13036,16 +48701,17 @@ A few comments on these: - + - Pacapaca Passion 2 (Jpn) + Paca Paca Passion 2 (Jpn) 2000 Produce! - + + @@ -13054,16 +48720,17 @@ A few comments on these: - + Pachi Pachi Saga (Jpn) 1996 TEN Institute - + + @@ -13072,29 +48739,30 @@ A few comments on these: - + - Pachi-Slot Aruze Oukoku 5 - Slotmachine Simulator (Jpn) + Pachi-Slot Aruze Oukoku 5 (Jpn) 2001 Aruze - + + @@ -13103,16 +48771,17 @@ A few comments on these: - + Pachi-Slot Teiou - Battle Knight & Atlantis Doom (Jpn) 2000 - Media - + Media Entertainment + + @@ -13121,16 +48790,17 @@ A few comments on these: - + - Pachi-Slot Teiou - Twist - Shimauta 30 - Nankoku Monogatari (Jpn) + Pachi-Slot Teiou - Twist & Shimauta & Nankoku Monogatari (Jpn) 2002 - Media - + Media Entertainment + + @@ -13139,16 +48809,17 @@ A few comments on these: - + - Pachi-Slot Teiou 2 - Kagetsu - 2 Pair - Beaver X (Jpn) + Pachi-Slot Teiou 2 - Kagetsu & 2 Pair & Beaver X (Jpn) 1999 - Mecko - + Media Entertainment + + @@ -13157,16 +48828,17 @@ A few comments on these: - + - Pachi-Slot Teiou 3 - Sea Master - Epsilon R - Wai Wai Pulsa (Jpn) + Pachi-Slot Teiou 3 - Sea Master X & Epsilon R & Wai Wai Pulsar 2 (Jpn) 1999 - Media - + Media Entertainment + + @@ -13175,16 +48847,17 @@ A few comments on these: - + - Pachi-Slot Teiou 6 - Kung Fu Lady - BangBang - Prelude 2 (Jpn) + Pachi-Slot Teiou 6 - Kung Fu Lady & BangBang & Prelude 2 (Jpn) 2000 - Media - + Media Entertainment + + @@ -13193,16 +48866,17 @@ A few comments on these: - + - Pachi-Slot Teiou 7 (Jpn) + Pachi-Slot Teiou 7 - Maker Suishou Manual 1 - Beat the Dragon 2 & Lupin Sansei & Hot Rod Queen (Jpn) 2000 - Media - + Media Entertainment + + @@ -13211,16 +48885,17 @@ A few comments on these: - + - Pachi-Slot Teiou - Maker Suishou Manual 3 - I'm Angel White 2 & Blue 2 (Jpn) + Pachi-Slot Teiou - Maker Suishou Manual 3 - I'm Angel White 2 & I'm Angel Blue 2 (Jpn) 2001 - Media - + Media Entertainment + + @@ -13229,16 +48904,17 @@ A few comments on these: - + - Pachi-Slot Teiou - Maker Suishou Manual 5 - Race Queen 2 - Tomcat (Jpn) + Pachi-Slot Teiou - Maker Suishou Manual 5 - Race Queen 2 & Tomcat (Jpn) 2001 - Media - + Media Entertainment + + @@ -13247,16 +48923,17 @@ A few comments on these: - + Pachi-Slot Teiou Maker Suishou Manual 6 - Takarabune (Jpn) 2001 - <unknown> - + Media Entertainment + + @@ -13265,16 +48942,17 @@ A few comments on these: - + Pachi-Slot Teiou - Maker Suishou Manual 7 - Trick Monster 2 (Jpn) 2002 - Media - + Media Entertainment + + @@ -13283,16 +48961,17 @@ A few comments on these: - + Pachi-Slot Teiou Mini - Dr. A7 (Jpn) 1999 - Media - + Media Entertainment + + @@ -13303,14 +48982,15 @@ A few comments on these: Palm Town (Jpn) 1999 MyCom - + + @@ -13319,17 +48999,18 @@ A few comments on these: - + Panzer Bandit (Jpn) 1997 Banpresto - + + @@ -13338,16 +49019,17 @@ A few comments on these: - + Panzer Front bis. (Jpn) 2001 Enterbrain - + + @@ -13358,14 +49040,15 @@ A few comments on these: Paranoia Scape (Jpn) 1998 Mathilda - + + @@ -13374,16 +49057,17 @@ A few comments on these: - + Parlor! Pro Jr. Collection (Jpn) 2000 Nihon Telenet - + + @@ -13394,14 +49078,15 @@ A few comments on these: Paro Wars (Jpn) 1997 Konami + + - @@ -13412,14 +49097,15 @@ A few comments on these: PD Ultraman Invader (Jpn) 1995 Bandai - + + @@ -13430,21 +49116,22 @@ A few comments on these: Pepsiman (Jpn) 1999 KID - + + @@ -13453,16 +49140,17 @@ A few comments on these: - + Perfect Fishing - Rock Fishing (Jpn) 2000 Seta - + + @@ -13472,16 +49160,17 @@ A few comments on these: - + Pikinya! Excellent (Japan) 1998 ASCII - + + @@ -13493,14 +49182,15 @@ A few comments on these: Pinball Fantasies Deluxe (Jpn) 1996 - VAP (NTV) - + VAP + + @@ -13509,16 +49199,17 @@ A few comments on these: - + Pitfall 3D - Beyond the Jungle (Jpn) 1998 - Victor - + Victor Interactive Software + + @@ -13527,16 +49218,17 @@ A few comments on these: - + Planet Dob (Jpn) 1999 Hudson - + + @@ -13545,16 +49237,17 @@ A few comments on these: - + Planet Laika (Jpn) 1999 Enix - + + @@ -13563,16 +49256,17 @@ A few comments on these: - + - Pocket DigimonWorld (Jpn) + Pocket Digimon World (Jpn) 2000 Bandai - + + @@ -13581,16 +49275,17 @@ A few comments on these: - + - Pocket DigimonWorld - Wind Battle Disc (Jpn) + Pocket Digimon World - Wind Battle Disc (Jpn) 2000 Bandai - + + @@ -13599,16 +49294,17 @@ A few comments on these: - + - Pocket DigimonWorld Cool & Nature Battle Disc (Jpn) + Pocket Digimon World - Cool & Nature Battle Disc (Jpn) 2001 Bandai - + + @@ -13617,16 +49313,17 @@ A few comments on these: - + Pocket Fighter (Jpn) 1998 Capcom - + + @@ -13637,14 +49334,15 @@ A few comments on these: - Pocket Muumuu (Jpn) + Pocket MuuMuu (Jpn) 1999 - Sony - + SCEI + + @@ -13653,16 +49351,17 @@ A few comments on these: - + Poitter's Point 2 - Sodom no Inbou (Jpn) 1998 Konami - - + + + @@ -13671,16 +49370,17 @@ A few comments on these: - + Policenauts - Private Collection (Jpn) 1996 Konami - + + @@ -13689,16 +49389,17 @@ A few comments on these: - + Pop'n Music - Disney Tunes (Jpn) 2000 Konami + + - @@ -13708,16 +49409,17 @@ A few comments on these: - + Pop'n Pop (Jpn) 1998 Taito - + + @@ -13729,14 +49431,15 @@ A few comments on these: Pop'n Tanks! (Jpn) 1999 Enix - + + @@ -13747,14 +49450,15 @@ A few comments on these: Potestas (Jpn) 1996 Nexus + + - @@ -13763,16 +49467,17 @@ A few comments on these: - + Power Shovel ni Norou!! (Jpn) 2000 Taito + + - @@ -13781,16 +49486,17 @@ A few comments on these: - + Power Stakes (Jpn) 1997 Aques - + + @@ -13799,16 +49505,17 @@ A few comments on these: - + Power Stakes Grade 1 (Jpn) 1997 Aques - + + @@ -13817,16 +49524,17 @@ A few comments on these: - + Princess Maker - Go! Go! Princess (Jpn) 1999 NineLives - + + @@ -13835,16 +49543,17 @@ A few comments on these: - + Prism Court (Jpn) 1998 FPS - + + @@ -13855,14 +49564,15 @@ A few comments on these: Prisoner (Jpn) 1999 Mainichi - + + @@ -13871,16 +49581,17 @@ A few comments on these: - + Pro Mahjong Kiwame Plus (Jpn) 1996 Athena - + + @@ -13889,16 +49600,17 @@ A few comments on these: - + Pro Mahjong Kiwame Tengensenhen (Jpn) 1999 Athena - + + @@ -13907,16 +49619,17 @@ A few comments on these: - + Pro Wrestling Sengokuden - Hyper Tag Match (Jpn) 1997 KSS - + + @@ -13925,18 +49638,19 @@ A few comments on these: - + Pro Logic Mahjong Hai-Shin (Jpn) - 1996 + 1997 Aques - + + @@ -13948,14 +49662,15 @@ A few comments on these: Puchi Carat (Jpn) 1998 Taito - + + @@ -13964,16 +49679,17 @@ A few comments on these: - + - Pukunpa Joshikousei No Houkago... (Jpn) + Pukunpa - Joshikousei no Houkago... (Jpn) 1996 Athena - + + @@ -13983,16 +49699,17 @@ A few comments on these: - + Puyo Puyo Box (Jpn) 2000 Compile - + + @@ -14003,14 +49720,15 @@ A few comments on these: - Puyo Puyo 4 - Car-Kun to Issho (Jpn) + Puyo Puyo 4 - Car-kun to Issho (Jpn) 1999 Compile - + + @@ -14020,16 +49738,17 @@ A few comments on these: - + - Puzzle Arena To Shin Den (Jpn) + Puzzle Arena Toshinden (Jpn) 1997 Takara - + + @@ -14039,16 +49758,17 @@ A few comments on these: - + Puzzle Bobble 3 DX (Jpn) 1997 Taito - + + @@ -14058,16 +49778,17 @@ A few comments on these: - + Puzzle Bobble 4 (Jpn) 1998 Taito - + + @@ -14077,16 +49798,17 @@ A few comments on these: - + - Qix 2000 (Jpn, Superlite 1500 Series) + Qix 2000 (Jpn, SuperLite 1500 Series) 2000 Success - + + @@ -14095,17 +49817,18 @@ A few comments on these: - + Quantum Gate I - Akumu no Joshou (Jpn) 1997 Gaga - + + @@ -14114,16 +49837,17 @@ A few comments on these: - + Quiz Charaokedon! Toei Tokusatsu Hero Part 2 (Jpn) 1999 Banpresto - + + @@ -14133,16 +49857,17 @@ A few comments on these: - + - Quiz Darake No Jinsei Game (Jpn) - 1997 + Quiz Darake no Jinsei Game - Un to Atama de Daifuugou!? (Jpn) + 1999 Takara - + + @@ -14154,14 +49879,15 @@ A few comments on these: Quiz$Millionaire (Jpn) 2001 Eidos - + + @@ -14173,17 +49899,18 @@ A few comments on these: Quo Vadis - Iberukatsu Seneki (Jpn) 1997 Glams - + + @@ -14195,14 +49922,15 @@ A few comments on these: - Race Driving' A Go! Go! (Jpn) + Race Drivin' A Go! Go! (Jpn) 1996 Time Warner - + + @@ -14214,14 +49942,15 @@ A few comments on these: Rakugaki Showtime (Jpn) 1999 Enix - + + @@ -14231,16 +49960,17 @@ A few comments on these: - + Rally de Africa (Jpn) 1998 Prism Arts - + + @@ -14250,16 +49980,17 @@ A few comments on these: - + Rally de Europe (Jpn) 2000 Prism Arts - + + @@ -14269,16 +50000,17 @@ A few comments on these: - + - Rami-Chan No Ooeto Surogoku: Keio Yugekitai Gaiden (Jpn) + Rami-Chan no Ooedo Surogoku - Keiou Yuugekitai Gaiden (Jpn) 1998 - Victor - + Victor Interactive Software + + @@ -14288,17 +50020,18 @@ A few comments on these: - + - Ranma 1/2 Battle Renaissance (Jpn) + Ranma ½ - Battle Renaissance (Jpn) 1996 Shogakukan - + + @@ -14308,16 +50041,17 @@ A few comments on these: - + Ray Tracers (Jpn) 1997 Taito - + + @@ -14327,16 +50061,17 @@ A few comments on these: - + Rayman (Jpn) 1995 Ubisoft - + + @@ -14346,16 +50081,17 @@ A few comments on these: - + Ready Maid (Jpn) 2002 Princess - + + @@ -14365,19 +50101,20 @@ A few comments on these: - + Real Bout Garou Densetsu Special - Dominated Mind (Jpn, Limited Edition) 1998 SNK - - + + + @@ -14386,7 +50123,7 @@ A few comments on these: - + @@ -14394,26 +50131,27 @@ A few comments on these: Real Robots - Final Attack (Jpn) 1998 Banpresto - + + @@ -14423,16 +50161,17 @@ A few comments on these: - + Recipro Heat 5000 (Jpn) 1997 Xing - + + @@ -14441,39 +50180,21 @@ A few comments on these: - - - - Rescue Shot Bubibo & BioHazard - Gun Survivor (Jpn, Demo) - 200? - SCEI - - - - - - - - - - Return to Zork (Jpn) 1996 Bandai + + - @@ -14488,21 +50209,22 @@ A few comments on these: - + Ridegear Guybrave II (Jpn) 1998 Axela + + - @@ -14517,16 +50239,17 @@ A few comments on these: - + - Rikujou Boueitai Maochan (Jpn, Deluxe Pack) + Rikujou Boueitai Mao-chan (Jpn, Deluxe Pack) 2003 Marvelous - + + @@ -14538,14 +50261,15 @@ A few comments on these: Riot Stars (Jpn) 1997 Hect - + + @@ -14555,16 +50279,17 @@ A few comments on these: - + Rise of Robots 2 - Resurrection (Jpn) 1996 Acclaim - + + @@ -14574,17 +50299,18 @@ A few comments on these: - + Rising Zan - The Samurai Gunman (Jpn) 1999 UEP - + + @@ -14593,16 +50319,17 @@ A few comments on these: - + Robin Lloyd no Daibouken (Jpn) 2000 Gust - + + @@ -14611,16 +50338,17 @@ A few comments on these: - + - Robot-X-Robot (Jpn) + Robot X Robot (Jpn) 1999 Nemesys - + + @@ -14629,16 +50357,17 @@ A few comments on these: - + Roommate - Inoue Ryoko (Jpn) 1999 Datam Polystar - + + @@ -14648,16 +50377,17 @@ A few comments on these: - + Running High (Jpn) 1997 - REX - + REX Entertainment + + @@ -14666,16 +50396,17 @@ A few comments on these: - + S.Q. - Sound Qube (Jpn) 1998 - <unknown> - + Human + + @@ -14684,16 +50415,17 @@ A few comments on these: - + Sakkyoku Surundamon - Dance Remix (Jpn) 2000 Ving - + + @@ -14702,16 +50434,17 @@ A few comments on these: - + - Sakuma-shiki Jinsei Game (Jpn) + Sakuma Shiki Jinsei Game (Jpn) 1998 Takara - + + @@ -14720,16 +50453,17 @@ A few comments on these: - + Salary Man Champ - Tatakau Salary Man (Jpn) 2001 Success - + + @@ -14738,16 +50472,17 @@ A few comments on these: - + - Salaryman Kintarou - The Game (Jpn) + Salary Man Kintarou - The Game (Jpn) 2000 Bandai - + + @@ -14756,16 +50491,17 @@ A few comments on these: - + Salary Man Settai Mahjong (Jpn) 2001 Visit - + + @@ -14774,16 +50510,17 @@ A few comments on these: - + Samurai Deeper Kyo (Jpn, Limited Edition) 2002 Bandai - + + @@ -14792,17 +50529,18 @@ A few comments on these: - + Samurai Spirits - Kenkaku Yubinan Pack (Jpn) 1998 SNK - + + @@ -14812,16 +50550,18 @@ A few comments on these: - + + Samurai Spirits - Zankurou Musouken (Jpn, PlayStation the Best) 1997 SNK - + + @@ -14830,16 +50570,17 @@ A few comments on these: - + - Sangokushi Eiketsuden (Jpn) + Sangokushi - Eiketsuden (Jpn) 1996 Koei - + + @@ -14850,14 +50591,15 @@ A few comments on these: - Sangokushi Koumeiden (Jpn) + Sangokushi - Koumeiden (Jpn) 1997 Koei - + + @@ -14868,14 +50610,15 @@ A few comments on these: Sangokushi II (Jpn) 1998 Koei - + + @@ -14886,14 +50629,15 @@ A few comments on these: Sangokushi III (Jpn) 2001 Koei - + + @@ -14902,16 +50646,17 @@ A few comments on these: - + Sangokushi Returns (Jpn) 1997 Koei - + + @@ -14922,14 +50667,15 @@ A few comments on these: - Sangokushi V (Jpn) - 1997 + Sangokushi V (Asia) + 1997? Koei - + + @@ -14940,14 +50686,15 @@ A few comments on these: Sangokushi VI (Jpn) 1998 Koei - + + @@ -14956,16 +50703,17 @@ A few comments on these: - + Sanyo Pachinko Paradise 2 - Umi Monogatari Special (Jpn) 1999 Irem - + + @@ -14974,16 +50722,17 @@ A few comments on these: - + Saru! Get You! (Jpn) 1999 - Sony - + SCEI + + @@ -14992,16 +50741,17 @@ A few comments on these: - + - Satelli TV (Jpn) + SatelliTV (Jpn) 1998 Nippon Ichi - + + @@ -15010,16 +50760,17 @@ A few comments on these: - + Satomi no Nazo (Jpn) 1996 Sound Technology Japan - + + @@ -15030,14 +50781,15 @@ A few comments on these: - Schrödinger no Neko - Die Katze von Schrödinger (Jpn) + Schrödinger no Neko - Die Katze von Schrödinger (Jpn) 1997 Takara - + + @@ -15046,16 +50798,17 @@ A few comments on these: - + - SD Gundam Eiyuuden Daikessen - Knight vs. Musha (Jpn) + SD Gundam Eiyuu Den Daikessen!! - Kishi vs. Musha (Jpn) 2001 Bandai - + + @@ -15064,25 +50817,26 @@ A few comments on these: - + - SD Gundam G Generation-F (Limited Edition)(Japan) + SD Gundam G Generation-F (Jpn, Limited Edition) 2000 Bandai - - + + + @@ -15101,16 +50855,17 @@ A few comments on these: - + - SD Gundam G - Generation-F.I.F (Jpn) + SD Gundam G Generation-F.I.F (Jpn) 2001 Bandai - + + @@ -15119,22 +50874,23 @@ A few comments on these: - + - SD Gundam G - Generation Zero (Jpn) + SD Gundam G - Generation-0 (Jpn) 1999 Bandai + + - @@ -15153,16 +50909,17 @@ A few comments on these: - + - Seabass Fishing 2 (Jpn) + SeaBass Fishing 2 (Jpn) 1997 - Victor - + Victor Interactive Software + + @@ -15171,16 +50928,17 @@ A few comments on these: - + - Seikai no Monshou (Crest of the Stars) (Jpn) + Seikai no Monshou (Jpn) 2000 Bandai - + + @@ -15189,15 +50947,14 @@ A few comments on these: - + - Seiken Densetsu - Legend of Mana (Jpn, Demo) + Square's Preview 5 (Jpn, Seiken Densetsu Demo) 1999 Squaresoft - @@ -15207,16 +50964,17 @@ A few comments on these: - + - Seirishoukan - Princess of Darkness (Jpn) + Seirei Shoukan - Princess of Darkness (Jpn) 1998 Shoeisha - + + @@ -15227,14 +50985,15 @@ A few comments on these: Sengoku Mugen (Jpn) 2001 Banpresto - + + @@ -15243,16 +51002,17 @@ A few comments on these: - + - Senkai Taisen TV Animation Senkaiden Houshin Engi Yori (Jpn) + Senkai Taisen - TV Animation Senkaiden Houshin Engi Yori (Jpn) 2000 Bandai - + + @@ -15263,14 +51023,15 @@ A few comments on these: - Senryaku Shidan - Tora! Tora! Tora! Rikusenhen (Jpn) + Senryaku Shidan - Tora! Tora! Tora! Rikusen-hen (Jpn) 2000 DaZZ + + - @@ -15279,16 +51040,17 @@ A few comments on these: - + Sentimental Graffiti (Jpn) 2001 - NEC + NEC Interchannel + + - @@ -15297,16 +51059,17 @@ A few comments on these: - + Sentou Kokka Kai - Improved (Jpn) 1997 - Sony - + SCEI + + @@ -15315,16 +51078,17 @@ A few comments on these: - + - Shachou Eiyuuden - The Eagle Shooting Heroes (Jpn) - 2000 - Sony - + Shachou Eiyuuden - The Eagle Shooting Heroes (Asia) + 2000? + SCEI + + @@ -15333,17 +51097,18 @@ A few comments on these: - + - Shibas 1-2-3 Destiny! Unmei O Kaerusha! (Jpn) + Shibas 1-2-3 - Destiny! Unmei O Kaerusha! (Jpn) 2000 Jaleco - + + @@ -15352,16 +51117,17 @@ A few comments on these: - + Shin Masoukishin - Panzer Warfare (Jpn) 1999 Banpresto - + + @@ -15370,16 +51136,17 @@ A few comments on these: - + Shin Megami Tensei (Jpn) 2001 Atlus - + + @@ -15388,16 +51155,17 @@ A few comments on these: - + Shin SD Sengokuden - Kidou Musha Taisen (Jpn, Limited Edition) 1996 Bandai - + + @@ -15407,16 +51175,17 @@ A few comments on these: - + Shin Theme Park (Jpn) 1997 - Electronic Arts - + Electronic Arts Victor + + @@ -15425,16 +51194,17 @@ A few comments on these: - + The Shinri Game (Jpn) 1996 Visit - + + @@ -15443,16 +51213,17 @@ A few comments on these: - + Shinseiden Megaseed Fukkatsu-Hen (Jpn) 1997 Banpresto - + + @@ -15461,19 +51232,20 @@ A few comments on these: - + - Shinsetsu Samurai Spirits - Bushido Retsuden (Jpn) + Shinsetsu Samurai Spirits - Bushidou Retsuden (Jpn) 1997 SNK - + + @@ -15482,19 +51254,20 @@ A few comments on these: - + Shiritsu Justice Gakuen - Legion of Heroes (Jpn) 1998 Capcom - - + + + @@ -15508,16 +51281,17 @@ A few comments on these: - + Shiritsu Justice Gakuen - Nekketsu Seishun Nikki 2 (Jpn) 1999 Capcom - + + @@ -15526,16 +51300,17 @@ A few comments on these: - + - Shoryu Sangokuengi (Jpn) + Shouryuu Sangoku Engi (Jpn) 1996 Imageneer - + + @@ -15544,36 +51319,37 @@ A few comments on these: - + Shura no Mon (Jpn) 1998 Kodansha - + + @@ -15582,35 +51358,17 @@ A few comments on these: - - + - Side by Side Special 2000 (Jpn) - 1999 - Taito - - - - - - - - - - - - Side Pocket 3 - 3D Polygon Billiard Game (Jpn) 1998 Data East - + + @@ -15621,14 +51379,15 @@ A few comments on these: Sidewinder (Jpn) 1996 Asmik - + + @@ -15637,34 +51396,44 @@ A few comments on these: - + + - Silent Möbius - Genei no Datenshi (Jpn) + Silent Möbius - Genei no Datenshi (Jpn, Disc 1 Only) 1998 Bandai - + + - + + - + Silhouette Mirage - Reprogrammed Hope (Jpn) 1998 ESP - + + @@ -15675,14 +51444,15 @@ A few comments on these: Silhouette Stories (Jpn) 1996 Kaneko - + + @@ -15691,17 +51461,421 @@ A few comments on these: - - + + Simple 1500 Series Vol.37 - The Illustration Puzzle & Slide Puzzle (Jpn) + 2000 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.51 - The Jigsaw Puzzle (Jpn) + 2000 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.63 - The Gun Shooting 2 (Jpn) + 2001 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.67 - The Soccer - Dynamite Soccer 1500 (Jpn) + 2001 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.71 - The Renai Simulation 2 (Jpn) + 2001 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.72 - The Beach Volley (Jpn) + 2001 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.73 - The Invaders - Space Invaders 1500 (Jpn) + 2001 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.76 - The Dodgeball (Jpn) + 2001 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.83 - The Wakeboard - BursTrick Wake Boarding!! (Jpn) + 2001 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.85 - The Sengoku Bushou - Tenka Touitsu no Yabou (Jpn) + 2002 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.88 - The Gal Mahjong - Love Songs - Idol wa High Rate (Jpn) + 2002 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.89 - The Power Shovel - Power Shovel ni Norou! (Jpn) + 2002 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.90 - The Sensha (Jpn) + 2002 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series Vol.93 - The Puzzle Bobble 4 (Jpn) + 2002 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series vol.97 - The Squash (Jpn) + 2002 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series Vol.99 - The Kendo - Ken no Hanamichi (Jpn) + 2002 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 series vol.101 - The Sentou (Jpn) + 2003 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series Vol.102 - The Densha Untensha - Densha de Go! - Nagoya Tetsudou-hen (Jpn) + 2002 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series Vol.103 - The Ganso Densha Utenshi - Densha De Go! (Jpn) + 2003 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Series Vol.104 - The Pink Panther - Pinkadelic Pursuit (Jpn) + 2003 + D3 Publisher + + + + + + + + + + + + + + Simple 1500 Jitsuyou Series Vol.01 - Norikae Annai -2000 Edition- (Jpn) 2000 - D3 - + D3 Publisher + + @@ -15711,16 +51885,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.03 - Seimei Handan (Jpn) 2000 - D3 - + D3 Publisher + + @@ -15730,16 +51905,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.04 - Ryouri (Jpn) 2000 - D3 - + D3 Publisher + + @@ -15749,16 +51925,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.05 - Kusuri no Jiten - Pill Book 2001 Edition (Jpn) 2001 - D3 - + D3 Publisher + + @@ -15768,16 +51945,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.06 - Cocktail no Recipe (Jpn) 2001 - D3 - + D3 Publisher + + @@ -15787,16 +51965,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.07 - Tanoshiku Manabu Unten Menkyo (Jpn) 2001 - D3 - + D3 Publisher + + @@ -15806,16 +51985,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.08 - 1-Jikan de Wakaru Kabushiki Toushi (Jpn) 2001 - D3 - + D3 Publisher + + @@ -15825,16 +52005,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.09 - Watashi Style no Aromatherapy (Jpn) 2001 - D3 - + D3 Publisher + + @@ -15844,16 +52025,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.10 - Tarot Uranai (Jpn) 2001 - D3 - + D3 Publisher + + @@ -15863,16 +52045,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.11 - Katei de Dekiru Tsubo Shiatsu (Jpn) 2001 - D3 - + D3 Publisher + + @@ -15882,16 +52065,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.12 - Katei no Igaku (Jpn) 2001 - D3 - + D3 Publisher + + @@ -15901,16 +52085,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.13 - Shinri Game - Soreike X Kokoroji (Jpn) 2002 - D3 - + D3 Publisher + + @@ -15920,16 +52105,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.14 - Kurashi no Manner (Jpn) - 199? - <unknown> - + 2002 + D3 Publisher + + @@ -15939,16 +52125,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.15 - Inu no Kaikata - Sekai no Inu Catalog (Jpn) 2002 - D3 - + D3 Publisher + + @@ -15958,16 +52145,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.16 - Neko no Kaikata - Sekai no Neko Catalo (Jpn) 2002 - D3 - + D3 Publisher + + @@ -15977,16 +52165,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.17 - Planetarium (Jpn) 2002 - D3 - + D3 Publisher + + @@ -15996,16 +52185,17 @@ A few comments on these: - + Simple 1500 Jitsuyou Series Vol.18 - Kanji Quiz - Kanji Keitei ni Challenge (Jpn) 2002 - D3 - + D3 Publisher + + @@ -16014,16 +52204,17 @@ A few comments on these: - + - Simple 1500 Series - Hello Kitty vol.01 - Hello Kitty Bowling (Jpn) + Simple 1500 Series Hello Kitty vol.01 - Hello Kitty Bowling (Jpn) 2001 - D3 - + D3 Publisher + + @@ -16032,16 +52223,17 @@ A few comments on these: - + Simple 1500 Series Hello Kitty Vol.02 - Hello Kitty Illust Puzzle (Jpn) 2001 - D3 - + D3 Publisher + + @@ -16050,16 +52242,17 @@ A few comments on these: - + Simple 1500 Series Hello Kitty vol.03 - Hello Kitty Block Kuzushi (Jpn) - 199? - <unknown> - + 2001 + D3 Publisher + + @@ -16068,16 +52261,17 @@ A few comments on these: - + Simple 1500 Series Hello Kitty Vol.04 - Hello Kitty Trump (Jpn) 2001 - D3 - + D3 Publisher + + @@ -16086,415 +52280,17 @@ A few comments on these: - + - Simple 1500 Series Vol.37 - The Illustration Puzzle & Slide Puzzle (Jpn) - 2000 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.51 - The Jigsaw Puzzle (Jpn) - 2000 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.63 - The Gun Shooting 2 (Jpn) - 2001 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.67 - The Soccer - Dynamite Soccer 1500 (Jpn) - 2001 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.71 - The Renai Simulation 2 (Jpn) - 2001 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.72 - The Beach Volley (Jpn) - 2001 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.73 - The Invaders - Space Invaders 1500 (Jpn) - 2001 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.76 - The Dodgeball (Jpn) - 2001 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.83 - The Wakeboard - BursTrick Wake Boarding!! (Jpn) - 2001 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.85 - The Sengoku Bushou - Tenka Touitsu no Yabou (Jpn) - 2002 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.88 - The Gal Mahjong - Love Songs - Idol wa High Rate (Jpn) - 2002 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.89 - The Power Shovel - Power Shovel ni Norou! (Jpn) - 2002 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.90 - The Sensha (Jpn) - 2002 - D3 - - - - - - - - - - - - - Simple 1500 Series Vol.93 - The Puzzle Bobble 4 (Jpn) - 2002 - D3 - - - - - - - - - - - - - Simple 1500 Series vol.97 - The Squash (Jpn) - 2002 - D3 - - - - - - - - - - - - - Simple 1500 Series Vol.99 - The Kendo - Ken no Hanamichi (Jpn) - 2002 - D3 - - - - - - - - - - - - - Simple 1500 series vol.101 - The Sentou (Jpn) - 2003 - D3 - - - - - - - - - - - - - Simple 1500 Series Vol.102 - The Densha Untensha - Densha de Go! - Nagoya Tetsudou-hen (Jpn) - 2002 - D3 - - - - - - - - - - - - - Simple 1500 Series Vol.103 - The Ganso Densha Utenshi - Densha De Go! (Jpn) - 2003 - D3 - - - - - - - - - - - - - Simple 1500 Series Vol.104 - The Pink Panther - Pinkadelic Pursuit (Jpn) - 2003 - D3 - - - - - - - - - - - - - - Simple Characters 2000 Series Vol.02 - Afro Ken - The Puzzle (Jpn) 2001 Bandai - + + @@ -16503,16 +52299,17 @@ A few comments on these: - + Simple Characters 2000 Series Vol.03 - Kamen Rider - The Bike Race (Jpn) 2001 Bandai - + + @@ -16521,16 +52318,17 @@ A few comments on these: - + Simple Characters 2000 Series Vol.04 - Jarinko Chie - The Hanafuda (Jpn) 2001 Bandai - + + @@ -16539,16 +52337,17 @@ A few comments on these: - + Simple Characters 2000 Series vol.05 - Highschool Kimengumi - The Table Hockey (Jpn) 2001 Bandai - + + @@ -16557,16 +52356,17 @@ A few comments on these: - + Simple Characters 2000 Series Vol.06 - Dokonjou Gaeru - The Mahjong (Jpn) 2002 Bandai - + + @@ -16575,16 +52375,17 @@ A few comments on these: - + - Simple Characters 2000 Series vol.07 - Ikkyuu-san: The Quiz (Jpn) + Simple Characters 2000 Series vol.07 - Ikkyuu-san - The Quiz (Jpn) 2002 Bandai - + + @@ -16593,32 +52394,17 @@ A few comments on these: - - - + Simple Characters 2000 Series Vol.09 - Tsuri Kichi Sanpei - The Tsuri (Jpn) 2002 - Bandai/D3 - + Bandai / D3 + + @@ -16627,16 +52413,17 @@ A few comments on these: - + - Simple Characters 2000 Series Vol.10 - Sakigake!! Otojo Juku (Jpn) + Simple Characters 2000 Series Vol.10 - Sakigake!! Otojo Juku - The Dodgeball (Jpn) 2002 - Bandai/D3 - + Bandai / D3 + + @@ -16645,32 +52432,17 @@ A few comments on these: - - - + Simple Characters 2000 Series Vol.12 - Kidou Butouden G Gundam - The Battle (Jpn) 2002 - Bandai/D3 - + Bandai / D3 + + @@ -16679,16 +52451,17 @@ A few comments on these: - + Simple Characters 2000 Series vol.13 - Kidou Senki Gundam W - The Battle (Jpn) 2002 - Bandai/D3 - + Bandai / D3 + + @@ -16697,16 +52470,17 @@ A few comments on these: - + Simple Characters 2000 Series Vol.14 - Nante Tantei Idol - The Jigsaw Puzzle (Jpn) 2002 - Bandai/D3 - + Bandai / D3 + + @@ -16715,16 +52489,17 @@ A few comments on these: - + - Simple Characters 2000 Series vol.15 - The Block Kuzushi (Jpn) + Simple Characters 2000 Series vol.15 - Cyborg 009 - The Block Kuzushi (Jpn) 2002 - Bandai/D3 - + Bandai / D3 + + @@ -16733,16 +52508,17 @@ A few comments on these: - + Simple Characters 2000 Series Vol.16 - Ganba no Bouken - The Puzzle Action (Jpn) 2003 - Bandai/D3 - + Bandai / D3 + + @@ -16751,32 +52527,17 @@ A few comments on these: - - - + - Simulation Zoo: Sekaiichi no Doubutsuen o Tsukurou (Jpn) + Simulation Zoo - Sekaiichi no Doubutsuen o Tsukurou (Jpn) 1996 SoftBank - + + @@ -16785,16 +52546,17 @@ A few comments on these: - + Sister Princess - Pure Stories (Jpn) 2001 - Media Works - + MediaWorks + + @@ -16805,14 +52567,15 @@ A few comments on these: Slap Happy Rhythm Busters (Jpn) 2000 ASK - + + @@ -16823,14 +52586,15 @@ A few comments on these: Snatcher (Jpn) 1996 Konami - + + @@ -16839,16 +52603,17 @@ A few comments on these: - + Snobow Kids Plus (Jpn) 1999 ASCII - + + @@ -16857,19 +52622,20 @@ A few comments on these: - + Sonata (Jpn) 1999 - T&E - - + T&E Soft + + + @@ -16883,16 +52649,17 @@ A few comments on these: - + Sotsugyou Crossworld (Jpn) 1996 Hearty Robin - + + @@ -16901,19 +52668,20 @@ A few comments on these: - + Sougaku Toshi - Osaka (Jpn) 1999 King Records - - + + + @@ -16927,47 +52695,48 @@ A few comments on these: - + - Soukyu Gurentai - Oubushustugeki (Jpn) + Soukyugurentai - Oubushustugeki (Jpn) 1997 Data East - + + @@ -16976,16 +52745,17 @@ A few comments on these: - + Space Invaders X (Jpn) 2000 Taito - - + + + @@ -16994,16 +52764,17 @@ A few comments on these: - + Spectral Blade (Jpn) 1999 Idea Factory - + + @@ -17012,16 +52783,17 @@ A few comments on these: - + Speed King (Jpn) 1996 Konami + + - @@ -17030,16 +52802,17 @@ A few comments on these: - + Speed Power Gunbike (Jpn) 1998 - Sony - + Sony Music Entertainment + + @@ -17048,16 +52821,17 @@ A few comments on these: - + Spider-Man (Jpn) 2001 - Activision - + Success + + @@ -17066,49 +52840,33 @@ A few comments on these: - - - Squaresoft Memory Card Data CD (Jpn) - 199? - Squaresoft - - - - - - - - - - Stahlfeder (Jpn) + Stahlfeder - Tetsukou Hikuudan (Jpn) 1996 Santos - + + @@ -17119,14 +52877,15 @@ A few comments on these: Startling Odyssey 1 - Blue Evolution (Jpn) 1999 RayForce - + + @@ -17135,91 +52894,92 @@ A few comments on these: - + Street Fighter Collection (Jpn) 1997 Capcom + + - @@ -17233,17 +52993,26 @@ A few comments on these: - + + Suchie-Pai Adventure - Doki Doki Nightmare (Jpn, Disc 2 Only) 1998 Jaleco - + + + @@ -17253,41 +53022,42 @@ A few comments on these: Suiko Enbu - Outlaws of the Lost Dynasty (Jpn) 1996 Data East - + + @@ -17298,14 +53068,15 @@ A few comments on these: - Memorial Star Series Sunsoft Vol. 1 - Ikki & Super Arabian (Jpn) + Memorial Star Series - Sunsoft Vol.1 - Ikki & Super Arabian (Jpn) 2001 Sunsoft - + + @@ -17316,14 +53087,15 @@ A few comments on these: - Memorial Star Series Sunsoft Vol. 2 - Route 16 - Turbo & Atlantis no Nazo (Jpn) + Memorial Star Series - Sunsoft Vol.2 - Route-16 Turbo & Atlantis no Nazo (Jpn) 2001 Sunsoft - + + @@ -17334,14 +53106,15 @@ A few comments on these: - Sunsoft Classics Vol.3 - Memorial Series (Jpn) + Memorial Star Series - Sunsoft Vol.3 - Madoola no Tsubasa & Toukaidou Gojuusan Tsugi (Jpn) 2001 Sunsoft - + + @@ -17352,14 +53125,15 @@ A few comments on these: - Memorial Star Series Sunsoft Vol.4 - Chou wakusei senki metafight & Lipple island (Jpn) + Memorial Star Series - Sunsoft Vol.4 - Chou Wakusei Senki Metafight & Ripple Island (Jpn) 2002 Sunsoft - + + @@ -17370,14 +53144,15 @@ A few comments on these: - Memorial Star Series Sunsoft Vol.5 - Raf World & Hebereke (Jpn) + Memorial Star Series - Sunsoft Vol.5 - Raf World & Hebereke (Jpn) 2002 Sunsoft - + + @@ -17388,14 +53163,15 @@ A few comments on these: - Memorial Star Series Sunsoft Vol.6 - Battle Formula & Gimmick! (Jpn) + Memorial Star Series - Sunsoft Vol.6 - Battle Formula & Gimmick! (Jpn) 2002 Sunsoft - + + @@ -17404,25 +53180,26 @@ A few comments on these: - + - Super Adventure RockMan (Jpn) + Super Adventure Rockman (Jpn) 1998 Capcom + + - @@ -17441,16 +53218,17 @@ A few comments on these: - + Super Football Champ (Jpn) 1996 Taito - + + @@ -17459,17 +53237,18 @@ A few comments on these: - + Super Live Stadium (Jpn) 1998 Aques - + + @@ -17478,17 +53257,18 @@ A few comments on these: - + Susume! Kaizoku - Be Pirates! (Jpn) 1998 - ArtDink - + Artdink + + @@ -17499,14 +53279,15 @@ A few comments on these: T Kara Hajimaru Monogatari (Jpn) 1998 Jaleco - + + @@ -17515,16 +53296,17 @@ A few comments on these: - + Tactical Armor Custom Gasaraki (Jpn) 2000 Bandai - + + @@ -17533,16 +53315,17 @@ A few comments on these: - + Tactics Ogre - Let Us Cling Together (Jpn) 1997 Artdink - + + @@ -17551,19 +53334,20 @@ A few comments on these: - + Taiho Shichauzo! - You're Under Arrest (Jpn) 2001 Pioneer + + - @@ -17577,16 +53361,17 @@ A few comments on these: - + Tales of Fandom Vol.1 (Jpn, Cless Version) 2002 Namco - + + @@ -17595,33 +53380,17 @@ A few comments on these: - + - Tamamayu Monogatari - Dennou Bijutsukan (Jpn, Demo) - 199? - Genki - - - - - - - - - - - - Tantei Jinguuji Saburo - Early Collection (Jpn) + Tantei Jinguuji Saburou - Early Collection (Jpn) 1999 Data East - + + @@ -17630,16 +53399,17 @@ A few comments on these: - + - Tantei Jinguuji Saburo - Mikan No Rupo (Jpn, Popular Edition) + Tantei Jinguuji Saburou - Mikan no Rupo (Jpn, Popular Edition) 2000 Data East - + + @@ -17648,16 +53418,17 @@ A few comments on these: - + - Tantei Jinguji Saburo - Tomosibi Ga Kienumani (Jpn) + Tantei Jinguuji Saburou - Tomoshibi ga Kienumani (Jpn) 1999 Data East - + + @@ -17666,16 +53437,17 @@ A few comments on these: - + - Tantei Jinguji Saburo - Yumeno Owarini (Jpn) + Tantei Jinguuji Saburou - Yume no Owari ni (Jpn) 1998 Data East - + + @@ -17684,17 +53456,18 @@ A few comments on these: - + Tatsunoko Fight (Jpn) 2000 Takara - + + @@ -17703,16 +53476,17 @@ A few comments on these: - + - Ten Made Jack / Tenma de Jack - Odoroki Manenoki Daitoubou (Jpn) + Ten Made Jack - Odoroki Manenoki Daitoubou!! (Jpn) 2000 Enix - + + @@ -17721,16 +53495,17 @@ A few comments on these: - + Tenant Wars (Jpn) 1998 - Kid - + KID + + @@ -17739,19 +53514,20 @@ A few comments on these: - + - Tenchi Muyou! Toukou Muyou - No Need for School (Jpn) + Tenchi Muyou! Toukou Muyou (Jpn) 1996 Xing - - + + + @@ -17765,16 +53541,17 @@ A few comments on these: - + Tenchi wo Kurau II - Sekiheki no Tatakai (Jpn) 1996 Capcom - + + @@ -17783,16 +53560,17 @@ A few comments on these: - + Tennis Arena (Jpn) 1998 Ubi Soft - + + @@ -17801,16 +53579,17 @@ A few comments on these: - + - Tensen Nyannyan Gekigyouban (Jpn) + Tensen Nyannyan - Gekijou-ban (Jpn) 1998 Time Point - + + @@ -17819,16 +53598,17 @@ A few comments on these: - + Tenshi no Shippo (Jpn) 2003 Bandai - + + @@ -17837,16 +53617,17 @@ A few comments on these: - + Tetris X (Jpn) 1996 - Bullet Proof - + BPS + + @@ -17855,16 +53636,16 @@ A few comments on these: - + TFX - Tactical Fighter Experiment (Jpn) 1996 - Imageneer / Ocean - + Imageneer + @@ -17873,16 +53654,17 @@ A few comments on these: - + That's QT (Jpn) 2000 Koei - + + @@ -17891,16 +53673,17 @@ A few comments on these: - + Theme Hospital (Jpn) 1998 Electronic Arts - + + @@ -17909,16 +53692,17 @@ A few comments on these: - + Thunder Force V - Perfect System (Jpn) 1998 TechnoSoft - + + @@ -17927,32 +53711,35 @@ A few comments on these: - + Time Gal & Ninja Hayate (Jpn) 1996 Taito - - + + + + + @@ -17961,14 +53748,15 @@ A few comments on these: Tiny Bullets (Jpn) 2000 - Sony - + SCEI + + @@ -17977,16 +53765,17 @@ A few comments on these: - + To Heart (Jpn) 1999 Aqua Plus + + - @@ -18000,41 +53789,42 @@ A few comments on these: - + Toaplan Shooting Battle 1 (Jpn) 1996 Banpresto - + + @@ -18044,16 +53834,17 @@ A few comments on these: - + Toca Touring Car Championship (Jpn) 1998 Upstar - + + @@ -18065,14 +53856,15 @@ A few comments on these: - Tokimeki Memorial - Taisen Puzzle-Dama (Jpn) + Tokimeki Memorial Taisen Puzzle-Dama (Jpn) 1996 Konami + + - @@ -18081,15 +53873,18 @@ A few comments on these: - + - Tokimeki Memorial 2 EVS Append Disc 1 (Kotoko-Miyuki-Kaedeko) (Jpn) + Tokimeki Memorial 2 EVS Append Disc 1 (Kotoko - Miyuki - Kaedeko) (Jpn) 2000 Aspect + + + @@ -18098,15 +53893,18 @@ A few comments on these: - + - Tokimeki Memorial 2 EVS Append Disc 2 (Homura-Akane-Kaori) (Jpn) + Tokimeki Memorial 2 EVS Append Disc 2 (Homura - Akane - Kaori) (Jpn) 2000 Aspect + + + @@ -18115,15 +53913,18 @@ A few comments on these: - + - Tokimeki Memorial 2 EVS Append Disc 3 (Miho-Mei-Sumire) (Jpn) + Tokimeki Memorial 2 EVS Append Disc 3 (Miho - Mei - Sumire) (Jpn) 2000 Enterbrain + + + @@ -18132,19 +53933,20 @@ A few comments on these: - + - Tokimeki Memorial 2 Substories vol. 1 - Dancing Summer Vacation (Jpn) + Tokimeki Memorial 2 Substories Vol.1 - Dancing Summer Vacation (Jpn) 2000 Konami - - + + + @@ -18158,19 +53960,20 @@ A few comments on these: - + Tokimeki Memorial 2 Substories Vol.2 - Leaping School Festival (Jpn) 2001 Konami - - + + + @@ -18184,19 +53987,20 @@ A few comments on these: - + - Tokimeki Memorial 2 SubStories Vol.3 - Memories Ringing On (Jpn) + Tokimeki Memorial 2 Substories Vol.3 - Memories Ringing On (Jpn) 2001 Konami - - + + + @@ -18211,16 +54015,17 @@ A few comments on these: - + Tokimeki Memorial Drama Series Vol.1 - Nijiiro No Seishun (Jpn, Konami the Best) 1999 Konami - - + + + @@ -18230,22 +54035,23 @@ A few comments on these: - + Tokyo Majin Gakuen Gehouchou (Jpn) 2002 Asmik Ace + + - @@ -18265,16 +54071,17 @@ A few comments on these: - + Tomba! The Wild Adventures (Jpn) 1999 Whoopee Camp - + + @@ -18284,16 +54091,17 @@ A few comments on these: - + Tomica Town o Tsukurou! (Jpn) 1999 Tomy - + + @@ -18303,17 +54111,18 @@ A few comments on these: - + ToPoLo (Jpn) 1996 Artdink - + + @@ -18323,16 +54132,17 @@ A few comments on these: - + Toshinden Card Quest (Jpn) 1998 Takara - + + @@ -18342,16 +54152,17 @@ A few comments on these: - + Touge Max G (Jpn) 2000 Atlus - + + @@ -18361,19 +54172,20 @@ A few comments on these: - + - Touki Denshou - Angel Eyes (Jpn) + Toukidenshou - Angel Eyes (Jpn) 1997 Tecmo - + + @@ -18383,16 +54195,17 @@ A few comments on these: - + + Toyota Netz Racing (Jpn) 1999 Atlus - + @@ -18402,16 +54215,17 @@ A few comments on these: - + Toys Dream (Jpn) 1998 KSS - + + @@ -18421,16 +54235,17 @@ A few comments on these: - + Tripuzz (Jpn) 1997 Santos - + + @@ -18442,14 +54257,15 @@ A few comments on these: Trump Shiyouyo! (Jpn) 1998 Bottom Up - + + @@ -18459,16 +54275,17 @@ A few comments on these: - + - Tsun-tsun-gumi 2 - Moji Moji Bakkun (Jpn) - 199? - <unknown> - + Tsun Tsun Kumi 2 - Moji Moji Bakkun (Jpn) + 1998 + Kodansha + + @@ -18478,16 +54295,17 @@ A few comments on these: - + - Tsun-tsun-gumi 3 - Kanji Vader (Jpn) - 1998 + Tsun Tsun Kumi 3 - Kanji Vader (Jpn) + 1999 Kodansha - + + @@ -18499,14 +54317,15 @@ A few comments on these: Tsuri Baka Nisshi (Jpn) 1996 Shogakukan - + + @@ -18516,17 +54335,18 @@ A few comments on these: - + TV Animation X - Unmei no Tatakai (Jpn) 2002 Bandai - + + @@ -18538,14 +54358,15 @@ A few comments on these: Twin Goddesses (Jpn) 1994 PolyGram - + + @@ -18555,16 +54376,17 @@ A few comments on these: - + Twinbee Taisen Puzzle-Dama (Jpn) 1994 Konami - + + @@ -18574,16 +54396,17 @@ A few comments on these: - + - TwinBee-RPG (Jpn) + TwinBee RPG (Jpn) 1998 Konami + + - @@ -18593,16 +54416,17 @@ A few comments on these: - + - Twins Story - Kimi ni Tsutaetakute (Jpn) + Twins Story - Kimi ni Tsutaetakute... (Jpn) 1999 Panther - + + @@ -18614,16 +54438,17 @@ A few comments on these: Two-Tenkaku (Jpn) 1995 - Sony - + Sony Music Entertainment + + @@ -18633,16 +54458,17 @@ A few comments on these: - + - Ucchannanchan no Honoo no Challenger - Denryu Iraira-Bo Returns (Jpn) + Ucchannanchan no Honoo no Challenger - Denryu Iraira-Bou Returns (Jpn) 1998 Saurus - + + @@ -18652,16 +54478,17 @@ A few comments on these: - + UFO - A Day in the Life (Jpn) 1999 ASCII - + + @@ -18671,16 +54498,17 @@ A few comments on these: - + Ugetsu Kitan (Jpn) 1996 Tonkin House - + + @@ -18690,16 +54518,17 @@ A few comments on these: - + - Ukiuki Tsuri Tengoku - Uogami Densetsu wo Oe (Jpn) + UkiUki Tsuri Tengoku - Uogami Densetsu wo Oe (Jpn) 2000 Teichiku - + + @@ -18709,16 +54538,17 @@ A few comments on these: - + Ultima Underworld - The Stygian Abyss (Jpn) 1997 Electronic Arts - + + @@ -18728,43 +54558,44 @@ A few comments on these: - + - Ultraman Tiga & Ultraman Dyna Fighting Evolution - New Generations (Jpn) + Ultraman Tiga & Ultraman Dyna Fighting Evolution - New Generations (Jpn) 1998 Bandai - + + @@ -18774,16 +54605,17 @@ A few comments on these: - + Ultraman Zearth (Jpn) 1996 Tohoku Shinsha - + + @@ -18793,16 +54625,17 @@ A few comments on these: - + - Umi No Nushi Tsuri Takarajimi NI Mukatte (Jpn) + Umi no Nushi Tsuri - Takarajimi ni Mukatte (Jpn) 1999 Pack-in-Soft - + + @@ -18811,17 +54644,19 @@ A few comments on these: + - + Umihara Kawase Shun - Second Edition (Jpn, Maruan Series 1) 2000 Xing - + + @@ -18831,16 +54666,17 @@ A few comments on these: - + Ungra Walker (Jpn) 2002 Success - + + @@ -18850,16 +54686,17 @@ A few comments on these: - + Urawaza Mahjong - Korette Tenhoutte Yatsukai (Jpn) 2000 Spike - + + @@ -18871,14 +54708,15 @@ A few comments on these: V-Tennis 2 (Jpn) 1996 Tonkin House - + + @@ -18888,17 +54726,18 @@ A few comments on these: - + Vampir Kyuuketsuki Densetsu (Jpn) 1999 Artdink - + + @@ -18908,16 +54747,17 @@ A few comments on these: - + Vehicle Cavalier (Jpn) 1996 Vanguard Works - + + @@ -18927,16 +54767,17 @@ A few comments on these: - + Victory Spike (Jpn) 1996 Imagineer - + + @@ -18946,16 +54787,17 @@ A few comments on these: - + Victory Zone - Real Pachinko Simulator (Jpn) 1995 - Sony - + SCEI + + @@ -18965,16 +54807,17 @@ A few comments on these: - + - Virtual Hiyru no Ken (Jpn) + Virtual Hiryuu no Ken (Jpn) 1997 Culture Brain - + + @@ -18984,16 +54827,17 @@ A few comments on these: - + - Virtual Kyotei '98 (Jpn) + Virtual Kyoutei '98 (Jpn) 1998 Nihon Bussan - + + @@ -19003,16 +54847,17 @@ A few comments on these: - + Virtual Pro Wrestling (Jpn) 1996 Asmik Ace - + + @@ -19024,14 +54869,15 @@ A few comments on these: Virus - The Battle Field (Jpn) 1999 PolyGram - + + @@ -19041,17 +54887,18 @@ A few comments on these: - + The Vision of Escaflowne (Jpn, Limited Edition) - 1999 + 1997 Bandai - + + @@ -19061,16 +54908,17 @@ A few comments on these: - + Volfoss (Jpn) 2001 Namco - + + @@ -19080,16 +54928,17 @@ A few comments on these: - + Wagamama Fairy Mirumo de Pon! - Mirumo no Mahou Gakkou Monogatari (Jpn) 2003 Konami + + - @@ -19101,17 +54950,18 @@ A few comments on these: Wangan Trial (Jpn) 1998 Pack-in-Soft + + - @@ -19126,16 +54976,17 @@ A few comments on these: - + Warera Mitsubayashi Tankentai!! (Jpn) 2000 - Victor - + Victor Interactive Software + + @@ -19147,14 +54998,15 @@ A few comments on these: Water Summer (Jpn, Limited Edition) 2002 Princess Soft - + + @@ -19166,14 +55018,15 @@ A few comments on these: - Wedding Peach - Doki Doki Oiro-Naoshi Fashion Daisakusen (Jpn) + Wedding Peach - Doki Doki Oironaoshi Fashion Daisakusen (Jpn) 1996 KSS - + + @@ -19185,14 +55038,15 @@ A few comments on these: - Welcome House + Welcome House (Jpn) 1996 Gust - + + @@ -19202,16 +55056,17 @@ A few comments on these: - + Weltorv Estleia (Jpn) 1999 Hudson - + + @@ -19221,16 +55076,17 @@ A few comments on these: - + White Diamond (Jpn) 1999 Escot - + + @@ -19242,14 +55098,15 @@ A few comments on these: Wing Over (Jpn) 1997 - <unknown> - + Pack-In Soft + + @@ -19259,16 +55116,17 @@ A few comments on these: - + Wizard's Harmony R (Jpn) 1998 Arc System Works - + + @@ -19280,16 +55138,17 @@ A few comments on these: - Wolf Fang (Jpn) + Wolf Fang Kuuga 2001 (Jpn) 1996 Xing - + + @@ -19299,16 +55158,17 @@ A few comments on these: - + - Wonder 3 Arcade Gears (Jpn) + Arcade Gears - Wonder 3 (Jpn) 1998 Xing - + + @@ -19318,16 +55178,17 @@ A few comments on these: - + Wonder B-Cruise - Dogiborn Daisakusen (Jpn) 1999 Sunsoft - + + @@ -19337,16 +55198,17 @@ A few comments on these: - + - Wonder Tracker (Jpn) + Wonder Trek (Jpn) 1998 - Sony - + SCEI + + @@ -19355,17 +55217,19 @@ A few comments on these: + - + World League Soccer - Challenge Nippon! (Jpn, Family Price 1500) 2000 Coconuts Japan - + + @@ -19374,36 +55238,18 @@ A few comments on these: - - - - World Neverland - Olerud Oukoku Monogatari (Jpn) - 1997 - RiverhillSoft - - - - - - - - - - - + World Pro Tennis '98 (Jpn) 1998 I.Magic - + + @@ -19413,16 +55259,17 @@ A few comments on these: - + WWF Wrestlemania - The Arcade Game (Jpn) 1996 Acclaim - + + @@ -19432,16 +55279,17 @@ A few comments on these: - + - X-Racing (Jpn) + X. Racing (Jpn) 1998 Nichibutsu - + + @@ -19451,27 +55299,28 @@ A few comments on these: - + X2 - No Relief (Jpn) 1997 Capcom - + + @@ -19480,16 +55329,17 @@ A few comments on these: - + Yagami Hiroki no Game-Taste - Munasawagi no Yokan (Jpn) 1999 Kodansha - + + @@ -19499,16 +55349,17 @@ A few comments on these: - + Yakiniku Bugyou (Jpn) 2001 - Media - + Media Entertainment + + @@ -19520,14 +55371,15 @@ A few comments on these: Yakitori Musume - Sugo Ude Hanjouki (Jpn) 2002 - Media - + Media Entertainment + + @@ -19537,75 +55389,51 @@ A few comments on these: - + - Yamagata Digital Museum - Autumn (Jpn) - 1999 - Imagineer - - - - - - - - - + + - - - - Yamagata Digital Museum - Spring (Jpn) + Yamagata Digital Museum (Jpn) 1999 Imagineer - - + + + - + + + - - - - - - Yamagata Digital Museum - Summer (Jpn) - 1999 - Imagineer - - - - + + + - - - - - - Yamagata Digital Museum - Winter (Jpn) - 1999 - Imagineer - - - - + + + + + + + + + + @@ -19613,16 +55441,17 @@ A few comments on these: - + - Yoshimoto Muchicco Daikessen (Jpn) + Yoshimoto Muchicco Daikessen - Minami no Umi no Gorongo Shima (Jpn) 1999 - Sony - + Sony Music Entertainment + + @@ -19632,16 +55461,17 @@ A few comments on these: - + Youkai Hana Asobi (Jpn) 2001 Unbalance - + + @@ -19651,16 +55481,17 @@ A few comments on these: - + - Yu-Gi-Oh! Monster Capsule Breed & Battle (Jpn) + Yu-Gi-Oh! - Monster Capsule Breed & Battle (Jpn) 1998 Konami - - + + + @@ -19670,16 +55501,17 @@ A few comments on these: - + Yukinko Burning (Jpn) 2002 Princess Soft - + + @@ -19689,16 +55521,17 @@ A few comments on these: - + Yume no Tsubasa (Jpn) 2000 KID - + + @@ -19708,16 +55541,17 @@ A few comments on these: - + - Yume-Iroiro (Jpn) + Yume Iroiro - Yumemigaoka Gakuen Koutou Gakkou Dai 33-Kisei (Jpn) 1998 Feathered - + + @@ -19727,16 +55561,17 @@ A few comments on these: - + Yuugen Kaisha Chikyuu Boueitai - Guard of Earth Organization (Jpn) 1999 Media Rings - + + @@ -19746,16 +55581,17 @@ A few comments on these: - + Yuukyuu no Eden - The Eternal Eden (Jpn) 1999 ASCII - + + @@ -19764,16 +55600,17 @@ A few comments on these: - + Yuusha-Ou GaoGaiGar - Blockaded Numbers (Japan) 1999 Takara - + + @@ -19783,16 +55620,17 @@ A few comments on these: - + - Yuuyami Doori Tankentai (Jpn) + Yuuyami Douri Tankentai (Jpn) 1999 Spike - + + @@ -19802,16 +55640,17 @@ A few comments on these: - + Zap! Snowboarding Trix '98 (Jpn) 1997 - <unknown> - + Pony Canyon + + @@ -19821,16 +55660,17 @@ A few comments on these: - + Zeiramzone (Jpn) 1996 Banpresto - + + @@ -19840,16 +55680,17 @@ A few comments on these: - + Zeitgeist (Jpn) 1995 Taito - + + @@ -19859,17 +55700,18 @@ A few comments on these: - + - Zen-Nippon Joshi Pro Wrestling - Joou Densetsu Yume no Taikousen (Jpn) + Zen-Nihon Joshi Pro Wrestling - Joou Densetsu Yume no Taikousen (Jpn) 1998 TEN - + + @@ -19879,16 +55721,17 @@ A few comments on these: - + - Zen-Nippon Pro Wrestling - Ouja no Kon (Jpn) + Zen-Nihon Pro Wrestling - Ouja no Kon (Jpn) 1999 Human - + + @@ -19898,16 +55741,17 @@ A few comments on these: - + - Zero4 Champ Doozy-J (Jpn) + Zero4 Champ DooZy-J (Jpn) 1997 Media Rings - + + @@ -19919,14 +55763,15 @@ A few comments on these: Zig Zag Ball (Jpn) 1998 Upstar - + + @@ -19936,16 +55781,17 @@ A few comments on these: - + - Zipangujima: Unmei wa Saikoro ga Kimeru! (Jpn) + Zipangujima - Unmei wa Saikoro ga Kimeru! (Jpn) 1999 Human - + + @@ -19955,16 +55801,17 @@ A few comments on these: - + Zoids - Battle Card Game - Seihou Tairiku Senki (Jpn) 2001 Tomy - + + @@ -19974,16 +55821,17 @@ A few comments on these: - + - Zoids - Zenebus VS Heric (Jpn) + Zoids - Teikoku vs Kyouwakoku - Meka Seitai no Idenshi (Jpn) 2000 Tomy - + + @@ -19995,18 +55843,19 @@ A few comments on these: - Zoids 2 - Helic Republic VS Guylos Empire (Jpn) + Zoids 2 - Helic Kyouwakoku vs Guylos Teikoku (Jpn) 2002 Tomy - + + - + @@ -20014,23 +55863,24 @@ A few comments on these: Zoku Hatsukoi Monogatari - Shuugaku Ryokou (Jpn) 1998 Tokuma Shoten + + - @@ -20055,16 +55905,17 @@ A few comments on these: - + Zork I - The Great Underground Empire (Jpn) 1996 Shoeisha - + + @@ -20073,18 +55924,20 @@ A few comments on these: + - Zutto Issho With Me Everytime... (Jpn, Major Wave Series) + Zutto Issho - With Me Everytime... (Jpn, Major Wave Series) 2000 Hamster - + + @@ -20093,17 +55946,19 @@ A few comments on these: - - + + - ZXE-D - Legend of Plasmalite (Jpn) + ZXE-D - Legend of Plasmatlite (Jpn) 1996 Bandai - + + @@ -20112,6 +55967,200 @@ A few comments on these: + + + + + + Final Fantasy Extra Collection (Jpn) + 199? + Squaresoft + + + + + + + + + + + + + + Squaresoft Memory Card Data CD (Jpn) + 199? + Squaresoft + + + + + + + + + + + + + Lalala PlayStation Trial Disk 1998 Summer (Jpn, Demo) + 199? + <unknown> + + + + + + + + + + + + + + Armored Core (Jpn, Demo) + 1997 + From Software + + + + + + + + + + + + + + Clock Tower 2 (Jpn, Taikenban) + 1996 + Human + + + + + + + + + + + + + + Granstream Denki (Jpn, Demo) + 1997 + <unknown> + + + + + + + + + + + + + + Koudelka (Jpn, Demo) + 199? + SNK + + + + + + + + + + + + + + Legaia Densetsu (Jpn, Demo) + 1998 + SCEI + + + + + + + + + + + + + + + Rescue Shot Bubibo & BioHazard - Gun Survivor (Jpn, Demo) + 200? + SCEI + + + + + + + + + + + + + + Tamamayu Monogatari - Dennou Bijutsukan (Jpn, Demo) + 199? + Genki + + + + + + + + + + + + From be406134ae7739e75e22af9f6de6880a2818a45f Mon Sep 17 00:00:00 2001 From: etabeta78 Date: Sun, 29 May 2016 11:38:55 +0200 Subject: [PATCH 13/14] more consistency fixes. nw. --- hash/fm7_disk.xml | 2 +- hash/gba.xml | 4 +- hash/gbcolor.xml | 18 ++--- hash/gp32.xml | 2 +- hash/msx1_flop.xml | 2 +- hash/msx2_flop.xml | 6 +- hash/n64.xml | 4 +- hash/neocd.xml | 4 +- hash/nes.xml | 8 +- hash/pc8801_flop.xml | 2 +- hash/pc98.xml | 10 +-- hash/pcecd.xml | 2 +- hash/saturn.xml | 183 ++++++++++++++++++++----------------------- hash/snes.xml | 4 +- hash/x68k_flop.xml | 2 +- 15 files changed, 118 insertions(+), 135 deletions(-) diff --git a/hash/fm7_disk.xml b/hash/fm7_disk.xml index bfdd8e19e30..8bd29aee37d 100644 --- a/hash/fm7_disk.xml +++ b/hash/fm7_disk.xml @@ -360,7 +360,7 @@ Titles, serial #s, publishers and release dates taken from: - + Hunter X Hunter - Hunter no Keifu (Jpn) 2000 @@ -10714,7 +10714,7 @@ List of unconfirmed retail cartridge roms - + Hunter X Hunter - Kindan no Hihou (Jpn) 2001 @@ -10785,7 +10785,7 @@ List of unconfirmed retail cartridge roms - + Ide Yousuke no Mahjong Kyoushitsu GB (Jpn) 2000 @@ -13437,7 +13437,7 @@ List of unconfirmed retail cartridge roms - + Majokko Mari-chan no Kisekae Monogatari (Jpn, Rev. A) 1999 @@ -13456,7 +13456,7 @@ List of unconfirmed retail cartridge roms - + Majokko Mari-chan no Kisekae Monogatari (Jpn) 1999 @@ -19429,7 +19429,7 @@ List of unconfirmed retail cartridge roms - + Soreike! Anpanman - 5-tsu no Tou no Ousama (Jpn) 2000 @@ -19448,7 +19448,7 @@ List of unconfirmed retail cartridge roms - + Soreike! Anpanman - Fushigi na Nikoniko Album (Jpn) 1999 @@ -20959,7 +20959,7 @@ List of unconfirmed retail cartridge roms - + Tokimeki Memorial Pocket - Culture Hen - Komorebi no Melody (Jpn) 1999 @@ -20978,7 +20978,7 @@ List of unconfirmed retail cartridge roms - + Tokimeki Memorial Pocket - Sport Hen - Koutei no Photograph (Jpn) 1999 diff --git a/hash/gp32.xml b/hash/gp32.xml index 3606d0d8551..074f755cdfd 100644 --- a/hash/gp32.xml +++ b/hash/gp32.xml @@ -223,7 +223,7 @@ It is recommended to use the firmware 1.6.6 as default BIOS! - + Princess Maker 2 (Kor) 2002 Gamepark diff --git a/hash/msx1_flop.xml b/hash/msx1_flop.xml index b15cae49df2..292a566d5db 100644 --- a/hash/msx1_flop.xml +++ b/hash/msx1_flop.xml @@ -881,7 +881,7 @@ The following floppies came with the machines. - + Lode Runner (Jpn) 1984 Sony diff --git a/hash/msx2_flop.xml b/hash/msx2_flop.xml index fef7165224f..75b72e444ba 100644 --- a/hash/msx2_flop.xml +++ b/hash/msx2_flop.xml @@ -8978,7 +8978,7 @@ The following floppies came with the machines. - + Princess Maker (Jpn) 1992 Micro Cabin @@ -9019,7 +9019,7 @@ The following floppies came with the machines. - + Princess Maker (Jpn, v2?) 1992 Micro Cabin @@ -9060,7 +9060,7 @@ The following floppies came with the machines. - + Princess Maker (Jpn, v2?, Alt) 1992 Micro Cabin diff --git a/hash/n64.xml b/hash/n64.xml index eff2daa80a2..38836f5945c 100644 --- a/hash/n64.xml +++ b/hash/n64.xml @@ -4977,7 +4977,7 @@ patched out (+ a fix for internal checksum) - + Ide Yousuke no Mahjong Juku (Jpn) 2000 Seta Corporation @@ -7770,7 +7770,7 @@ patched out (+ a fix for internal checksum) - + Parlor! Pro 64 - Pachinko Jikki Simulation Game (Jpn) 1999 Nihon Telenet diff --git a/hash/neocd.xml b/hash/neocd.xml index 5843948cd42..2e6a0408874 100644 --- a/hash/neocd.xml +++ b/hash/neocd.xml @@ -158,7 +158,7 @@ - Shinsetsu Samurai Spirits - Bushidohretsuden (Jpn) + Shinsetsu Samurai Spirits - Bushidou Retsuden (Jpn) 1997 SNK @@ -426,7 +426,7 @@ - + Double Dragon (Jpn, USA) 1995 SNK diff --git a/hash/nes.xml b/hash/nes.xml index 71a701d1379..806bd8e14c1 100644 --- a/hash/nes.xml +++ b/hash/nes.xml @@ -34387,7 +34387,7 @@ - + Soreike! Anpanman - Minna de Hiking Game! (Jpn) 1992 Bandai @@ -37444,7 +37444,7 @@ - + Tantei Jinguuji Saburou - Toki no Sugiyuku Mama ni (Jpn) 1990 Data East @@ -49701,7 +49701,7 @@ preliminary proto for the PAL version, still running on NTSC systems) or the gfx - + Tantei Jinguuji Saburou - Yokohamakou Renzoku Satsujin Jiken (Jpn) 1988 Data East @@ -49721,7 +49721,7 @@ preliminary proto for the PAL version, still running on NTSC systems) or the gfx - Tashiro Masashi no Princess Ga Ippai (Jpn) + Tashiro Masashi no Princess ga Ippai (Jpn) 1989 Epic / Sony Records diff --git a/hash/pc8801_flop.xml b/hash/pc8801_flop.xml index bc99c486cd2..3737bff356e 100644 --- a/hash/pc8801_flop.xml +++ b/hash/pc8801_flop.xml @@ -43659,7 +43659,7 @@ ExtractDisk [08]"PCM set " -> "gc-clusterz music disk(vol.1-7)_08.d88" - + Ningyo no Namida 1985 <doujin> diff --git a/hash/pc98.xml b/hash/pc98.xml index 3701d667c60..3c2838d0363 100644 --- a/hash/pc98.xml +++ b/hash/pc98.xml @@ -28086,7 +28086,7 @@ Requires MS-DOS 5.00H plus an unknown procedure (HDD install?) - + Ningyou Tsukai 1992 フォレスト (Forest) @@ -28112,7 +28112,7 @@ Requires MS-DOS 5.00H plus an unknown procedure (HDD install?) - + Ningyou Tsukai 2 1996 フォレスト (Forest) @@ -44214,7 +44214,7 @@ Requires MS-DOS 5.00H plus an unknown procedure (HDD install?) - + Yuugiri - Ningyoushi no Isan 1996 デザイアー (Desire) @@ -49157,7 +49157,7 @@ Requires MS-DOS 5.00H plus an unknown procedure (HDD install?) - + Princess Maker 1991 ガイナックス (Gainax) @@ -64194,7 +64194,7 @@ doujin?!? - + Kouryuuki (Incomplete) 1993 光栄 (Koei) diff --git a/hash/pcecd.xml b/hash/pcecd.xml index 7e891b9d454..2159f27af88 100644 --- a/hash/pcecd.xml +++ b/hash/pcecd.xml @@ -4089,7 +4089,7 @@ - + Princess Maker 1 (SCD)(Jpn) 1995 NEC Home Electronics diff --git a/hash/saturn.xml b/hash/saturn.xml index b7eaab9ba94..0f5ef44d387 100644 --- a/hash/saturn.xml +++ b/hash/saturn.xml @@ -509,12 +509,12 @@ //////////////////////////////////////////////////////////////////////////////////////////////////////////// I Love Mickey Mouse: Fushigi no Oshiro Daibouken & I Love Donald Duck: Georgia Ou no | (mickdnld) Hihou (Japan) (Sega Ages) [GS-9179] |~~~~ - Ide Yousuke Meijin no Shin Jissen Mahjong (Japan) [T-1208G] | (ideyousu) - Idol Janshi Suchie-Pai II (Japan) [T-5705G] | (suchie2) - Idol Janshi Suchie-Pai Mecha Gentei-Ban: Hatsubai 5 Isshuunen Toku (Japan) [T-5716G] | (suchieme) - Idol Janshi Suchie-Pai Remix (Japan) [T-5704G] | (suchierm) - Idol Janshi Suchie-Pai Secret Album (Japan) [T-5717G] | (suchiese) - Idol Janshi Suchie-Pai Special (Japan) [T-5701G] | (suchiesp) + Ide Yousuke Meijin no Shin Jissen Mahjong (Japan) [T-1208G] | (ideyusmj) + Idol Janshi Suchie-Pai II (Japan) [T-5705G] | (suchipa2) + Idol Janshi Suchie-Pai Mecha Gentei-Ban: Hatsubai 5 Isshuunen Toku (Japan) [T-5716G] | (suchimg) + Idol Janshi Suchie-Pai Remix (Japan) [T-5704G] | (suchirmx) + Idol Janshi Suchie-Pai Secret Album (Japan) [T-5717G] | (suchisec) + Idol Janshi Suchie-Pai Special (Japan) [T-5701G] | (suchispc) Idol Mahjong Final Romance 2 (Japan) [T-16702G] | (fromanc2) Idol Mahjong Final Romance 4 (Japan) [T-3003G] | (fromanc4) Idol Mahjong Final Romance R (Japan) [T-16703G] | - same as below without bonus disk? @@ -588,7 +588,7 @@ Kidou Senshi Gundam: Ghiren no Yabou Kouryaku Shireisho (Japan) [T-13333G] | (gundgiks) Kidou Senshi Z Gundam: Kouhen Uchuu o Kakeru (Japan) [T-13320G] | (zgundkou) Kidou Senshi Z Gundam: Zenpen Zeta no Kodou (Japan) [T-13315G] | (zgundzen) - Kindaichi Shounen no Jikenbo: Hoshimitou Kanashimi no Fukushuuki (Japan) [T-14315G] | (kindaich) + Kindaichi Shounen no Jikenbo: Hoshimitou Kanashimi no Fukushuuki (Japan) [T-14315G] | (kindajik) King of Boxing, The (Japan) [T-6001G] | (kingbox) King of Fighters '95, The (Japan) [T-3101G] | (kof95j) King of Fighters '96, The (Japan) [T-3108G] | (kof96) @@ -647,7 +647,7 @@ Legend of K-1 The Best Collection (Japan) [T-7501G] | ########MISSING######## (is is it just a collection of the other 2 k-1 games?) Lifescape: Seimei 40 Okunen Haruka na Tabi (Japan) [T-26405G] | (lifescap) Lifescape 2: Body Bionics (Japan) [T-26411G] | (lifescp2) - Linda³ Perfect Edition (Japan) [T-2112G] | (linda3ka) + Linda³ Perfect Edition (Japan) [T-2112G] | (linda3) Linkle Liver Story (Japan) [GS-9055] | (linkle) Lode Runner Extra (Japan) [T-25103G] | (ldrunex) Lode Runner: The Legend Returns (Japan) [T-25101G] | (ldrunlr) @@ -777,7 +777,7 @@ Nihon Daihyou Team no Kantoku ni Naruu! Sekaihatsu Soccer RPG (Japan) [T-35504G] | (soccrrpg) Nihon Pro Mahjong Renmei Kounin: Doujou Yaburi (Japan) [T-18714G] | (npmjren) Nile Gawa no Yoake (Japan) [T-9106G] | (nilegawa) - Ninja Jajamaru-kun: Onigiri Ninpouchou Gold (Japan) [T-5709G] | (ninjaja) Doesn't boot + Ninja Jajamaru-kun: Onigiri Ninpouchou Gold (Japan) [T-5709G] | (ninjajaj) Doesn't boot Ninku: Tsuyokina Yatsura no Daigekitotsu! (Japan) [GS-9036] | (ninku) Ninpen Manmaru (Japan) [T-35502G] | (ninpen) Nissan Collections Skyline (Japan) [GS-7005] | ########MISSING######## @@ -844,9 +844,9 @@ Primal Rage (Japan) [T-18614G] | (primalj) Princess Crown (Japan) [T-14418G] | (prcrown) Princess Crown (Japan) (Satakore) [T-14425G] | @@ - Princess Maker 2 (Japan) [T-5201G] | (pmake2) - Princess Maker 2 (Japan) (Satakore) [T-5203G] | (pmake2sa) - Princess Maker: Yumemiru Yousei (Japan) [T-35101G] | (pmake) + Princess Maker 2 (Japan) [T-5201G] | (prinmak2) + Princess Maker 2 (Japan) (Satakore) [T-5203G] | (prinmak2sa) + Princess Maker: Yumemiru Yousei (Japan) [T-35101G] | (prinmak) Princess Quest (Japan) [T-24603G] | (prquest) Princess Quest (Japan) (Tokubetsu Genteiban) [T-24604G] | @@ Prisoner of Ice: Jashin Kourin (Japan) [T-26112G] | (prisoner) @@ -866,8 +866,8 @@ Private Idol Disc Vol. 9: Keiko Nagamatsu (Japan) [T-30816G] | (pidolv9) Private Idol Disc Vol. 10: Mai Masaki (Japan) [T-30817G] | (pidolv10) Private Idol Disc Vol. 11: Mayumi Hirose (Japan) [T-30818G] | (pidolv11) - Pro Mahjong Kiwame S (Japan) [T-16801G] | (kiwames) - Pro Mahjong Kiwame S (Japan) (Satakore) [T-16807G] | (kiwamessa) + Pro Mahjong Kiwame S (Japan) [T-16801G] | (mjkiwams) + Pro Mahjong Kiwame S (Japan) (Satakore) [T-16807G] | (mjkiwamssa) Pro Shinan Mahjong Tsuwamono (Japan) [T-38501G] | ########MISSING######## Pro Yakyuu Greatest Nine '97 (Japan) [GS-9139] | (gnine97) Pro Yakyuu Greatest Nine '97 Make Miracle (Japan) [GS-9171] | (gnine97m) @@ -966,14 +966,14 @@ Samurai Spirits: Amakusa Kourin (Japan) (Doukonban) [T-3118G] | @@ Samurai Spirits: Zankurou Musouken (Japan) [T-3106G] | (samsho3) Samurai Spirits: Zankurou Musouken (Japan) (Doukonban) [T-3104G] | == - Sangokushi Eiketsuden (Japan) [T-7613G] | (sangeike) + Sangokushi Eiketsuden (Japan) [T-7613G] | (sangoeik) Sangokushi Eiketsuden (Japan) (Premium Pack) [T-7652G] | @@ Sangokushi IV (Japan) [T-7601G] | (sangoku4) Sangokushi IV (Japan) (Koei the Best) [T-7669G] | @@ Sangokushi IV with Power Up Kit (Japan) [T-7644G] | (sangoku4puk) - Sangokushi Koumeiden (Japan) [T-7629G] | (sangkoum) + Sangokushi Koumeiden (Japan) [T-7629G] | (sangokou) Sangokushi Koumeiden (Japan) (Premium Pack) [T-7651G] | @@ - Sangokushi Returns (Japan) [T-7617G] | (sangret) + Sangokushi Returns (Japan) [T-7617G] | (sangoret) Sangokushi V (Japan) [T-7623G] | (sangoku5) Sangokushi V (Japan) (Premium Pack) [T-7648G] | @@ Sangokushi Value Set (Japan) [T-7636G] | ?? @@ -1063,7 +1063,7 @@ Shinseiki Evangelion: Digital Card Library (Japan) [GS-9159] | (shinevdc) Shinseiki Evangelion: Eva to Yukai na Nakama-tachi (Japan) [T-35103G] | (shinevyu) Shinseiki Evangelion: Koutetsu no Girlfriend (Japan) [GS-9194] | (shinevgf) - Shinsetsu Samurai Spirits: Bushidouretsuden (Japan) [T-3112G] | (samshrpg) + Shinsetsu Samurai Spirits: Bushidouretsuden (Japan) [T-3112G] | (samsprpg) Shinsetsu Yumemi Yakata: Tobira no Oku ni Darekaga... (Japan) [GS-9005] | (shinsets) Shippu Mahou Daisakusen (Japan) [T-18506G] | (mahoudai) Shiroki Majo: Mouhitotsu no Eiyuu Densetsu (Japan) [T-14322G] | (shirokim) @@ -1188,8 +1188,8 @@ Takuramakan: Tonkoudenki (Japan) [T-25102G] | (takurama) Tama: Adventurous Ball in Giddy Labyrinth (Japan) [T-4801G] | (tama) Tanjou S: Debut (Japan) [T-20101G] | (tanjous) - Tantei Jinguuji Saburou: Mikan no Rupo (Japan) [T-1307G] | (tanteimr) - Tantei Jinguuji Saburou: Yume no Owarini (Japan) [T-1316G] | (tanteiyo) + Tantei Jinguuji Saburou: Mikan no Rupo (Japan) [T-1307G] | (tjsmikrp) + Tantei Jinguuji Saburou: Yume no Owarini (Japan) [T-1316G] | (tjsyumow) Techno Motor (Japan) [T-37601G] | (technomo) Techno Motor (Japan) (Satakore) [T-37602G] | @@ Teitoku no Ketsudan II (Japan) [T-7607G] | (teikets2) @@ -1202,7 +1202,7 @@ Tenchi Muyou! Rensa Hitsuyou (Japan) [T-22204G] | (tenchren) Tenchi Muyou! Ryououki: Gokuraku CD-ROM for Sega Saturn (Japan) [T-21801G] | (tenchryo) Tenchi Muyou! Toukou Muyou (Japan) [T-26103G] | (tenchtou) - Tenchi o Kurau II: Sekiheki no Tatakai (Japan) [T-1207G] | (wofj) + Tenchi o Kurau II: Sekiheki no Tatakai (Japan) [T-1207G] | (tenchik2) Tengai Makyou: Dai-shi no Mokujiroku: The Apocalypse IV (Japan) [T-14301G] | (tengaima) Tenka Seiha (Japan) [T-15030G] | (tenkasei) Tennis Arena (Japan) [T-17703G] | (tenarena) @@ -1222,12 +1222,12 @@ Thunder Force V (Japan) [T-1811G] | (tf5) Thunder Force V (Japan) (Satakore) [T-1814G] | @@ Thunder Force V (Japan) (Special Pack) [T-1812G] | @@ - Thunder Storm & Road Blaster (Japan) [T-20701G] | (tndrstm) (roadblst) + Thunder Storm & Road Blaster (Japan) [T-20701G] | (tstrmrbl) Thunderhawk II (Japan) [T-6006G] | (thawk2j) Tilk: Aoi Umi Kara Kita Shoujo (Japan) [T-32508G] | (tilk) Time Bokan Series: Bokan to Ippatsu! Doronboo Kanpekiban (Japan) [T-20607G] | (timeboka) Time Commando (Japan) [T-8129G] | (timecomm) - Time Gal & Ninja Hayate (Japan) [T-20702G] | (timegal) (nhayate) + Time Gal & Ninja Hayate (Japan) [T-20702G] | (tgalninh) Titan Wars (Japan) [T-15903G] | (titanwarj) Toh Shin Den S (Japan) [GS-9078] | (toshimixj) Toh Shin Den URA: Ultimate Revenge Attack (Japan) [T-10305G] | (toshiuraj) @@ -1239,8 +1239,8 @@ Tokimeki Memorial Selection Fujisaki Shiori (Japan) [T-9517G] | (tokimfuj) Tokimeki Memorial: Forever with You (Japan) [T-9504G] | (tokimfwy) Tokimeki Memorial: Forever with You (Japan) (Special Ban) [T-9511G] | ?? - Tokimeki Memorial: Taisen Puzzle-dama (Japan) [T-9512G] | (tkmmpzdm) - Tokimeki Memorial: Taisen Tokkae-dama (Japan) [T-9524G] | (tokkae) + Tokimeki Memorial: Taisen Puzzle-dama (Japan) [T-9512G] | (tokimpzd) + Tokimeki Memorial: Taisen Tokkae-dama (Japan) [T-9524G] | (tokimtkd) Tokusou Kidoutai J-Swat (Japan) [T-20602G] | (jswat) Tokyo Shadow (Japan) [T-1110G] | (tokyoshd) Tomb Raiders (Japan) [T-6010G] | (traidj) @@ -4784,8 +4784,9 @@ Olympic Soccer (Fra) T-7904H-09 - - Thunder Storm (Interactive Movie Action - Thunder Storm & Road Blaster Disc 1) (Jpn) + + + Interactive Movie Action - Thunder Storm & Road Blaster (Jpn) 1995 Ecseco Development @@ -4793,22 +4794,13 @@ Olympic Soccer (Fra) T-7904H-09 + - - - - - Road Blaster (Interactive Movie Action - Thunder Storm & Road Blaster Disc 2) (Jpn) - 1995 - Ecseco Development - - - - - + + @@ -5228,7 +5220,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Kindaichi Shounen no Jikenbo - Hoshimitou Kanashimi no Fukushuuki (Jpn) 1998 Hudson @@ -7159,8 +7151,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Sangokushi Eiketsuden (Jpn) + + Sangokushi - Eiketsuden (Jpn) 1996 Koei @@ -7175,8 +7167,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Sangokushi Koumeiden (Jpn) + + Sangokushi - Koumeiden (Jpn) 1997 Koei @@ -7768,8 +7760,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Shinsetsu Samurai Spirits Bushidou Retsuden (Jpn) + + Shinsetsu Samurai Spirits - Bushidou Retsuden (Jpn) 1997 SNK @@ -8492,7 +8484,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Tantei Jinguuji Saburou - Yume no Owari ni (Jpn, Alt) 1998 Data East @@ -8524,7 +8516,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Tenchi wo Kurau II - Sekiheki no Tatakai (Jpn, 2M) 1996 Capcom @@ -8690,8 +8682,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Tokimeki Memorial Taisen Puzzledama (Jpn, 2M) + + Tokimeki Memorial Taisen Puzzle-dama (Jpn, 2M) 1996 Konami @@ -8706,8 +8698,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Tokimeki Memorial Taisen Tokkaedama (Jpn) + + Tokimeki Memorial Taisen Tokkae-dama (Jpn) 1997 Konami @@ -10111,7 +10103,7 @@ Olympic Soccer (Fra) T-7904H-09 - Dark Seed (Jpn) + Darkseed (Jpn) 1995 GAGA Communications @@ -10127,7 +10119,7 @@ Olympic Soccer (Fra) T-7904H-09 - Dark Seed II (Jpn) + Darkseed II (Jpn) 1997 B-Factory @@ -13065,8 +13057,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Shinsetsu Samurai Spirits Bushidou Retsuden (Jpn, Alt) + + Shinsetsu Samurai Spirits - Bushidou Retsuden (Jpn, Alt) 1997 SNK @@ -16091,7 +16083,7 @@ Olympic Soccer (Fra) T-7904H-09 - Dark Seed II (Jpn, Alt) + Darkseed II (Jpn, Alt) 1997 B-Factory @@ -18127,7 +18119,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Idol Janshi Suchie-Pai Secret Album (Jpn) 1999 Jaleco @@ -20200,8 +20192,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Shinsetsu Samurai Spirits Bushidou Retsuden (Jpn, Alt 2) + + Shinsetsu Samurai Spirits - Bushidou Retsuden (Jpn, Alt 2) 1997 SNK @@ -20722,7 +20714,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Tantei Jinguuji Saburou - Yume no Owari ni (Jpn) 1998 Data East @@ -20743,8 +20735,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Tantei Jinguuji Saburou - Mikan no Report (Jpn) + + Tantei Jinguuji Saburou - Mikan no Rupo (Jpn) 1996 Data East @@ -21147,8 +21139,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Thunder Storm (Interactive Movie Action - Thunder Storm & Road Blaster Disc 1) (Jpn, Alt) + + Interactive Movie Action - Thunder Storm & Road Blaster Disc 1 (Jpn, Alt) 1995 Ecseco Development @@ -21156,22 +21148,13 @@ Olympic Soccer (Fra) T-7904H-09 + - - - - - Road Blaster (Interactive Movie Action - Thunder Storm & Road Blaster Disc 2) (Jpn, Alt) - 1995 - Ecseco Development - - - - - + + @@ -21281,8 +21264,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Tokimeki Memorial Taisen Tokkaedama (Jpn, Alt) + + Tokimeki Memorial Taisen Tokkae-dama (Jpn, Alt) 1997 Konami @@ -23296,7 +23279,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Ide Yousuke Meijin no Shin Jissen Mahjong (Jpn) 1996 Capcom @@ -23313,7 +23296,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Idol Janshi Suchie-Pai II (Jpn) 1996 Jaleco @@ -23337,7 +23320,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Idol Janshi Suchie-Pai Mecha Genteiban - Hatsubai 5 Shuunen Toku Package (Jpn) 1998 Jaleco @@ -23368,7 +23351,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Idol Janshi Suchie-Pai Remix (Jpn) 1995 Jaleco @@ -23384,7 +23367,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Idol Janshi Suchie-Pai Special (Jpn) 1995 Jaleco @@ -23713,7 +23696,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Kindaichi Shounen no Jikenbo - Hoshimitou Kanashimi no Fukushuuki (Jpn, Alt) 1998 Hudson @@ -24979,7 +24962,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Princess Maker - Yumemiru Yousei (Jpn) 1998 Gainax @@ -24995,7 +24978,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Princess Maker 2 (Jpn) 1995 MicroCabin @@ -25011,7 +24994,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Princess Maker 2 (Jpn, Satakore) 1997 MicroCabin @@ -25043,7 +25026,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Pro Mahjong Kiwame S (Jpn) 1996 Athena @@ -25450,8 +25433,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Sangokushi Eiketsuden (Jpn, Alt) + + Sangokushi - Eiketsuden (Jpn, Alt) 1996 Koei @@ -25482,8 +25465,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Sangokushi Koumeiden (Jpn, Alt) + + Sangokushi - Koumeiden (Jpn, Alt) 1997 Koei @@ -25498,7 +25481,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Sangokushi Returns (Jpn) 1997 Koei @@ -26423,8 +26406,8 @@ Olympic Soccer (Fra) T-7904H-09 - - Tokimeki Memorial Taisen Puzzledama (Jpn, Alt) + + Tokimeki Memorial Taisen Puzzle-dama (Jpn, Alt) 1996 Konami @@ -27377,7 +27360,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Pro Mahjong Kiwame S (Jpn, Satakore) 1997 Athena @@ -27656,12 +27639,12 @@ Olympic Soccer (Fra) T-7904H-09 - Simulation Zoo (Jpn) + Simulation Zoo - Sekaiichi no Doubutsuen o Tsukurou (Jpn) 1997 Soft Bank - + @@ -29081,7 +29064,7 @@ Olympic Soccer (Fra) T-7904H-09 - + Ninja Jajamaru-kun - Onigiri Ninpouchou Gold (Jpn) 1997 Jaleco diff --git a/hash/snes.xml b/hash/snes.xml index 8e2cf35fbb3..2f51ef17aa6 100644 --- a/hash/snes.xml +++ b/hash/snes.xml @@ -16402,7 +16402,7 @@ more investigation needed... - + Kouryuuki (Jpn) 1994 Koei @@ -51700,7 +51700,7 @@ to ensure nothing has been touched in the Retro Quest cart production in 2013/20 - + Princess Maker - Legend of Another World (Jpn) 1995 Takara diff --git a/hash/x68k_flop.xml b/hash/x68k_flop.xml index d54ff576ee7..1ca90815df2 100644 --- a/hash/x68k_flop.xml +++ b/hash/x68k_flop.xml @@ -7650,7 +7650,7 @@ maybe the remaining disks are the supposedly undumped addons: Daikairei Powerup - + Kouryuuki 1993 光栄 (Koei) From 7af080d4539c7b99df0051f830c9cadf81939abc Mon Sep 17 00:00:00 2001 From: Paul Priest Date: Sun, 29 May 2016 11:41:30 +0100 Subject: [PATCH 14/14] [skip CI] Fix channel for irc notifications - no # (nw) + example for pacman, should we never need to bring in non-default deps --- .drone.yml | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/.drone.yml b/.drone.yml index d387a0d8bb8..ef898228c9a 100644 --- a/.drone.yml +++ b/.drone.yml @@ -12,25 +12,26 @@ build: - MAME_EXE=mametiny.exe # - SOURCES=src/mame/drivers/pacman.cpp commands: +# - pacman -S -q --noprogressbar --noconfirm winpty - make - - ./$MAME_EXE -validate || echo "Validation successful" + - ./$MAME_EXE -validate && echo "Validation successful" notify: irc: prefix: build nick: $$IRC_USER - channel: #mame-dev + channel: mame-dev server: host: $$IRC_HOST port: $$IRC_PORT password: $$IRC_PASS tls: true - when: + when: success: false failure: true - change: true + change: true -# Need to create secrets file from within tea-ci.org +# Need to regen secrets file (.drone.sec) from within tea-ci.org to enable #notify: # email: # from: git@mamedev.org