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Merge pull request #1759 from fulivi/hp9845_dev8
HP9845: implemented HP98034 module (HPIB interface)
This commit is contained in:
R. Belmont
GitHub
commit
b189966b84
@ -2919,8 +2919,9 @@ end
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if (BUSES["HP9845_IO"]~=null) then
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files {
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MAME_DIR .. "src/devices/bus/hp9845_io/hp9845_io.cpp",
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MAME_DIR .. "src/devices/bus/hp9845_io/98035.cpp"
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}
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MAME_DIR .. "src/devices/bus/hp9845_io/98034.cpp",
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MAME_DIR .. "src/devices/bus/hp9845_io/98035.cpp",
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}
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end
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---------------------------------------------------
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375
src/devices/bus/hp9845_io/98034.cpp
Normal file
375
src/devices/bus/hp9845_io/98034.cpp
Normal file
@ -0,0 +1,375 @@
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// license:BSD-3-Clause
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// copyright-holders: F. Ulivi
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/*********************************************************************
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98034.cpp
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98034 module (HPIB interface)
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TODO: Implement Parallel Poll response
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The main reference for this module is:
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HP 98034-90001, 98034 Installation and Service Manual
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*********************************************************************/
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#include "98034.h"
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#include "coreutil.h"
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// Debugging
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#define VERBOSE 0
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#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
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#define BIT_MASK(n) (1U << (n))
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// Macros to clear/set single bits
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#define BIT_CLR(w , n) ((w) &= ~BIT_MASK(n))
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#define BIT_SET(w , n) ((w) |= BIT_MASK(n))
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hp98034_io_card::hp98034_io_card(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: hp9845_io_card_device(mconfig , HP98034_IO_CARD , "HP98034 card" , tag , owner , clock , "hp98034" , __FILE__),
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m_cpu(*this , "np"),
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m_sw1(*this , "sw1"),
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m_ieee488(*this , IEEE488_TAG)
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{
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}
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hp98034_io_card::~hp98034_io_card()
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{
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}
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static INPUT_PORTS_START(hp98034_port)
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MCFG_HP9845_IO_SC(7)
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PORT_START("sw1")
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PORT_DIPNAME(0x1f , 0x15 , "HPIB address")
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PORT_DIPLOCATION("S1:1,2,3,4,5")
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PORT_DIPSETTING(0x00 , "0")
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PORT_DIPSETTING(0x01 , "1")
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PORT_DIPSETTING(0x02 , "2")
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PORT_DIPSETTING(0x03 , "3")
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PORT_DIPSETTING(0x04 , "4")
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PORT_DIPSETTING(0x05 , "5")
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PORT_DIPSETTING(0x06 , "6")
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PORT_DIPSETTING(0x07 , "7")
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PORT_DIPSETTING(0x08 , "8")
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PORT_DIPSETTING(0x09 , "9")
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PORT_DIPSETTING(0x0a , "10")
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PORT_DIPSETTING(0x0b , "11")
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PORT_DIPSETTING(0x0c , "12")
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PORT_DIPSETTING(0x0d , "13")
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PORT_DIPSETTING(0x0e , "14")
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PORT_DIPSETTING(0x0f , "15")
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PORT_DIPSETTING(0x10 , "16")
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PORT_DIPSETTING(0x11 , "17")
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PORT_DIPSETTING(0x12 , "18")
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PORT_DIPSETTING(0x13 , "19")
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PORT_DIPSETTING(0x14 , "20")
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PORT_DIPSETTING(0x15 , "21")
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PORT_DIPSETTING(0x16 , "22")
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PORT_DIPSETTING(0x17 , "23")
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PORT_DIPSETTING(0x18 , "24")
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PORT_DIPSETTING(0x19 , "25")
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PORT_DIPSETTING(0x1a , "26")
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PORT_DIPSETTING(0x1b , "27")
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PORT_DIPSETTING(0x1c , "28")
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PORT_DIPSETTING(0x1d , "29")
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PORT_DIPSETTING(0x1e , "30")
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PORT_DIPSETTING(0x1f , "31")
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PORT_DIPNAME(0x20 , 0x00 , "Sys. controller")
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PORT_DIPLOCATION("S1:6")
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PORT_DIPSETTING(0x00 , DEF_STR(On))
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PORT_DIPSETTING(0x20 , DEF_STR(Off))
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INPUT_PORTS_END
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ioport_constructor hp98034_io_card::device_input_ports() const
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{
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return INPUT_PORTS_NAME(hp98034_port);
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}
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void hp98034_io_card::device_start()
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{
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save_item(NAME(m_dc));
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save_item(NAME(m_idr));
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save_item(NAME(m_odr));
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save_item(NAME(m_force_flg));
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save_item(NAME(m_mode_reg));
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save_item(NAME(m_clr_hpib));
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save_item(NAME(m_ctrl_out));
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save_item(NAME(m_data_out));
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}
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void hp98034_io_card::device_reset()
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{
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hp9845_io_card_device::device_reset();
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install_readwrite_handler(read16_delegate(FUNC(hp98034_io_card::reg_r) , this) , write16_delegate(FUNC(hp98034_io_card::reg_w) , this));
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m_idr = 0;
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m_odr = 0;
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m_force_flg = false;
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m_mode_reg = 0xff;
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m_clr_hpib = false;
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m_ctrl_out = 0;
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m_data_out = 0;
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update_dc();
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}
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READ16_MEMBER(hp98034_io_card::reg_r)
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{
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uint16_t res = m_odr;
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if (offset == 1 || offset == 3) {
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// Reading from R5 or R7 forces bits 4&5 to 1
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res |= 0x30;
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}
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// Mode register
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// Bits Value
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// ==========
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// 7-4 1
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// 3-2 ~offset
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// 1-0 1
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m_mode_reg = (uint8_t)((offset << 2) ^ 0xff);
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m_force_flg = true;
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update_flg();
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LOG(("read R%u=%04x\n" , offset + 4 , res));
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return res;
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}
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WRITE16_MEMBER(hp98034_io_card::reg_w)
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{
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m_idr = (uint8_t)data;
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// Mode register
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// Bits Value
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// ==========
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// 7-4 1
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// 3-2 ~offset
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// 1 0
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// 0 1
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m_mode_reg = (uint8_t)((offset << 2) ^ 0xfd);
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m_force_flg = true;
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update_flg();
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LOG(("write R%u=%04x\n" , offset + 4 , data));
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}
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WRITE8_MEMBER(hp98034_io_card::dc_w)
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{
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if (data != m_dc) {
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//LOG(("DC=%02x\n" , data));
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m_dc = data;
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update_dc();
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}
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}
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READ8_MEMBER(hp98034_io_card::dc_r)
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{
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uint8_t res;
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if (m_force_flg) {
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// Force DC3 low
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res = 0xf7;
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} else {
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res = 0xff;
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}
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return res;
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}
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WRITE8_MEMBER(hp98034_io_card::hpib_data_w)
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{
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m_data_out = data;
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update_data_out();
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}
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WRITE8_MEMBER(hp98034_io_card::hpib_ctrl_w)
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{
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m_ctrl_out = data;
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update_ctrl_out();
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}
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READ8_MEMBER(hp98034_io_card::hpib_ctrl_r)
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{
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uint8_t res = 0;
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if (!m_ieee488->dav_r()) {
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BIT_SET(res , 0);
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}
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if (!m_ieee488->nrfd_r()) {
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BIT_SET(res , 1);
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}
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if (!m_ieee488->ndac_r()) {
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BIT_SET(res , 2);
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}
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if (!m_ieee488->ifc_r()) {
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BIT_SET(res , 3);
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}
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if (!m_ieee488->atn_r()) {
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BIT_SET(res , 4);
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}
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if (!m_ieee488->srq_r()) {
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BIT_SET(res , 5);
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}
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if (!m_ieee488->ren_r()) {
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BIT_SET(res , 6);
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}
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if (!m_ieee488->eoi_r()) {
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BIT_SET(res , 7);
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}
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return res;
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}
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READ8_MEMBER(hp98034_io_card::hpib_data_r)
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{
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return ~m_ieee488->dio_r();
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}
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READ8_MEMBER(hp98034_io_card::idr_r)
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{
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return m_idr;
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}
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WRITE8_MEMBER(hp98034_io_card::odr_w)
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{
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m_odr = data;
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}
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READ8_MEMBER(hp98034_io_card::mode_reg_r)
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{
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return m_mode_reg;
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}
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WRITE8_MEMBER(hp98034_io_card::mode_reg_clear_w)
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{
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m_mode_reg = 0xff;
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m_force_flg = false;
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update_flg();
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}
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READ8_MEMBER(hp98034_io_card::switch_r)
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{
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return m_sw1->read() | 0xc0;
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}
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IRQ_CALLBACK_MEMBER(hp98034_io_card::irq_callback)
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{
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int res = 0xff;
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if (irqline == 0 && !m_ieee488->ifc_r()) {
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BIT_CLR(res, 1);
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}
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return res;
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}
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WRITE_LINE_MEMBER(hp98034_io_card::ieee488_ctrl_w)
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{
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update_clr_hpib();
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}
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void hp98034_io_card::update_dc(void)
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{
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irq_w(!BIT(m_dc , 0));
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sts_w(BIT(m_dc , 4));
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update_flg();
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update_clr_hpib();
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}
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void hp98034_io_card::update_flg(void)
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{
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flg_w(BIT(m_dc , 3) && !m_force_flg);
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}
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void hp98034_io_card::update_np_irq(void)
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{
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m_cpu->set_input_line(0 , (!m_ieee488->ifc_r() || m_clr_hpib) && BIT(m_dc , HP_NANO_IE_DC));
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}
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void hp98034_io_card::update_data_out(void)
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{
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if (m_clr_hpib) {
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m_data_out = 0;
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}
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m_ieee488->dio_w(~m_data_out);
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}
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void hp98034_io_card::update_ctrl_out(void)
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{
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if (m_clr_hpib) {
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m_ieee488->dav_w(1);
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m_ieee488->nrfd_w(1);
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m_ieee488->eoi_w(1);
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m_ieee488->ndac_w(0);
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} else {
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m_ieee488->dav_w(BIT(m_dc , 2));
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m_ieee488->nrfd_w(BIT(m_dc , 1));
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m_ieee488->eoi_w(!BIT(m_ctrl_out , 4));
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m_ieee488->ndac_w(BIT(m_dc , 6));
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}
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m_ieee488->srq_w(!BIT(m_ctrl_out , 0));
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m_ieee488->ren_w(!BIT(m_ctrl_out , 1));
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m_ieee488->atn_w(!BIT(m_ctrl_out , 2));
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m_ieee488->ifc_w(!BIT(m_ctrl_out , 3));
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}
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void hp98034_io_card::update_clr_hpib(void)
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{
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m_clr_hpib = !m_ieee488->atn_r() && BIT(m_dc , 5);
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update_data_out();
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update_ctrl_out();
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update_np_irq();
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LOG(("clr_hpib %d\n" , m_clr_hpib));
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}
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ROM_START(hp98034)
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ROM_REGION(0x400 , "np" , 0)
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ROM_LOAD("1816-1242.bin" , 0 , 0x400 , CRC(301a9f5f) SHA1(3d7c1ace38c4d3178fdbf764c044535d9f6ac94f))
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ROM_END
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static ADDRESS_MAP_START(np_program_map , AS_PROGRAM , 8 , hp98034_io_card)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x000 , 0x3ff) AM_ROM AM_REGION("np" , 0)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(np_io_map , AS_IO , 8 , hp98034_io_card)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0 , 0) AM_WRITE(hpib_data_w)
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AM_RANGE(1 , 1) AM_WRITE(hpib_ctrl_w)
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AM_RANGE(2 , 2) AM_READ(hpib_ctrl_r)
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AM_RANGE(3 , 3) AM_READ(hpib_data_r)
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AM_RANGE(4 , 4) AM_READ(idr_r)
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AM_RANGE(5 , 5) AM_WRITE(odr_w)
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AM_RANGE(6 , 6) AM_READWRITE(mode_reg_r , mode_reg_clear_w)
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AM_RANGE(7 , 7) AM_READ(switch_r)
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ADDRESS_MAP_END
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static MACHINE_CONFIG_FRAGMENT(hp98034)
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// Clock for NP is generated by a RC oscillator. Manual says its typical frequency
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// is around 2 MHz.
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MCFG_CPU_ADD("np" , HP_NANOPROCESSOR , 2000000)
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MCFG_CPU_PROGRAM_MAP(np_program_map)
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MCFG_CPU_IO_MAP(np_io_map)
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MCFG_HP_NANO_DC_CHANGED(WRITE8(hp98034_io_card , dc_w))
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MCFG_HP_NANO_READ_DC_CB(READ8(hp98034_io_card , dc_r))
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MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(hp98034_io_card , irq_callback)
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MCFG_IEEE488_BUS_ADD()
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MCFG_IEEE488_IFC_CALLBACK(WRITELINE(hp98034_io_card , ieee488_ctrl_w))
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MCFG_IEEE488_ATN_CALLBACK(WRITELINE(hp98034_io_card , ieee488_ctrl_w))
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MACHINE_CONFIG_END
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const tiny_rom_entry *hp98034_io_card::device_rom_region() const
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{
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return ROM_NAME(hp98034);
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}
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machine_config_constructor hp98034_io_card::device_mconfig_additions() const
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{
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return MACHINE_CONFIG_NAME(hp98034);
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}
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|
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// device type definition
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const device_type HP98034_IO_CARD = &device_creator<hp98034_io_card>;
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85
src/devices/bus/hp9845_io/98034.h
Normal file
85
src/devices/bus/hp9845_io/98034.h
Normal file
@ -0,0 +1,85 @@
|
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// license:BSD-3-Clause
|
||||
// copyright-holders: F. Ulivi
|
||||
/*********************************************************************
|
||||
|
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98034.h
|
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|
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98034 module (HPIB interface)
|
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|
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*********************************************************************/
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#pragma once
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#ifndef _98034_H_
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#define _98034_H_
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#include "hp9845_io.h"
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#include "cpu/nanoprocessor/nanoprocessor.h"
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#include "bus/ieee488/ieee488.h"
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class hp98034_io_card : public hp9845_io_card_device
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{
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public:
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// construction/destruction
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hp98034_io_card(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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virtual ~hp98034_io_card();
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// device-level overrides
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virtual ioport_constructor device_input_ports() const override;
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual const tiny_rom_entry *device_rom_region() const override;
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virtual machine_config_constructor device_mconfig_additions() const override;
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|
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DECLARE_READ16_MEMBER(reg_r);
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DECLARE_WRITE16_MEMBER(reg_w);
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DECLARE_WRITE8_MEMBER(dc_w);
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DECLARE_READ8_MEMBER(dc_r);
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DECLARE_WRITE8_MEMBER(hpib_data_w);
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DECLARE_WRITE8_MEMBER(hpib_ctrl_w);
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DECLARE_READ8_MEMBER(hpib_ctrl_r);
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DECLARE_READ8_MEMBER(hpib_data_r);
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DECLARE_READ8_MEMBER(idr_r);
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DECLARE_WRITE8_MEMBER(odr_w);
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DECLARE_READ8_MEMBER(mode_reg_r);
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DECLARE_WRITE8_MEMBER(mode_reg_clear_w);
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DECLARE_READ8_MEMBER(switch_r);
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|
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IRQ_CALLBACK_MEMBER(irq_callback);
|
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||||
DECLARE_WRITE_LINE_MEMBER(ieee488_ctrl_w);
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|
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private:
|
||||
required_device<hp_nanoprocessor_device> m_cpu;
|
||||
required_ioport m_sw1;
|
||||
required_device<ieee488_device> m_ieee488;
|
||||
|
||||
// DC lines
|
||||
uint8_t m_dc;
|
||||
|
||||
// Interface state
|
||||
uint8_t m_idr; // Input Data Register
|
||||
uint8_t m_odr; // Output Data Register
|
||||
bool m_force_flg;
|
||||
uint8_t m_mode_reg;
|
||||
|
||||
// 488 bus state
|
||||
bool m_clr_hpib;
|
||||
uint8_t m_ctrl_out;
|
||||
uint8_t m_data_out;
|
||||
|
||||
void update_dc(void);
|
||||
void update_flg(void);
|
||||
void update_np_irq(void);
|
||||
void update_data_out(void);
|
||||
void update_ctrl_out(void);
|
||||
void update_clr_hpib(void);
|
||||
|
||||
};
|
||||
|
||||
// device type definition
|
||||
extern const device_type HP98034_IO_CARD;
|
||||
|
||||
#endif /* _98034_H_ */
|
||||
@ -153,7 +153,7 @@ hp98035_io_card::~hp98035_io_card()
|
||||
}
|
||||
|
||||
static INPUT_PORTS_START(hp98035_port)
|
||||
MCFG_HP9845_IO_SC
|
||||
MCFG_HP9845_IO_SC(1)
|
||||
INPUT_PORTS_END
|
||||
|
||||
ioport_constructor hp98035_io_card::device_input_ports() const
|
||||
|
||||
@ -80,7 +80,9 @@ void hp9845_io_card_device::install_readwrite_handler(read16_delegate rhandler,
|
||||
}
|
||||
|
||||
#include "98035.h"
|
||||
#include "98034.h"
|
||||
|
||||
SLOT_INTERFACE_START(hp9845_io_slot_devices)
|
||||
SLOT_INTERFACE("98034_hpib" , HP98034_IO_CARD)
|
||||
SLOT_INTERFACE("98035_rtc" , HP98035_IO_CARD)
|
||||
SLOT_INTERFACE_END
|
||||
|
||||
@ -21,9 +21,9 @@
|
||||
|
||||
#define HP9845_IO_FIRST_SC 1 // Lowest SC used by I/O cards
|
||||
|
||||
#define MCFG_HP9845_IO_SC\
|
||||
#define MCFG_HP9845_IO_SC(_default_sc) \
|
||||
PORT_START("SC") \
|
||||
PORT_CONFNAME(0xf , 0 , "Select Code") \
|
||||
PORT_CONFNAME(0xf , (_default_sc) - HP9845_IO_FIRST_SC , "Select Code") \
|
||||
PORT_CONFSETTING(0 , "1")\
|
||||
PORT_CONFSETTING(1 , "2")\
|
||||
PORT_CONFSETTING(2 , "3")\
|
||||
|
||||
@ -188,6 +188,7 @@ ieee488_device::daisy_entry::daisy_entry(device_t *device)
|
||||
void ieee488_device::set_signal(device_t *device, int signal, int state)
|
||||
{
|
||||
bool changed = false;
|
||||
int old_state = get_signal(signal);
|
||||
|
||||
if (device == this)
|
||||
{
|
||||
@ -218,8 +219,13 @@ void ieee488_device::set_signal(device_t *device, int signal, int state)
|
||||
}
|
||||
}
|
||||
|
||||
if (changed)
|
||||
{
|
||||
if (!changed) {
|
||||
return;
|
||||
}
|
||||
|
||||
state = get_signal(signal);
|
||||
|
||||
if (old_state != state) {
|
||||
switch (signal)
|
||||
{
|
||||
case EOI: m_write_eoi(state); break;
|
||||
@ -289,21 +295,18 @@ int ieee488_device::get_signal(int signal)
|
||||
{
|
||||
int state = m_line[signal];
|
||||
|
||||
if (state)
|
||||
{
|
||||
daisy_entry *entry = m_device_list.first();
|
||||
daisy_entry *entry = m_device_list.first();
|
||||
|
||||
while (entry)
|
||||
while (state && entry)
|
||||
{
|
||||
if (!entry->m_line[signal])
|
||||
{
|
||||
state = 0;
|
||||
break;
|
||||
}
|
||||
{
|
||||
state = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
entry = entry->next();
|
||||
}
|
||||
}
|
||||
|
||||
return state;
|
||||
}
|
||||
@ -352,7 +355,7 @@ uint8_t ieee488_device::get_data()
|
||||
|
||||
daisy_entry *entry = m_device_list.first();
|
||||
|
||||
while (entry)
|
||||
while (data && entry)
|
||||
{
|
||||
data &= entry->m_dio;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user