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falco5220: Add ROM bank switch; correct clocks (nw)

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This commit is contained in:
AJR 2018-11-10 14:47:55 -05:00
parent 50b50a818f
commit b1c292726b
1 changed files with 27 additions and 9 deletions
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36
src/mame/drivers/falco5220.cpp
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@ -27,7 +27,6 @@
#include "emu.h"
//#include "bus/rs232/rs232.h"
#include "cpu/z80/z80.h"
#include "machine/clock.h"
#include "machine/nvram.h"
#include "machine/z80ctc.h"
#include "machine/z80sio.h"
@ -40,6 +39,7 @@ public:
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_screen(*this, "screen")
, m_rombank(*this, "rombank")
{
}
@ -47,16 +47,20 @@ public:
protected:
virtual void machine_start() override;
virtual void machine_reset() override;
private:
u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void rombank_w(u8 data);
void mem_map(address_map &map);
void io_map(address_map &map);
required_device<z80_device> m_maincpu;
required_device<screen_device> m_screen;
required_memory_bank m_rombank;
//required_shared_ptr<u8> m_cram; // 1x or 2x NEC D43256C-10L
//required_shared_ptr<u8> m_aram; // 1x or 2x NEC D43256C-10L
};
@ -66,9 +70,15 @@ u32 falco5220_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap,
return 0;
}
void falco5220_state::rombank_w(u8 data)
{
m_rombank->set_entry(data & 3);
}
void falco5220_state::mem_map(address_map &map)
{
map(0x0000, 0xbfff).rom().region("roms", 0);
map(0x0000, 0x7fff).rom().region("roms", 0);
map(0x8000, 0xbfff).bankr("rombank");
map(0xc000, 0xdfff).ram().share("nvram");
map(0xe000, 0xffff).ram();
}
@ -76,12 +86,21 @@ void falco5220_state::mem_map(address_map &map)
void falco5220_state::io_map(address_map &map)
{
map.global_mask(0xff);
map(0x00, 0x00).w(FUNC(falco5220_state::rombank_w));
map(0x60, 0x63).rw("sio", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w));
map(0x70, 0x73).rw("ctc", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
map(0x88, 0x8b).nopw(); // second SIO?
map(0x90, 0x93).nopw(); // second CTC?
}
void falco5220_state::machine_start()
{
m_rombank->configure_entries(0, 4, memregion("roms")->base(), 0x4000);
}
void falco5220_state::machine_reset()
{
m_rombank->set_entry(0);
}
static INPUT_PORTS_START(falco5220)
@ -96,20 +115,19 @@ static const z80_daisy_config daisy_chain[] =
void falco5220_state::falco5220(machine_config &config)
{
Z80(config, m_maincpu, 37.98_MHz_XTAL / 8); // Z0840006PSC; clock unverified
Z80(config, m_maincpu, 12.288_MHz_XTAL / 2); // Z0840006PSC
m_maincpu->set_addrmap(AS_PROGRAM, &falco5220_state::mem_map);
m_maincpu->set_addrmap(AS_IO, &falco5220_state::io_map);
m_maincpu->set_daisy_config(daisy_chain);
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // CXK5864AP-10L + battery
z80ctc_device &ctc(Z80CTC(config, "ctc", 37.98_MHz_XTAL / 8)); // Z0843006PSC
z80ctc_device &ctc(Z80CTC(config, "ctc", 12.288_MHz_XTAL / 2)); // Z0843006PSC
ctc.set_clk<0>(12.288_MHz_XTAL / 10);
ctc.set_clk<1>(12.288_MHz_XTAL / 10);
ctc.intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
clock_device &baudclk(CLOCK(config, "baudclk", 12.288_MHz_XTAL / 5));
(void)baudclk;
z80sio_device &sio(Z80SIO(config, "sio", 37.98_MHz_XTAL / 8)); // Z0844006PSC
z80sio_device &sio(Z80SIO(config, "sio", 12.288_MHz_XTAL / 2)); // Z0844006PSC
sio.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
@ -118,7 +136,7 @@ void falco5220_state::falco5220(machine_config &config)
}
ROM_START(falco5220)
ROM_REGION(0x10000, "roms", 0 )
ROM_REGION(0x10000, "roms", 0)
ROM_LOAD("152321-000.bin", 0x0000, 0x8000, CRC(45ef4a68) SHA1(71e12dce710f9b66290618e299b2382834845057))
ROM_LOAD("152321-001.bin", 0x8000, 0x8000, CRC(91056626) SHA1(217ca3de76d5e9861284f5b64f8eff8e541fad3d))
ROM_END