mirror of
https://github.com/holub/mame
synced 2025-04-16 13:34:55 +03:00
Cleanups and version bump
This commit is contained in:
parent
9425c141de
commit
b1d6f6d63f
@ -89,13 +89,13 @@
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<software name="loopytwn">
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<description>Loopy Town no Oheya ga Hoshii!</description>
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<year>1996</year>
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<publisher>Casio</publisher>
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<info name="serial" value="XK-504"/>
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<info name="alt_name" value="ルーピータウンのおへやがほしい!"/>
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<publisher>Casio</publisher>
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<info name="serial" value="XK-504"/>
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<info name="alt_name" value="ルーピータウンのおへやがほしい!"/>
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<part name="cart" interface="loopy_cart">
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<dataarea name="rom" size="0x300000">
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<rom name="CHIP1.IC104" size="0x200000" crc="bae71d45" sha1="79628715ccedd9bc3fd72d21fa9ea6513b88cf51" offset="0x000000" />
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<rom name="CHIP2.IC105" size="0x100000" crc="e0514d03" sha1="4dd02faa1ebf6754da0ade417e488512f3502620" offset="0x200000" />
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<rom name="CHIP2.IC105" size="0x100000" crc="e0514d03" sha1="4dd02faa1ebf6754da0ade417e488512f3502620" offset="0x200000" />
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</dataarea>
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</part>
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</software>
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|
@ -261,6 +261,6 @@
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<rom name="leapfrog.bin" size="4096" crc="105eb530" sha1="7211b0b1c6e8798399f4f6d2a942db4e8379c691" offset="0" />
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</dataarea>
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</part>
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</software>
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</software>
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</softwarelist>
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@ -171,7 +171,7 @@ CP/M-68K Release 1.04: Disks: All (maybe others)
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<description>Dimension 68000 Burnin Test</description>
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<year>1984</year>
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<publisher>Micro Craft Corporation</publisher>
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<part name="flop1" interface="floppy_5_25">
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<feature name="part_id" value="Disk 1"/>
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<dataarea name="flop" size="181726">
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@ -184,14 +184,14 @@ CP/M-68K Release 1.04: Disks: All (maybe others)
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<description>Fortran 68K</description>
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<year>1983</year>
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<publisher>Silicon Valley Software</publisher>
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<part name="flop1" interface="floppy_5_25">
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<feature name="part_id" value="Disk 1"/>
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<dataarea name="flop" size="391735">
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<rom name="d68fort1.imd" size="391735" crc="db27dc48" sha1="b912b91ed49e828c91863d3f71d3a7d673ac08b1" offset="0"/>
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</dataarea>
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</part>
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<part name="flop2" interface="floppy_5_25">
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<feature name="part_id" value="Disk 2"/>
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<dataarea name="flop" size="386625">
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@ -199,5 +199,5 @@ CP/M-68K Release 1.04: Disks: All (maybe others)
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</dataarea>
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</part>
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</software>
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</softwarelist>
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@ -116,7 +116,7 @@
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</part>
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</software>
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<software name="cgen2"> <!-- cart for Ordisavant -->
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<software name="cgen2"> <!-- cart for Ordisavant -->
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<description>Connaissances Generales II</description>
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<year>1988</year>
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<publisher>VTech</publisher>
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@ -127,7 +127,7 @@
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</part>
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</software>
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<software name="encyclop"> <!-- cart for Ordisavant -->
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<software name="encyclop"> <!-- cart for Ordisavant -->
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<description>Encyclopedie</description>
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<year>1988</year>
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<publisher>VTech</publisher>
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@ -205,8 +205,8 @@ Battlefighter (Original) (Unreleased - Prototype Stage)
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<rom name="tron.bin" size="8192" crc="280f191d" sha1="0d8b5c43db89a438f6036794be7628793643818b" offset="0" />
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</dataarea>
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</part>
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</software>
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</software>
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<software name="jungler"> <!-- US and Japan confirmed to be the same -->
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<!-- Stock No: 8202, (Japanese 015E)-->
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<description>Jungler</description>
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@ -90,7 +90,7 @@ static MACHINE_CONFIG_FRAGMENT( cbm2_hrg_a )
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MCFG_SCREEN_SIZE(512, 512)
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MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 512-1)
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MCFG_SCREEN_REFRESH_RATE(25)
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MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
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MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
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MCFG_DEVICE_ADD(EF9365_TAG, EF9365, 1750000)
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MCFG_VIDEO_SET_SCREEN(SCREEN_TAG)
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@ -111,7 +111,7 @@ static MACHINE_CONFIG_FRAGMENT( cbm2_hrg_b )
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MCFG_SCREEN_SIZE(512, 256)
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MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1)
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MCFG_SCREEN_REFRESH_RATE(50)
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MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
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MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
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MCFG_DEVICE_ADD(EF9366_TAG, EF9365, 1750000)
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MCFG_VIDEO_SET_SCREEN(SCREEN_TAG)
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@ -24,7 +24,7 @@
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// ======================> cbm2_hrg_t
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class cbm2_hrg_t : public device_t,
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public device_cbm2_expansion_card_interface
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public device_cbm2_expansion_card_interface
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{
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public:
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// construction/destruction
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@ -92,7 +92,7 @@ static MACHINE_CONFIG_FRAGMENT( cbm8000_hsg_a )
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MCFG_SCREEN_SIZE(512, 512)
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MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 512-1)
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MCFG_SCREEN_REFRESH_RATE(25)
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MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
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MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
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MCFG_DEVICE_ADD(EF9365_TAG, EF9365, 1750000)
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MCFG_VIDEO_SET_SCREEN(SCREEN_TAG)
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@ -113,7 +113,7 @@ static MACHINE_CONFIG_FRAGMENT( cbm8000_hsg_b )
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MCFG_SCREEN_SIZE(512, 256)
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MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1)
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MCFG_SCREEN_REFRESH_RATE(50)
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MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
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MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
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MCFG_DEVICE_ADD(EF9366_TAG, EF9365, 1750000)
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MCFG_VIDEO_SET_SCREEN(SCREEN_TAG)
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@ -24,7 +24,7 @@
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// ======================> cbm8000_hsg_t
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class cbm8000_hsg_t : public device_t,
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public device_pet_expansion_card_interface
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public device_pet_expansion_card_interface
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{
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public:
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// construction/destruction
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@ -1485,20 +1485,20 @@ UINT32 hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , UINT16 addr)
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bsc_reg = HP_REG_R37_ADDR;
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break;
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case AEC_CASE_I:
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// Behaviour of AEC during interrupt vector fetch is undocumented but it can be guessed from 9845B firmware.
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// Basically in this case the integrated AEC seems to do what the discrete implementation in 9845A does:
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// top half of memory is mapped to block 0 (fixed) and bottom half is mapped according to content of R35
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// (see pg 334 of patent).
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bsc_reg = top_half ? 0 : HP_REG_R35_ADDR;
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break;
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case AEC_CASE_I:
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// Behaviour of AEC during interrupt vector fetch is undocumented but it can be guessed from 9845B firmware.
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// Basically in this case the integrated AEC seems to do what the discrete implementation in 9845A does:
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// top half of memory is mapped to block 0 (fixed) and bottom half is mapped according to content of R35
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// (see pg 334 of patent).
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bsc_reg = top_half ? 0 : HP_REG_R35_ADDR;
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break;
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default:
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logerror("hphybrid: aec_case=%d\n" , aec_case);
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return 0;
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}
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default:
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logerror("hphybrid: aec_case=%d\n" , aec_case);
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return 0;
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}
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UINT16 aec_reg = (bsc_reg != 0) ? (m_reg_aec[ bsc_reg - HP_REG_R32_ADDR ] & BSC_REG_MASK) : 0;
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UINT16 aec_reg = (bsc_reg != 0) ? (m_reg_aec[ bsc_reg - HP_REG_R32_ADDR ] & BSC_REG_MASK) : 0;
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if (m_forced_bsc_25) {
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aec_reg = (aec_reg & 0xf) | 0x20;
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@ -90,83 +90,83 @@ public:
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template<class _Object> static devcb_base &set_pa_changed_func(device_t &device, _Object object) { return downcast<hp_hybrid_cpu_device &>(device).m_pa_changed_func.set_callback(object); }
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protected:
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hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth);
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hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth);
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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// device_execute_interface overrides
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virtual UINT32 execute_min_cycles() const override { return 6; }
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virtual UINT32 execute_input_lines() const override { return 2; }
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virtual UINT32 execute_default_irq_vector() const override { return 0xffff; }
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virtual void execute_run() override;
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virtual void execute_set_input(int inputnum, int state) override;
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// device_execute_interface overrides
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virtual UINT32 execute_min_cycles() const override { return 6; }
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virtual UINT32 execute_input_lines() const override { return 2; }
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virtual UINT32 execute_default_irq_vector() const override { return 0xffff; }
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virtual void execute_run() override;
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virtual void execute_set_input(int inputnum, int state) override;
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UINT16 execute_one(UINT16 opcode);
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UINT16 execute_one_sub(UINT16 opcode);
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// Execute an instruction that doesn't belong to either BPC or IOC
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virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0;
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UINT16 execute_one(UINT16 opcode);
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UINT16 execute_one_sub(UINT16 opcode);
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// Execute an instruction that doesn't belong to either BPC or IOC
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virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0;
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
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// device_state_interface overrides
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void state_string_export(const device_state_entry &entry, std::string &str) const override;
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// device_state_interface overrides
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void state_string_export(const device_state_entry &entry, std::string &str) const override;
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// device_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
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virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
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// device_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
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virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
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// Different cases of memory access
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// See patent @ pg 361
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typedef enum {
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AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses
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AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses
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AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses
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AEC_CASE_D, // DMA accesses
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AEC_CASE_I // Interrupt vector fetches
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} aec_cases_t;
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// Different cases of memory access
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// See patent @ pg 361
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typedef enum {
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AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses
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AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses
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AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses
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AEC_CASE_D, // DMA accesses
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AEC_CASE_I // Interrupt vector fetches
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} aec_cases_t;
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// do memory address extension
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virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0;
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// do memory address extension
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virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0;
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UINT16 remove_mae(UINT32 addr);
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UINT16 remove_mae(UINT32 addr);
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UINT16 RM(aec_cases_t aec_case , UINT16 addr);
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UINT16 RM(UINT32 addr);
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virtual UINT16 read_non_common_reg(UINT16 addr) = 0;
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UINT16 RM(aec_cases_t aec_case , UINT16 addr);
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UINT16 RM(UINT32 addr);
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virtual UINT16 read_non_common_reg(UINT16 addr) = 0;
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void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v);
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void WM(UINT32 addr , UINT16 v);
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virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0;
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void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v);
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void WM(UINT32 addr , UINT16 v);
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virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0;
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UINT16 fetch(void);
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UINT16 fetch(void);
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UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
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UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
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devcb_write8 m_pa_changed_func;
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devcb_write8 m_pa_changed_func;
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int m_icount;
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bool m_forced_bsc_25;
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int m_icount;
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bool m_forced_bsc_25;
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// State of processor
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UINT16 m_reg_A; // Register A
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UINT16 m_reg_B; // Register B
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UINT16 m_reg_P; // Register P
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UINT16 m_reg_R; // Register R
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UINT16 m_reg_C; // Register C
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UINT16 m_reg_D; // Register D
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UINT16 m_reg_IV; // Register IV
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UINT16 m_reg_W; // Register W
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UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
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UINT16 m_flags; // Flags
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UINT8 m_dmapa; // DMA peripheral address (4 bits)
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UINT16 m_dmama; // DMA address
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UINT16 m_dmac; // DMA counter
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UINT16 m_reg_I; // Instruction register
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UINT32 m_genpc; // Full PC
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// State of processor
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UINT16 m_reg_A; // Register A
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UINT16 m_reg_B; // Register B
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UINT16 m_reg_P; // Register P
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UINT16 m_reg_R; // Register R
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UINT16 m_reg_C; // Register C
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UINT16 m_reg_D; // Register D
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UINT16 m_reg_IV; // Register IV
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UINT16 m_reg_W; // Register W
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UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
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UINT16 m_flags; // Flags
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UINT8 m_dmapa; // DMA peripheral address (4 bits)
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UINT16 m_dmama; // DMA address
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UINT16 m_dmac; // DMA counter
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UINT16 m_reg_I; // Instruction register
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UINT32 m_genpc; // Full PC
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private:
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address_space_config m_program_config;
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@ -159,7 +159,7 @@ void i8086_cpu_device::execute_run()
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}
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}
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/* Trap should allow one instruction to be executed.
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/* Trap should allow one instruction to be executed.
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CPUID.ASM (by Bob Smith, 1985) suggests that in situations where m_no_interrupt is 1,
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(directly after POP SS / MOV_SREG), single step IRQs don't fire.
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*/
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@ -167,7 +167,7 @@ void i8086_cpu_device::execute_run()
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{
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if ( (m_fire_trap >= 2) && (m_no_interrupt == 0) )
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{
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m_fire_trap = 0; // reset trap flag upon entry
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m_fire_trap = 0; // reset trap flag upon entry
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interrupt(1);
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}
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else
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@ -1408,7 +1408,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
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m_src = GetRMWord();
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m_sregs[(m_modrm & 0x18) >> 3] = m_src; // confirmed on hw: modrm bit 5 ignored
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CLKM(MOV_SR,MOV_SM);
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m_no_interrupt = 1; // Disable IRQ after load segment register.
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m_no_interrupt = 1; // Disable IRQ after load segment register.
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break;
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case 0x8f: // i_popw
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@ -34872,5 +34872,3 @@ void m68ki_build_opcode_table(void)
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/* ======================================================================== */
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/* ============================== END OF FILE ============================= */
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/* ======================================================================== */
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@ -1748,62 +1748,62 @@ void tmp95c063_device::tlcs900_handle_ad()
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int ad_value;
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/* Store A/D converted value */
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if ((m_reg[TMP95C063_ADMOD1] & 0x10) == 0) // conversion channel fixed
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if ((m_reg[TMP95C063_ADMOD1] & 0x10) == 0) // conversion channel fixed
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{
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switch( m_reg[TMP95C063_ADMOD2] & 0x07 )
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{
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case 0x00: // AN0
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case 0x00: // AN0
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ad_value = m_an0_read(0) & 0x3ff;
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m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
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m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
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break;
|
||||
case 0x01: // AN1
|
||||
case 0x01: // AN1
|
||||
ad_value = m_an1_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x02: // AN2
|
||||
case 0x02: // AN2
|
||||
ad_value = m_an2_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x03: // AN3
|
||||
case 0x03: // AN3
|
||||
ad_value = m_an3_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG37L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG37H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x04: // AN4
|
||||
case 0x04: // AN4
|
||||
ad_value = m_an4_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x05: // AN5
|
||||
case 0x05: // AN5
|
||||
ad_value = m_an5_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x06: // AN6
|
||||
case 0x06: // AN6
|
||||
ad_value = m_an6_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x07: // AN7
|
||||
case 0x07: // AN7
|
||||
ad_value = m_an7_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG37L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG37H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else // conversion channel sweep
|
||||
else // conversion channel sweep
|
||||
{
|
||||
switch( m_reg[TMP95C063_ADMOD2] & 0x07 )
|
||||
{
|
||||
case 0x00: // AN0
|
||||
case 0x00: // AN0
|
||||
ad_value = m_an0_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x01: // AN0 -> AN1
|
||||
case 0x01: // AN0 -> AN1
|
||||
ad_value = m_an0_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
|
||||
@ -1811,7 +1811,7 @@ void tmp95c063_device::tlcs900_handle_ad()
|
||||
m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x02: // AN0 -> AN1 -> AN2
|
||||
case 0x02: // AN0 -> AN1 -> AN2
|
||||
ad_value = m_an0_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
|
||||
@ -1822,7 +1822,7 @@ void tmp95c063_device::tlcs900_handle_ad()
|
||||
m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x03: // AN0 -> AN1 -> AN2 -> AN3
|
||||
case 0x03: // AN0 -> AN1 -> AN2 -> AN3
|
||||
ad_value = m_an0_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
|
||||
@ -1836,12 +1836,12 @@ void tmp95c063_device::tlcs900_handle_ad()
|
||||
m_reg[TMP95C063_ADREG37L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG37H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x04: // AN4
|
||||
case 0x04: // AN4
|
||||
ad_value = m_an4_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x05: // AN4 -> AN5
|
||||
case 0x05: // AN4 -> AN5
|
||||
ad_value = m_an4_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
|
||||
@ -1849,7 +1849,7 @@ void tmp95c063_device::tlcs900_handle_ad()
|
||||
m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x06: // AN4 -> AN5 -> AN6
|
||||
case 0x06: // AN4 -> AN5 -> AN6
|
||||
ad_value = m_an4_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
|
||||
@ -1860,7 +1860,7 @@ void tmp95c063_device::tlcs900_handle_ad()
|
||||
m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff;
|
||||
break;
|
||||
case 0x07: // AN4 -> AN5 -> AN6 -> AN7
|
||||
case 0x07: // AN4 -> AN5 -> AN6 -> AN7
|
||||
ad_value = m_an4_read(0) & 0x3ff;
|
||||
m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
|
||||
m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
|
||||
|
@ -852,14 +852,14 @@ private:
|
||||
devcb_write8 m_porte_write;
|
||||
|
||||
// analogue inputs, sampled at 10 bits
|
||||
devcb_read16 m_an0_read;
|
||||
devcb_read16 m_an1_read;
|
||||
devcb_read16 m_an2_read;
|
||||
devcb_read16 m_an3_read;
|
||||
devcb_read16 m_an4_read;
|
||||
devcb_read16 m_an5_read;
|
||||
devcb_read16 m_an6_read;
|
||||
devcb_read16 m_an7_read;
|
||||
devcb_read16 m_an0_read;
|
||||
devcb_read16 m_an1_read;
|
||||
devcb_read16 m_an2_read;
|
||||
devcb_read16 m_an3_read;
|
||||
devcb_read16 m_an4_read;
|
||||
devcb_read16 m_an5_read;
|
||||
devcb_read16 m_an6_read;
|
||||
devcb_read16 m_an7_read;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
@ -198,39 +198,39 @@ UINT16 tms32051_device::GET_ADDRESS()
|
||||
|
||||
bool tms32051_device::GET_ZLVC_CONDITION(int zlvc, int zlvc_mask)
|
||||
{
|
||||
if (zlvc_mask & 0x2) // OV-bit
|
||||
if (zlvc_mask & 0x2) // OV-bit
|
||||
{
|
||||
if ((zlvc & 0x2) && m_st0.ov == 0) // OV
|
||||
if ((zlvc & 0x2) && m_st0.ov == 0) // OV
|
||||
return false;
|
||||
if (((zlvc & 0x2) == 0) && m_st0.ov != 0) // NOV
|
||||
if (((zlvc & 0x2) == 0) && m_st0.ov != 0) // NOV
|
||||
return false;
|
||||
}
|
||||
if (zlvc_mask & 0x1) // C-bit
|
||||
if (zlvc_mask & 0x1) // C-bit
|
||||
{
|
||||
if ((zlvc & 0x1) && m_st1.c == 0) // C
|
||||
if ((zlvc & 0x1) && m_st1.c == 0) // C
|
||||
return false;
|
||||
if (((zlvc & 0x1) == 0) && m_st1.c != 0) // NC
|
||||
if (((zlvc & 0x1) == 0) && m_st1.c != 0) // NC
|
||||
return false;
|
||||
}
|
||||
|
||||
switch ((zlvc_mask & 0xc) | ((zlvc >> 2) & 0x3))
|
||||
{
|
||||
case 0x00: break; // MZ=0, ML=0, Z=0, L=0
|
||||
case 0x01: break; // MZ=0, ML=0, Z=0, L=1
|
||||
case 0x02: break; // MZ=0, ML=0, Z=1, L=0
|
||||
case 0x03: break; // MZ=0, ML=0, Z=1, L=1
|
||||
case 0x04: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=0, L=0 (GT)
|
||||
case 0x05: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=0, L=1 (LT)
|
||||
case 0x06: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=1, L=0 (GT)
|
||||
case 0x07: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=1, L=1 (LT)
|
||||
case 0x08: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=0 (NEQ)
|
||||
case 0x09: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=1 (NEQ)
|
||||
case 0x0a: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=0 (EQ)
|
||||
case 0x0b: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=1 (EQ)
|
||||
case 0x0c: if ((INT32)(m_acc) <= 0) return false; break; // MZ=1, ML=1, Z=0, L=0 (GT)
|
||||
case 0x0d: if ((INT32)(m_acc) >= 0) return false; break; // MZ=1, ML=1, Z=0, L=1 (LT)
|
||||
case 0x0e: if ((INT32)(m_acc) < 0) return false; break; // MZ=1, ML=1, Z=1, L=0 (GEQ)
|
||||
case 0x0f: if ((INT32)(m_acc) > 0) return false; break; // MZ=1, ML=1, Z=1, L=1 (LEQ)
|
||||
case 0x00: break; // MZ=0, ML=0, Z=0, L=0
|
||||
case 0x01: break; // MZ=0, ML=0, Z=0, L=1
|
||||
case 0x02: break; // MZ=0, ML=0, Z=1, L=0
|
||||
case 0x03: break; // MZ=0, ML=0, Z=1, L=1
|
||||
case 0x04: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=0, L=0 (GT)
|
||||
case 0x05: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=0, L=1 (LT)
|
||||
case 0x06: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=1, L=0 (GT)
|
||||
case 0x07: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=1, L=1 (LT)
|
||||
case 0x08: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=0 (NEQ)
|
||||
case 0x09: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=1 (NEQ)
|
||||
case 0x0a: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=0 (EQ)
|
||||
case 0x0b: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=1 (EQ)
|
||||
case 0x0c: if ((INT32)(m_acc) <= 0) return false; break; // MZ=1, ML=1, Z=0, L=0 (GT)
|
||||
case 0x0d: if ((INT32)(m_acc) >= 0) return false; break; // MZ=1, ML=1, Z=0, L=1 (LT)
|
||||
case 0x0e: if ((INT32)(m_acc) < 0) return false; break; // MZ=1, ML=1, Z=1, L=0 (GEQ)
|
||||
case 0x0f: if ((INT32)(m_acc) > 0) return false; break; // MZ=1, ML=1, Z=1, L=1 (LEQ)
|
||||
}
|
||||
return true;
|
||||
}
|
||||
@ -239,14 +239,14 @@ bool tms32051_device::GET_TP_CONDITION(int tp)
|
||||
{
|
||||
switch (tp)
|
||||
{
|
||||
case 0: // BIO pin low
|
||||
case 0: // BIO pin low
|
||||
// TODO
|
||||
return false;
|
||||
|
||||
case 1: // TC == 1
|
||||
|
||||
case 1: // TC == 1
|
||||
return m_st1.tc != 0;
|
||||
|
||||
case 2: // TC == 0
|
||||
case 2: // TC == 0
|
||||
return m_st1.tc == 0;
|
||||
|
||||
case 3:
|
||||
@ -1376,7 +1376,7 @@ void tms32051_device::op_out()
|
||||
{
|
||||
UINT16 port = ROPCODE();
|
||||
UINT16 ea = GET_ADDRESS();
|
||||
|
||||
|
||||
UINT16 data = DM_READ16(ea);
|
||||
m_io->write_word(port << 1, data);
|
||||
|
||||
@ -1438,7 +1438,7 @@ void tms32051_device::op_apl_dbmr()
|
||||
{
|
||||
UINT16 ea = GET_ADDRESS();
|
||||
UINT16 data = DM_READ16(ea);
|
||||
|
||||
|
||||
data &= m_dbmr;
|
||||
|
||||
m_st1.tc = (data == 0) ? 1 : 0;
|
||||
@ -1452,7 +1452,7 @@ void tms32051_device::op_apl_imm()
|
||||
UINT16 ea = GET_ADDRESS();
|
||||
UINT16 imm = ROPCODE();
|
||||
UINT16 data = DM_READ16(ea);
|
||||
|
||||
|
||||
data &= imm;
|
||||
|
||||
m_st1.tc = (data == 0) ? 1 : 0;
|
||||
|
@ -3,7 +3,7 @@
|
||||
/**********************************************************************************************
|
||||
|
||||
Texas Instruments TMS6100 Voice Synthesis Memory (VSM)
|
||||
|
||||
|
||||
References:
|
||||
- TMS 6100 Voice Synthesis Memory Data Manual
|
||||
- TMS 6125 Voice Synthesis Memory Data Manual
|
||||
@ -147,11 +147,11 @@ WRITE_LINE_MEMBER(tms6100_device::clk_w)
|
||||
UINT8 m = m_m1 << 1 | m_m0;
|
||||
if ((m & ~m_prev_m & 1) || (m & ~m_prev_m & 2))
|
||||
handle_command(m);
|
||||
|
||||
|
||||
m_prev_m = m;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
m_clk = (state) ? 1 : 0;
|
||||
}
|
||||
|
||||
@ -190,7 +190,7 @@ void tms6100_device::handle_command(UINT8 cmd)
|
||||
// or shift(rotate) right
|
||||
m_sa = (m_sa >> 1) | (m_sa << 7 & 0x80);
|
||||
}
|
||||
|
||||
|
||||
// output to DATA pin(s)
|
||||
if (!m_4bit_mode)
|
||||
{
|
||||
@ -205,16 +205,16 @@ void tms6100_device::handle_command(UINT8 cmd)
|
||||
else
|
||||
m_data = m_sa & 0xf;
|
||||
}
|
||||
|
||||
|
||||
// 8 bits in 1-bit mode, otherwise 2 nybbles
|
||||
m_count = (m_count + 1) & (m_4bit_mode ? 1 : 7);
|
||||
|
||||
|
||||
// TB8
|
||||
if (m_count == 0)
|
||||
m_address++; // CS bits too
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
// LA: load address
|
||||
case M_LA:
|
||||
if (m_prev_cmd == M_TB)
|
||||
@ -232,7 +232,7 @@ void tms6100_device::handle_command(UINT8 cmd)
|
||||
const UINT8 shift = 4 * (m_count+1);
|
||||
m_address = (m_address & ~(0xf << shift)) | (m_add << shift);
|
||||
}
|
||||
|
||||
|
||||
m_count = (m_count + 1) & 7;
|
||||
}
|
||||
break;
|
||||
@ -251,10 +251,10 @@ void tms6100_device::handle_command(UINT8 cmd)
|
||||
m_address = (m_address & ~0x3fff) | (rb & 0x3fff);
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
m_prev_cmd = cmd;
|
||||
}
|
||||
|
@ -56,7 +56,7 @@
|
||||
DATA/ADD8 | 6 11 | CS NC | 6 11 | /CS
|
||||
NC | 7 10 | M1 NC | 7 10 | M1
|
||||
M0 | 8 9 | VSS M0 | 8 9 | VSS
|
||||
+---------+ +---------+
|
||||
+---------+ +---------+
|
||||
|
||||
|
||||
Mitsubishi M58819S EPROM Interface:
|
||||
@ -112,14 +112,14 @@ public:
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
|
||||
|
||||
void handle_command(UINT8 cmd);
|
||||
|
||||
// internal state
|
||||
required_region_ptr<UINT8> m_rom;
|
||||
bool m_reverse_bits;
|
||||
bool m_4bit_mode;
|
||||
|
||||
|
||||
UINT32 m_rommask;
|
||||
UINT32 m_address; // internal address + chipselect
|
||||
UINT8 m_sa; // romdata shift register
|
||||
|
@ -50,7 +50,7 @@ void beep_device::device_start()
|
||||
m_stream = stream_alloc(0, 1, BEEP_RATE);
|
||||
m_enable = 0;
|
||||
m_signal = 0x07fff;
|
||||
|
||||
|
||||
// register for savestates
|
||||
save_item(NAME(m_enable));
|
||||
save_item(NAME(m_frequency));
|
||||
|
@ -2423,7 +2423,7 @@ struct YM2610
|
||||
UINT8 flagmask; /* YM2608 only */
|
||||
UINT8 irqmask; /* YM2608 only */
|
||||
|
||||
device_t *device;
|
||||
device_t *device;
|
||||
};
|
||||
|
||||
/* here is the virtual YM2608 */
|
||||
|
@ -355,7 +355,7 @@ READ16_MEMBER( rf5c400_device::rf5c400_r )
|
||||
return 0;
|
||||
}
|
||||
|
||||
case 0x13: // memory read
|
||||
case 0x13: // memory read
|
||||
{
|
||||
return m_rom[m_ext_mem_address];
|
||||
}
|
||||
|
@ -132,11 +132,11 @@ void s14001a_device::device_start()
|
||||
// resolve callbacks
|
||||
m_ext_read_handler.resolve();
|
||||
m_bsy_handler.resolve();
|
||||
|
||||
|
||||
// note: zerofill is done already by MAME core
|
||||
ClearStatistics();
|
||||
m_uOutputP1 = m_uOutputP2 = 7;
|
||||
|
||||
|
||||
// register for savestates
|
||||
save_item(NAME(m_bPhase1));
|
||||
save_item(NAME(m_uStateP1));
|
||||
|
@ -30,7 +30,7 @@ public:
|
||||
DECLARE_READ_LINE_MEMBER(romen_r); // ROM /EN (pin 9)
|
||||
DECLARE_WRITE_LINE_MEMBER(start_w); // START (pin 10)
|
||||
DECLARE_WRITE8_MEMBER(data_w); // 6-bit word
|
||||
|
||||
|
||||
void set_clock(UINT32 clock); // set new CLK frequency
|
||||
void force_update(); // update stream, eg. before external ROM bankswitch
|
||||
|
||||
@ -80,10 +80,10 @@ private:
|
||||
|
||||
UINT16 m_uDAR13To05P1; // 9 MSBs of delta address register
|
||||
UINT16 m_uDAR13To05P2; // incrementing uDAR05To13 advances ROM address by 8 bytes
|
||||
|
||||
|
||||
UINT16 m_uDAR04To00P1; // 5 LSBs of delta address register
|
||||
UINT16 m_uDAR04To00P2; // 3 address ROM, 2 mux 8 bits of data into 2 bit delta
|
||||
// carry indicates end of quarter pitch period (32 cycles)
|
||||
// carry indicates end of quarter pitch period (32 cycles)
|
||||
|
||||
UINT16 m_uCWARP1; // 12 bits Control Word Address Register (syllable)
|
||||
UINT16 m_uCWARP2;
|
||||
@ -96,9 +96,9 @@ private:
|
||||
bool m_bSilenceP2;
|
||||
UINT8 m_uLengthP1; // 7 bits, upper three loaded from ROM length
|
||||
UINT8 m_uLengthP2; // middle two loaded from ROM repeat and/or uXRepeat
|
||||
// bit 0 indicates mirror in voiced mode
|
||||
// bit 1 indicates internal silence in voiced mode
|
||||
// incremented each pitch period quarter
|
||||
// bit 0 indicates mirror in voiced mode
|
||||
// bit 1 indicates internal silence in voiced mode
|
||||
// incremented each pitch period quarter
|
||||
|
||||
UINT8 m_uXRepeatP1; // 2 bits, loaded from ROM repeat
|
||||
UINT8 m_uXRepeatP2;
|
||||
|
@ -516,7 +516,7 @@ void scsp_device::init()
|
||||
}
|
||||
|
||||
memory_region* ram_region = memregion(tag());
|
||||
|
||||
|
||||
// coolridr.c defines a region for the RAM, stv.c doesn't (uses set_ram_base instead, which seems to be more correct anyway?)
|
||||
if (ram_region != NULL)
|
||||
{
|
||||
|
@ -957,17 +957,17 @@ WRITE_LINE_MEMBER(sn76477_device::enable_w)
|
||||
{
|
||||
m_channel->update();
|
||||
|
||||
m_enable = state;
|
||||
m_enable = state;
|
||||
|
||||
/* if falling edge */
|
||||
if (!m_enable)
|
||||
{
|
||||
/* start the attack phase */
|
||||
m_attack_decay_cap_voltage = AD_CAP_VOLTAGE_MIN;
|
||||
/* if falling edge */
|
||||
if (!m_enable)
|
||||
{
|
||||
/* start the attack phase */
|
||||
m_attack_decay_cap_voltage = AD_CAP_VOLTAGE_MIN;
|
||||
|
||||
/* one-shot runs regardless of envelope mode */
|
||||
m_one_shot_running_ff = 1;
|
||||
}
|
||||
/* one-shot runs regardless of envelope mode */
|
||||
m_one_shot_running_ff = 1;
|
||||
}
|
||||
|
||||
log_enable_line();
|
||||
}
|
||||
@ -1392,16 +1392,16 @@ void sn76477_device::noise_clock_res_w(double data)
|
||||
{
|
||||
m_channel->update();
|
||||
|
||||
if (data == 0)
|
||||
{
|
||||
m_noise_clock_ext = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
m_noise_clock_ext = 0;
|
||||
if (data == 0)
|
||||
{
|
||||
m_noise_clock_ext = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
m_noise_clock_ext = 0;
|
||||
|
||||
m_noise_clock_res = data;
|
||||
}
|
||||
m_noise_clock_res = data;
|
||||
}
|
||||
|
||||
log_noise_gen_freq();
|
||||
}
|
||||
@ -1711,7 +1711,7 @@ void sn76477_device::sound_stream_update(sound_stream &stream, stream_sample_t *
|
||||
|
||||
stream_sample_t *buffer = outputs[0];
|
||||
|
||||
/* compute charging values, doing it here ensures that we always use the latest values */
|
||||
/* compute charging values, doing it here ensures that we always use the latest values */
|
||||
one_shot_cap_charging_step = compute_one_shot_cap_charging_rate() / m_our_sample_rate;
|
||||
one_shot_cap_discharging_step = compute_one_shot_cap_discharging_rate() / m_our_sample_rate;
|
||||
|
||||
|
@ -95,7 +95,7 @@ protected:
|
||||
INT16 m_sample; /* current sample value */
|
||||
|
||||
/* ROM access */
|
||||
optional_region_ptr<UINT8> m_rombase; /* pointer to ROM data or NULL for slave mode */
|
||||
optional_region_ptr<UINT8> m_rombase; /* pointer to ROM data or NULL for slave mode */
|
||||
UINT8 * m_rom; /* pointer to ROM data or NULL for slave mode */
|
||||
UINT32 m_romoffset; /* ROM offset to make save/restore easier */
|
||||
UINT32 m_rommask; /* maximum address offset */
|
||||
|
@ -61,8 +61,8 @@ void pcd8544_device::device_start()
|
||||
|
||||
void pcd8544_device::device_reset()
|
||||
{
|
||||
m_mode = 0x04; // PD=1, V=0, H=0
|
||||
m_control = 0x00; // E=0, D=0
|
||||
m_mode = 0x04; // PD=1, V=0, H=0
|
||||
m_control = 0x00; // E=0, D=0
|
||||
m_addr_y = 0;
|
||||
m_addr_x = 0;
|
||||
m_bias = 0;
|
||||
@ -207,13 +207,13 @@ UINT32 pcd8544_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap
|
||||
{
|
||||
switch (m_control)
|
||||
{
|
||||
case 0: // display blank
|
||||
case 1: // all display segments on
|
||||
case 0: // display blank
|
||||
case 1: // all display segments on
|
||||
bitmap.fill(m_control & 1, cliprect);
|
||||
break;
|
||||
|
||||
case 2: // normal mode
|
||||
case 3: // inverse video mode
|
||||
case 2: // normal mode
|
||||
case 3: // inverse video mode
|
||||
if (!m_screen_update_cb.isnull())
|
||||
m_screen_update_cb(screen, bitmap, cliprect, m_vram, m_control & 1);
|
||||
break;
|
||||
|
@ -50,20 +50,20 @@ protected:
|
||||
void write_data(UINT8 data);
|
||||
|
||||
private:
|
||||
pcd8544_screen_update_delegate m_screen_update_cb; // screen update callback
|
||||
int m_sdin;
|
||||
int m_sclk;
|
||||
int m_dc;
|
||||
int m_bits;
|
||||
UINT8 m_mode;
|
||||
UINT8 m_control;
|
||||
UINT8 m_op_vol;
|
||||
UINT8 m_bias;
|
||||
UINT8 m_temp_coef;
|
||||
UINT8 m_indata;
|
||||
UINT8 m_addr_y;
|
||||
UINT8 m_addr_x;
|
||||
UINT8 m_vram[6*84]; // 4032 bit video ram
|
||||
pcd8544_screen_update_delegate m_screen_update_cb; // screen update callback
|
||||
int m_sdin;
|
||||
int m_sclk;
|
||||
int m_dc;
|
||||
int m_bits;
|
||||
UINT8 m_mode;
|
||||
UINT8 m_control;
|
||||
UINT8 m_op_vol;
|
||||
UINT8 m_bias;
|
||||
UINT8 m_temp_coef;
|
||||
UINT8 m_indata;
|
||||
UINT8 m_addr_y;
|
||||
UINT8 m_addr_x;
|
||||
UINT8 m_vram[6*84]; // 4032 bit video ram
|
||||
};
|
||||
|
||||
// device type definition
|
||||
|
@ -3326,7 +3326,7 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask)
|
||||
|
||||
rgbaint_t color, preFog;
|
||||
rgbaint_t iterargb(0);
|
||||
|
||||
|
||||
|
||||
/* pixel pipeline part 1 handles depth testing and stippling */
|
||||
//PIXEL_PIPELINE_BEGIN(v, stats, x, y, v->reg[fbzColorPath].u, v->reg[fbzMode].u, iterz, iterw);
|
||||
@ -3387,7 +3387,7 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask)
|
||||
/* handle alpha test */
|
||||
if (!alphaTest(v, stats, v->reg[alphaMode].u, color.get_a()))
|
||||
goto nextpixel;
|
||||
|
||||
|
||||
|
||||
/* wait for any outstanding work to finish */
|
||||
poly_wait(v->poly, "LFB Write");
|
||||
@ -6016,5 +6016,3 @@ RASTERIZER(generic_1tmu, 1, v->reg[fbzColorPath].u, v->reg[fbzMode].u, v->reg[al
|
||||
|
||||
RASTERIZER(generic_2tmu, 2, v->reg[fbzColorPath].u, v->reg[fbzMode].u, v->reg[alphaMode].u,
|
||||
v->reg[fogMode].u, v->tmu[0].reg[textureMode].u, v->tmu[1].reg[textureMode].u)
|
||||
|
||||
|
||||
|
@ -491,4 +491,3 @@ RASTERIZER_ENTRY( 0x00482405, 0x00045110, 0x00000000, 0x000B073B, 0x0C261A0F, 0x
|
||||
//RASTERIZER_ENTRY( 0x00000001, 0x00000000, 0x00000000, 0x00000300, 0x00000800, 0x00000800 ) /* * 87 2 72 */
|
||||
//RASTERIZER_ENTRY( 0x00000001, 0x00000000, 0x00000000, 0x00000200, 0x08241A00, 0x08241A00 ) /* * 92 2 8 */
|
||||
//RASTERIZER_ENTRY( 0x00000001, 0x00000000, 0x00000000, 0x00000200, 0x00000000, 0x08241A00 ) /* * 93 2 8 */
|
||||
|
||||
|
@ -22,9 +22,8 @@
|
||||
|
||||
bookkeeping_manager::bookkeeping_manager(running_machine &machine)
|
||||
: m_machine(machine),
|
||||
m_dispensed_tickets(0)
|
||||
m_dispensed_tickets(0)
|
||||
{
|
||||
|
||||
/* reset coin counters */
|
||||
for (int counternum = 0; counternum < COIN_COUNTERS; counternum++)
|
||||
{
|
||||
@ -33,7 +32,7 @@ bookkeeping_manager::bookkeeping_manager(running_machine &machine)
|
||||
m_coin_count[counternum] = 0;
|
||||
}
|
||||
|
||||
// register coin save state
|
||||
// register coin save state
|
||||
machine.save().save_item(NAME(m_coin_count));
|
||||
machine.save().save_item(NAME(m_coinlockedout));
|
||||
machine.save().save_item(NAME(m_lastcoin));
|
||||
|
@ -44,14 +44,14 @@ public:
|
||||
// increment the number of dispensed tickets
|
||||
void increment_dispensed_tickets(int delta);
|
||||
|
||||
// ----- coin counters -----
|
||||
// ----- coin counters -----
|
||||
// write to a particular coin counter (clocks on active high edge)
|
||||
void coin_counter_w(int num, int on);
|
||||
|
||||
// return the coin count for a given coin
|
||||
int coin_counter_get_count(int num);
|
||||
|
||||
// enable/disable coin lockout for a particular coin
|
||||
// enable/disable coin lockout for a particular coin
|
||||
void coin_lockout_w(int num, int on);
|
||||
|
||||
// return current lockout state for a particular coin
|
||||
|
@ -45,7 +45,7 @@ class configuration_manager
|
||||
{
|
||||
struct config_element
|
||||
{
|
||||
std::string name; /* node name */
|
||||
std::string name; /* node name */
|
||||
config_saveload_delegate load; /* load callback */
|
||||
config_saveload_delegate save; /* save callback */
|
||||
};
|
||||
|
@ -61,13 +61,13 @@ device_image_interface::device_image_interface(const machine_config &mconfig, de
|
||||
m_mame_file(nullptr),
|
||||
m_software_info_ptr(nullptr),
|
||||
m_software_part_ptr(nullptr),
|
||||
m_supported(0),
|
||||
m_supported(0),
|
||||
m_readonly(false),
|
||||
m_created(false),
|
||||
m_init_phase(false),
|
||||
m_from_swlist(false),
|
||||
m_create_format(0),
|
||||
m_create_args(nullptr),
|
||||
m_init_phase(false),
|
||||
m_from_swlist(false),
|
||||
m_create_format(0),
|
||||
m_create_args(nullptr),
|
||||
m_is_loading(FALSE)
|
||||
{
|
||||
}
|
||||
@ -1420,4 +1420,3 @@ struct io_procs image_ioprocs =
|
||||
image_fwrite_thunk,
|
||||
image_fsize_thunk
|
||||
};
|
||||
|
||||
|
@ -231,7 +231,7 @@ void image_manager::postdevice_init()
|
||||
{
|
||||
/* retrieve image error message */
|
||||
std::string image_err = std::string(image->error());
|
||||
|
||||
|
||||
/* unload all images */
|
||||
unload_all();
|
||||
|
||||
@ -243,4 +243,3 @@ void image_manager::postdevice_init()
|
||||
/* add a callback for when we shut down */
|
||||
machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(image_manager::unload_all), this));
|
||||
}
|
||||
|
||||
|
@ -20,7 +20,7 @@ class image_manager
|
||||
public:
|
||||
// construction/destruction
|
||||
image_manager(running_machine &machine);
|
||||
|
||||
|
||||
void unload_all();
|
||||
void postdevice_init();
|
||||
std::string &mandatory_scan(std::string &mandatory);
|
||||
|
@ -863,9 +863,9 @@ void lua_engine::serve_lua()
|
||||
|
||||
static void *serve_lua(void *param)
|
||||
{
|
||||
lua_engine *engine = (lua_engine *)param;
|
||||
engine->serve_lua();
|
||||
return NULL;
|
||||
lua_engine *engine = (lua_engine *)param;
|
||||
engine->serve_lua();
|
||||
return NULL;
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
|
@ -294,11 +294,11 @@ private:
|
||||
std::unique_ptr<network_manager> m_network; // internal data from network.cpp
|
||||
std::unique_ptr<bookkeeping_manager> m_bookkeeping;// internal data from bookkeeping.cpp
|
||||
std::unique_ptr<configuration_manager> m_configuration; // internal data from config.cpp
|
||||
std::unique_ptr<output_manager> m_output; // internal data from output.cpp
|
||||
std::unique_ptr<crosshair_manager> m_crosshair; // internal data from crsshair.cpp
|
||||
std::unique_ptr<image_manager> m_image; // internal data from image.cpp
|
||||
std::unique_ptr<rom_load_manager> m_rom_load; // internal data from romload.cpp
|
||||
std::unique_ptr<debugger_manager> m_debugger; // internal data from debugger.cpp
|
||||
std::unique_ptr<output_manager> m_output; // internal data from output.cpp
|
||||
std::unique_ptr<crosshair_manager> m_crosshair; // internal data from crsshair.cpp
|
||||
std::unique_ptr<image_manager> m_image; // internal data from image.cpp
|
||||
std::unique_ptr<rom_load_manager> m_rom_load; // internal data from romload.cpp
|
||||
std::unique_ptr<debugger_manager> m_debugger; // internal data from debugger.cpp
|
||||
|
||||
// system state
|
||||
machine_phase m_current_phase; // current execution phase
|
||||
|
@ -20,7 +20,7 @@
|
||||
|
||||
output_manager::output_manager(running_machine &machine)
|
||||
: m_machine(machine),
|
||||
m_uniqueid(12345)
|
||||
m_uniqueid(12345)
|
||||
{
|
||||
/* add pause callback */
|
||||
machine.add_notifier(MACHINE_NOTIFY_PAUSE, machine_notify_delegate(FUNC(output_manager::pause), this));
|
||||
@ -49,7 +49,7 @@ output_manager::output_item* output_manager::find_item(const char *string)
|
||||
output_manager::output_item *output_manager::create_new_item(const char *outname, INT32 value)
|
||||
{
|
||||
output_item item;
|
||||
|
||||
|
||||
/* fill in the data */
|
||||
item.name = outname;
|
||||
item.id = m_uniqueid++;
|
||||
@ -197,7 +197,7 @@ void output_manager::set_notifier(const char *outname, output_notifier_func call
|
||||
/* if no item of that name, create a new one */
|
||||
if (item == nullptr)
|
||||
item = create_new_item(outname, 0);
|
||||
|
||||
|
||||
item->notifylist.push_back(notify);
|
||||
}
|
||||
else
|
||||
|
@ -1091,14 +1091,14 @@ std::string &ui_manager::warnings_string(std::string &str)
|
||||
str.append(emulator_info::get_gamenoun());
|
||||
str.append(" was never completed. It may exhibit strange behavior or missing elements that are not bugs in the emulation.\n");
|
||||
}
|
||||
|
||||
|
||||
if (machine().system().flags & MACHINE_NO_SOUND_HW )
|
||||
{
|
||||
str.append("This ");
|
||||
str.append(emulator_info::get_gamenoun());
|
||||
str.append(" has no sound hardware, MAME will produce no sounds, this is expected behaviour.\n");
|
||||
}
|
||||
|
||||
|
||||
// if there's a NOT WORKING, UNEMULATED PROTECTION or GAME MECHANICAL warning, make it stronger
|
||||
if (machine().system().flags & (MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_MECHANICAL))
|
||||
{
|
||||
|
@ -33,11 +33,11 @@ enum
|
||||
//-------------------------------------------------
|
||||
|
||||
ui_input_manager::ui_input_manager(running_machine &machine)
|
||||
: m_machine(machine),
|
||||
m_current_mouse_target(nullptr),
|
||||
m_current_mouse_down(false),
|
||||
m_events_start(0),
|
||||
m_events_end(0)
|
||||
: m_machine(machine),
|
||||
m_current_mouse_target(nullptr),
|
||||
m_current_mouse_down(false),
|
||||
m_events_start(0),
|
||||
m_events_end(0)
|
||||
{
|
||||
/* create the private data */
|
||||
m_current_mouse_x = -1;
|
||||
@ -78,7 +78,6 @@ void ui_input_manager::frame_update()
|
||||
|
||||
bool ui_input_manager::push_event(ui_event evt)
|
||||
{
|
||||
|
||||
/* some pre-processing (this is an icky place to do this stuff!) */
|
||||
switch (evt.event_type)
|
||||
{
|
||||
@ -241,8 +240,8 @@ g_profiler.stop();
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
push_mouse_move_event - pushes a mouse
|
||||
move event to the specified render_target
|
||||
push_mouse_move_event - pushes a mouse
|
||||
move event to the specified render_target
|
||||
-------------------------------------------------*/
|
||||
|
||||
void ui_input_manager::push_mouse_move_event(render_target* target, INT32 x, INT32 y)
|
||||
@ -256,8 +255,8 @@ void ui_input_manager::push_mouse_move_event(render_target* target, INT32 x, INT
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
push_mouse_leave_event - pushes a
|
||||
mouse leave event to the specified render_target
|
||||
push_mouse_leave_event - pushes a
|
||||
mouse leave event to the specified render_target
|
||||
-------------------------------------------------*/
|
||||
|
||||
void ui_input_manager::push_mouse_leave_event(render_target* target)
|
||||
@ -269,8 +268,8 @@ void ui_input_manager::push_mouse_leave_event(render_target* target)
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
push_mouse_down_event - pushes a mouse
|
||||
down event to the specified render_target
|
||||
push_mouse_down_event - pushes a mouse
|
||||
down event to the specified render_target
|
||||
-------------------------------------------------*/
|
||||
|
||||
void ui_input_manager::push_mouse_down_event(render_target* target, INT32 x, INT32 y)
|
||||
@ -284,8 +283,8 @@ void ui_input_manager::push_mouse_down_event(render_target* target, INT32 x, INT
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
push_mouse_down_event - pushes a mouse
|
||||
down event to the specified render_target
|
||||
push_mouse_down_event - pushes a mouse
|
||||
down event to the specified render_target
|
||||
-------------------------------------------------*/
|
||||
|
||||
void ui_input_manager::push_mouse_up_event(render_target* target, INT32 x, INT32 y)
|
||||
@ -299,9 +298,9 @@ void ui_input_manager::push_mouse_up_event(render_target* target, INT32 x, INT32
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
push_mouse_double_click_event - pushes
|
||||
a mouse double-click event to the specified
|
||||
render_target
|
||||
push_mouse_double_click_event - pushes
|
||||
a mouse double-click event to the specified
|
||||
render_target
|
||||
-------------------------------------------------*/
|
||||
void ui_input_manager::push_mouse_double_click_event(render_target* target, INT32 x, INT32 y)
|
||||
{
|
||||
@ -314,8 +313,8 @@ void ui_input_manager::push_mouse_double_click_event(render_target* target, INT3
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
push_char_event - pushes a char event
|
||||
to the specified render_target
|
||||
push_char_event - pushes a char event
|
||||
to the specified render_target
|
||||
-------------------------------------------------*/
|
||||
void ui_input_manager::push_char_event(render_target* target, unicode_char ch)
|
||||
{
|
||||
|
@ -16,7 +16,7 @@
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
CONSTANTS
|
||||
CONSTANTS
|
||||
***************************************************************************/
|
||||
|
||||
#define EVENT_QUEUE_SIZE 128
|
||||
|
@ -35,15 +35,15 @@
|
||||
|
||||
template<typename _Tp, typename... _Args>
|
||||
inline _Tp* global_alloc_clear(_Args&&... __args)
|
||||
{
|
||||
{
|
||||
unsigned char * ptr = new unsigned char[sizeof(_Tp)]; // allocate memory
|
||||
memset(ptr, 0, sizeof(_Tp));
|
||||
return new(ptr) _Tp(std::forward<_Args>(__args)...);
|
||||
return new(ptr) _Tp(std::forward<_Args>(__args)...);
|
||||
}
|
||||
|
||||
template<typename _Tp>
|
||||
inline _Tp* global_alloc_array_clear(size_t __num)
|
||||
{
|
||||
{
|
||||
auto size = sizeof(_Tp) * __num;
|
||||
unsigned char* ptr = new unsigned char[size]; // allocate memory
|
||||
memset(ptr, 0, size);
|
||||
|
@ -2610,13 +2610,13 @@ optiger // 1998.09 E63 (c) 1998 Taito
|
||||
taitotz
|
||||
batlgear // E68 (c) 1999 Taito
|
||||
pwrshovl // E74 (c) 1999 Taito
|
||||
pwrshovla //
|
||||
pwrshovla //
|
||||
landhigh // E82 (c) 1999 Taito
|
||||
batlgr2 // E87 (c) 2000 Taito (2.04J)
|
||||
batlgr2a // E87 (c) 2000 Taito (2.01J)
|
||||
styphp // E98 (c) 2000 Taito
|
||||
raizpin // F14 (c) 2002 Taito
|
||||
raizpinj //
|
||||
raizpinj //
|
||||
|
||||
invqix // F34 (c) 2003 Taito Corporation
|
||||
|
||||
@ -2717,7 +2717,7 @@ toto //
|
||||
honeydol // (c) 1995 Barko Corp
|
||||
twinadv // (c) 1995 Barko Corp
|
||||
twinadvk // (c) 1995 Barko Corp
|
||||
multi96 // (c) 1996 Barko Corp
|
||||
multi96 // (c) 1996 Barko Corp
|
||||
snowbro3 // (c) 2002 Syrmex
|
||||
ballboy // bootleg
|
||||
// SemiCom games on "SnowBros"-like hardware
|
||||
@ -3146,7 +3146,7 @@ daimakai // 12/1988 (c) 1988 (Japan)
|
||||
daimakair // 12/1988 (c) 1988 (Japan)
|
||||
strider // 3/1989 (c) 1989 (not explicitly stated but should be USA)
|
||||
striderua // 3/1989 (c) 1989 (not explicitly stated but should be USA)
|
||||
strideruc // conversion
|
||||
strideruc // conversion
|
||||
striderj // 3/1989 (c) 1989 (Japan)
|
||||
striderjr // 3/1989 (c) 1989 (Japan)
|
||||
dynwar // 4/1989 (c) 1989 (USA)
|
||||
@ -4194,7 +4194,7 @@ wfortunea // (c) 1989 GameTek
|
||||
grmatch // (c) 1989 Yankee Game Technology
|
||||
stratab // (c) 1990 Strata/Incredible Technologies
|
||||
stratab1 // (c) 1990 Strata/Incredible Technologies
|
||||
stratabs // (c) 1990 Strata/Incredible Technologies
|
||||
stratabs // (c) 1990 Strata/Incredible Technologies
|
||||
sstrike // (c) 1990 Strata/Incredible Technologies
|
||||
gtg // (c) 1990 Strata/Incredible Technologies
|
||||
gtgt // (c) 1990 Strata/Incredible Technologies
|
||||
@ -4840,7 +4840,7 @@ mwalku // 1990.08 Micheal Jackson's Moonwalker (US, FD1094+8751)
|
||||
mwalkj // 1990.08 Micheal Jackson's Moonwalker (Japan, FD1094+8751)
|
||||
mwalk // 1990.?? Micheal Jackson's Moonwalker (World, FD1094+8751)
|
||||
lghost // 1990.?? Laser Ghost (World, FD1094)
|
||||
lghostj // 1990.12 Laser Ghost (Japan)
|
||||
lghostj // 1990.12 Laser Ghost (Japan)
|
||||
lghostu // 1991.01 Laser Ghost (US, FD1094)
|
||||
cltchitr // 1991.02 Clutch Hitter (US, FD1094)
|
||||
cltchitrj // 1991.05 Clutch Hitter (Japan, FD1094)
|
||||
@ -5544,7 +5544,7 @@ alpiltdx // 1999.?? Airline Pilots Deluxe (Rev B)
|
||||
// 1999.?? Pocket Shooting
|
||||
sambap // 1999.?? Samba de Amigo (prototype)
|
||||
spawn // 1999.?? Spawn In the Demon's Hand
|
||||
tokyobus // 1999.?? Tokyo Bus Guide (Rev A)
|
||||
tokyobus // 1999.?? Tokyo Bus Guide (Rev A)
|
||||
vtennisg // 1999.?? Virtua Tennis / Power Smash (GD-ROM)
|
||||
18wheelr // 2000.01 18 Wheeler Deluxe (Rev A)
|
||||
18wheels // 2000.01 18 Wheeler (Standard)
|
||||
@ -7687,7 +7687,7 @@ ikaria // A5004 'IW' (c) 1986
|
||||
ikarinc // A5004 'IW' (c) 1986
|
||||
ikarijp // A5004 'IW' (c) 1986 (Japan)
|
||||
ikarijpb // bootleg
|
||||
ikariram // bootleg
|
||||
ikariram // bootleg
|
||||
victroad // A6002 (c) 1986
|
||||
dogosoke // A6002 (c) 1986
|
||||
dogosokb // bootleg
|
||||
@ -8243,7 +8243,7 @@ jackrabts // (c) 1984
|
||||
mouser // UPL-83001 (c) 1983
|
||||
mouserc // UPL-83001 (c) 1983
|
||||
nova2001 // UPL-83005 (c) 1983
|
||||
nova2001h // hack?
|
||||
nova2001h // hack?
|
||||
nova2001u // UPL-83005 (c) [1983] + Universal license
|
||||
ninjakun // UPL-84003 (c) 1984 Taito Corporation
|
||||
raiders5 // UPL-85004 (c) 1985
|
||||
@ -8837,7 +8837,7 @@ weststry // bootleg
|
||||
skysmash // (c) 1990 Nihon System Inc.
|
||||
legionna // (c) 1992 Tad (World)
|
||||
legionnau // (c) 1992 Tad + Fabtek license (US)
|
||||
legionnaj // (c) 1992 Tad (Japan)
|
||||
legionnaj // (c) 1992 Tad (Japan)
|
||||
heatbrl // (c) 1992 Tad (World version 3)
|
||||
heatbrl2 // (c) 1992 Tad (World version 2)
|
||||
heatbrlo // (c) 1992 Tad (World)
|
||||
@ -9179,7 +9179,7 @@ touchgoe // (c) 1995 - Ref 950510-1
|
||||
wrally2 // (c) 1995 - Ref 950510
|
||||
maniacsp // (c) 1996 - Ref 922804/2 - (prototype)
|
||||
maniacsq // (c) 1996 - Ref 940411 - (unprotected)
|
||||
maniacsqa // (c) 1996 - Ref 940411
|
||||
maniacsqa // (c) 1996 - Ref 940411
|
||||
snowboar // (c) 1996 - Ref 960419/1
|
||||
snowboara // (c) 1996 - Ref 960419/1
|
||||
bang // (c) 1998 - Ref ???
|
||||
@ -13459,7 +13459,7 @@ tmspoker
|
||||
kas89 // 1989, SFC S.R.L.
|
||||
caspoker // 1987, PM / Beck Elektronik.
|
||||
wildpkr // 199?, TAB Austria.
|
||||
tabpkr // 199?, TAB Austira
|
||||
tabpkr // 199?, TAB Austira
|
||||
subhuntr // 1979 Model Racing
|
||||
|
||||
manohman // 199?, Merkur.
|
||||
@ -32680,4 +32680,3 @@ clowndwn // Elwood Clown Roll Down
|
||||
|
||||
fi6845
|
||||
fi8275
|
||||
|
||||
|
@ -203,7 +203,7 @@ ADDRESS_MAP_END
|
||||
|
||||
|
||||
MACHINE_CONFIG_FRAGMENT( carnival_audio )
|
||||
|
||||
|
||||
/* music board */
|
||||
MCFG_CPU_ADD("audiocpu", I8039, XTAL_3_579545MHz)
|
||||
MCFG_CPU_PROGRAM_MAP(mboard_map)
|
||||
|
@ -165,9 +165,9 @@ protected:
|
||||
UINT32 m_sounddata_banks;
|
||||
UINT16 m_sounddata_bank;
|
||||
|
||||
optional_memory_bank m_data_bank;
|
||||
memory_bank * m_rom_page;
|
||||
memory_bank * m_dram_page;
|
||||
optional_memory_bank m_data_bank;
|
||||
memory_bank * m_rom_page;
|
||||
memory_bank * m_dram_page;
|
||||
|
||||
/* I/O with the host */
|
||||
UINT8 m_auto_ack;
|
||||
|
@ -363,7 +363,7 @@ void _20pacgal_state::common_save_state()
|
||||
void _20pacgal_state::machine_start()
|
||||
{
|
||||
common_save_state();
|
||||
|
||||
|
||||
// membank currently used only by 20pacgal
|
||||
membank("bank1")->configure_entry(0, memregion("maincpu")->base() + 0x08000);
|
||||
membank("bank1")->configure_entry(1, m_ram_48000);
|
||||
|
@ -996,7 +996,7 @@ MACHINE_RESET_MEMBER(fortyl_state,common)
|
||||
m_pix2[0] = 0;
|
||||
m_pix2[1] = 0;
|
||||
m_color_bank = false;
|
||||
|
||||
|
||||
/* sound */
|
||||
m_sound_nmi_enable = 0;
|
||||
m_pending_nmi = 0;
|
||||
|
@ -3300,7 +3300,7 @@ DRIVER_INIT_MEMBER(_8080bw_state,invmulti)
|
||||
// decrypt rom
|
||||
for (int i = 0; i < len; i++)
|
||||
dest[i] = BITSWAP8(src[(i & 0x100ff) | (BITSWAP8(i >> 8 & 0xff, 7,3,4,5,0,6,1,2) << 8)],0,6,5,7,4,3,1,2);
|
||||
|
||||
|
||||
membank("bank1")->configure_entries(0, 8, memregion("maincpu")->base(), 0x4000);
|
||||
membank("bank1")->set_entry(0);
|
||||
membank("bank2")->configure_entries(0, 8, memregion("maincpu")->base() + 0x2000, 0x4000);
|
||||
|
@ -900,7 +900,7 @@ ic45 = 74ls74
|
||||
ic46 = 74ls08
|
||||
ic87 = 74ls74
|
||||
~VCC = 'pulled to vcc through a resistor'
|
||||
icxx.y = ic xx pin y
|
||||
icxx.y = ic xx pin y
|
||||
+--------\_/--------+
|
||||
GND -- = VSS(GND) -- | 1 28 | <- /RESET = <- ~VCC & ic32.9 (4Q) & ic26.13 (/reset2) & ic26.1 (/reset1)
|
||||
~VCC & ic26.6 (/1Q) & ic9.10 (I1C) -> = /INT -> | 2 27 | <> PA7 = -> ic27.18 (8D)
|
||||
@ -1527,7 +1527,7 @@ ROM_START( arkanoiduo ) // V1.1 USA/Romstar
|
||||
ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* Chip Silkscreen: "A75-07"; red component */
|
||||
ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* Chip Silkscreen: "A75-08"; green component */
|
||||
ROM_LOAD( "a75-09.ic22", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* Chip Silkscreen: "A75-09"; blue component */
|
||||
|
||||
|
||||
ROM_REGION( 0x8000, "altgfx", 0 )
|
||||
ROM_LOAD( "a75__03(alternate).ic64", 0x00000, 0x8000, CRC(983d4485) SHA1(603a8798d1f531a70a527a5c6122f0ffd6adcfb6) ) // this was found on a legit v1.1 Romstar USA pcb with serial number 29342; the only difference seems to be the first 32 tiles are all 0xFF instead of 0x00. Those tiles don't seem to be used by the game at all. This is likely another incidence of "Taito forgot to clear programmer ram before burning a rom from a sparse s-record/ihex file"
|
||||
ROM_END
|
||||
|
@ -291,15 +291,15 @@ ADDRESS_MAP_END
|
||||
-------------------------------------------------*/
|
||||
|
||||
//static ADDRESS_MAP_START( prophet2_mem, AS_PROGRAM, 8, atom_state )
|
||||
// AM_RANGE(0x0000, 0x09ff) AM_RAM
|
||||
// AM_RANGE(0x0a00, 0x7fff) AM_RAM
|
||||
// AM_RANGE(0x8000, 0x97ff) AM_RAM AM_SHARE("video_ram")
|
||||
// AM_RANGE(0x9800, 0x9fff) AM_RAM
|
||||
// AM_RANGE(0xb000, 0xb003) AM_MIRROR(0x3fc) AM_DEVREADWRITE(INS8255_TAG, i8255_device, read, write)
|
||||
// AM_RANGE(0x0000, 0x09ff) AM_RAM
|
||||
// AM_RANGE(0x0a00, 0x7fff) AM_RAM
|
||||
// AM_RANGE(0x8000, 0x97ff) AM_RAM AM_SHARE("video_ram")
|
||||
// AM_RANGE(0x9800, 0x9fff) AM_RAM
|
||||
// AM_RANGE(0xb000, 0xb003) AM_MIRROR(0x3fc) AM_DEVREADWRITE(INS8255_TAG, i8255_device, read, write)
|
||||
//// AM_RANGE(0xb400, 0xb403) AM_DEVREADWRITE(MC6854_TAG, mc6854_device, read, write)
|
||||
//// AM_RANGE(0xb404, 0xb404) AM_READ_PORT("ECONET")
|
||||
// AM_RANGE(0xb800, 0xb80f) AM_MIRROR(0x3f0) AM_DEVREADWRITE(R6522_TAG, via6522_device, read, write)
|
||||
// AM_RANGE(0xc000, 0xffff) AM_ROM AM_REGION(SY6502_TAG, 0)
|
||||
// AM_RANGE(0xb800, 0xb80f) AM_MIRROR(0x3f0) AM_DEVREADWRITE(R6522_TAG, via6522_device, read, write)
|
||||
// AM_RANGE(0xc000, 0xffff) AM_ROM AM_REGION(SY6502_TAG, 0)
|
||||
//ADDRESS_MAP_END
|
||||
|
||||
/***************************************************************************
|
||||
@ -859,17 +859,17 @@ MACHINE_CONFIG_END
|
||||
-------------------------------------------------*/
|
||||
|
||||
//static MACHINE_CONFIG_DERIVED( prophet2, atom )
|
||||
// /* basic machine hardware */
|
||||
// MCFG_CPU_MODIFY(SY6502_TAG)
|
||||
// MCFG_CPU_PROGRAM_MAP(prophet2_mem)
|
||||
// /* basic machine hardware */
|
||||
// MCFG_CPU_MODIFY(SY6502_TAG)
|
||||
// MCFG_CPU_PROGRAM_MAP(prophet2_mem)
|
||||
//
|
||||
// /* fdc */
|
||||
// MCFG_DEVICE_REMOVE(I8271_TAG)
|
||||
// MCFG_DEVICE_REMOVE(I8271_TAG ":0")
|
||||
// MCFG_DEVICE_REMOVE(I8271_TAG ":1")
|
||||
// /* fdc */
|
||||
// MCFG_DEVICE_REMOVE(I8271_TAG)
|
||||
// MCFG_DEVICE_REMOVE(I8271_TAG ":0")
|
||||
// MCFG_DEVICE_REMOVE(I8271_TAG ":1")
|
||||
//
|
||||
// /* Software lists */
|
||||
// MCFG_SOFTWARE_LIST_REMOVE("flop_list")
|
||||
// /* Software lists */
|
||||
// MCFG_SOFTWARE_LIST_REMOVE("flop_list")
|
||||
//MACHINE_CONFIG_END
|
||||
|
||||
/*-------------------------------------------------
|
||||
@ -885,9 +885,9 @@ MACHINE_CONFIG_END
|
||||
-------------------------------------------------*/
|
||||
|
||||
//static MACHINE_CONFIG_DERIVED( atommc, atom )
|
||||
// /* Software lists */
|
||||
// MCFG_SOFTWARE_LIST_ADD("mmc_list","atom_mmc")
|
||||
// MCFG_SOFTWARE_LIST_REMOVE("flop_list")
|
||||
// /* Software lists */
|
||||
// MCFG_SOFTWARE_LIST_ADD("mmc_list","atom_mmc")
|
||||
// MCFG_SOFTWARE_LIST_REMOVE("flop_list")
|
||||
//MACHINE_CONFIG_END
|
||||
|
||||
/***************************************************************************
|
||||
@ -938,11 +938,11 @@ ROM_END
|
||||
-------------------------------------------------*/
|
||||
|
||||
//ROM_START( atommc )
|
||||
// ROM_REGION( 0x4000, SY6502_TAG, 0 )
|
||||
// ROM_LOAD( "abasic.ic20", 0x0000, 0x1000, CRC(289b7791) SHA1(0072c83458a9690a3ea1f6094f0f38cf8e96a445) )
|
||||
// ROM_CONTINUE( 0x3000, 0x1000 )
|
||||
// ROM_LOAD( "afloat.ic21", 0x1000, 0x1000, CRC(81d86af7) SHA1(ebcde5b36cb3a3344567cbba4c7b9fde015f4802) )
|
||||
// ROM_LOAD( "atommc2-2.9-a000.rom", 0x2000, 0x1000, CRC(ba73e36c) SHA1(ea9739e96f3283c90b5306288c796fc01144b771) )
|
||||
// ROM_REGION( 0x4000, SY6502_TAG, 0 )
|
||||
// ROM_LOAD( "abasic.ic20", 0x0000, 0x1000, CRC(289b7791) SHA1(0072c83458a9690a3ea1f6094f0f38cf8e96a445) )
|
||||
// ROM_CONTINUE( 0x3000, 0x1000 )
|
||||
// ROM_LOAD( "afloat.ic21", 0x1000, 0x1000, CRC(81d86af7) SHA1(ebcde5b36cb3a3344567cbba4c7b9fde015f4802) )
|
||||
// ROM_LOAD( "atommc2-2.9-a000.rom", 0x2000, 0x1000, CRC(ba73e36c) SHA1(ea9739e96f3283c90b5306288c796fc01144b771) )
|
||||
//ROM_END
|
||||
|
||||
DRIVER_INIT_MEMBER(atomeb_state, atomeb)
|
||||
|
@ -54,7 +54,7 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(port2_w);
|
||||
DECLARE_READ8_MEMBER(port2_r);
|
||||
void fpga_send(unsigned char cmd);
|
||||
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<dac_device> m_dac;
|
||||
private:
|
||||
|
@ -1089,7 +1089,7 @@ static MACHINE_CONFIG_START( scorpion1, bfm_sc1_state )
|
||||
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc1_state, reel4_optic_cb))
|
||||
MCFG_STARPOINT_48STEP_ADD("reel5")
|
||||
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc1_state, reel5_optic_cb))
|
||||
|
||||
|
||||
MCFG_DEVICE_ADD("meters", METERS, 0)
|
||||
MCFG_METERS_NUMBER(8)
|
||||
MACHINE_CONFIG_END
|
||||
|
@ -605,7 +605,7 @@ WRITE8_MEMBER(bfm_sc2_state::mmtr_w)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if ( data & 0x1F ) m_maincpu->set_input_line(M6809_FIRQ_LINE, ASSERT_LINE );
|
||||
}
|
||||
|
||||
@ -3656,7 +3656,7 @@ static MACHINE_CONFIG_START( scorpion2, bfm_sc2_state )
|
||||
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel4_optic_cb))
|
||||
MCFG_STARPOINT_48STEP_ADD("reel5")
|
||||
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel5_optic_cb))
|
||||
|
||||
|
||||
MCFG_FRAGMENT_ADD(_8meters)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -3669,7 +3669,7 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_DERIVED( scorpion3, scorpion2 )
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(memmap_no_vid)
|
||||
|
||||
|
||||
MCFG_DEVICE_REMOVE("meters")
|
||||
MCFG_FRAGMENT_ADD(_5meters)
|
||||
MACHINE_CONFIG_END
|
||||
@ -3715,7 +3715,7 @@ static MACHINE_CONFIG_START( scorpion2_dm01, bfm_sc2_state )
|
||||
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel4_optic_cb))
|
||||
MCFG_STARPOINT_48STEP_ADD("reel5")
|
||||
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel5_optic_cb))
|
||||
|
||||
|
||||
MCFG_FRAGMENT_ADD( _8meters)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
@ -754,8 +754,8 @@ DRIVER_INIT_MEMBER(bfmsys85_state,nodecode)
|
||||
b85_find_project_string();
|
||||
}
|
||||
|
||||
#define MACHINE_FLAGS MACHINE_NOT_WORKING|MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK
|
||||
#define MACHINE_FLAGS_MECHANICAL MACHINE_FLAGS|MACHINE_MECHANICAL
|
||||
#define MACHINE_FLAGS MACHINE_NOT_WORKING|MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK
|
||||
#define MACHINE_FLAGS_MECHANICAL MACHINE_FLAGS|MACHINE_MECHANICAL
|
||||
|
||||
// PROJECT NUMBER 5539 2P CASH EXPLOSION GAME No 39-350-190 - 29-MAR-1989 11:45:25
|
||||
GAME( 1989, b85cexpl , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Cash Explosion (System 85)", MACHINE_FLAGS )
|
||||
|
@ -320,8 +320,8 @@ READ16_MEMBER(casloopy_state::vregs_r)
|
||||
|
||||
WRITE16_MEMBER(casloopy_state::vregs_w)
|
||||
{
|
||||
// if(offset != 6/2)
|
||||
// printf("%08x %08x\n",offset*2,data);
|
||||
// if(offset != 6/2)
|
||||
// printf("%08x %08x\n",offset*2,data);
|
||||
}
|
||||
|
||||
READ16_MEMBER(casloopy_state::pal_r)
|
||||
|
@ -2288,13 +2288,13 @@ void cobra_renderer::gfx_fifo_exec()
|
||||
// GFX register select
|
||||
m_gfx_register_select = w[3];
|
||||
|
||||
// printf("GFX: register select %08X\n", m_gfx_register_select);
|
||||
// printf("GFX: register select %08X\n", m_gfx_register_select);
|
||||
}
|
||||
else if (w2 == 0x10500018)
|
||||
{
|
||||
// register write to the register selected above?
|
||||
// 64-bit registers, top 32-bits in word 2, low 32-bit in word 3
|
||||
// printf("GFX: register write %08X: %08X %08X\n", m_gfx_register_select, w[2], w[3]);
|
||||
// printf("GFX: register write %08X: %08X %08X\n", m_gfx_register_select, w[2], w[3]);
|
||||
|
||||
gfx_write_reg(((UINT64)(w[2]) << 32) | w[3]);
|
||||
}
|
||||
|
@ -681,7 +681,7 @@ ROM_START(dc)
|
||||
DREAMCAST_COMMON_BIOS
|
||||
|
||||
ROM_REGION(0x020000, "dcflash", 0)
|
||||
ROM_LOAD( "dcus_ntsc.bin", 0x000000, 0x020000, BAD_DUMP CRC(e6862dd0) SHA1(24875ce85c011600e73b1c3fd2b341824cbf8544) ) // dumped from VA2.4 mobo with 1.022 BIOS
|
||||
ROM_LOAD( "dcus_ntsc.bin", 0x000000, 0x020000, BAD_DUMP CRC(e6862dd0) SHA1(24875ce85c011600e73b1c3fd2b341824cbf8544) ) // dumped from VA2.4 mobo with 1.022 BIOS
|
||||
ROM_END
|
||||
|
||||
ROM_START( dceu )
|
||||
@ -693,7 +693,7 @@ ROM_END
|
||||
|
||||
ROM_START( dcjp )
|
||||
DREAMCAST_COMMON_BIOS
|
||||
ROM_SYSTEM_BIOS(4, "1004", "v1.004 (Japan)") // oldest known mass production version, supports Japan region only
|
||||
ROM_SYSTEM_BIOS(4, "1004", "v1.004 (Japan)") // oldest known mass production version, supports Japan region only
|
||||
ROM_LOAD_BIOS(4, "mpr-21068.ic501", 0x000000, 0x200000, CRC(5454841f) SHA1(1ea132c0fbbf07ef76789eadc07908045c089bd6) )
|
||||
|
||||
ROM_REGION(0x020000, "dcflash", 0)
|
||||
@ -706,9 +706,9 @@ ROM_END
|
||||
// otherwise it boots from EPROM which contain system checker software (last dump)
|
||||
ROM_START( dcdev )
|
||||
ROM_REGION(0x200000, "maincpu", 0)
|
||||
ROM_SYSTEM_BIOS(0, "1011", "Katana Set5 v1.011 (World)") // BOOT flash rom update from Katana SDK R9-R11, WinCE SDK v2.1
|
||||
ROM_SYSTEM_BIOS(0, "1011", "Katana Set5 v1.011 (World)") // BOOT flash rom update from Katana SDK R9-R11, WinCE SDK v2.1
|
||||
ROM_LOAD_BIOS(0, "set5v1.011.ic507", 0x000000, 0x200000, CRC(2186e0e5) SHA1(6bd18fb83f8fdb56f1941e079580e5dd672a6dad) )
|
||||
ROM_SYSTEM_BIOS(1, "1001", "Katana Set5 v1.001 (Japan)") // BOOT flash rom update from WinCE SDK v1.0
|
||||
ROM_SYSTEM_BIOS(1, "1001", "Katana Set5 v1.001 (Japan)") // BOOT flash rom update from WinCE SDK v1.0
|
||||
ROM_LOAD_BIOS(1, "set5v1.001.ic507", 0x000000, 0x200000, CRC(5702d38f) SHA1(ea7a3ae1de73683008dd795c252941a4fc81b42e) )
|
||||
|
||||
// 27C160 EPROM (DIP42) IC??? labeled
|
||||
|
@ -41,7 +41,7 @@
|
||||
* |____________________________________________________________________________________________________________| |______ | _|||_ |___________________________________|
|
||||
*
|
||||
* _____________________________________________________________________________________________ ___________________________________________________________________________
|
||||
* |The Didact Mikrodator 6802 CPU board by Lars Björklund 1983 ( ) | |The Didact Mikrodator 6802 TB16 board by Lars Björklund 1983 |
|
||||
* |The Didact Mikrodator 6802 CPU board by Lars Bjorklund 1983 ( ) | |The Didact Mikrodator 6802 TB16 board by Lars Bj??rklund 1983 |
|
||||
* | +----= | | +-|||||||-+ ______ |
|
||||
* | | = | | CA2 Tx |terminal | | () | |
|
||||
* | | = | | PA7 Rx +---------+ +----------+ C1nF,<=R18k| | |
|
||||
@ -77,8 +77,8 @@
|
||||
*
|
||||
* History of Didact
|
||||
*------------------
|
||||
* Didact Läromedelsproduktion was started in Linköping in Sweden by Anders Andersson, Arne Kullbjer and
|
||||
* Lars Björklund. They constructed a series of microcomputers for educational purposes such as "Mikrodator 6802",
|
||||
* Didact Laromedelsproduktion was started in Linkoping in Sweden by Anders Andersson, Arne Kullbjer and
|
||||
* Lars Bjorklund. They constructed a series of microcomputers for educational purposes such as "Mikrodator 6802",
|
||||
* Esselte 100 and the Candela computer for the swedish schools to educate the students in assembly programming
|
||||
* and BASIC for electro mechanical applications such as stepper motors, simple process control, buttons
|
||||
* and LED:s. Didact designs were marketed by Esselte Studium to the swedish schools. The Candela computer
|
||||
@ -92,7 +92,7 @@
|
||||
* http://elektronikforumet.com/forum/download/file.php?id=63988&mode=view
|
||||
* http://elektronikforumet.com/forum/viewtopic.php?f=2&t=79576&start=150#p1203915
|
||||
*
|
||||
* TODO:
|
||||
* TODO:
|
||||
* Didact designs: mp68a, md6802, md6802v3, Esselte 100, Candela
|
||||
* --------------------------------------------------------------------------
|
||||
* - Add PCB layouts OK OK
|
||||
@ -110,7 +110,7 @@
|
||||
#include "emu.h"
|
||||
#include "cpu/m6800/m6800.h"
|
||||
#include "machine/6821pia.h" // For all boards
|
||||
#include "video/dm9368.h" // For the mp68a
|
||||
#include "video/dm9368.h" // For the mp68a
|
||||
#include "machine/74145.h" // For the md6802
|
||||
// Generated artwork includes
|
||||
#include "mp68a.lh"
|
||||
@ -132,9 +132,9 @@
|
||||
/* Didact base class */
|
||||
class didact_state : public driver_device
|
||||
{
|
||||
public:
|
||||
public:
|
||||
didact_state(const machine_config &mconfig, device_type type, const char * tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
,m_io_line0(*this, "LINE0")
|
||||
,m_io_line1(*this, "LINE1")
|
||||
,m_io_line2(*this, "LINE2")
|
||||
@ -166,13 +166,13 @@ class didact_state : public driver_device
|
||||
/* Esselte 100 driver class */
|
||||
class e100_state : public didact_state
|
||||
{
|
||||
public:
|
||||
public:
|
||||
e100_state(const machine_config &mconfig, device_type type, const char * tag)
|
||||
: didact_state(mconfig, type, tag),
|
||||
: didact_state(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_pia1(*this, "pia1"),
|
||||
m_pia2(*this, "pia2")
|
||||
{ }
|
||||
{ }
|
||||
required_device<m6802_cpu_device> m_maincpu;
|
||||
virtual void machine_reset() override { m_maincpu->reset(); LOG(("--->%s()\n", FUNCNAME)); };
|
||||
protected:
|
||||
@ -183,15 +183,15 @@ protected:
|
||||
/* Mikrodator 6802 driver class */
|
||||
class md6802_state : public didact_state
|
||||
{
|
||||
public:
|
||||
public:
|
||||
md6802_state(const machine_config &mconfig, device_type type, const char * tag)
|
||||
: didact_state(mconfig, type, tag)
|
||||
: didact_state(mconfig, type, tag)
|
||||
,m_maincpu(*this, "maincpu")
|
||||
,m_tb16_74145(*this, "tb16_74145")
|
||||
,m_segments(0)
|
||||
,m_pia1(*this, "pia1")
|
||||
,m_pia2(*this, "pia2")
|
||||
{ }
|
||||
{ }
|
||||
required_device<m6802_cpu_device> m_maincpu;
|
||||
required_device<ttl74145_device> m_tb16_74145;
|
||||
UINT8 m_segments;
|
||||
@ -228,7 +228,7 @@ READ8_MEMBER( md6802_state::pia2_kbA_r )
|
||||
LOG(("%s()-->%02x %02x %02x %02x modified by %02x displaying %02x\n", FUNCNAME, m_line0, m_line1, m_line2, m_line3, m_shift, ls145));
|
||||
#endif
|
||||
|
||||
// Mask out those rows that has a button pressed
|
||||
// Mask out those rows that has a button pressed
|
||||
pa &= ~(((~m_line0 & ls145 ) != 0) ? 1 : 0);
|
||||
pa &= ~(((~m_line1 & ls145 ) != 0) ? 2 : 0);
|
||||
pa &= ~(((~m_line2 & ls145 ) != 0) ? 4 : 0);
|
||||
@ -236,7 +236,7 @@ READ8_MEMBER( md6802_state::pia2_kbA_r )
|
||||
|
||||
if (m_shift)
|
||||
{
|
||||
pa &= 0x7f; // Clear shift bit if button being pressed (PA7) to ground (internal pullup)
|
||||
pa &= 0x7f; // Clear shift bit if button being pressed (PA7) to ground (internal pullup)
|
||||
LOG( ("SHIFT is pressed\n") );
|
||||
}
|
||||
|
||||
@ -253,10 +253,10 @@ WRITE8_MEMBER( md6802_state::pia2_kbA_w )
|
||||
{
|
||||
UINT8 digit_nbr;
|
||||
|
||||
// LOG(("--->%s(%02x)\n", FUNCNAME, data));
|
||||
// LOG(("--->%s(%02x)\n", FUNCNAME, data));
|
||||
|
||||
digit_nbr = (data >> 4) & 0x07;
|
||||
m_tb16_74145->write( digit_nbr );
|
||||
m_tb16_74145->write( digit_nbr );
|
||||
if (digit_nbr < 6)
|
||||
{
|
||||
output().set_digit_value( digit_nbr, m_segments);
|
||||
@ -266,15 +266,15 @@ WRITE8_MEMBER( md6802_state::pia2_kbA_w )
|
||||
/* PIA 2 Port B is all outputs to drive the display so it is very unlikelly that this function is called */
|
||||
READ8_MEMBER( md6802_state::pia2_kbB_r )
|
||||
{
|
||||
LOG( ("Warning, trying to read from Port B designated to drive the display, please check why\n") );
|
||||
logerror("Warning, trying to read from Port B designated to drive the display, please check why\n");
|
||||
LOG( ("Warning, trying to read from Port B designated to drive the display, please check why\n") );
|
||||
logerror("Warning, trying to read from Port B designated to drive the display, please check why\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Port B is fully used ouputting the segment pattern to the display */
|
||||
WRITE8_MEMBER( md6802_state::pia2_kbB_w )
|
||||
{
|
||||
// LOG(("--->%s(%02x)\n", FUNCNAME, data));
|
||||
// LOG(("--->%s(%02x)\n", FUNCNAME, data));
|
||||
|
||||
/* Store the segment pattern but do not lit up the digit here, done by pulling the correct cathode low on Port A */
|
||||
m_segments = BITSWAP8(data, 0, 4, 5, 3, 2, 1, 7, 6);
|
||||
@ -299,7 +299,7 @@ void md6802_state::machine_reset()
|
||||
{
|
||||
LOG(("--->%s()\n", FUNCNAME));
|
||||
m_led = 1;
|
||||
m_maincpu->reset();
|
||||
m_maincpu->reset();
|
||||
}
|
||||
|
||||
/* Didact mp68a driver class */
|
||||
@ -310,9 +310,9 @@ void md6802_state::machine_reset()
|
||||
#define PIA6820 PIA6821
|
||||
class mp68a_state : public didact_state
|
||||
{
|
||||
public:
|
||||
public:
|
||||
mp68a_state(const machine_config &mconfig, device_type type, const char * tag)
|
||||
: didact_state(mconfig, type, tag)
|
||||
: didact_state(mconfig, type, tag)
|
||||
,m_maincpu(*this, "maincpu")
|
||||
,m_digit0(*this, "digit0")
|
||||
,m_digit1(*this, "digit1")
|
||||
@ -322,7 +322,7 @@ class mp68a_state : public didact_state
|
||||
,m_digit5(*this, "digit5")
|
||||
,m_pia1(*this, "pia1")
|
||||
,m_pia2(*this, "pia2")
|
||||
{ }
|
||||
{ }
|
||||
|
||||
required_device<m6800_cpu_device> m_maincpu;
|
||||
|
||||
@ -367,8 +367,8 @@ WRITE8_MEMBER( mp68a_state::pia2_kbA_w )
|
||||
but we are using data read from the port. */
|
||||
digit_nbr = (data >> 4) & 0x07;
|
||||
|
||||
/* There is actually only one 9368 and a 74145 to drive the cathode of the right digit low */
|
||||
/* This can be emulated by prentending there are one 9368 per digit, at least for now */
|
||||
/* There is actually only one 9368 and a 74145 to drive the cathode of the right digit low */
|
||||
/* This can be emulated by prentending there are one 9368 per digit, at least for now */
|
||||
switch (digit_nbr)
|
||||
{
|
||||
case 0: m_digit0->a_w(data & 0x0f); break;
|
||||
@ -406,11 +406,11 @@ READ8_MEMBER( mp68a_state::pia2_kbB_r )
|
||||
while (a012 > 0 && !(line & (1 << --a012)));
|
||||
}
|
||||
|
||||
pb = a012; // A0-A2 -> PB0-PB3
|
||||
pb = a012; // A0-A2 -> PB0-PB3
|
||||
|
||||
if (m_shift)
|
||||
{
|
||||
pb |= 0x80; // Set shift bit (PB7)
|
||||
pb |= 0x80; // Set shift bit (PB7)
|
||||
m_shift = 0; // Reset flip flop
|
||||
output().set_led_value(m_led, m_shift);
|
||||
LOG( ("SHIFT is released\n") );
|
||||
@ -489,31 +489,31 @@ INPUT_PORTS_END
|
||||
|
||||
static INPUT_PORTS_START( md6802 )
|
||||
PORT_START("LINE0") /* KEY ROW 0 */
|
||||
PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0')
|
||||
PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1')
|
||||
PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2')
|
||||
PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3')
|
||||
PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0')
|
||||
PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1')
|
||||
PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2')
|
||||
PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3')
|
||||
PORT_BIT(0xf0, 0x00, IPT_UNUSED )
|
||||
|
||||
PORT_START("LINE1") /* KEY ROW 1 */
|
||||
PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4')
|
||||
PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5')
|
||||
PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6')
|
||||
PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7')
|
||||
PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4')
|
||||
PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5')
|
||||
PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6')
|
||||
PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7')
|
||||
PORT_BIT(0xf0, 0x00, IPT_UNUSED )
|
||||
|
||||
PORT_START("LINE2") /* KEY ROW 2 */
|
||||
PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8')
|
||||
PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9')
|
||||
PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('A')
|
||||
PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('B')
|
||||
PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8')
|
||||
PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9')
|
||||
PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('A')
|
||||
PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('B')
|
||||
PORT_BIT(0xf0, 0x00, IPT_UNUSED )
|
||||
|
||||
PORT_START("LINE3") /* KEY ROW 3 */
|
||||
PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('C')
|
||||
PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('D')
|
||||
PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('E')
|
||||
PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('F')
|
||||
PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('C')
|
||||
PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('D')
|
||||
PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('E')
|
||||
PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('F')
|
||||
PORT_BIT(0xf0, 0x00, IPT_UNUSED )
|
||||
|
||||
PORT_START("LINE4") /* Special KEY ROW for reset and Shift/'*' keys */
|
||||
@ -524,31 +524,31 @@ INPUT_PORTS_END
|
||||
|
||||
static INPUT_PORTS_START( mp68a )
|
||||
PORT_START("LINE0") /* KEY ROW 0 */
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('C')
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('D')
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('E')
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('F')
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('C')
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('D')
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('E')
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('F')
|
||||
PORT_BIT(0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
|
||||
PORT_START("LINE1") /* KEY ROW 1 */
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8')
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9')
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('A')
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('B')
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8')
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9')
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('A')
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('B')
|
||||
PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
|
||||
PORT_START("LINE2") /* KEY ROW 2 */
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4')
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5')
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6')
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7')
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4')
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5')
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6')
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7')
|
||||
PORT_BIT(0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
|
||||
PORT_START("LINE3") /* KEY ROW 3 */
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0')
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1')
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2')
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3')
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0')
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1')
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2')
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3')
|
||||
PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
|
||||
PORT_START("LINE4") /* Special KEY ROW for reset and Shift/'*' keys */
|
||||
@ -559,7 +559,7 @@ INPUT_PORTS_END
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(didact_state::scan_artwork)
|
||||
{
|
||||
// LOG(("--->%s()\n", FUNCNAME));
|
||||
// LOG(("--->%s()\n", FUNCNAME));
|
||||
|
||||
// Poll the artwork Reset key
|
||||
if ( (m_io_line4->read() & 0x04) )
|
||||
@ -567,14 +567,14 @@ TIMER_DEVICE_CALLBACK_MEMBER(didact_state::scan_artwork)
|
||||
LOG( ("RESET is pressed, resetting the CPU\n") );
|
||||
m_shift = 0;
|
||||
output().set_led_value(m_led, m_shift); // For mp68a only
|
||||
if (m_reset == 0)
|
||||
if (m_reset == 0)
|
||||
{
|
||||
machine_reset();
|
||||
}
|
||||
m_reset = 1; // Inhibit multiple resets
|
||||
}
|
||||
|
||||
// Poll the artwork SHIFT/* key
|
||||
// Poll the artwork SHIFT/* key
|
||||
else if ( (m_io_line4->read() & 0x08) )
|
||||
{
|
||||
LOG( ("%s", !m_shift ? "SHIFT is set\n" : "") );
|
||||
@ -631,9 +631,9 @@ static MACHINE_CONFIG_START( md6802, md6802_state )
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( mp68a, mp68a_state )
|
||||
// Clock source is based on a N9602N Dual Retriggerable Resettable Monostable Multivibrator oscillator at aprox 505KHz.
|
||||
// Clock source is based on a N9602N Dual Retriggerable Resettable Monostable Multivibrator oscillator at aprox 505KHz.
|
||||
// Trimpot seems broken/stuck at 5K Ohm thu. ROM code 1Ms delay loops suggest 1MHz+
|
||||
MCFG_CPU_ADD("maincpu", M6800, 505000)
|
||||
MCFG_CPU_ADD("maincpu", M6800, 505000)
|
||||
MCFG_CPU_PROGRAM_MAP(mp68a_map)
|
||||
MCFG_DEFAULT_LAYOUT(layout_mp68a)
|
||||
|
||||
@ -646,14 +646,14 @@ static MACHINE_CONFIG_START( mp68a, mp68a_state )
|
||||
/* --init----------------------- */
|
||||
/* 0x0BAF 0x601 (Control A) = 0x30 - CA2 is low and enable DDRA */
|
||||
/* 0x0BB1 0x603 (Control B) = 0x30 - CB2 is low and enable DDRB */
|
||||
/* 0x0BB5 0x600 (DDR A) = 0xFF - Port A all outputs and set to 0 (zero) */
|
||||
/* 0x0BB9 0x602 (DDR B) = 0x50 - Port B two outputs and set to 0 (zero) */
|
||||
/* 0x0BB5 0x600 (DDR A) = 0xFF - Port A all outputs and set to 0 (zero) */
|
||||
/* 0x0BB9 0x602 (DDR B) = 0x50 - Port B two outputs and set to 0 (zero) */
|
||||
/* 0x0BBD 0x601 (Control A) = 0x34 - CA2 is low and lock DDRA */
|
||||
/* 0x0BBF 0x603 (Control B) = 0x34 - CB2 is low and lock DDRB */
|
||||
/* 0x0BC3 0x602 (Port B) = 0x40 - Turn on display via RBI* on */
|
||||
/* 0x0BC3 0x602 (Port B) = 0x40 - Turn on display via RBI* on */
|
||||
/* --execution-wait for key loop-- */
|
||||
/* 0x086B Update display sequnc, see below */
|
||||
/* 0x0826 CB1 read = 0x603 (Control B) - is a key presssed? */
|
||||
/* 0x086B Update display sequnc, see below */
|
||||
/* 0x0826 CB1 read = 0x603 (Control B) - is a key presssed? */
|
||||
MCFG_PIA_WRITEPA_HANDLER(WRITE8(mp68a_state, pia2_kbA_w))
|
||||
MCFG_PIA_READPA_HANDLER(READ8(mp68a_state, pia2_kbA_r))
|
||||
MCFG_PIA_WRITEPB_HANDLER(WRITE8(mp68a_state, pia2_kbB_w))
|
||||
@ -663,18 +663,18 @@ static MACHINE_CONFIG_START( mp68a, mp68a_state )
|
||||
MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line)) /* Not used by ROM. Combined trace to CPU IRQ with IRQA */
|
||||
|
||||
/* Display - sequence outputting all '0':s at start */
|
||||
/* 0x086B 0x600 (Port A) = 0x00 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
/* 0x086B 0x600 (Port A) = 0x10 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
/* 0x086B 0x600 (Port A) = 0x20 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
/* 0x086B 0x600 (Port A) = 0x30 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
/* 0x086B 0x600 (Port A) = 0x40 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
/* 0x086B 0x600 (Port A) = 0x50 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
/* 0x086B 0x600 (Port A) = 0x00 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
/* 0x086B 0x600 (Port A) = 0x10 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
/* 0x086B 0x600 (Port A) = 0x20 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
/* 0x086B 0x600 (Port A) = 0x30 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
/* 0x086B 0x600 (Port A) = 0x40 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
/* 0x086B 0x600 (Port A) = 0x50 */
|
||||
/* 0x086B 0x600 (Port A) = 0x70 */
|
||||
MCFG_DEVICE_ADD("digit0", DM9368, 0)
|
||||
MCFG_OUTPUT_INDEX(0)
|
||||
MCFG_DEVICE_ADD("digit1", DM9368, 0)
|
||||
@ -715,6 +715,6 @@ ROM_START( mp68a ) // ROM image from http://elektronikforumet.com/forum/viewtopi
|
||||
ROM_END
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1979, mp68a, 0, 0, mp68a, mp68a, driver_device, 0, "Didact AB", "mp68a", MACHINE_NO_SOUND_HW )
|
||||
COMP( 1982, e100, 0, 0, e100, e100, driver_device, 0, "Didact AB", "Esselte 100", MACHINE_IS_SKELETON )
|
||||
COMP( 1983, md6802, 0, 0, md6802, md6802, driver_device, 0, "Didact AB", "Mikrodator 6802", MACHINE_NO_SOUND_HW )
|
||||
COMP( 1979, mp68a, 0, 0, mp68a, mp68a, driver_device, 0, "Didact AB", "mp68a", MACHINE_NO_SOUND_HW )
|
||||
COMP( 1982, e100, 0, 0, e100, e100, driver_device, 0, "Didact AB", "Esselte 100", MACHINE_IS_SKELETON )
|
||||
COMP( 1983, md6802, 0, 0, md6802, md6802, driver_device, 0, "Didact AB", "Mikrodator 6802", MACHINE_NO_SOUND_HW )
|
||||
|
@ -4334,7 +4334,7 @@ MACHINE_START_MEMBER(dynax_state,hnoridur)
|
||||
{
|
||||
UINT8 *ROM = memregion("maincpu")->base();
|
||||
int bank_n = (memregion("maincpu")->bytes() - 0x10000) / 0x8000;
|
||||
|
||||
|
||||
m_hnoridur_ptr = &ROM[0x10000 + 0x18 * 0x8000];
|
||||
save_pointer(NAME(m_hnoridur_ptr), 0x8000);
|
||||
|
||||
|
@ -36,7 +36,7 @@ public:
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_shared_ptr<UINT8> m_videoram;
|
||||
|
||||
|
||||
optional_device<i8275_device> m_crtc8275;
|
||||
optional_device<mc6845_device> m_crtc6845;
|
||||
required_device<pic8259_device> m_pic8259;
|
||||
@ -52,7 +52,7 @@ public:
|
||||
UINT8 m_scudi;
|
||||
UINT8 m_cannone;
|
||||
UINT8 m_riga_inf;
|
||||
|
||||
|
||||
UINT8 m_irq0;
|
||||
UINT8 m_irq1;
|
||||
UINT8 m_irq2;
|
||||
@ -61,15 +61,15 @@ public:
|
||||
UINT8 m_irq5;
|
||||
UINT8 m_irq6;
|
||||
UINT8 m_irq7;
|
||||
|
||||
|
||||
|
||||
|
||||
UINT8 m_start2_value;
|
||||
UINT8 m_dma1;
|
||||
UINT8 m_io_40;
|
||||
UINT8 m_hsync;
|
||||
|
||||
|
||||
DECLARE_WRITE8_MEMBER(io_40_w);
|
||||
|
||||
|
||||
DECLARE_READ8_MEMBER(io_60_r);
|
||||
DECLARE_WRITE8_MEMBER(io_70_w);
|
||||
DECLARE_WRITE8_MEMBER(io_90_w);
|
||||
@ -79,23 +79,23 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(io_d0_w);
|
||||
DECLARE_WRITE8_MEMBER(io_e0_w);
|
||||
DECLARE_WRITE8_MEMBER(io_f0_w);
|
||||
|
||||
|
||||
DECLARE_INPUT_CHANGED_MEMBER(coin_inserted);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(start);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(start2);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(tilt);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in0);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in1);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in2);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in3);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in4);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in5);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in6);
|
||||
|
||||
|
||||
|
||||
DECLARE_INPUT_CHANGED_MEMBER(coin_inserted);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(start);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(start2);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(tilt);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in0);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in1);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in2);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in3);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in4);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in5);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(in6);
|
||||
|
||||
DECLARE_READ_LINE_MEMBER(sid_read);
|
||||
|
||||
|
||||
|
||||
virtual void video_start() override;
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(scanline_timer);
|
||||
@ -107,41 +107,40 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(dark_1_clr);
|
||||
DECLARE_WRITE8_MEMBER(dark_2_clr);
|
||||
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
|
||||
|
||||
|
||||
DECLARE_DRIVER_INIT(fi6845);
|
||||
|
||||
|
||||
};
|
||||
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(fastinvaders_state::scanline_timer)
|
||||
{
|
||||
/* int scanline = param;
|
||||
/* int scanline = param;
|
||||
|
||||
|
||||
|
||||
|
||||
if(scanline == 16){
|
||||
//logerror("scanline\n");
|
||||
m_dma8257->dreq1_w(0x01);
|
||||
m_dma8257->hlda_w(1);
|
||||
}
|
||||
*/
|
||||
if(scanline == 16){
|
||||
//logerror("scanline\n");
|
||||
m_dma8257->dreq1_w(0x01);
|
||||
m_dma8257->hlda_w(1);
|
||||
}
|
||||
*/
|
||||
}
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(fastinvaders_state::count_ar)
|
||||
{
|
||||
if (m_ar<255){
|
||||
|
||||
m_riga_sup= ((m_prom[m_ar]&0x08)>>3)&0x01;
|
||||
m_scudi= ((m_prom[m_ar]&0x04)>>2)&0x01;
|
||||
m_cannone= ((m_prom[m_ar]&0x02)>>1)&0x01;
|
||||
m_scudi= ((m_prom[m_ar]&0x04)>>2)&0x01;
|
||||
m_cannone= ((m_prom[m_ar]&0x02)>>1)&0x01;
|
||||
m_riga_inf= ((m_prom[m_ar]&0x01))&0x01;
|
||||
//logerror("m_ar = %02X m_riga_sup %02X, m_scudi %02X, m_cannone %02X, m_riga_inf %02X\n",m_ar,m_riga_sup,m_scudi,m_cannone,m_riga_inf);
|
||||
|
||||
|
||||
if(m_riga_sup==0x01){
|
||||
if(((m_prom[m_ar-1]&0x08)>>3)==0x01){
|
||||
//logerror(" DMA1 \n");
|
||||
//logerror(" DMA1 \n");
|
||||
//logerror("m_prom[m_ar]=%d m_prom[m_ar-1]= %d ar = %d r_s %d, sc %d, ca %d, ri %d\n",m_prom[m_ar],m_prom[m_ar-1],m_ar,m_riga_sup,m_scudi,m_cannone,m_riga_inf);
|
||||
m_dma8257->dreq1_w(0x01);
|
||||
m_dma8257->hlda_w(1);
|
||||
@ -151,20 +150,20 @@ TIMER_DEVICE_CALLBACK_MEMBER(fastinvaders_state::count_ar)
|
||||
}
|
||||
m_ar++;
|
||||
}
|
||||
|
||||
|
||||
if (m_av<255){
|
||||
m_av++;
|
||||
//logerror("m_av=%02X\n",m_av);
|
||||
if (m_av == m_io_40){
|
||||
if (m_hsync==1){
|
||||
logerror(" DMA2 \n");
|
||||
logerror(" DMA2 \n");
|
||||
m_dma8257->dreq2_w(0x01);
|
||||
m_dma8257->hlda_w(1);
|
||||
//m_pic8259->ir3_w(HOLD_LINE);
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(fastinvaders_state::dark_1_clr)
|
||||
@ -176,7 +175,7 @@ WRITE8_MEMBER(fastinvaders_state::dark_1_clr)
|
||||
if(!data){
|
||||
m_dma1=0;
|
||||
}
|
||||
|
||||
|
||||
//logerror("dma 1 clr\n");
|
||||
//m_maincpu->set_input_line(I8085_RST75_LINE, ASSERT_LINE);
|
||||
//m_maincpu->set_input_line(I8085_RST75_LINE, CLEAR_LINE);
|
||||
@ -190,10 +189,10 @@ WRITE8_MEMBER(fastinvaders_state::dark_2_clr)
|
||||
if(data){
|
||||
m_dma8257->dreq2_w(0x00);
|
||||
}
|
||||
/* if(!data){
|
||||
m_dma1=0;
|
||||
}
|
||||
*/
|
||||
/* if(!data){
|
||||
m_dma1=0;
|
||||
}
|
||||
*/
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
@ -231,7 +230,7 @@ UINT32 fastinvaders_state::screen_update(screen_device &screen, bitmap_ind16 &bi
|
||||
);
|
||||
|
||||
count++;
|
||||
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
@ -256,8 +255,8 @@ READ8_MEMBER(fastinvaders_state::io_60_r)
|
||||
{
|
||||
UINT8 tmp=0;
|
||||
//0x60 ds6 input bit 0 DX or SX
|
||||
// bit 1 DX or SX
|
||||
// bit 2-7 dip switch
|
||||
// bit 1 DX or SX
|
||||
// bit 2-7 dip switch
|
||||
|
||||
tmp=ioport("IN1")->read()&0x03;
|
||||
tmp=tmp | (ioport("DSW1")->read()&0xfc);
|
||||
@ -269,15 +268,15 @@ READ8_MEMBER(fastinvaders_state::io_60_r)
|
||||
|
||||
WRITE8_MEMBER(fastinvaders_state::io_70_w)
|
||||
{
|
||||
//bit 0 rest55 clear
|
||||
//bit 0 rest55 clear
|
||||
//bit 1 rest65 clear
|
||||
//bit 2 trap clear
|
||||
//bit 3 coin counter
|
||||
//bit 3 coin counter
|
||||
|
||||
//bit 4 irq0 clear
|
||||
//bit 5 8085 reset
|
||||
//bit 6 TODO
|
||||
//bit 7 both used TODO
|
||||
//bit 5 8085 reset
|
||||
//bit 6 TODO
|
||||
//bit 7 both used TODO
|
||||
|
||||
//IRQ clear
|
||||
if (data&0x01){
|
||||
@ -285,32 +284,31 @@ WRITE8_MEMBER(fastinvaders_state::io_70_w)
|
||||
m_maincpu->set_input_line(I8085_RST55_LINE, CLEAR_LINE);
|
||||
}
|
||||
if (data&0x02){
|
||||
|
||||
if (m_rest65){
|
||||
//logerror("clear");
|
||||
m_rest65=0;
|
||||
m_maincpu->set_input_line(I8085_RST65_LINE, CLEAR_LINE);
|
||||
}
|
||||
}
|
||||
}
|
||||
if (data&0x04){
|
||||
m_trap=0;
|
||||
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
||||
}
|
||||
}
|
||||
if (data&0x10){
|
||||
m_irq0=0;
|
||||
m_pic8259->ir0_w(CLEAR_LINE);
|
||||
}
|
||||
}
|
||||
|
||||
//self reset
|
||||
if (data&0x20){
|
||||
logerror("RESET!!!!!\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
//coin counter
|
||||
// if (data&0x08){
|
||||
// coin_counter_w(machine(), offset,0x01);
|
||||
// }
|
||||
// if (data&0x08){
|
||||
// coin_counter_w(machine(), offset,0x01);
|
||||
// }
|
||||
|
||||
}
|
||||
|
||||
@ -355,7 +353,7 @@ READ_LINE_MEMBER(fastinvaders_state::sid_read)
|
||||
{
|
||||
UINT8 tmp= m_start2_value ? ASSERT_LINE : CLEAR_LINE;
|
||||
m_start2_value=0;
|
||||
return tmp;
|
||||
return tmp;
|
||||
}
|
||||
|
||||
INPUT_CHANGED_MEMBER(fastinvaders_state::tilt)
|
||||
@ -420,7 +418,7 @@ INPUT_CHANGED_MEMBER(fastinvaders_state::in3)
|
||||
INPUT_CHANGED_MEMBER(fastinvaders_state::in4)
|
||||
{
|
||||
m_irq4=1;
|
||||
if (newval)
|
||||
if (newval)
|
||||
m_pic8259->ir4_w(HOLD_LINE);
|
||||
}
|
||||
|
||||
@ -434,7 +432,7 @@ INPUT_CHANGED_MEMBER(fastinvaders_state::in5)
|
||||
INPUT_CHANGED_MEMBER(fastinvaders_state::in6)
|
||||
{
|
||||
m_irq6=1;
|
||||
if (newval)
|
||||
if (newval)
|
||||
m_pic8259->ir6_w(HOLD_LINE);
|
||||
}
|
||||
|
||||
@ -447,7 +445,7 @@ DECLARE_WRITE_LINE_MEMBER( fastinvaders_state::vsync)
|
||||
if (!state){
|
||||
m_dma8257->dreq0_w(0x01);
|
||||
m_dma8257->hlda_w(1);
|
||||
|
||||
|
||||
m_maincpu->set_input_line(I8085_RST75_LINE, ASSERT_LINE);
|
||||
m_maincpu->set_input_line(I8085_RST75_LINE, CLEAR_LINE);
|
||||
//machine().scheduler().abort_timeslice(); // transfer occurs immediately
|
||||
@ -456,8 +454,7 @@ DECLARE_WRITE_LINE_MEMBER( fastinvaders_state::vsync)
|
||||
}
|
||||
|
||||
if (state){
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( fastinvaders_state::hsync)
|
||||
@ -470,7 +467,7 @@ DECLARE_WRITE_LINE_MEMBER( fastinvaders_state::hsync)
|
||||
|
||||
if (state){
|
||||
m_hsync=1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -503,8 +500,8 @@ logerror("dma write\n");
|
||||
***************************************************************************/
|
||||
|
||||
static ADDRESS_MAP_START( fastinvaders_map, AS_PROGRAM, 8, fastinvaders_state )
|
||||
//AM_RANGE(0x0000, 0x1fff) AM_ROM AM_MIRROR(0x8000)
|
||||
AM_RANGE(0x0000, 0x27ff) AM_ROM AM_MIRROR(0x8000)
|
||||
//AM_RANGE(0x0000, 0x1fff) AM_ROM AM_MIRROR(0x8000)
|
||||
AM_RANGE(0x0000, 0x27ff) AM_ROM AM_MIRROR(0x8000)
|
||||
AM_RANGE(0x2800, 0x2fff) AM_RAM AM_MIRROR(0x8000) AM_SHARE("videoram")
|
||||
AM_RANGE(0x3000, 0x33ff) AM_RAM AM_MIRROR(0x8000)
|
||||
ADDRESS_MAP_END
|
||||
@ -517,41 +514,41 @@ static ADDRESS_MAP_START( fastinvaders_6845_io, AS_IO, 8, fastinvaders_state )
|
||||
AM_RANGE(0x20, 0x20) AM_DEVWRITE("6845", mc6845_device, address_w)
|
||||
AM_RANGE(0x21, 0x21) AM_DEVREADWRITE("6845", mc6845_device, register_r, register_w)
|
||||
AM_RANGE(0x30, 0x33) AM_DEVREADWRITE("pic8259", pic8259_device, read, write)
|
||||
AM_RANGE(0x40, 0x4f) AM_WRITE(io_40_w) //ds4 //latch
|
||||
//AM_RANGE(0x50, 0x50) AM_READ(io_50_r) //ds5 //latch
|
||||
AM_RANGE(0x40, 0x4f) AM_WRITE(io_40_w) //ds4 //latch
|
||||
//AM_RANGE(0x50, 0x50) AM_READ(io_50_r) //ds5 //latch
|
||||
AM_RANGE(0x60, 0x60) AM_READ(io_60_r)
|
||||
AM_RANGE(0x70, 0x70) AM_WRITE(io_70_w) //ds7 rest55,rest65,trap, irq0 clear
|
||||
AM_RANGE(0x80, 0x80) AM_NOP //ds8 write here a LOT ?????
|
||||
AM_RANGE(0x90, 0x90) AM_WRITE(io_90_w) //ds9 sound command
|
||||
AM_RANGE(0xa0, 0xa0) AM_WRITE(io_a0_w) //ds10 irq1 clear
|
||||
AM_RANGE(0xb0, 0xb0) AM_WRITE(io_b0_w) //ds11 irq2 clear
|
||||
AM_RANGE(0xc0, 0xc0) AM_WRITE(io_c0_w) //ds12 irq3 clear
|
||||
AM_RANGE(0xd0, 0xd0) AM_WRITE(io_d0_w) //ds13 irq5 clear
|
||||
AM_RANGE(0xe0, 0xe0) AM_WRITE(io_e0_w) //ds14 irq4 clear
|
||||
AM_RANGE(0xf0, 0xf0) AM_WRITE(io_f0_w) //ds15 irq6 clear
|
||||
|
||||
AM_RANGE(0x70, 0x70) AM_WRITE(io_70_w) //ds7 rest55,rest65,trap, irq0 clear
|
||||
AM_RANGE(0x80, 0x80) AM_NOP //ds8 write here a LOT ?????
|
||||
AM_RANGE(0x90, 0x90) AM_WRITE(io_90_w) //ds9 sound command
|
||||
AM_RANGE(0xa0, 0xa0) AM_WRITE(io_a0_w) //ds10 irq1 clear
|
||||
AM_RANGE(0xb0, 0xb0) AM_WRITE(io_b0_w) //ds11 irq2 clear
|
||||
AM_RANGE(0xc0, 0xc0) AM_WRITE(io_c0_w) //ds12 irq3 clear
|
||||
AM_RANGE(0xd0, 0xd0) AM_WRITE(io_d0_w) //ds13 irq5 clear
|
||||
AM_RANGE(0xe0, 0xe0) AM_WRITE(io_e0_w) //ds14 irq4 clear
|
||||
AM_RANGE(0xf0, 0xf0) AM_WRITE(io_f0_w) //ds15 irq6 clear
|
||||
|
||||
AM_IMPORT_FROM(fastinvaders_io_base)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( fastinvaders_8275_io, AS_IO, 8, fastinvaders_state )
|
||||
AM_RANGE( 0x20, 0x21 ) AM_DEVREADWRITE("8275", i8275_device, read, write)
|
||||
|
||||
AM_RANGE(0x10, 0x1f) AM_DEVREADWRITE("dma8257", i8257_device, read, write)
|
||||
AM_RANGE( 0x20, 0x21 ) AM_DEVREADWRITE("8275", i8275_device, read, write)
|
||||
|
||||
AM_RANGE(0x10, 0x1f) AM_DEVREADWRITE("dma8257", i8257_device, read, write)
|
||||
AM_RANGE(0x30, 0x33) AM_DEVREADWRITE("pic8259", pic8259_device, read, write)
|
||||
AM_RANGE(0x40, 0x4f) AM_WRITE(io_40_w) //ds4 //latch
|
||||
//AM_RANGE(0x50, 0x50) AM_READ(io_50_r) //ds5 //latch
|
||||
AM_RANGE(0x40, 0x4f) AM_WRITE(io_40_w) //ds4 //latch
|
||||
//AM_RANGE(0x50, 0x50) AM_READ(io_50_r) //ds5 //latch
|
||||
AM_RANGE(0x60, 0x60) AM_READ(io_60_r)
|
||||
AM_RANGE(0x70, 0x70) AM_WRITE(io_70_w) //ds7 rest55,rest65,trap, irq0 clear
|
||||
AM_RANGE(0x80, 0x80) AM_NOP //write here a LOT
|
||||
//AM_RANGE(0x80, 0x80) AM_WRITE(io_80_w) //ds8 ????
|
||||
AM_RANGE(0x90, 0x90) AM_WRITE(io_90_w) //ds9 sound command
|
||||
AM_RANGE(0xa0, 0xa0) AM_WRITE(io_a0_w) //ds10 irq1 clear
|
||||
AM_RANGE(0xb0, 0xb0) AM_WRITE(io_b0_w) //ds11 irq2 clear
|
||||
AM_RANGE(0xc0, 0xc0) AM_WRITE(io_c0_w) //ds12 irq3 clear
|
||||
AM_RANGE(0xd0, 0xd0) AM_WRITE(io_d0_w) //ds13 irq5 clear
|
||||
AM_RANGE(0xe0, 0xe0) AM_WRITE(io_e0_w) //ds14 irq4 clear
|
||||
AM_RANGE(0xf0, 0xf0) AM_WRITE(io_f0_w) //ds15 irq6 clear
|
||||
AM_RANGE(0x70, 0x70) AM_WRITE(io_70_w) //ds7 rest55,rest65,trap, irq0 clear
|
||||
AM_RANGE(0x80, 0x80) AM_NOP //write here a LOT
|
||||
//AM_RANGE(0x80, 0x80) AM_WRITE(io_80_w) //ds8 ????
|
||||
AM_RANGE(0x90, 0x90) AM_WRITE(io_90_w) //ds9 sound command
|
||||
AM_RANGE(0xa0, 0xa0) AM_WRITE(io_a0_w) //ds10 irq1 clear
|
||||
AM_RANGE(0xb0, 0xb0) AM_WRITE(io_b0_w) //ds11 irq2 clear
|
||||
AM_RANGE(0xc0, 0xc0) AM_WRITE(io_c0_w) //ds12 irq3 clear
|
||||
AM_RANGE(0xd0, 0xd0) AM_WRITE(io_d0_w) //ds13 irq5 clear
|
||||
AM_RANGE(0xe0, 0xe0) AM_WRITE(io_e0_w) //ds14 irq4 clear
|
||||
AM_RANGE(0xf0, 0xf0) AM_WRITE(io_f0_w) //ds15 irq6 clear
|
||||
AM_IMPORT_FROM(fastinvaders_io_base)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -565,30 +562,30 @@ ADDRESS_MAP_END
|
||||
|
||||
static INPUT_PORTS_START( fastinvaders )
|
||||
|
||||
PORT_START("COIN") /* FAKE async input */
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, coin_inserted, 0) //I8085_RST65_LINE
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, start, 0) //I8085_RST55_LINE
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, start2, 0) //I8085_RST55_LINE
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in0, 0) // int0, sparo
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,tilt, 0) //INPUT_LINE_NMI tilt
|
||||
|
||||
PORT_START("COIN") /* FAKE async input */
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, coin_inserted, 0) //I8085_RST65_LINE
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, start, 0) //I8085_RST55_LINE
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, start2, 0) //I8085_RST55_LINE
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in0, 0) // int0, sparo
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,tilt, 0) //INPUT_LINE_NMI tilt
|
||||
|
||||
|
||||
PORT_START("IN0")
|
||||
|
||||
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_S) PORT_NAME("1") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in1, 0)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D) PORT_NAME("2") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in2, 0)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_F) PORT_NAME("3") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in3, 0)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_G) PORT_NAME("4") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in4, 0)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_H) PORT_NAME("5") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in5, 0)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_J) PORT_NAME("6") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in6, 0)
|
||||
|
||||
|
||||
PORT_START("IN1") //0x60 io port
|
||||
|
||||
|
||||
PORT_START("IN1") //0x60 io port
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
|
||||
|
||||
|
||||
PORT_START("DSW1") //0x60 io port
|
||||
|
||||
PORT_START("DSW1") //0x60 io port
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
@ -598,16 +595,16 @@ PORT_START("COIN") /* FAKE async input */
|
||||
PORT_DIPNAME( 0xf0, 0x80, "Ships/lives number" )
|
||||
PORT_DIPSETTING( 0x10, "1 Ship" )
|
||||
PORT_DIPSETTING( 0x20, "2 Ships" )
|
||||
PORT_DIPSETTING( 0x30, "3 Ships" )
|
||||
PORT_DIPSETTING( 0x30, "3 Ships" )
|
||||
PORT_DIPSETTING( 0x40, "4 Ships" )
|
||||
PORT_DIPSETTING( 0x50, "5 Ships" )
|
||||
PORT_DIPSETTING( 0x60, "6 Ships" )
|
||||
PORT_DIPSETTING( 0x70, "7 Ships" )
|
||||
PORT_DIPSETTING( 0x80, "8 Ships" )
|
||||
PORT_DIPSETTING( 0x90, "9 Ships" )
|
||||
|
||||
PORT_DIPSETTING( 0x50, "5 Ships" )
|
||||
PORT_DIPSETTING( 0x60, "6 Ships" )
|
||||
PORT_DIPSETTING( 0x70, "7 Ships" )
|
||||
PORT_DIPSETTING( 0x80, "8 Ships" )
|
||||
PORT_DIPSETTING( 0x90, "9 Ships" )
|
||||
|
||||
|
||||
|
||||
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
@ -637,12 +634,12 @@ static MACHINE_CONFIG_START( fastinvaders, fastinvaders_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", I8085A, 6144100/2 ) // 6144100 Xtal /2 internaly
|
||||
MCFG_CPU_PROGRAM_MAP(fastinvaders_map)
|
||||
// MCFG_CPU_IO_MAP(fastinvaders_io_map)
|
||||
// MCFG_CPU_VBLANK_INT_DRIVER("screen", fastinvaders_state, irq0_line_hold)
|
||||
MCFG_I8085A_SID(READLINE(fastinvaders_state, sid_read))
|
||||
// MCFG_CPU_IO_MAP(fastinvaders_io_map)
|
||||
// MCFG_CPU_VBLANK_INT_DRIVER("screen", fastinvaders_state, irq0_line_hold)
|
||||
MCFG_I8085A_SID(READLINE(fastinvaders_state, sid_read))
|
||||
MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259", pic8259_device, inta_cb)
|
||||
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", fastinvaders_state, scanline_timer, "screen", 0, 1)
|
||||
|
||||
|
||||
MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL)
|
||||
|
||||
MCFG_DEVICE_ADD("dma8257", I8257, 6144100)
|
||||
@ -650,16 +647,16 @@ MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", fastinvaders_state, scanline_timer,
|
||||
MCFG_I8257_OUT_MEMW_CB(WRITE8(fastinvaders_state, memory_write_byte))
|
||||
MCFG_I8257_OUT_DACK_1_CB(WRITE8(fastinvaders_state, dark_1_clr))
|
||||
MCFG_I8257_OUT_DACK_2_CB(WRITE8(fastinvaders_state, dark_2_clr))
|
||||
|
||||
|
||||
|
||||
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("count_ar", fastinvaders_state, count_ar, attotime::from_hz(11500000/2))
|
||||
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
|
||||
MCFG_SCREEN_SIZE(64*16, 32*16)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0*16, 40*16-1, 0*14, 19*14-1)
|
||||
MCFG_SCREEN_SIZE(64*16, 32*16)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0*16, 40*16-1, 0*14, 19*14-1)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(fastinvaders_state, screen_update)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
@ -673,11 +670,11 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_DERIVED( fastinvaders_8275, fastinvaders )
|
||||
MCFG_CPU_MODIFY("maincpu" ) // guess
|
||||
MCFG_CPU_IO_MAP(fastinvaders_8275_io)
|
||||
|
||||
|
||||
MCFG_DEVICE_ADD("8275", I8275, 10000000 ) /* guess */ // does not configure a very useful resolution(!)
|
||||
MCFG_I8275_CHARACTER_WIDTH(16)
|
||||
// MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(apogee_state, display_pixels)
|
||||
// MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257_device, dreq2_w))
|
||||
// MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(apogee_state, display_pixels)
|
||||
// MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257_device, dreq2_w))
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( fastinvaders_6845, fastinvaders )
|
||||
@ -736,7 +733,7 @@ ROM_START( fi8275 )
|
||||
ROM_LOAD( "R2.2A", 0x2400, 0x0200, CRC(f446ef0d) SHA1(2be337c1197d14e5ffc33ea05b5262f1ea17d442) )
|
||||
ROM_LOAD( "R2.2B", 0x2600, 0x0200, CRC(b97e35a3) SHA1(0878a83c7f9f0645749fdfb1ff372d0e04833c9e) )
|
||||
|
||||
|
||||
|
||||
ROM_REGION( 0x0c00, "gfx1", 0 )
|
||||
ROM_LOAD( "C2.1F", 0x0000, 0x0200, CRC(9feca88a) SHA1(14a8c46eb51eed01b7b537a9931cd092cec2019f) )
|
||||
ROM_LOAD( "C2.1G", 0x0200, 0x0200, CRC(79fc3963) SHA1(25651d1031895a01a2a4751b355ff1200a899ac5) )
|
||||
@ -744,7 +741,7 @@ ROM_START( fi8275 )
|
||||
ROM_LOAD( "C2.2F", 0x0600, 0x0200, CRC(3bb16f55) SHA1(b1cc1e2346acd0e5c84861b414b4677871079844) )
|
||||
ROM_LOAD( "C2.2G", 0x0800, 0x0200, CRC(19828c47) SHA1(f215ce55be32b3564e1b7cc19500d38a93117051) )
|
||||
ROM_LOAD( "C2.2H", 0x0a00, 0x0200, CRC(284ae4eb) SHA1(6e28fcd9d481d37f47728f22f6048b29266f4346) )
|
||||
|
||||
|
||||
ROM_REGION( 0x0100, "prom", 0 )
|
||||
ROM_LOAD( "93427.bin", 0x0000, 0x0100, CRC(f59c8573) SHA1(5aed4866abe1690fd0f088af1cfd99b3c85afe9a) )
|
||||
ROM_END
|
||||
@ -774,11 +771,11 @@ ROM_START( fi6845 )
|
||||
ROM_LOAD( "C1.1A", 0x0600, 0x0200, CRC(3bb16f55) SHA1(b1cc1e2346acd0e5c84861b414b4677871079844) )
|
||||
ROM_LOAD( "C1.2A", 0x0800, 0x0200, CRC(19828c47) SHA1(f215ce55be32b3564e1b7cc19500d38a93117051) )
|
||||
ROM_LOAD( "C1.3A", 0x0a00, 0x0200, CRC(284ae4eb) SHA1(6e28fcd9d481d37f47728f22f6048b29266f4346) )
|
||||
|
||||
|
||||
ROM_REGION( 0x0100, "prom", 0 )
|
||||
ROM_LOAD( "93427.bin", 0x0000, 0x0100, CRC(f59c8573) SHA1(5aed4866abe1690fd0f088af1cfd99b3c85afe9a) )
|
||||
ROM_END
|
||||
|
||||
/* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS*/
|
||||
/* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS*/
|
||||
GAME( 1979, fi6845, 0, fastinvaders_6845, fastinvaders, fastinvaders_state, fi6845, ROT270, "Fiberglass", "Fast Invaders (6845 version)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
|
||||
GAME( 1979, fi8275, fi6845, fastinvaders_8275, fastinvaders, fastinvaders_state,fi6845, ROT270, "Fiberglass", "Fast Invaders (8275 version)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
|
||||
GAME( 1979, fi8275, fi6845, fastinvaders_8275, fastinvaders, fastinvaders_state,fi6845, ROT270, "Fiberglass", "Fast Invaders (8275 version)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
|
||||
|
@ -1,7 +1,7 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Kevin Horton,Jonathan Gevaryahu,Sandro Ronco,hap
|
||||
/******************************************************************************
|
||||
|
||||
|
||||
Fidelity Electronics 6502 based board driver
|
||||
See drivers/fidelz80.cpp for hardware description
|
||||
|
||||
@ -77,14 +77,14 @@ void fidel6502_state::csc_prepare_display()
|
||||
{
|
||||
// 7442 output, also update input mux (9 is unused)
|
||||
m_inp_mux = (1 << m_led_select) & 0x1ff;
|
||||
|
||||
|
||||
// 4 7seg leds + H
|
||||
for (int i = 0; i < 4; i++)
|
||||
{
|
||||
m_display_segmask[i] = 0x7f;
|
||||
m_display_state[i] = (m_inp_mux >> i & 1) ? m_7seg_data : 0;
|
||||
}
|
||||
|
||||
|
||||
// 8*8 chessboard leds
|
||||
for (int i = 0; i < 8; i++)
|
||||
m_display_state[i+4] = (m_inp_mux >> i & 1) ? m_led_data : 0;
|
||||
@ -136,7 +136,7 @@ READ8_MEMBER(fidel6502_state::csc_pia0_pb_r)
|
||||
// d5: button row 8 (active low)
|
||||
if (!(read_inputs(9) & 0x100))
|
||||
data |= 0x20;
|
||||
|
||||
|
||||
// d6,d7: language switches
|
||||
data|=0xc0;
|
||||
|
||||
@ -228,10 +228,10 @@ WRITE8_MEMBER(fidel6502_state::sc12_control_w)
|
||||
|
||||
// 7442 9: speaker out
|
||||
m_speaker->level_w(sel >> 9 & 1);
|
||||
|
||||
|
||||
// d6,d7: led select (active low)
|
||||
display_matrix(9, 2, sel & 0x1ff, ~data >> 6 & 3);
|
||||
|
||||
|
||||
// d4,d5: printer
|
||||
//..
|
||||
}
|
||||
|
@ -1,7 +1,7 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Kevin Horton,Jonathan Gevaryahu,Sandro Ronco,hap
|
||||
/******************************************************************************
|
||||
|
||||
|
||||
Fidelity Electronics Z80 based board driver
|
||||
for 6502 based boards, see drivers/fidel6502.cpp
|
||||
|
||||
@ -897,7 +897,7 @@ INPUT_CHANGED_MEMBER(fidelz80_state::reset_button)
|
||||
{
|
||||
// when RE button is directly wired to RESET pin(s)
|
||||
m_maincpu->set_input_line(INPUT_LINE_RESET, newval ? ASSERT_LINE : CLEAR_LINE);
|
||||
|
||||
|
||||
if (m_mcu)
|
||||
m_mcu->set_input_line(INPUT_LINE_RESET, newval ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
@ -917,7 +917,7 @@ void fidelz80_state::vcc_prepare_display()
|
||||
// 4 7seg leds
|
||||
for (int i = 0; i < 4; i++)
|
||||
m_display_segmask[i] = 0x7f;
|
||||
|
||||
|
||||
// note: sel d0 for extra leds
|
||||
UINT8 outdata = (m_7seg_data & 0x7f) | (m_led_select << 7 & 0x80);
|
||||
display_matrix(8, 4, outdata, m_led_select >> 2 & 0xf);
|
||||
@ -1016,7 +1016,7 @@ void fidelz80_state::vsc_prepare_display()
|
||||
m_display_segmask[i] = 0x7f;
|
||||
m_display_state[i] = (m_led_select >> i & 1) ? m_7seg_data : 0;
|
||||
}
|
||||
|
||||
|
||||
// 8*8 chessboard leds
|
||||
for (int i = 0; i < 8; i++)
|
||||
m_display_state[i+4] = (m_led_select >> i & 1) ? m_led_data : 0;
|
||||
@ -1066,10 +1066,10 @@ READ8_MEMBER(fidelz80_state::vsc_pio_porta_r)
|
||||
READ8_MEMBER(fidelz80_state::vsc_pio_portb_r)
|
||||
{
|
||||
UINT8 ret = 0;
|
||||
|
||||
|
||||
// d4: TSI BUSY line
|
||||
ret |= (m_speech->busy_r()) ? 0 : 0x10;
|
||||
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1135,7 +1135,7 @@ READ8_MEMBER(fidelz80_state::vbrc_mcu_t_r)
|
||||
// T0: card scanner?
|
||||
if (offset == 0)
|
||||
return 0;
|
||||
|
||||
|
||||
// T1: ?
|
||||
else
|
||||
return rand() & 1;
|
||||
@ -1184,7 +1184,7 @@ READ8_MEMBER(fidelz80_state::vsc_io_trampoline_r)
|
||||
ret &= m_ppi8255->read(space, offset & 3);
|
||||
if (~offset & 8)
|
||||
ret &= m_z80pio->read(space, offset & 3);
|
||||
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1207,12 +1207,12 @@ ADDRESS_MAP_END
|
||||
WRITE8_MEMBER(fidelz80_state::vbrc_speech_w)
|
||||
{
|
||||
//printf("%X ",data);
|
||||
|
||||
|
||||
// todo: HALT THE z80 here, and set up a callback to poll the s14001a BUSY line to resume z80
|
||||
m_speech->data_w(space, 0, data & 0x3f);
|
||||
m_speech->start_w(1);
|
||||
m_speech->start_w(0);
|
||||
|
||||
|
||||
//m_speech->start_w(BIT(data, 7));
|
||||
}
|
||||
|
||||
|
@ -5740,9 +5740,9 @@ ROM_START( royalcrd_nes )
|
||||
ROM_LOAD( "82s147.bin", 0x0000, 0x0200, CRC(5377c680) SHA1(33857bbbfebfce28b8a68c69e030bf560a701e83) )
|
||||
|
||||
// and this is just an untouched NES multigame..
|
||||
ROM_REGION( 0x0100000, "nes_prg", 0 )
|
||||
ROM_REGION( 0x0100000, "nes_prg", 0 )
|
||||
ROM_LOAD( "me0.bin", 0x0000, 0x0100000, CRC(83a4e841) SHA1(280e1a26737fe0b90dd19be706df89e09ef84c77) ) // == 64 in 1 [a1][p1].prg nes:mc_64a 64 in 1 (Alt Games)
|
||||
ROM_REGION( 0x80000, "nes_chr", 0 )
|
||||
ROM_REGION( 0x80000, "nes_chr", 0 )
|
||||
ROM_LOAD( "me1.bin", 0x0000, 0x80000, CRC(7114b404) SHA1(0f5a206af25725b2e97c404a616e341f15925431) ) // == 64 in 1 [a1][p1].chr nes:mc_64a 64 in 1 (Alt Games)
|
||||
ROM_END
|
||||
|
||||
@ -5759,7 +5759,7 @@ ROM_START( royalcrd_msx )
|
||||
ROM_LOAD( "24c04.bin", 0x0000, 0x0200, CRC(2a1e8abe) SHA1(639a704f25af02597ead2e69d15ac47953c27f09) )
|
||||
|
||||
// some kind of MSX multigame?
|
||||
ROM_REGION( 0x0100000, "msx_prg", 0 )
|
||||
ROM_REGION( 0x0100000, "msx_prg", 0 )
|
||||
ROM_LOAD( "me0.bin", 0x0000, 0x10000, CRC(bd5be18b) SHA1(b43a176db0522bcda0a17dd0c210c987dc380c97) ) // weird pattern? might be bad if not a lookup table? BADADDR -------xxxxxxxxx
|
||||
ROM_LOAD( "me1.bin", 0x0000, 0x40000, CRC(2152c6b7) SHA1(e512e29f4a899cc3f91a446141fd4432a487228f) )
|
||||
ROM_END
|
||||
|
@ -202,7 +202,7 @@ ROM_START( maniacsqa ) // REF 940411
|
||||
ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 code */
|
||||
ROM_LOAD16_BYTE( "MS_U_45.U45", 0x000000, 0x020000, CRC(98f4fdc0) SHA1(1e4d5b0a8a432de885c96319c21280d304b38db0) )
|
||||
ROM_LOAD16_BYTE( "MS_U_44.U44", 0x000001, 0x020000, CRC(1785dd41) SHA1(5c6a65c00248971ce54c8185858393f2c52cc583) )
|
||||
|
||||
|
||||
ROM_REGION( 0x10000, "mcu", 0 ) /* DS5002FP code */
|
||||
ROM_LOAD( "ms_ds5002fp.bin", 0x00000, 0x8000, NO_DUMP )
|
||||
|
||||
@ -217,7 +217,7 @@ ROM_START( maniacsqa ) // REF 940411
|
||||
ROM_FILL( 0x0200000, 0x0080000, 0x00 ) /* to decode GFX as 5bpp */
|
||||
ROM_END
|
||||
|
||||
|
||||
|
||||
|
||||
/*============================================================================
|
||||
BANG
|
||||
@ -1457,7 +1457,7 @@ ROM_END
|
||||
READ16_MEMBER(gaelco2_state::maniacsqa_prot_r)
|
||||
{
|
||||
int pc = space.device().safe_pc();
|
||||
|
||||
|
||||
// if -1 is returned at any point on these checks the game instantly reports 'power failure'
|
||||
// these are generally done right before the other checks
|
||||
if (pc == 0x3dbc) return 0x0000; // must not be -1
|
||||
@ -1471,7 +1471,7 @@ READ16_MEMBER(gaelco2_state::maniacsqa_prot_r)
|
||||
if (pc == 0x3dce) return 0x0000; // must be 0
|
||||
|
||||
if (pc == 0x25c2) return 0x0000; // writes 0 to 0xfe45fa then expects this to be 0
|
||||
|
||||
|
||||
if (pc == 0x5cf6) return 0x0000; // must be 0
|
||||
if (pc == 0x5d1a) return 0x0000; // must be 0
|
||||
if (pc == 0xaaa0) return 0x0000; // must be 0?
|
||||
@ -1480,8 +1480,8 @@ READ16_MEMBER(gaelco2_state::maniacsqa_prot_r)
|
||||
if (pc == 0xaad0) return 0x0a00; // if above ISN'T 0 this must be 0x0a00 (but code then dies, probably wants some data filled?)
|
||||
// other code path just results in no more pieces dropping? maybe the MCU does the matching algorithm?
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
printf("read at PC %08x\n", pc);
|
||||
|
@ -45,7 +45,7 @@ EPROM sockets and SIMM slots
|
||||
MULTIMEDIA LITE boards:
|
||||
Multimedia Lite 1 - uses up to 4MB on EPROMs to store sound
|
||||
Multimedia Lite 2 - uses up to 16MB of SIMM to store sound
|
||||
|
||||
|
||||
Boards contain:
|
||||
Custom programmed Cypress CY37032-125JC CPLD
|
||||
32 Macrocells
|
||||
@ -108,7 +108,7 @@ public:
|
||||
{
|
||||
return rand();
|
||||
};
|
||||
|
||||
|
||||
|
||||
};
|
||||
|
||||
@ -140,14 +140,14 @@ static ADDRESS_MAP_START( igt_gameking_mem, AS_PROGRAM, 32, igt_gameking_state )
|
||||
AM_RANGE(0x00000000, 0x0007ffff) AM_ROM
|
||||
AM_RANGE(0x08000000, 0x081fffff) AM_ROM AM_REGION("game", 0)
|
||||
|
||||
AM_RANGE(0x10000000, 0x1000001f) AM_RAM
|
||||
AM_RANGE(0x10000000, 0x1000001f) AM_RAM
|
||||
AM_RANGE(0x10000020, 0x1000021f) AM_RAM // strange range to test, correct or CPU issue?
|
||||
AM_RANGE(0x10000220, 0x1003ffff) AM_RAM
|
||||
AM_RANGE(0x10000220, 0x1003ffff) AM_RAM
|
||||
|
||||
AM_RANGE(0x28010008, 0x2801000b) AM_READ(igt_gk_28010008_r)
|
||||
AM_RANGE(0x28030000, 0x28030003) AM_READ(igt_gk_28030000_r)
|
||||
|
||||
|
||||
|
||||
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -174,7 +174,7 @@ static MACHINE_CONFIG_START( igt_gameking, igt_gameking_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", I960, 20000000) // ?? Mhz
|
||||
MCFG_CPU_PROGRAM_MAP(igt_gameking_mem)
|
||||
|
||||
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", igt_gameking)
|
||||
|
||||
@ -201,140 +201,140 @@ MACHINE_CONFIG_END
|
||||
|
||||
ROM_START( gkigt4 )
|
||||
ROM_REGION( 0x80000, "maincpu", 0 )
|
||||
ROM_LOAD( "M0000527 BASE (1-4002).bin", 0x00000, 0x80000, CRC(73981260) SHA1(24b42ae2796034815d35294efe0ac3d5c33100bd) )
|
||||
ROM_LOAD( "M0000527 BASE (1-4002).bin", 0x00000, 0x80000, CRC(73981260) SHA1(24b42ae2796034815d35294efe0ac3d5c33100bd) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "game", 0 )
|
||||
ROM_LOAD16_BYTE( "G0001777 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(99d5829d) SHA1(b2ec16f35503ba6a0a41221fb3f52c5d2223ad79) )
|
||||
ROM_LOAD16_BYTE( "G0001777 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3b7dfcc0) SHA1(2aeb35125c4320ba3198c44418c90fa6fd6270a9) )
|
||||
ROM_LOAD16_BYTE( "G0001777 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(99d5829d) SHA1(b2ec16f35503ba6a0a41221fb3f52c5d2223ad79) )
|
||||
ROM_LOAD16_BYTE( "G0001777 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3b7dfcc0) SHA1(2aeb35125c4320ba3198c44418c90fa6fd6270a9) )
|
||||
|
||||
ROM_REGION( 0x100000, "cg", 0 )
|
||||
ROM_LOAD16_BYTE( "C0000330 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(b92b8aa4) SHA1(05a1feac4012a73777eb28ab6e66e1dcadb9430f) )
|
||||
ROM_LOAD16_BYTE( "C0000330 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(4e0560b5) SHA1(109f0bd47cfb0ed593fc34c5904bc639b0097d12))
|
||||
ROM_LOAD16_BYTE( "C0000330 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(b92b8aa4) SHA1(05a1feac4012a73777eb28ab6e66e1dcadb9430f) )
|
||||
ROM_LOAD16_BYTE( "C0000330 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(4e0560b5) SHA1(109f0bd47cfb0ed593fc34c5904bc639b0097d12))
|
||||
|
||||
ROM_REGION( 0x200000, "plx", 0 )
|
||||
ROM_LOAD16_BYTE( "C0000330 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(806ec7d4) SHA1(b9263f942b3d7101797bf87ad18cfddac9582791) )
|
||||
ROM_LOAD16_BYTE( "C0000330 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(c4ce5dc5) SHA1(cc5d090e88551550787b87d80aafe18ee1661dd7) )
|
||||
ROM_LOAD16_BYTE( "C0000330 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(806ec7d4) SHA1(b9263f942b3d7101797bf87ad18cfddac9582791) )
|
||||
ROM_LOAD16_BYTE( "C0000330 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(c4ce5dc5) SHA1(cc5d090e88551550787b87d80aafe18ee1661dd7) )
|
||||
|
||||
ROM_REGION( 0x200000, "snd", 0 )
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_END
|
||||
|
||||
|
||||
|
||||
ROM_START( gkigt4ms )
|
||||
ROM_REGION( 0x80000, "maincpu", 0 )
|
||||
ROM_LOAD( "M000526 BASE (1-4002) MS.u39", 0x00000, 0x80000, CRC(4d095df5) SHA1(bd0cdc4c1b07ef2723ba22b14abaf581b017f190) )
|
||||
ROM_LOAD( "M000526 BASE (1-4002) MS.u39", 0x00000, 0x80000, CRC(4d095df5) SHA1(bd0cdc4c1b07ef2723ba22b14abaf581b017f190) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "game", 0 ) // same as gkigt4
|
||||
ROM_LOAD16_BYTE( "G0001777 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(99d5829d) SHA1(b2ec16f35503ba6a0a41221fb3f52c5d2223ad79) )
|
||||
ROM_LOAD16_BYTE( "G0001777 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3b7dfcc0) SHA1(2aeb35125c4320ba3198c44418c90fa6fd6270a9) )
|
||||
ROM_LOAD16_BYTE( "G0001777 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(99d5829d) SHA1(b2ec16f35503ba6a0a41221fb3f52c5d2223ad79) )
|
||||
ROM_LOAD16_BYTE( "G0001777 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3b7dfcc0) SHA1(2aeb35125c4320ba3198c44418c90fa6fd6270a9) )
|
||||
|
||||
ROM_REGION( 0x100000, "cg", 0 )
|
||||
ROM_LOAD16_BYTE( "C000351 CG1 1 of 4 (2-40) MS.u30", 0x000000, 0x80000, CRC(2e841b28) SHA1(492b54e092b0d4028fd8edcb981bd1fd25dca47d) )
|
||||
ROM_LOAD16_BYTE( "C000351 CG2 2 of 4 (2-40) MS.u53", 0x000001, 0x80000, CRC(673fc86c) SHA1(4d844330c5602d725253b4f78781fa9e213b8556) )
|
||||
ROM_LOAD16_BYTE( "C000351 CG1 1 of 4 (2-40) MS.u30", 0x000000, 0x80000, CRC(2e841b28) SHA1(492b54e092b0d4028fd8edcb981bd1fd25dca47d) )
|
||||
ROM_LOAD16_BYTE( "C000351 CG2 2 of 4 (2-40) MS.u53", 0x000001, 0x80000, CRC(673fc86c) SHA1(4d844330c5602d725253b4f78781fa9e213b8556) )
|
||||
|
||||
ROM_REGION( 0x200000, "plx", 0 )
|
||||
ROM_LOAD16_BYTE( "C000351 PXL1 3 of 4 (2-80) MS.u14", 0x000000, 0x100000, CRC(438fb625) SHA1(369c860dffa323c2e9be155da1989252f6b0e694) )
|
||||
ROM_LOAD16_BYTE( "C000351 PXL2 4 of 4 (2-80) MS.u37", 0x000001, 0x100000, CRC(22ec9c65) SHA1(bd944ae79faa8ceb73ed8f6f244fce6ff543ccd1) )
|
||||
ROM_LOAD16_BYTE( "C000351 PXL1 3 of 4 (2-80) MS.u14", 0x000000, 0x100000, CRC(438fb625) SHA1(369c860dffa323c2e9be155da1989252f6b0e694) )
|
||||
ROM_LOAD16_BYTE( "C000351 PXL2 4 of 4 (2-80) MS.u37", 0x000001, 0x100000, CRC(22ec9c65) SHA1(bd944ae79faa8ceb73ed8f6f244fce6ff543ccd1) )
|
||||
|
||||
ROM_REGION( 0x200000, "snd", 0 ) // same as gkigt4
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( gkigt43 )
|
||||
ROM_REGION( 0x80000, "maincpu", 0 )
|
||||
ROM_LOAD( "M0000837 BASE (1-4002).bin", 0x00000, 0x80000, CRC(98841e5c) SHA1(3b04bc9bc170cfcc6145dc601a63bd1394a62897) )
|
||||
ROM_LOAD( "M0000837 BASE (1-4002).bin", 0x00000, 0x80000, CRC(98841e5c) SHA1(3b04bc9bc170cfcc6145dc601a63bd1394a62897) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "game", 0 )
|
||||
ROM_LOAD16_BYTE( "G0002142 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(704ef406) SHA1(3f8f719342874243d479011372786a9b6b14f5b1) )
|
||||
ROM_LOAD16_BYTE( "G0002142 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3a576a75) SHA1(d2de1b61808412fb2fe68400387dcdcb7910a770) )
|
||||
ROM_LOAD16_BYTE( "G0002142 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(704ef406) SHA1(3f8f719342874243d479011372786a9b6b14f5b1) )
|
||||
ROM_LOAD16_BYTE( "G0002142 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3a576a75) SHA1(d2de1b61808412fb2fe68400387dcdcb7910a770) )
|
||||
|
||||
ROM_REGION( 0x100000, "cg", 0 )
|
||||
ROM_LOAD16_BYTE( "C0000793 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(582137cc) SHA1(66686a2332a3844f816cf7e988a346f5f593d8f6) )
|
||||
ROM_LOAD16_BYTE( "C0000793 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(5e0b6310) SHA1(4bf718dc9859e8c10c9dca967185c57738249319) )
|
||||
ROM_LOAD16_BYTE( "C0000793 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(582137cc) SHA1(66686a2332a3844f816cf7e988a346f5f593d8f6) )
|
||||
ROM_LOAD16_BYTE( "C0000793 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(5e0b6310) SHA1(4bf718dc9859e8c10c9dca967185c57738249319) )
|
||||
|
||||
ROM_REGION( 0x200000, "plx", 0 )
|
||||
ROM_LOAD16_BYTE( "C0000793 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(6327a76e) SHA1(01ad5747788389d3d9d71a1c37472d33db3ba5fb) )
|
||||
ROM_LOAD16_BYTE( "C0000793 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(5a400e90) SHA1(c01be47d03e9ec418d0e4e1293fcf2c890301430) )
|
||||
ROM_LOAD16_BYTE( "C0000793 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(6327a76e) SHA1(01ad5747788389d3d9d71a1c37472d33db3ba5fb) )
|
||||
ROM_LOAD16_BYTE( "C0000793 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(5a400e90) SHA1(c01be47d03e9ec418d0e4e1293fcf2c890301430) )
|
||||
|
||||
ROM_REGION( 0x200000, "snd", 0 ) // same as gkigt4
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( gkigt43n )
|
||||
ROM_REGION( 0x80000, "maincpu", 0 )
|
||||
ROM_LOAD( "M0000811 BASE (1-4002) NJ.bin", 0x00000, 0x80000, CRC(4c659923) SHA1(4624179320cb284516980e2d3caea6fd45c3f967) )
|
||||
ROM_LOAD( "M0000811 BASE (1-4002) NJ.bin", 0x00000, 0x80000, CRC(4c659923) SHA1(4624179320cb284516980e2d3caea6fd45c3f967) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "game", 0 )
|
||||
ROM_LOAD16_BYTE( "G0001624 GME1 1 of 2 (2-80) NJ.bin", 0x000000, 0x100000, CRC(4aa4139b) SHA1(c3e13c84cc13d44de90a03d0b5d45f46d4f794ce) )
|
||||
ROM_LOAD16_BYTE( "G0001624 GME2 2 of 2 (2-80) NJ.bin", 0x000001, 0x100000, CRC(5b3bb8bf) SHA1(271131f06944074bedab7fe7c80fce1e2136c385) )
|
||||
ROM_LOAD16_BYTE( "G0001624 GME1 1 of 2 (2-80) NJ.bin", 0x000000, 0x100000, CRC(4aa4139b) SHA1(c3e13c84cc13d44de90a03d0b5d45f46d4f794ce) )
|
||||
ROM_LOAD16_BYTE( "G0001624 GME2 2 of 2 (2-80) NJ.bin", 0x000001, 0x100000, CRC(5b3bb8bf) SHA1(271131f06944074bedab7fe7c80fce1e2136c385) )
|
||||
|
||||
ROM_REGION( 0x100000, "cg", 0 )
|
||||
ROM_LOAD16_BYTE( "C0000770 CG1 1 of 4 (2-40) NJ.bin", 0x000000, 0x80000, CRC(35847c45) SHA1(9f6192a9cb43df1a32d13d09248f10d62cd5ad3c) )
|
||||
ROM_LOAD16_BYTE( "C0000770 CG2 2 of 4 (2-40) NJ.bin", 0x000001, 0x80000, CRC(2207af01) SHA1(6f59d624fbbae56af081f2a2f4eb3f7a6e6c0ec1) )
|
||||
ROM_LOAD16_BYTE( "C0000770 CG1 1 of 4 (2-40) NJ.bin", 0x000000, 0x80000, CRC(35847c45) SHA1(9f6192a9cb43df1a32d13d09248f10d62cd5ad3c) )
|
||||
ROM_LOAD16_BYTE( "C0000770 CG2 2 of 4 (2-40) NJ.bin", 0x000001, 0x80000, CRC(2207af01) SHA1(6f59d624fbbae56af081f2a2f4eb3f7a6e6c0ec1) )
|
||||
|
||||
ROM_REGION( 0x200000, "plx", 0 )
|
||||
ROM_LOAD16_BYTE( "C0000770 PLX1 3 of 4 (2-80) NJ.bin", 0x000000, 0x100000, CRC(d1e673cd) SHA1(22d0234e3efb5238d60c9aab4ffc171f28f5abac) )
|
||||
ROM_LOAD16_BYTE( "C0000770 PLX2 4 of 4 (2-80) NJ.bin", 0x000001, 0x100000, CRC(d99074f3) SHA1(a5829761f558f8e543a1442128c0ae3520d42318) )
|
||||
ROM_LOAD16_BYTE( "C0000770 PLX1 3 of 4 (2-80) NJ.bin", 0x000000, 0x100000, CRC(d1e673cd) SHA1(22d0234e3efb5238d60c9aab4ffc171f28f5abac) )
|
||||
ROM_LOAD16_BYTE( "C0000770 PLX2 4 of 4 (2-80) NJ.bin", 0x000001, 0x100000, CRC(d99074f3) SHA1(a5829761f558f8e543a1442128c0ae3520d42318) )
|
||||
|
||||
ROM_REGION( 0x200000, "snd", 0 ) // same as gkigt4
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( gkigtez )
|
||||
ROM_REGION( 0x80000, "maincpu", 0 ) // same as gkigt4ms
|
||||
ROM_LOAD( "M000526 BASE (1-4002) MS.u39", 0x00000, 0x80000, CRC(4d095df5) SHA1(bd0cdc4c1b07ef2723ba22b14abaf581b017f190) )
|
||||
ROM_LOAD( "M000526 BASE (1-4002) MS.u39", 0x00000, 0x80000, CRC(4d095df5) SHA1(bd0cdc4c1b07ef2723ba22b14abaf581b017f190) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "game", 0 )
|
||||
ROM_LOAD16_BYTE( "G0002955 GME1 1 of 2 (2-80) MS.u13", 0x000000, 0x100000, CRC(472c04a1) SHA1(00b7784d254390475c9aa1beac1700c42514cbed) )
|
||||
ROM_LOAD16_BYTE( "G0002955 GME2 2 of 2 (2-80) MS.u36", 0x000001, 0x100000, CRC(16903e65) SHA1(eb01c0f88212e8e35c35f897f17e12e859255270) )
|
||||
ROM_LOAD16_BYTE( "G0002955 GME1 1 of 2 (2-80) MS.u13", 0x000000, 0x100000, CRC(472c04a1) SHA1(00b7784d254390475c9aa1beac1700c42514cbed) )
|
||||
ROM_LOAD16_BYTE( "G0002955 GME2 2 of 2 (2-80) MS.u36", 0x000001, 0x100000, CRC(16903e65) SHA1(eb01c0f88212e8e35c35f897f17e12e859255270) )
|
||||
|
||||
ROM_REGION( 0x100000, "cg", 0 ) // same as gkigt4ms
|
||||
ROM_LOAD16_BYTE( "C000351 CG1 1 of 4 (2-40) MS.u30", 0x000000, 0x80000, CRC(2e841b28) SHA1(492b54e092b0d4028fd8edcb981bd1fd25dca47d) )
|
||||
ROM_LOAD16_BYTE( "C000351 CG2 2 of 4 (2-40) MS.u53", 0x000001, 0x80000, CRC(673fc86c) SHA1(4d844330c5602d725253b4f78781fa9e213b8556) )
|
||||
ROM_LOAD16_BYTE( "C000351 CG1 1 of 4 (2-40) MS.u30", 0x000000, 0x80000, CRC(2e841b28) SHA1(492b54e092b0d4028fd8edcb981bd1fd25dca47d) )
|
||||
ROM_LOAD16_BYTE( "C000351 CG2 2 of 4 (2-40) MS.u53", 0x000001, 0x80000, CRC(673fc86c) SHA1(4d844330c5602d725253b4f78781fa9e213b8556) )
|
||||
|
||||
ROM_REGION( 0x200000, "plx", 0 ) // same as gkigt4ms
|
||||
ROM_LOAD16_BYTE( "C000351 PXL1 3 of 4 (2-80) MS.u14", 0x000000, 0x100000, CRC(438fb625) SHA1(369c860dffa323c2e9be155da1989252f6b0e694) )
|
||||
ROM_LOAD16_BYTE( "C000351 PXL2 4 of 4 (2-80) MS.u37", 0x000001, 0x100000, CRC(22ec9c65) SHA1(bd944ae79faa8ceb73ed8f6f244fce6ff543ccd1) )
|
||||
ROM_LOAD16_BYTE( "C000351 PXL1 3 of 4 (2-80) MS.u14", 0x000000, 0x100000, CRC(438fb625) SHA1(369c860dffa323c2e9be155da1989252f6b0e694) )
|
||||
ROM_LOAD16_BYTE( "C000351 PXL2 4 of 4 (2-80) MS.u37", 0x000001, 0x100000, CRC(22ec9c65) SHA1(bd944ae79faa8ceb73ed8f6f244fce6ff543ccd1) )
|
||||
|
||||
ROM_REGION( 0x200000, "snd", 0 ) // same as gkigt4
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( gkigt5p )
|
||||
ROM_REGION( 0x80000, "maincpu", 0 )
|
||||
ROM_LOAD( "M0000761 BASE (1-4002).bin", 0x00000, 0x80000, CRC(efac4e4f) SHA1(0cf5b3eead66a791701a504330d9154e8f4d657d) )
|
||||
ROM_LOAD( "M0000761 BASE (1-4002).bin", 0x00000, 0x80000, CRC(efac4e4f) SHA1(0cf5b3eead66a791701a504330d9154e8f4d657d) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "game", 0 )
|
||||
ROM_LOAD16_BYTE( "G0001783 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(f6672841) SHA1(1f8fe98b931e7fd67e5cd56e193c44acabcb7c0a) )
|
||||
ROM_LOAD16_BYTE( "G0001783 GME1 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(639de8c0) SHA1(ad4fb79f12bf19b4b39691cda9f5e61f32fa2dd5) )
|
||||
ROM_LOAD16_BYTE( "G0001783 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(f6672841) SHA1(1f8fe98b931e7fd67e5cd56e193c44acabcb7c0a) )
|
||||
ROM_LOAD16_BYTE( "G0001783 GME1 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(639de8c0) SHA1(ad4fb79f12bf19b4b39691cda9f5e61f32fa2dd5) )
|
||||
|
||||
ROM_REGION( 0x100000, "cg", 0 )
|
||||
ROM_LOAD16_BYTE( "C0000517 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(26db44c9) SHA1(8afe145d1fb7535c651d78b23872b71c2c946509) )
|
||||
ROM_LOAD16_BYTE( "C0000517 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(3554ba38) SHA1(6e0b8506943559dbee4cfa7c9e4b60590c6529fb) )
|
||||
ROM_LOAD16_BYTE( "C0000517 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(26db44c9) SHA1(8afe145d1fb7535c651d78b23872b71c2c946509) )
|
||||
ROM_LOAD16_BYTE( "C0000517 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(3554ba38) SHA1(6e0b8506943559dbee4cfa7c9e4b60590c6529fb) )
|
||||
|
||||
ROM_REGION( 0x200000, "plx", 0 )
|
||||
ROM_LOAD16_BYTE( "C0000517 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(956ba40c) SHA1(7d8ae934ef663ea6b3f342455d1e8c70a1ca4581) )
|
||||
ROM_LOAD16_BYTE( "C0000517 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(dff43975) SHA1(e1ca212e4e51175bcbab2af447863605f74ba77f) )
|
||||
ROM_LOAD16_BYTE( "C0000517 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(956ba40c) SHA1(7d8ae934ef663ea6b3f342455d1e8c70a1ca4581) )
|
||||
ROM_LOAD16_BYTE( "C0000517 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(dff43975) SHA1(e1ca212e4e51175bcbab2af447863605f74ba77f) )
|
||||
|
||||
ROM_REGION( 0x200000, "snd", 0 ) // same as gkigt4
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
|
||||
ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START( igtsc )
|
||||
ROM_REGION( 0x80000, "maincpu", 0 )
|
||||
ROM_LOAD( "I0000838 BASE (1-4002).bin", 0x00000, 0x80000, CRC(7b66f0d5) SHA1(a13e7fa4062668ff7acb15e58025eeb401754898) )
|
||||
ROM_LOAD( "I0000838 BASE (1-4002).bin", 0x00000, 0x80000, CRC(7b66f0d5) SHA1(a13e7fa4062668ff7acb15e58025eeb401754898) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "game", 0 )
|
||||
ROM_LOAD16_BYTE( "G0001175 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(674e0172) SHA1(e7bfe13781988b9193f22ad93502e303ba9427eb) )
|
||||
ROM_LOAD16_BYTE( "G0001175 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(db76db22) SHA1(e389b11a05f0ef0dcee303ba91578f4cd56beba0) )
|
||||
ROM_LOAD16_BYTE( "G0001175 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(674e0172) SHA1(e7bfe13781988b9193f22ad93502e303ba9427eb) )
|
||||
ROM_LOAD16_BYTE( "G0001175 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(db76db22) SHA1(e389b11a05f0ef0dcee303ba91578f4cd56beba0) )
|
||||
|
||||
// all these SIMM files are bad dumps, they never contains the byte value 0x0d (uploaded in ASCII mode with carriage return stripped out?)
|
||||
ROM_REGION( 0x0800000, "cg", 0 )
|
||||
@ -353,8 +353,8 @@ ROM_END
|
||||
|
||||
ROM_START( gkkey )
|
||||
ROM_REGION( 0x80000, "maincpu", 0 )
|
||||
ROM_LOAD( "KEY00017 (1-4002).bin", 0x00000, 0x80000, CRC(1579739f) SHA1(7b6257d17f74599a4ada3014d02a2e7c6686ab3f) )
|
||||
ROM_LOAD( "KEY00028 (1-4002).bin", 0x00000, 0x80000, CRC(bf06b98b) SHA1(5c46afb560bb5c0f7540b714c0dea851c6b18fe6) )
|
||||
ROM_LOAD( "KEY00017 (1-4002).bin", 0x00000, 0x80000, CRC(1579739f) SHA1(7b6257d17f74599a4ada3014d02a2e7c6686ab3f) )
|
||||
ROM_LOAD( "KEY00028 (1-4002).bin", 0x00000, 0x80000, CRC(bf06b98b) SHA1(5c46afb560bb5c0f7540b714c0dea851c6b18fe6) )
|
||||
|
||||
ROM_REGION( 0x80000, "miscbad", 0 )
|
||||
// these are also bad dumps, again they never contains the byte value 0x0d (uploaded in ASCII mode with carriage return stripped out?)
|
||||
@ -377,4 +377,3 @@ GAME( 2003, gkigtez, gkigt4, igt_gameking, igt_gameking, driver_device,
|
||||
GAME( 2003, gkigt5p, gkigt4, igt_gameking, igt_gameking, driver_device, 0, ROT0, "IGT", "Game King (Triple-Five Play)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
|
||||
GAME( 2003, igtsc, 0, igt_gameking, igt_gameking, driver_device, 0, ROT0, "IGT", "Super Cherry", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // SIMM dumps are bad.
|
||||
GAME( 2003, gkkey, 0, igt_gameking, igt_gameking, driver_device, 0, ROT0, "IGT", "Game King (Set Chips)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // only 2 are good dumps
|
||||
|
||||
|
@ -156,7 +156,7 @@ static INPUT_PORTS_START(hp9845b)
|
||||
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP+") // KP +
|
||||
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP,") // KP ,
|
||||
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP.") // KP .
|
||||
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP0") // KP 0
|
||||
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP0") // KP 0
|
||||
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F12) PORT_NAME("Execute") // Execute
|
||||
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F11) PORT_NAME("Cont") // Cont
|
||||
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // Right
|
||||
@ -261,7 +261,7 @@ static INPUT_PORTS_START(hp9845b)
|
||||
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K12") // K12
|
||||
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K11") // K11
|
||||
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K10") // K10
|
||||
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K9") // K9
|
||||
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K9") // K9
|
||||
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K8") // K8
|
||||
PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') // 0
|
||||
PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') // 8
|
||||
@ -270,12 +270,12 @@ static INPUT_PORTS_START(hp9845b)
|
||||
PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') // 2
|
||||
PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') // Tab
|
||||
PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Tab clr") // Tab clr
|
||||
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Step") // Step
|
||||
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Step") // Step
|
||||
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_NAME("K7") // K7
|
||||
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_NAME("K6") // K6
|
||||
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_NAME("K5") // K5
|
||||
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("K4") // K4
|
||||
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("K3") // K3
|
||||
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("K4") // K4
|
||||
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("K3") // K3
|
||||
PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_NAME("K2") // K2
|
||||
PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_NAME("K1") // K1
|
||||
PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_NAME("K0") // K0
|
||||
@ -621,12 +621,12 @@ static MACHINE_CONFIG_START( hp9835a, hp9845_state )
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static ADDRESS_MAP_START(global_mem_map , AS_PROGRAM , 16 , hp9845b_state)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x3f7fff)
|
||||
ADDRESS_MAP_UNMAP_LOW
|
||||
AM_RANGE(0x000000 , 0x007fff) AM_RAM AM_SHARE("lpu_ram")
|
||||
AM_RANGE(0x014000 , 0x017fff) AM_RAM AM_SHARE("ppu_ram")
|
||||
AM_RANGE(0x030000 , 0x037fff) AM_ROM AM_REGION("lpu" , 0)
|
||||
AM_RANGE(0x050000 , 0x057fff) AM_ROM AM_REGION("ppu" , 0)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x3f7fff)
|
||||
ADDRESS_MAP_UNMAP_LOW
|
||||
AM_RANGE(0x000000 , 0x007fff) AM_RAM AM_SHARE("lpu_ram")
|
||||
AM_RANGE(0x014000 , 0x017fff) AM_RAM AM_SHARE("ppu_ram")
|
||||
AM_RANGE(0x030000 , 0x037fff) AM_ROM AM_REGION("lpu" , 0)
|
||||
AM_RANGE(0x050000 , 0x057fff) AM_ROM AM_REGION("ppu" , 0)
|
||||
//AM_RANGE(0x250000 , 0x251fff) AM_ROM AM_REGION("test_rom" , 0)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
@ -862,7 +862,7 @@ static MACHINE_CONFIG_START( jpmimpct, jpmimpct_state )
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(jpmimpct_state,jpmimpct)
|
||||
|
||||
|
||||
MCFG_DEVICE_ADD("meters", METERS, 0)
|
||||
MCFG_METERS_NUMBER(5)
|
||||
MACHINE_CONFIG_END
|
||||
@ -1339,7 +1339,7 @@ MACHINE_CONFIG_START( impctawp, jpmimpct_state )
|
||||
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(jpmimpct_state, reel4_optic_cb))
|
||||
MCFG_STARPOINT_48STEP_ADD("reel5")
|
||||
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(jpmimpct_state, reel5_optic_cb))
|
||||
|
||||
|
||||
MCFG_DEVICE_ADD("meters", METERS, 0)
|
||||
MCFG_METERS_NUMBER(5)
|
||||
|
||||
|
@ -169,9 +169,9 @@ static MACHINE_CONFIG_START( jpmmps, jpmmps_state )
|
||||
|
||||
MCFG_SOUND_ADD("sn", SN76489, SOUND_CLOCK)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
|
||||
|
||||
|
||||
MCFG_DEVICE_ADD("meters", METERS, 0)
|
||||
MCFG_METERS_NUMBER(9) // TODO: meters.cpp sets a max of 8
|
||||
MCFG_METERS_NUMBER(9) // TODO: meters.cpp sets a max of 8
|
||||
|
||||
MCFG_DEFAULT_LAYOUT(layout_jpmmps)
|
||||
MACHINE_CONFIG_END
|
||||
|
@ -473,7 +473,7 @@ WRITE_LINE_MEMBER(jpmsys5_state::pia_irq)
|
||||
READ8_MEMBER(jpmsys5_state::u29_porta_r)
|
||||
{
|
||||
int meter_bit =0;
|
||||
|
||||
|
||||
if (m_meters != nullptr)
|
||||
{
|
||||
int combined_meter = m_meters->GetActivity(0) | m_meters->GetActivity(1) |
|
||||
@ -492,7 +492,7 @@ READ8_MEMBER(jpmsys5_state::u29_porta_r)
|
||||
|
||||
return m_direct_port->read() | meter_bit;
|
||||
}
|
||||
|
||||
|
||||
else
|
||||
return m_direct_port->read() | meter_bit;
|
||||
}
|
||||
@ -880,7 +880,7 @@ MACHINE_CONFIG_START( jpmsys5_ym, jpmsys5_state )
|
||||
MCFG_PTM6840_OUT0_CB(WRITE8(jpmsys5_state, u26_o1_callback))
|
||||
MCFG_PTM6840_IRQ_CB(WRITELINE(jpmsys5_state, ptm_irq))
|
||||
MCFG_DEFAULT_LAYOUT(layout_jpmsys5)
|
||||
|
||||
|
||||
MCFG_DEVICE_ADD("meters", METERS, 0)
|
||||
MCFG_METERS_NUMBER(8)
|
||||
MACHINE_CONFIG_END
|
||||
@ -933,7 +933,7 @@ MACHINE_CONFIG_START( jpmsys5, jpmsys5_state )
|
||||
MCFG_PTM6840_OUT0_CB(WRITE8(jpmsys5_state, u26_o1_callback))
|
||||
MCFG_PTM6840_IRQ_CB(WRITELINE(jpmsys5_state, ptm_irq))
|
||||
MCFG_DEFAULT_LAYOUT(layout_jpmsys5)
|
||||
|
||||
|
||||
MCFG_DEVICE_ADD("meters", METERS, 0)
|
||||
MCFG_METERS_NUMBER(8)
|
||||
MACHINE_CONFIG_END
|
||||
|
@ -785,7 +785,7 @@ WRITE8_MEMBER(kaneko16_state::wingforc_oki_bank_w)
|
||||
|
||||
static ADDRESS_MAP_START( wingforc_soundport, AS_IO, 8, kaneko16_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
// AM_RANGE(0x00, 0x00) // 02 written at boot
|
||||
// AM_RANGE(0x00, 0x00) // 02 written at boot
|
||||
AM_RANGE(0x02, 0x03) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
|
||||
AM_RANGE(0x06, 0x06) AM_READ(soundlatch_byte_r)
|
||||
AM_RANGE(0x0a, 0x0a) AM_DEVREADWRITE("oki", okim6295_device, read, write)
|
||||
@ -1143,8 +1143,8 @@ static INPUT_PORTS_START( wingforc )
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_SERVICE_NO_TOGGLE( 0x2000, IP_ACTIVE_LOW ) // unused
|
||||
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_TILT ) // unused
|
||||
PORT_SERVICE_NO_TOGGLE( 0x2000, IP_ACTIVE_LOW ) // unused
|
||||
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_TILT ) // unused
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE1 )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
@ -158,7 +158,7 @@ void liberatr_state::machine_reset()
|
||||
// reset the control latch on the EAROM
|
||||
m_earom->set_control(0, 1, 1, 0, 0);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
|
@ -1,7 +1,7 @@
|
||||
// license:GPL2+
|
||||
// copyright-holders:Felipe Sanches
|
||||
/*************************************************************************
|
||||
|
||||
|
||||
This is a driver for a gambling board with a yet unknown name.
|
||||
The PCB is labeled with: WU- MARY-1A
|
||||
And there's a text string in the ROM that says: "Music by: SunKiss Chen"
|
||||
@ -25,192 +25,192 @@
|
||||
class marywu_state : public driver_device
|
||||
{
|
||||
public:
|
||||
marywu_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
{ }
|
||||
marywu_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
DECLARE_WRITE8_MEMBER(display_7seg_data_w);
|
||||
DECLARE_WRITE8_MEMBER(multiplex_7seg_w);
|
||||
DECLARE_WRITE8_MEMBER(ay1_port_a_w);
|
||||
DECLARE_WRITE8_MEMBER(ay1_port_b_w);
|
||||
DECLARE_WRITE8_MEMBER(ay2_port_a_w);
|
||||
DECLARE_WRITE8_MEMBER(ay2_port_b_w);
|
||||
DECLARE_READ8_MEMBER(keyboard_r);
|
||||
DECLARE_READ8_MEMBER(port_r);
|
||||
DECLARE_WRITE8_MEMBER(display_7seg_data_w);
|
||||
DECLARE_WRITE8_MEMBER(multiplex_7seg_w);
|
||||
DECLARE_WRITE8_MEMBER(ay1_port_a_w);
|
||||
DECLARE_WRITE8_MEMBER(ay1_port_b_w);
|
||||
DECLARE_WRITE8_MEMBER(ay2_port_a_w);
|
||||
DECLARE_WRITE8_MEMBER(ay2_port_b_w);
|
||||
DECLARE_READ8_MEMBER(keyboard_r);
|
||||
DECLARE_READ8_MEMBER(port_r);
|
||||
private:
|
||||
uint8_t m_selected_7seg_module;
|
||||
uint8_t m_selected_7seg_module;
|
||||
};
|
||||
|
||||
static INPUT_PORTS_START( marywu )
|
||||
PORT_START("KEYS1")
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_1)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_2)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_3)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_4)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_5)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_6)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_7)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_8)
|
||||
PORT_START("KEYS1")
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_1)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_2)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_3)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_4)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_5)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_6)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_7)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_8)
|
||||
|
||||
PORT_START("KEYS2")
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_W)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_E)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_R)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_T)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_U)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_I)
|
||||
PORT_START("KEYS2")
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_W)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_E)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_R)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_T)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_U)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_I)
|
||||
|
||||
PORT_START("DSW")
|
||||
PORT_DIPNAME( 0x01, 0x01, "Unknown bit #0" ) PORT_DIPLOCATION("DSW:0")
|
||||
PORT_DIPSETTING(0x01, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "Unknown bit #1" ) PORT_DIPLOCATION("DSW:1")
|
||||
PORT_DIPSETTING(0x02, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "Unknown bit #2" ) PORT_DIPLOCATION("DSW:2")
|
||||
PORT_DIPSETTING(0x04, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "Unknown bit #3" ) PORT_DIPLOCATION("DSW:3")
|
||||
PORT_DIPSETTING(0x08, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "Unknown bit #4" ) PORT_DIPLOCATION("DSW:4")
|
||||
PORT_DIPSETTING(0x10, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "Unknown bit #5" ) PORT_DIPLOCATION("DSW:5")
|
||||
PORT_DIPSETTING(0x20, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "Unknown bit #6" ) PORT_DIPLOCATION("DSW:6")
|
||||
PORT_DIPSETTING(0x40, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "Unknown bit #7" ) PORT_DIPLOCATION("DSW:7")
|
||||
PORT_DIPSETTING(0x80, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_START("DSW")
|
||||
PORT_DIPNAME( 0x01, 0x01, "Unknown bit #0" ) PORT_DIPLOCATION("DSW:0")
|
||||
PORT_DIPSETTING(0x01, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "Unknown bit #1" ) PORT_DIPLOCATION("DSW:1")
|
||||
PORT_DIPSETTING(0x02, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "Unknown bit #2" ) PORT_DIPLOCATION("DSW:2")
|
||||
PORT_DIPSETTING(0x04, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "Unknown bit #3" ) PORT_DIPLOCATION("DSW:3")
|
||||
PORT_DIPSETTING(0x08, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "Unknown bit #4" ) PORT_DIPLOCATION("DSW:4")
|
||||
PORT_DIPSETTING(0x10, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "Unknown bit #5" ) PORT_DIPLOCATION("DSW:5")
|
||||
PORT_DIPSETTING(0x20, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "Unknown bit #6" ) PORT_DIPLOCATION("DSW:6")
|
||||
PORT_DIPSETTING(0x40, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "Unknown bit #7" ) PORT_DIPLOCATION("DSW:7")
|
||||
PORT_DIPSETTING(0x80, DEF_STR( On ) )
|
||||
PORT_DIPSETTING(0x00, DEF_STR( Off ) )
|
||||
|
||||
PORT_START("PUSHBUTTONS")
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_A)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_S)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_D)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F)
|
||||
PORT_START("PUSHBUTTONS")
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_A)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_S)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_D)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F)
|
||||
INPUT_PORTS_END
|
||||
|
||||
WRITE8_MEMBER( marywu_state::ay1_port_a_w )
|
||||
{
|
||||
for (uint8_t i=0; i<8; i++){
|
||||
output().set_led_value(i, (data & (1 << i)) ? 1 : 0);
|
||||
}
|
||||
for (uint8_t i=0; i<8; i++){
|
||||
output().set_led_value(i, (data & (1 << i)) ? 1 : 0);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( marywu_state::ay1_port_b_w )
|
||||
{
|
||||
for (uint8_t i=0; i<8; i++){
|
||||
output().set_led_value(i+8, (data & (1 << i)) ? 1 : 0);
|
||||
}
|
||||
for (uint8_t i=0; i<8; i++){
|
||||
output().set_led_value(i+8, (data & (1 << i)) ? 1 : 0);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( marywu_state::ay2_port_a_w )
|
||||
{
|
||||
for (uint8_t i=0; i<8; i++){
|
||||
output().set_led_value(i+16, (data & (1 << i)) ? 1 : 0);
|
||||
}
|
||||
for (uint8_t i=0; i<8; i++){
|
||||
output().set_led_value(i+16, (data & (1 << i)) ? 1 : 0);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( marywu_state::ay2_port_b_w )
|
||||
{
|
||||
for (uint8_t i=0; i<6; i++){
|
||||
/* we only have 30 LEDs. The last 2 bits in this port are unused. */
|
||||
output().set_led_value(i+24, (data & (1 << i)) ? 1 : 0);
|
||||
}
|
||||
for (uint8_t i=0; i<6; i++){
|
||||
/* we only have 30 LEDs. The last 2 bits in this port are unused. */
|
||||
output().set_led_value(i+24, (data & (1 << i)) ? 1 : 0);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( marywu_state::multiplex_7seg_w )
|
||||
{
|
||||
m_selected_7seg_module = data;
|
||||
m_selected_7seg_module = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( marywu_state::port_r )
|
||||
{
|
||||
//TODO: figure out what each bit is mapped to in the 80c31 ports P1 and P3
|
||||
switch(offset){
|
||||
//case 1:
|
||||
// return (1 << 6);
|
||||
switch(offset){
|
||||
//case 1:
|
||||
// return (1 << 6);
|
||||
default:
|
||||
return 0x00;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER( marywu_state::keyboard_r )
|
||||
{
|
||||
switch(m_selected_7seg_module % 8){
|
||||
switch(m_selected_7seg_module % 8){
|
||||
case 0: return ioport("KEYS1")->read();
|
||||
case 1: return ioport("KEYS2")->read();
|
||||
case 2: return ioport("DSW")->read();
|
||||
case 3: return ioport("PUSHBUTTONS")->read();
|
||||
case 1: return ioport("KEYS2")->read();
|
||||
case 2: return ioport("DSW")->read();
|
||||
case 3: return ioport("PUSHBUTTONS")->read();
|
||||
default:
|
||||
return 0x00;
|
||||
}
|
||||
return 0x00;
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( marywu_state::display_7seg_data_w )
|
||||
{
|
||||
static const UINT8 patterns[16] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7c, 0x07, 0x7f, 0x67, 0, 0, 0, 0, 0, 0 }; // HEF4511BP (7 seg display driver)
|
||||
static const UINT8 patterns[16] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7c, 0x07, 0x7f, 0x67, 0, 0, 0, 0, 0, 0 }; // HEF4511BP (7 seg display driver)
|
||||
|
||||
output().set_digit_value(2 * m_selected_7seg_module + 0, patterns[data & 0x0F]);
|
||||
output().set_digit_value(2 * m_selected_7seg_module + 1, patterns[(data >> 4) & 0x0F]);
|
||||
output().set_digit_value(2 * m_selected_7seg_module + 0, patterns[data & 0x0F]);
|
||||
output().set_digit_value(2 * m_selected_7seg_module + 1, patterns[(data >> 4) & 0x0F]);
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( program_map, AS_PROGRAM, 8, marywu_state )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
||||
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( io_map, AS_IO, 8, marywu_state )
|
||||
AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x0100) AM_RAM /* HM6116: 2kbytes of Static RAM */
|
||||
AM_RANGE(0xb000, 0xb000) AM_MIRROR(0x0ffe) AM_DEVREADWRITE("i8279", i8279_device, data_r, data_w)
|
||||
AM_RANGE(0xb001, 0xb001) AM_MIRROR(0x0ffe) AM_DEVREADWRITE("i8279", i8279_device, status_r, cmd_w)
|
||||
AM_RANGE(0x9000, 0x9000) AM_MIRROR(0x0ffc) AM_DEVWRITE("ay1", ay8910_device, data_address_w)
|
||||
AM_RANGE(0x9001, 0x9001) AM_MIRROR(0x0ffc) AM_DEVREADWRITE("ay1", ay8910_device, data_r, data_w)
|
||||
AM_RANGE(0x9002, 0x9002) AM_MIRROR(0x0ffc) AM_DEVWRITE("ay2", ay8910_device, data_address_w)
|
||||
AM_RANGE(0x9003, 0x9003) AM_MIRROR(0x0ffc) AM_DEVREADWRITE("ay2", ay8910_device, data_r, data_w)
|
||||
AM_RANGE(0xf000, 0xf000) AM_NOP /* TODO: Investigate this. There's something going on at this address range. */
|
||||
AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P3) AM_READ(port_r)
|
||||
AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x0100) AM_RAM /* HM6116: 2kbytes of Static RAM */
|
||||
AM_RANGE(0xb000, 0xb000) AM_MIRROR(0x0ffe) AM_DEVREADWRITE("i8279", i8279_device, data_r, data_w)
|
||||
AM_RANGE(0xb001, 0xb001) AM_MIRROR(0x0ffe) AM_DEVREADWRITE("i8279", i8279_device, status_r, cmd_w)
|
||||
AM_RANGE(0x9000, 0x9000) AM_MIRROR(0x0ffc) AM_DEVWRITE("ay1", ay8910_device, data_address_w)
|
||||
AM_RANGE(0x9001, 0x9001) AM_MIRROR(0x0ffc) AM_DEVREADWRITE("ay1", ay8910_device, data_r, data_w)
|
||||
AM_RANGE(0x9002, 0x9002) AM_MIRROR(0x0ffc) AM_DEVWRITE("ay2", ay8910_device, data_address_w)
|
||||
AM_RANGE(0x9003, 0x9003) AM_MIRROR(0x0ffc) AM_DEVREADWRITE("ay2", ay8910_device, data_r, data_w)
|
||||
AM_RANGE(0xf000, 0xf000) AM_NOP /* TODO: Investigate this. There's something going on at this address range. */
|
||||
AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P3) AM_READ(port_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static MACHINE_CONFIG_START( marywu , marywu_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", I80C31, XTAL_10_738635MHz) //actual CPU is a Winbond w78c31b-24
|
||||
MCFG_CPU_PROGRAM_MAP(program_map)
|
||||
MCFG_CPU_IO_MAP(io_map)
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", I80C31, XTAL_10_738635MHz) //actual CPU is a Winbond w78c31b-24
|
||||
MCFG_CPU_PROGRAM_MAP(program_map)
|
||||
MCFG_CPU_IO_MAP(io_map)
|
||||
|
||||
/* Keyboard & display interface */
|
||||
MCFG_DEVICE_ADD("i8279", I8279, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
|
||||
MCFG_I8279_OUT_SL_CB(WRITE8(marywu_state, multiplex_7seg_w)) // select block of 7seg modules by multiplexing the SL scan lines
|
||||
MCFG_I8279_IN_RL_CB(READ8(marywu_state, keyboard_r)) // keyboard Return Lines
|
||||
MCFG_I8279_OUT_DISP_CB(WRITE8(marywu_state, display_7seg_data_w))
|
||||
/* Keyboard & display interface */
|
||||
MCFG_DEVICE_ADD("i8279", I8279, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
|
||||
MCFG_I8279_OUT_SL_CB(WRITE8(marywu_state, multiplex_7seg_w)) // select block of 7seg modules by multiplexing the SL scan lines
|
||||
MCFG_I8279_IN_RL_CB(READ8(marywu_state, keyboard_r)) // keyboard Return Lines
|
||||
MCFG_I8279_OUT_DISP_CB(WRITE8(marywu_state, display_7seg_data_w))
|
||||
|
||||
/* Video */
|
||||
MCFG_DEFAULT_LAYOUT(layout_marywu)
|
||||
/* Video */
|
||||
MCFG_DEFAULT_LAYOUT(layout_marywu)
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
MCFG_SOUND_ADD("ay1", AY8910, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(marywu_state, ay1_port_a_w))
|
||||
MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(marywu_state, ay1_port_b_w))
|
||||
|
||||
MCFG_SOUND_ADD("ay2", AY8910, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(marywu_state, ay2_port_a_w))
|
||||
MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(marywu_state, ay2_port_b_w))
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
MCFG_SOUND_ADD("ay1", AY8910, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(marywu_state, ay1_port_a_w))
|
||||
MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(marywu_state, ay1_port_b_w))
|
||||
|
||||
MCFG_SOUND_ADD("ay2", AY8910, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(marywu_state, ay2_port_a_w))
|
||||
MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(marywu_state, ay2_port_b_w))
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
ROM_START( marywu )
|
||||
ROM_REGION( 0x8000, "maincpu", 0 )
|
||||
ROM_LOAD( "marywu_sunkiss_chen.rom", 0x0000, 0x8000, CRC(11f67c7d) SHA1(9c1fd1a5cc6e2b0d675f0217aa8ff21c30609a0c) )
|
||||
ROM_LOAD( "marywu_sunkiss_chen.rom", 0x0000, 0x8000, CRC(11f67c7d) SHA1(9c1fd1a5cc6e2b0d675f0217aa8ff21c30609a0c) )
|
||||
ROM_END
|
||||
|
||||
/* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS */
|
||||
|
@ -199,7 +199,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(megasys1_state::megasys1A_iganinju_scanline)
|
||||
int scanline = param;
|
||||
|
||||
// TODO: there's more than one hint that MCU controls IRQ signals via work RAM buffers.
|
||||
// This is a bare miminum guessing for this specific game, it definitely don't like neither lv 1 nor 2.
|
||||
// This is a bare miminum guessing for this specific game, it definitely don't like neither lv 1 nor 2.
|
||||
// Of course MCU is probably doing a lot more to mask and probably set a specific line too.
|
||||
if(m_ram[0] == 0)
|
||||
return;
|
||||
|
@ -5066,22 +5066,22 @@ Notes:
|
||||
***************************************************************************/
|
||||
|
||||
ROM_START( karatour )
|
||||
ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 Code */
|
||||
ROM_LOAD16_BYTE( "2.2FAB.8G", 0x000000, 0x040000, CRC(199a28d4) SHA1(ae880b5d5a1703c54e0ef27015039c7bb05eb185) ) // Hand-written label "(2) 2FAB"
|
||||
ROM_LOAD16_BYTE( "3.0560.10G", 0x000001, 0x040000, CRC(b054e683) SHA1(51e28a99f87684f3e56c7a168523f94717903d79) ) // Hand-written label "(3) 0560"
|
||||
ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 Code */
|
||||
ROM_LOAD16_BYTE( "2.2FAB.8G", 0x000000, 0x040000, CRC(199a28d4) SHA1(ae880b5d5a1703c54e0ef27015039c7bb05eb185) ) // Hand-written label "(2) 2FAB"
|
||||
ROM_LOAD16_BYTE( "3.0560.10G", 0x000001, 0x040000, CRC(b054e683) SHA1(51e28a99f87684f3e56c7a168523f94717903d79) ) // Hand-written label "(3) 0560"
|
||||
|
||||
ROM_REGION( 0x02c000, "audiocpu", 0 ) /* NEC78C10 Code */
|
||||
ROM_LOAD( "KT001.1I", 0x000000, 0x004000, CRC(1dd2008c) SHA1(488b6f5d15bdbc069ee2cd6d7a0980a228d2f790) ) // 11xxxxxxxxxxxxxxx = 0xFF
|
||||
ROM_CONTINUE( 0x010000, 0x01c000 )
|
||||
ROM_REGION( 0x02c000, "audiocpu", 0 ) /* NEC78C10 Code */
|
||||
ROM_LOAD( "KT001.1I", 0x000000, 0x004000, CRC(1dd2008c) SHA1(488b6f5d15bdbc069ee2cd6d7a0980a228d2f790) ) // 11xxxxxxxxxxxxxxx = 0xFF
|
||||
ROM_CONTINUE( 0x010000, 0x01c000 )
|
||||
|
||||
ROM_REGION( 0x400000, "gfx1", 0 ) /* Gfx + Data (Addressable by CPU & Blitter) */
|
||||
ROMX_LOAD( "361A04.15F", 0x000000, 0x100000, CRC(f6bf20a5) SHA1(cb4cb249eb1c106fe7ef0ace735c0cc3106f1ab7) , ROM_GROUPWORD | ROM_SKIP(6))
|
||||
ROMX_LOAD( "361A07.17D", 0x000002, 0x100000, CRC(794cc1c0) SHA1(ecfdec5874a95846c0fb7966fdd1da625d85531f) , ROM_GROUPWORD | ROM_SKIP(6))
|
||||
ROMX_LOAD( "361A05.17F", 0x000004, 0x100000, CRC(ea9c11fc) SHA1(176c4419cfe13ff019654a93cd7b0befa238bbc3) , ROM_GROUPWORD | ROM_SKIP(6))
|
||||
ROMX_LOAD( "361A06.15D", 0x000006, 0x100000, CRC(7e15f058) SHA1(267f0a5acb874d4fff3556ffa405e24724174667) , ROM_GROUPWORD | ROM_SKIP(6))
|
||||
ROM_REGION( 0x400000, "gfx1", 0 ) /* Gfx + Data (Addressable by CPU & Blitter) */
|
||||
ROMX_LOAD( "361A04.15F", 0x000000, 0x100000, CRC(f6bf20a5) SHA1(cb4cb249eb1c106fe7ef0ace735c0cc3106f1ab7) , ROM_GROUPWORD | ROM_SKIP(6))
|
||||
ROMX_LOAD( "361A07.17D", 0x000002, 0x100000, CRC(794cc1c0) SHA1(ecfdec5874a95846c0fb7966fdd1da625d85531f) , ROM_GROUPWORD | ROM_SKIP(6))
|
||||
ROMX_LOAD( "361A05.17F", 0x000004, 0x100000, CRC(ea9c11fc) SHA1(176c4419cfe13ff019654a93cd7b0befa238bbc3) , ROM_GROUPWORD | ROM_SKIP(6))
|
||||
ROMX_LOAD( "361A06.15D", 0x000006, 0x100000, CRC(7e15f058) SHA1(267f0a5acb874d4fff3556ffa405e24724174667) , ROM_GROUPWORD | ROM_SKIP(6))
|
||||
|
||||
ROM_REGION( 0x040000, "oki", 0 ) /* Samples */
|
||||
ROM_LOAD( "8.4A06.1D", 0x000000, 0x040000, CRC(8d208179) SHA1(54a27ef155828435bc5eba60790a8584274c8b4a) ) // Hand-written label "(8) 4A06"
|
||||
ROM_REGION( 0x040000, "oki", 0 ) /* Samples */
|
||||
ROM_LOAD( "8.4A06.1D", 0x000000, 0x040000, CRC(8d208179) SHA1(54a27ef155828435bc5eba60790a8584274c8b4a) ) // Hand-written label "(8) 4A06"
|
||||
ROM_END
|
||||
|
||||
ROM_START( karatourj )
|
||||
|
@ -856,7 +856,7 @@ static MACHINE_CONFIG_START( mpu3base, mpu3_state )
|
||||
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu3_state, reel2_optic_cb))
|
||||
MCFG_MPU3_REEL_ADD("reel3")
|
||||
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu3_state, reel3_optic_cb))
|
||||
|
||||
|
||||
MCFG_DEVICE_ADD("meters", METERS, 0)
|
||||
MCFG_METERS_NUMBER(8)
|
||||
|
||||
|
@ -2634,7 +2634,7 @@ MACHINE_CONFIG_FRAGMENT( mpu4_common )
|
||||
MCFG_PIA_CB2_HANDLER(WRITELINE(mpu4_state, pia_ic8_cb2_w))
|
||||
MCFG_PIA_IRQA_HANDLER(WRITELINE(mpu4_state, cpu0_irq))
|
||||
MCFG_PIA_IRQB_HANDLER(WRITELINE(mpu4_state, cpu0_irq))
|
||||
|
||||
|
||||
MCFG_DEVICE_ADD("meters", METERS, 0)
|
||||
MCFG_METERS_NUMBER(8)
|
||||
|
||||
|
@ -1861,10 +1861,10 @@ READ64_MEMBER(naomi_state::aw_modem_r )
|
||||
if (reg == 0x280/4)
|
||||
{
|
||||
/*
|
||||
0x00600280 r 0000dcba
|
||||
a/b/c/d - coin inputs 1-4, active low
|
||||
(ab == 0) -> BIOS skip RAM test
|
||||
*/
|
||||
0x00600280 r 0000dcba
|
||||
a/b/c/d - coin inputs 1-4, active low
|
||||
(ab == 0) -> BIOS skip RAM test
|
||||
*/
|
||||
return U64(0xffffffff00000000) | (ioport("COINS")->read() & 0x0F);
|
||||
} else
|
||||
if (reg == 0x284/4)
|
||||
@ -1888,20 +1888,20 @@ WRITE64_MEMBER(naomi_state::aw_modem_w )
|
||||
aw_ctrl_type = dat & 0xF0;
|
||||
}
|
||||
/*
|
||||
0x00600284 rw ddcc0000
|
||||
cc/dd - set type of Maple devices at ports 2/3 (EX. IO board)
|
||||
0 - regular Atomiswave controller
|
||||
1 - DC lightgun
|
||||
2 - DC mouse/trackball
|
||||
TODO: hook this then MAME have such devices emulated
|
||||
0x00600284 rw ddcc0000
|
||||
cc/dd - set type of Maple devices at ports 2/3 (EX. IO board)
|
||||
0 - regular Atomiswave controller
|
||||
1 - DC lightgun
|
||||
2 - DC mouse/trackball
|
||||
TODO: hook this then MAME have such devices emulated
|
||||
|
||||
0x00600288 rw 0000dcba
|
||||
a - 1P coin couner
|
||||
b - 2P coin couner
|
||||
c - 1P coin lockout
|
||||
d - 2P coin lockout
|
||||
0x00600288 rw 0000dcba
|
||||
a - 1P coin couner
|
||||
b - 2P coin couner
|
||||
c - 1P coin lockout
|
||||
d - 2P coin lockout
|
||||
|
||||
0x0060028C rw POUT CN304 (EX. IO board)
|
||||
0x0060028C rw POUT CN304 (EX. IO board)
|
||||
*/
|
||||
|
||||
osd_printf_verbose("MODEM: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x600000+reg*4, dat, data, offset, mem_mask);
|
||||
|
@ -308,12 +308,12 @@
|
||||
MVS CHA:
|
||||
GIGA CHAR Board 1.0 Rev. A
|
||||
GIGA CHAR Board 1.5 Rev. 0
|
||||
GIGA CHAR Board 1.5 Rev. C
|
||||
GIGA CHAR Board 1.5 Rev. C
|
||||
|
||||
MVS PROG:
|
||||
GIGA PROG Board 1.0 Rev. B
|
||||
GIGA PROG Board 1.5 Rev. A
|
||||
GIGA PROG Board 1.5 Rev. C
|
||||
GIGA PROG Board 1.5 Rev. C
|
||||
|
||||
|
||||
Unofficial pcb's from NEOBITZ:
|
||||
|
@ -3329,7 +3329,7 @@ ROM_START( pbobblen ) /* MVS ONLY RELEASE */
|
||||
NEO_SFIX_128K( "d96-04.s1", CRC(9caae538) SHA1(cf2d90a7c1a42107c0bb8b9a61397634286dbe0a) ) /* mask rom TC531000 */
|
||||
|
||||
NEO_BIOS_AUDIO_128K( "d96-06.m1", CRC(f424368a) SHA1(5e5bbcaeb82bed2ee17df08f005ca20ad1030723) ) /* M27C1001 */
|
||||
/* M1 on eprom with sticker; label is D96-06 */
|
||||
/* M1 on eprom with sticker; label is D96-06 */
|
||||
|
||||
ROM_REGION( 0x380000, "ymsnd", 0 )
|
||||
ROM_LOAD( "068-v1.v1", 0x000000, 0x100000, CRC(2ced86df) SHA1(d6b73d1f31efbd74fb745200d4dade5f80b71541) ) /* unused */ /* mask rom TC538200 */
|
||||
@ -4601,7 +4601,7 @@ ROM_END
|
||||
. NGM-222
|
||||
NEO-MVS PROGBK1 / NEO-MVS CHA256B
|
||||
NEO-MVS PROGBK1 / NEO-MVS CHA256
|
||||
. NGH-222
|
||||
. NGH-222
|
||||
NEO-AEG PROGBK1Y / NEO-AEG CHA256RY
|
||||
****************************************/
|
||||
|
||||
@ -9610,7 +9610,7 @@ DRIVER_INIT_MEMBER(neogeo_noslot_state,kf2k3pcb)
|
||||
NEOGEO ROM-cart:2004/07/15
|
||||
****************************************************************************/
|
||||
|
||||
/* YEAR NAME PARENT MACHINE INPUT INIT MONITOR */
|
||||
/* YEAR NAME PARENT MACHINE INPUT INIT MONITOR */
|
||||
/* SNK */
|
||||
GAME( 1990, nam1975, neogeo, neogeo_noslot, neogeo, neogeo_state, neogeo, ROT0, "SNK", "NAM-1975 (NGM-001)(NGH-001)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1990, bstars, neogeo, neogeo_noslot, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Baseball Stars Professional (NGM-002)", MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -1,11 +1,11 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Sandro Ronco
|
||||
/*
|
||||
Driver for Nokia phones based on Texas Instrument MAD2WD1 (ARM7TDMI + DSP)
|
||||
Driver for Nokia phones based on Texas Instrument MAD2WD1 (ARM7TDMI + DSP)
|
||||
|
||||
Driver based on documentations found here:
|
||||
http://nokix.sourceforge.net/help/blacksphere/sub_050main.htm
|
||||
http://tudor.rdslink.ro/MADos/
|
||||
Driver based on documentations found here:
|
||||
http://nokix.sourceforge.net/help/blacksphere/sub_050main.htm
|
||||
http://tudor.rdslink.ro/MADos/
|
||||
|
||||
*/
|
||||
|
||||
@ -19,8 +19,8 @@
|
||||
#include "debugger.h"
|
||||
|
||||
|
||||
#define LOG_MAD2_REGISTER_ACCESS (0)
|
||||
#define LOG_CCONT_REGISTER_ACCESS (0)
|
||||
#define LOG_MAD2_REGISTER_ACCESS (0)
|
||||
#define LOG_CCONT_REGISTER_ACCESS (0)
|
||||
|
||||
|
||||
class noki3310_state : public driver_device
|
||||
@ -56,8 +56,8 @@ public:
|
||||
TIMER_CALLBACK_MEMBER(timer_watchdog);
|
||||
TIMER_CALLBACK_MEMBER(timer_fiq8);
|
||||
|
||||
DECLARE_READ16_MEMBER(ram_r) { return m_ram[offset] & mem_mask; }
|
||||
DECLARE_WRITE16_MEMBER(ram_w) { COMBINE_DATA(&m_ram[offset]); }
|
||||
DECLARE_READ16_MEMBER(ram_r) { return m_ram[offset] & mem_mask; }
|
||||
DECLARE_WRITE16_MEMBER(ram_w) { COMBINE_DATA(&m_ram[offset]); }
|
||||
DECLARE_READ16_MEMBER(dsp_ram_r);
|
||||
DECLARE_WRITE16_MEMBER(dsp_ram_w);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(key_irq);
|
||||
@ -72,27 +72,27 @@ private:
|
||||
|
||||
std::unique_ptr<UINT16[]> m_ram;
|
||||
std::unique_ptr<UINT16[]> m_dsp_ram;
|
||||
UINT8 m_power_on;
|
||||
UINT16 m_fiq_status;
|
||||
UINT16 m_irq_status;
|
||||
UINT16 m_timer1_counter;
|
||||
UINT16 m_timer0_counter;
|
||||
UINT8 m_power_on;
|
||||
UINT16 m_fiq_status;
|
||||
UINT16 m_irq_status;
|
||||
UINT16 m_timer1_counter;
|
||||
UINT16 m_timer0_counter;
|
||||
|
||||
emu_timer * m_timer0;
|
||||
emu_timer * m_timer1;
|
||||
emu_timer * m_timer_watchdog;
|
||||
emu_timer * m_timer_fiq8;
|
||||
emu_timer * m_timer0;
|
||||
emu_timer * m_timer1;
|
||||
emu_timer * m_timer_watchdog;
|
||||
emu_timer * m_timer_fiq8;
|
||||
|
||||
// CCONT
|
||||
struct nokia_ccont
|
||||
{
|
||||
bool dc;
|
||||
UINT8 cmd;
|
||||
UINT8 watchdog;
|
||||
UINT8 regs[0x10];
|
||||
bool dc;
|
||||
UINT8 cmd;
|
||||
UINT8 watchdog;
|
||||
UINT8 regs[0x10];
|
||||
} m_ccont;
|
||||
|
||||
UINT8 m_mad2_regs[0x100];
|
||||
UINT8 m_mad2_regs[0x100];
|
||||
};
|
||||
|
||||
|
||||
@ -101,87 +101,87 @@ static const char * nokia_mad2_reg_desc(UINT8 offset)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
case 0x00: return "[CTSI] DCT3 ASIC version Primary hardware version (r)";
|
||||
case 0x01: return "[CTSI] MCU reset control register (rw)";
|
||||
case 0x02: return "[CTSI] DSP reset control register (rw)";
|
||||
case 0x03: return "[CTSI] ASIC watchdog write register (w)";
|
||||
case 0x04: return "[CTSI] Sleep clock counter (MSB) (r)";
|
||||
case 0x05: return "[CTSI] Sleep clock counter (LSB) (r)";
|
||||
case 0x06: return "[CTSI] ? (sleep) clock destination (LSB) (r)";
|
||||
case 0x07: return "[CTSI] ? (sleep) clock destination (MSB) (r)";
|
||||
case 0x08: return "[CTSI] FIQ lines active (rw)";
|
||||
case 0x09: return "[CTSI] IRQ lines active (rw)";
|
||||
case 0x0A: return "[CTSI] FIQ lines mask (rw)";
|
||||
case 0x0B: return "[CTSI] IRQ lines mask (rw)";
|
||||
case 0x0C: return "[CTSI] Interrupt control register (rw)";
|
||||
case 0x0D: return "[CTSI] Clock control register (rw)";
|
||||
case 0x0E: return "[CTSI] Interrupt trigger register (r)";
|
||||
case 0x0F: return "[CTSI] Programmable timer clock divider (rw)";
|
||||
case 0x10: return "[CTSI] Programmable timer counter (MSB) (r)";
|
||||
case 0x11: return "[CTSI] Programmable timer counter (LSB) (r)";
|
||||
case 0x12: return "[CTSI] Programmable timer destination (MSB) (rw)";
|
||||
case 0x13: return "[CTSI] Programmable timer destination (LSB) (rw)";
|
||||
case 0x15: return "[PUP] PUP control (rw)";
|
||||
case 0x16: return "[PUP] FIQ 8 (timer?) interrupt control (rw)";
|
||||
case 0x18: return "[PUP] MBUS control (rw)";
|
||||
case 0x19: return "[PUP] MBUS status (rw)";
|
||||
case 0x1A: return "[PUP] MBUS RX/TX (rw)";
|
||||
case 0x1B: return "[PUP] Vibrator (w)";
|
||||
case 0x1C: return "[PUP] Buzzer clock divider (w)";
|
||||
case 0x1E: return "[PUP] Buzzer volume (w)";
|
||||
case 0x20: return "[PUP] McuGenIO signal lines (rw)";
|
||||
case 0x22: return "[PUP] ? (?)";
|
||||
case 0x24: return "[PUP] McuGenIO I/O direction (rw)";
|
||||
case 0x28: return "[UIF/KBGPIO] Keyboard ROW signal lines (rw)";
|
||||
case 0x29: return "[UIF/KBGPIO] Keyboard ROW ?? (rw)";
|
||||
case 0x2A: return "[UIF/KBGPIO] Keyboard COL signal lines (rw)";
|
||||
case 0x2B: return "[UIF/KBGPIO] Keyboard COL ?? (rw)";
|
||||
case 0x2C: return "[UIF/GENSIO] CCont write (w)";
|
||||
case 0x2D: return "[UIF/GENSIO] GENSIO start transaction (w)";
|
||||
case 0x2E: return "[UIF/GENSIO] LCD data write (w)";
|
||||
case 0x32: return "[UIF] CTRL I/O 2 (rw)";
|
||||
case 0x33: return "[UIF] CTRL I/O 3 (rw)";
|
||||
case 0x36: return "[SIMI] SIM UART TxD (w)";
|
||||
case 0x37: return "[SIMI] SIM UART RxD (r)";
|
||||
case 0x38: return "[SIMI] SIM UART Interrupt Identification (r)";
|
||||
case 0x39: return "[SIMI] SIM Control (rw)";
|
||||
case 0x3A: return "[SIMI] SIM Clock Control (rw)";
|
||||
case 0x3B: return "[SIMI] SIM UART TxD Low Water Mark (?)";
|
||||
case 0x3C: return "[SIMI] SIM UART RxD queue fill (r)";
|
||||
case 0x3D: return "[SIMI] SIM RxD flags (?)";
|
||||
case 0x3E: return "[SIMI] SIM TxD flags (?)";
|
||||
case 0x3F: return "[SIMI] SIM UART TxD queue fill (r)";
|
||||
case 0x68: return "[UIF/KBGPIO] Keyboard ROW ?? 2 (rw)";
|
||||
case 0x69: return "[UIF/KBGPIO] Keyboard ROW interrupt (rw)";
|
||||
case 0x6A: return "[UIF/KBGPIO] Keyboard COL ?? 2 (rw)";
|
||||
case 0x6B: return "[UIF/KBGPIO] Keyboard COL interrupt mask (rw)";
|
||||
case 0x6C: return "[UIF/GENSIO] CCont read (r)";
|
||||
case 0x6D: return "[UIF/GENSIO] GENSIO status (r)";
|
||||
case 0x6E: return "[UIF/GENSIO] LCD command write (w)";
|
||||
case 0x6F: return "[UIF/GENSIO] GENSIO ?? (3/SELECT1) (?)";
|
||||
case 0x70: return "[UIF] CTRL I/O 0 I/O direction (1) (rw)";
|
||||
case 0x71: return "[UIF] CTRL I/O 1 I/O direction (1) (rw)";
|
||||
case 0x72: return "[UIF] CTRL I/O 2 I/O direction (1) (rw)";
|
||||
case 0x73: return "[UIF] CTRL I/O 3 I/O direction (1) (rw)";
|
||||
case 0xA8: return "[UIF/KBGPIO] Keyboard ROW I/O direction (rw)";
|
||||
case 0xA9: return "[UIF/KBGPIO] Keyboard ROW ?? 3 (rw)";
|
||||
case 0xAA: return "[UIF/KBGPIO] Keyboard COL I/O direction 0=in 1=out (rw)";
|
||||
case 0xAB: return "[UIF/KBGPIO] Keyboard COL ?? 3 (rw)";
|
||||
case 0xAD: return "[UIF/GENSIO] GENSIO ?? (1/SELECT2) (?)";
|
||||
case 0xAE: return "[UIF/GENSIO] GENSIO ?? (2/SELECT2) (?)";
|
||||
case 0xAF: return "[UIF/GENSIO] GENSIO ?? (3/SELECT2) (?)";
|
||||
case 0xB0: return "[UIF] CTRL I/O 0 I/O direction (2) (rw)";
|
||||
case 0xB1: return "[UIF] CTRL I/O 1 I/O direction (2) (rw)";
|
||||
case 0xB2: return "[UIF] CTRL I/O 2 I/O direction (2) (rw)";
|
||||
case 0xB3: return "[UIF] CTRL I/O 3 I/O direction (2) (rw)";
|
||||
case 0xED: return "[UIF/GENSIO] GENSIO ?? (1/SELECT3) (?)";
|
||||
case 0xEE: return "[UIF/GENSIO] GENSIO ?? (2/SELECT3) (?)";
|
||||
case 0xEF: return "[UIF/GENSIO] GENSIO ?? (3/SELECT3) (?)";
|
||||
case 0xF0: return "[UIF] CTRL I/O 0 input (r)";
|
||||
case 0xF1: return "[UIF] CTRL I/O 1 input (r)";
|
||||
case 0xF2: return "[UIF] CTRL I/O 2 input (r)";
|
||||
case 0xF3: return "[UIF] CTRL I/O 3 input (r)";
|
||||
default: return "<Unknown>";
|
||||
case 0x00: return "[CTSI] DCT3 ASIC version Primary hardware version (r)";
|
||||
case 0x01: return "[CTSI] MCU reset control register (rw)";
|
||||
case 0x02: return "[CTSI] DSP reset control register (rw)";
|
||||
case 0x03: return "[CTSI] ASIC watchdog write register (w)";
|
||||
case 0x04: return "[CTSI] Sleep clock counter (MSB) (r)";
|
||||
case 0x05: return "[CTSI] Sleep clock counter (LSB) (r)";
|
||||
case 0x06: return "[CTSI] ? (sleep) clock destination (LSB) (r)";
|
||||
case 0x07: return "[CTSI] ? (sleep) clock destination (MSB) (r)";
|
||||
case 0x08: return "[CTSI] FIQ lines active (rw)";
|
||||
case 0x09: return "[CTSI] IRQ lines active (rw)";
|
||||
case 0x0A: return "[CTSI] FIQ lines mask (rw)";
|
||||
case 0x0B: return "[CTSI] IRQ lines mask (rw)";
|
||||
case 0x0C: return "[CTSI] Interrupt control register (rw)";
|
||||
case 0x0D: return "[CTSI] Clock control register (rw)";
|
||||
case 0x0E: return "[CTSI] Interrupt trigger register (r)";
|
||||
case 0x0F: return "[CTSI] Programmable timer clock divider (rw)";
|
||||
case 0x10: return "[CTSI] Programmable timer counter (MSB) (r)";
|
||||
case 0x11: return "[CTSI] Programmable timer counter (LSB) (r)";
|
||||
case 0x12: return "[CTSI] Programmable timer destination (MSB) (rw)";
|
||||
case 0x13: return "[CTSI] Programmable timer destination (LSB) (rw)";
|
||||
case 0x15: return "[PUP] PUP control (rw)";
|
||||
case 0x16: return "[PUP] FIQ 8 (timer?) interrupt control (rw)";
|
||||
case 0x18: return "[PUP] MBUS control (rw)";
|
||||
case 0x19: return "[PUP] MBUS status (rw)";
|
||||
case 0x1A: return "[PUP] MBUS RX/TX (rw)";
|
||||
case 0x1B: return "[PUP] Vibrator (w)";
|
||||
case 0x1C: return "[PUP] Buzzer clock divider (w)";
|
||||
case 0x1E: return "[PUP] Buzzer volume (w)";
|
||||
case 0x20: return "[PUP] McuGenIO signal lines (rw)";
|
||||
case 0x22: return "[PUP] ? (?)";
|
||||
case 0x24: return "[PUP] McuGenIO I/O direction (rw)";
|
||||
case 0x28: return "[UIF/KBGPIO] Keyboard ROW signal lines (rw)";
|
||||
case 0x29: return "[UIF/KBGPIO] Keyboard ROW ?? (rw)";
|
||||
case 0x2A: return "[UIF/KBGPIO] Keyboard COL signal lines (rw)";
|
||||
case 0x2B: return "[UIF/KBGPIO] Keyboard COL ?? (rw)";
|
||||
case 0x2C: return "[UIF/GENSIO] CCont write (w)";
|
||||
case 0x2D: return "[UIF/GENSIO] GENSIO start transaction (w)";
|
||||
case 0x2E: return "[UIF/GENSIO] LCD data write (w)";
|
||||
case 0x32: return "[UIF] CTRL I/O 2 (rw)";
|
||||
case 0x33: return "[UIF] CTRL I/O 3 (rw)";
|
||||
case 0x36: return "[SIMI] SIM UART TxD (w)";
|
||||
case 0x37: return "[SIMI] SIM UART RxD (r)";
|
||||
case 0x38: return "[SIMI] SIM UART Interrupt Identification (r)";
|
||||
case 0x39: return "[SIMI] SIM Control (rw)";
|
||||
case 0x3A: return "[SIMI] SIM Clock Control (rw)";
|
||||
case 0x3B: return "[SIMI] SIM UART TxD Low Water Mark (?)";
|
||||
case 0x3C: return "[SIMI] SIM UART RxD queue fill (r)";
|
||||
case 0x3D: return "[SIMI] SIM RxD flags (?)";
|
||||
case 0x3E: return "[SIMI] SIM TxD flags (?)";
|
||||
case 0x3F: return "[SIMI] SIM UART TxD queue fill (r)";
|
||||
case 0x68: return "[UIF/KBGPIO] Keyboard ROW ?? 2 (rw)";
|
||||
case 0x69: return "[UIF/KBGPIO] Keyboard ROW interrupt (rw)";
|
||||
case 0x6A: return "[UIF/KBGPIO] Keyboard COL ?? 2 (rw)";
|
||||
case 0x6B: return "[UIF/KBGPIO] Keyboard COL interrupt mask (rw)";
|
||||
case 0x6C: return "[UIF/GENSIO] CCont read (r)";
|
||||
case 0x6D: return "[UIF/GENSIO] GENSIO status (r)";
|
||||
case 0x6E: return "[UIF/GENSIO] LCD command write (w)";
|
||||
case 0x6F: return "[UIF/GENSIO] GENSIO ?? (3/SELECT1) (?)";
|
||||
case 0x70: return "[UIF] CTRL I/O 0 I/O direction (1) (rw)";
|
||||
case 0x71: return "[UIF] CTRL I/O 1 I/O direction (1) (rw)";
|
||||
case 0x72: return "[UIF] CTRL I/O 2 I/O direction (1) (rw)";
|
||||
case 0x73: return "[UIF] CTRL I/O 3 I/O direction (1) (rw)";
|
||||
case 0xA8: return "[UIF/KBGPIO] Keyboard ROW I/O direction (rw)";
|
||||
case 0xA9: return "[UIF/KBGPIO] Keyboard ROW ?? 3 (rw)";
|
||||
case 0xAA: return "[UIF/KBGPIO] Keyboard COL I/O direction 0=in 1=out (rw)";
|
||||
case 0xAB: return "[UIF/KBGPIO] Keyboard COL ?? 3 (rw)";
|
||||
case 0xAD: return "[UIF/GENSIO] GENSIO ?? (1/SELECT2) (?)";
|
||||
case 0xAE: return "[UIF/GENSIO] GENSIO ?? (2/SELECT2) (?)";
|
||||
case 0xAF: return "[UIF/GENSIO] GENSIO ?? (3/SELECT2) (?)";
|
||||
case 0xB0: return "[UIF] CTRL I/O 0 I/O direction (2) (rw)";
|
||||
case 0xB1: return "[UIF] CTRL I/O 1 I/O direction (2) (rw)";
|
||||
case 0xB2: return "[UIF] CTRL I/O 2 I/O direction (2) (rw)";
|
||||
case 0xB3: return "[UIF] CTRL I/O 3 I/O direction (2) (rw)";
|
||||
case 0xED: return "[UIF/GENSIO] GENSIO ?? (1/SELECT3) (?)";
|
||||
case 0xEE: return "[UIF/GENSIO] GENSIO ?? (2/SELECT3) (?)";
|
||||
case 0xEF: return "[UIF/GENSIO] GENSIO ?? (3/SELECT3) (?)";
|
||||
case 0xF0: return "[UIF] CTRL I/O 0 input (r)";
|
||||
case 0xF1: return "[UIF] CTRL I/O 1 input (r)";
|
||||
case 0xF2: return "[UIF] CTRL I/O 2 input (r)";
|
||||
case 0xF3: return "[UIF] CTRL I/O 3 input (r)";
|
||||
default: return "<Unknown>";
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@ -191,23 +191,23 @@ static const char * nokia_ccont_reg_desc(UINT8 offset)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
case 0x0: return "Control register (w)";
|
||||
case 0x1: return "PWM (charger) (w)";
|
||||
case 0x2: return "A/D read (LSB) (r)";
|
||||
case 0x3: return "A/D read (MSB) (rw)";
|
||||
case 0x4: return "?";
|
||||
case 0x5: return "Watchdog (WDReg) (w)";
|
||||
case 0x6: return "RTC enabled (w)";
|
||||
case 0x7: return "RTC second (rw)";
|
||||
case 0x8: return "RTC minute (r)";
|
||||
case 0x9: return "RTC hour (r)";
|
||||
case 0xA: return "RTC day (rw)";
|
||||
case 0xB: return "RTC alarm minute (rw)";
|
||||
case 0xC: return "RTC alarm hour (rw)";
|
||||
case 0xD: return "RTC calibration value (rw)";
|
||||
case 0xE: return "Interrupt lines (rw)";
|
||||
case 0xF: return "Interrupt mask (rw)";
|
||||
default: return "<Unknown>";
|
||||
case 0x0: return "Control register (w)";
|
||||
case 0x1: return "PWM (charger) (w)";
|
||||
case 0x2: return "A/D read (LSB) (r)";
|
||||
case 0x3: return "A/D read (MSB) (rw)";
|
||||
case 0x4: return "?";
|
||||
case 0x5: return "Watchdog (WDReg) (w)";
|
||||
case 0x6: return "RTC enabled (w)";
|
||||
case 0x7: return "RTC second (rw)";
|
||||
case 0x8: return "RTC minute (r)";
|
||||
case 0x9: return "RTC hour (r)";
|
||||
case 0xA: return "RTC day (rw)";
|
||||
case 0xB: return "RTC alarm minute (rw)";
|
||||
case 0xC: return "RTC alarm hour (rw)";
|
||||
case 0xD: return "RTC calibration value (rw)";
|
||||
case 0xE: return "Interrupt lines (rw)";
|
||||
case 0xF: return "Interrupt mask (rw)";
|
||||
default: return "<Unknown>";
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@ -215,7 +215,7 @@ static const char * nokia_ccont_reg_desc(UINT8 offset)
|
||||
void noki3310_state::machine_start()
|
||||
{
|
||||
m_ram = std::make_unique<UINT16[]>(0x40000);
|
||||
m_dsp_ram = std::make_unique<UINT16[]>(0x800); // DSP shared RAM
|
||||
m_dsp_ram = std::make_unique<UINT16[]>(0x800); // DSP shared RAM
|
||||
|
||||
// allocate timers
|
||||
m_timer0 = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(noki3310_state::timer0), this));
|
||||
@ -231,10 +231,10 @@ void noki3310_state::machine_reset()
|
||||
m_maincpu->set_state_int(ARM7_R15, 0x200040);
|
||||
|
||||
memset(m_mad2_regs, 0, 0x100);
|
||||
m_mad2_regs[0x01] = 0x01; // power-on flag
|
||||
m_mad2_regs[0x0c] = 0x0a; // disable FIQ and IRQ
|
||||
m_mad2_regs[0x03] = 0xff; // disable MAD2 watchdog
|
||||
m_ccont.watchdog = 0; // disable CCONT watchdog
|
||||
m_mad2_regs[0x01] = 0x01; // power-on flag
|
||||
m_mad2_regs[0x0c] = 0x0a; // disable FIQ and IRQ
|
||||
m_mad2_regs[0x03] = 0xff; // disable MAD2 watchdog
|
||||
m_ccont.watchdog = 0; // disable CCONT watchdog
|
||||
m_ccont.dc = false;
|
||||
|
||||
m_fiq_status = 0;
|
||||
@ -242,7 +242,7 @@ void noki3310_state::machine_reset()
|
||||
m_timer1_counter = 0;
|
||||
m_timer0_counter = 0;
|
||||
|
||||
m_timer0->adjust(attotime::from_hz(33055 / (255 + 1)), 0, attotime::from_hz(33055 / (255 + 1))); // programmable through port 0x0f
|
||||
m_timer0->adjust(attotime::from_hz(33055 / (255 + 1)), 0, attotime::from_hz(33055 / (255 + 1))); // programmable through port 0x0f
|
||||
m_timer1->adjust(attotime::from_hz(1057), 0, attotime::from_hz(1057));
|
||||
m_timer_watchdog->adjust(attotime::from_hz(1), 0, attotime::from_hz(1));
|
||||
m_timer_fiq8->adjust(attotime::from_hz(1000), 0, attotime::from_hz(1000));
|
||||
@ -256,7 +256,7 @@ void noki3310_state::machine_reset()
|
||||
|
||||
void noki3310_state::assert_fiq(int num)
|
||||
{
|
||||
if ((m_mad2_regs[0x0c] & 0x01) == 0) // check if FIQ is globally enabled
|
||||
if ((m_mad2_regs[0x0c] & 0x01) == 0) // check if FIQ is globally enabled
|
||||
return;
|
||||
|
||||
if (num < 8)
|
||||
@ -277,7 +277,7 @@ void noki3310_state::assert_fiq(int num)
|
||||
|
||||
void noki3310_state::assert_irq(int num)
|
||||
{
|
||||
if ((m_mad2_regs[0x0c] & 0x04) == 0) // check if IRQ is globally enabled
|
||||
if ((m_mad2_regs[0x0c] & 0x04) == 0) // check if IRQ is globally enabled
|
||||
return;
|
||||
|
||||
if (num < 8)
|
||||
@ -327,20 +327,20 @@ void noki3310_state::nokia_ccont_w(UINT8 data)
|
||||
|
||||
switch(addr)
|
||||
{
|
||||
case 0x0: // ADC
|
||||
case 0x0: // ADC
|
||||
{
|
||||
UINT16 ad_id = (data >> 4) & 0x07;
|
||||
UINT16 ad_value = 0;
|
||||
switch(ad_id)
|
||||
{
|
||||
case 0: ad_value = 0x000; break; // Accessory Detect
|
||||
case 1: ad_value = 0x3ff; break; // Received signal strength
|
||||
case 2: ad_value = 0x3ff; break; // Battery voltage
|
||||
case 3: ad_value = 0x280; break; // Battery type
|
||||
case 4: ad_value = 0x000; break; // Battery temperature
|
||||
case 5: ad_value = 0x000; break; // Charger voltage
|
||||
case 6: ad_value = 0x000; break; // VCX0 (Voltage controlled oscilator) temperature
|
||||
case 7: ad_value = 0x000; break; // Charging current
|
||||
case 0: ad_value = 0x000; break; // Accessory Detect
|
||||
case 1: ad_value = 0x3ff; break; // Received signal strength
|
||||
case 2: ad_value = 0x3ff; break; // Battery voltage
|
||||
case 3: ad_value = 0x280; break; // Battery type
|
||||
case 4: ad_value = 0x000; break; // Battery temperature
|
||||
case 5: ad_value = 0x000; break; // Charger voltage
|
||||
case 6: ad_value = 0x000; break; // VCX0 (Voltage controlled oscilator) temperature
|
||||
case 7: ad_value = 0x000; break; // Charging current
|
||||
}
|
||||
|
||||
m_ccont.regs[addr] = data;
|
||||
@ -348,7 +348,7 @@ void noki3310_state::nokia_ccont_w(UINT8 data)
|
||||
m_ccont.regs[3] = ((ad_value >> 8) & 0x03);
|
||||
break;
|
||||
}
|
||||
case 0x5: // CCONT watchdog
|
||||
case 0x5: // CCONT watchdog
|
||||
if (data == 0x20)
|
||||
m_ccont.regs[addr] = data;
|
||||
else if (data == 0x31)
|
||||
@ -382,12 +382,12 @@ UINT8 noki3310_state::nokia_ccont_r()
|
||||
|
||||
switch(addr)
|
||||
{
|
||||
case 0x3: data = 0xb0 | (m_ccont.regs[addr] & 0x03); break;
|
||||
case 0x7: data = systime.local_time.second; break;
|
||||
case 0x8: data = systime.local_time.minute; break;
|
||||
case 0x9: data = systime.local_time.hour; break;
|
||||
case 0xa: data = systime.local_time.mday; break;
|
||||
case 0xe: data |= 0x01; break;
|
||||
case 0x3: data = 0xb0 | (m_ccont.regs[addr] & 0x03); break;
|
||||
case 0x7: data = systime.local_time.second; break;
|
||||
case 0x8: data = systime.local_time.minute; break;
|
||||
case 0x9: data = systime.local_time.hour; break;
|
||||
case 0xa: data = systime.local_time.mday; break;
|
||||
case 0xe: data |= 0x01; break;
|
||||
}
|
||||
|
||||
m_ccont.dc = !m_ccont.dc;
|
||||
@ -460,7 +460,7 @@ TIMER_CALLBACK_MEMBER(noki3310_state::timer_watchdog)
|
||||
{
|
||||
m_maincpu->reset();
|
||||
machine_reset();
|
||||
m_mad2_regs[0x01] |= 0x02; // Last reset was by watchdog
|
||||
m_mad2_regs[0x01] |= 0x02; // Last reset was by watchdog
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -468,10 +468,10 @@ TIMER_CALLBACK_MEMBER(noki3310_state::timer_watchdog)
|
||||
READ16_MEMBER(noki3310_state::dsp_ram_r)
|
||||
{
|
||||
// HACK: avoid hangs when ARM try to communicate with the DSP
|
||||
if (offset <= 0x004 >> 1) return 0x01;
|
||||
if (offset == 0x0e0 >> 1) return 0x00;
|
||||
if (offset == 0x0fe >> 1) return 0x01;
|
||||
if (offset == 0x100 >> 1) return 0x01;
|
||||
if (offset <= 0x004 >> 1) return 0x01;
|
||||
if (offset == 0x0e0 >> 1) return 0x00;
|
||||
if (offset == 0x0fe >> 1) return 0x01;
|
||||
if (offset == 0x100 >> 1) return 0x01;
|
||||
|
||||
return m_dsp_ram[offset & 0x7ff];
|
||||
}
|
||||
@ -488,7 +488,7 @@ READ8_MEMBER(noki3310_state::mad2_io_r)
|
||||
switch(offset)
|
||||
{
|
||||
case 0x00:
|
||||
data = 0x40; // ASIC version
|
||||
data = 0x40; // ASIC version
|
||||
break;
|
||||
case 0x04:
|
||||
data = m_timer1_counter >> 8;
|
||||
@ -535,7 +535,7 @@ READ8_MEMBER(noki3310_state::mad2_io_r)
|
||||
data = nokia_ccont_r();
|
||||
break;
|
||||
case 0x6d:
|
||||
data = 0x07; // GENSIO ready
|
||||
data = 0x07; // GENSIO ready
|
||||
break;
|
||||
}
|
||||
|
||||
@ -553,7 +553,7 @@ WRITE8_MEMBER(noki3310_state::mad2_io_w)
|
||||
{
|
||||
case 0x02:
|
||||
//printf("DSP %s\n", data & 1 ? "RUN" : "HOLD");
|
||||
//if (data & 0x01) debugger_break(machine());
|
||||
//if (data & 0x01) debugger_break(machine());
|
||||
break;
|
||||
case 0x08:
|
||||
ack_fiq(data);
|
||||
@ -624,63 +624,63 @@ WRITE8_MEMBER(noki3310_state::mad2_mcuif_w)
|
||||
|
||||
static ADDRESS_MAP_START( noki3310_map, AS_PROGRAM, 32, noki3310_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x00ffffff)
|
||||
AM_RANGE(0x00000000, 0x0000ffff) AM_MIRROR(0x80000) AM_READWRITE16(ram_r, ram_w, 0xffffffff) // boot ROM / RAM
|
||||
AM_RANGE(0x00010000, 0x00010fff) AM_MIRROR(0x8f000) AM_READWRITE16(dsp_ram_r, dsp_ram_w, 0xffffffff) // DSP shared memory
|
||||
AM_RANGE(0x00020000, 0x000200ff) AM_MIRROR(0x8ff00) AM_READWRITE8(mad2_io_r, mad2_io_w, 0xffffffff) // IO (Primary I/O range, configures peripherals)
|
||||
AM_RANGE(0x00030000, 0x00030003) AM_MIRROR(0x8fffc) AM_READWRITE8(mad2_dspif_r, mad2_dspif_w, 0xffffffff) // DSPIF (API control register)
|
||||
AM_RANGE(0x00040000, 0x00040003) AM_MIRROR(0x8fffc) AM_READWRITE8(mad2_mcuif_r, mad2_mcuif_w, 0xffffffff) // MCUIF (Secondary I/O range, configures memory ranges)
|
||||
AM_RANGE(0x00100000, 0x0017ffff) AM_READWRITE16(ram_r, ram_w, 0xffffffff) // RAMSelX
|
||||
AM_RANGE(0x00200000, 0x005fffff) AM_DEVREADWRITE16("flash", intelfsh16_device, read, write, 0xffffffff) // ROM1SelX
|
||||
AM_RANGE(0x00600000, 0x009fffff) AM_UNMAP // ROM2SelX
|
||||
AM_RANGE(0x00a00000, 0x00dfffff) AM_UNMAP // EEPROMSelX
|
||||
AM_RANGE(0x00e00000, 0x00ffffff) AM_UNMAP // Reserved
|
||||
AM_RANGE(0x00000000, 0x0000ffff) AM_MIRROR(0x80000) AM_READWRITE16(ram_r, ram_w, 0xffffffff) // boot ROM / RAM
|
||||
AM_RANGE(0x00010000, 0x00010fff) AM_MIRROR(0x8f000) AM_READWRITE16(dsp_ram_r, dsp_ram_w, 0xffffffff) // DSP shared memory
|
||||
AM_RANGE(0x00020000, 0x000200ff) AM_MIRROR(0x8ff00) AM_READWRITE8(mad2_io_r, mad2_io_w, 0xffffffff) // IO (Primary I/O range, configures peripherals)
|
||||
AM_RANGE(0x00030000, 0x00030003) AM_MIRROR(0x8fffc) AM_READWRITE8(mad2_dspif_r, mad2_dspif_w, 0xffffffff) // DSPIF (API control register)
|
||||
AM_RANGE(0x00040000, 0x00040003) AM_MIRROR(0x8fffc) AM_READWRITE8(mad2_mcuif_r, mad2_mcuif_w, 0xffffffff) // MCUIF (Secondary I/O range, configures memory ranges)
|
||||
AM_RANGE(0x00100000, 0x0017ffff) AM_READWRITE16(ram_r, ram_w, 0xffffffff) // RAMSelX
|
||||
AM_RANGE(0x00200000, 0x005fffff) AM_DEVREADWRITE16("flash", intelfsh16_device, read, write, 0xffffffff) // ROM1SelX
|
||||
AM_RANGE(0x00600000, 0x009fffff) AM_UNMAP // ROM2SelX
|
||||
AM_RANGE(0x00a00000, 0x00dfffff) AM_UNMAP // EEPROMSelX
|
||||
AM_RANGE(0x00e00000, 0x00ffffff) AM_UNMAP // Reserved
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
INPUT_CHANGED_MEMBER( noki3310_state::key_irq )
|
||||
{
|
||||
if (!newval) // TODO: COL/ROW IRQ mask
|
||||
if (!newval) // TODO: COL/ROW IRQ mask
|
||||
assert_irq(0);
|
||||
}
|
||||
|
||||
static INPUT_PORTS_START( noki3310 )
|
||||
PORT_START("COL.0")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_UP) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_0) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_UP) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_0) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_DEL) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_DEL) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
|
||||
PORT_START("COL.1")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_DOWN) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_DOWN) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
|
||||
PORT_START("COL.2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
|
||||
PORT_START("COL.3")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_8) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_7) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_8) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_7) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
|
||||
PORT_START("COL.4")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_MINUS) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_ENTER) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_ASTERISK) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_MINUS) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_ENTER) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_ASTERISK) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
|
||||
PORT_START("PWR")
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_SPACE) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_SPACE) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
|
||||
PORT_BIT( 0x1d, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
INPUT_PORTS_END
|
||||
|
||||
@ -688,7 +688,7 @@ INPUT_PORTS_END
|
||||
static MACHINE_CONFIG_START( noki3310, noki3310_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", ARM7_BE, 26000000 / 2) // MAD2WD1 13 MHz, clock internally supplied to ARM core can be divided by 2, in sleep mode a 32768 Hz clock is used
|
||||
MCFG_CPU_ADD("maincpu", ARM7_BE, 26000000 / 2) // MAD2WD1 13 MHz, clock internally supplied to ARM core can be divided by 2, in sleep mode a 32768 Hz clock is used
|
||||
MCFG_CPU_PROGRAM_MAP(noki3310_map)
|
||||
|
||||
/* video hardware */
|
||||
@ -719,14 +719,14 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_DERIVED( noki3410, noki3330 )
|
||||
|
||||
MCFG_SCREEN_MODIFY("screen")
|
||||
MCFG_SCREEN_SIZE(96, 65) // Philips OM6206
|
||||
MCFG_SCREEN_SIZE(96, 65) // Philips OM6206
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( noki7110, noki3330 )
|
||||
|
||||
MCFG_SCREEN_MODIFY("screen")
|
||||
MCFG_SCREEN_SIZE(96, 65) // Epson SED1565
|
||||
MCFG_SCREEN_SIZE(96, 65) // Epson SED1565
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -740,20 +740,19 @@ MACHINE_CONFIG_END
|
||||
|
||||
// MAD2 internal ROMS
|
||||
#define MAD2_INTERNAL_ROMS \
|
||||
ROM_REGION16_BE(0x10000, "boot_rom", ROMREGION_ERASE00 ) \
|
||||
ROM_LOAD("boot_rom", 0x00000, 0x10000, NO_DUMP) \
|
||||
ROM_REGION16_BE(0x10000, "boot_rom", ROMREGION_ERASE00 ) \
|
||||
ROM_LOAD("boot_rom", 0x00000, 0x10000, NO_DUMP) \
|
||||
\
|
||||
ROM_REGION16_BE(0x20000, "dsp", ROMREGION_ERASE00 ) \
|
||||
ROM_LOAD("dsp_prom" , 0x00000, 0xc000, NO_DUMP) \
|
||||
ROM_LOAD("dsp_drom" , 0x0c000, 0x4000, NO_DUMP) \
|
||||
ROM_LOAD("dsp_pdrom", 0x10000, 0x1000, NO_DUMP) \
|
||||
|
||||
ROM_REGION16_BE(0x20000, "dsp", ROMREGION_ERASE00 ) \
|
||||
ROM_LOAD("dsp_prom" , 0x00000, 0xc000, NO_DUMP) \
|
||||
ROM_LOAD("dsp_drom" , 0x0c000, 0x4000, NO_DUMP) \
|
||||
ROM_LOAD("dsp_pdrom", 0x10000, 0x1000, NO_DUMP)
|
||||
|
||||
ROM_START( noki3210 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "600", "v6.00") // A 03-10-2000
|
||||
ROM_SYSTEM_BIOS(0, "600", "v6.00") // A 03-10-2000
|
||||
ROMX_LOAD("3210F600A.fls", 0x000000, 0x200000, CRC(6a978478) SHA1(6bdec2ec76aca15bc12b621be4402e455562454b), ROM_BIOS(1))
|
||||
|
||||
ROM_REGION16_BE(0x04000, "eeprom", 0 )
|
||||
@ -764,9 +763,9 @@ ROM_START( noki3310 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "607", "v6.07") // C 17-06-2003
|
||||
ROM_SYSTEM_BIOS(1, "579", "v5.79") // N 11-11-2002
|
||||
ROM_SYSTEM_BIOS(2, "513", "v5.13") // C 11-01-2002
|
||||
ROM_SYSTEM_BIOS(0, "607", "v6.07") // C 17-06-2003
|
||||
ROM_SYSTEM_BIOS(1, "579", "v5.79") // N 11-11-2002
|
||||
ROM_SYSTEM_BIOS(2, "513", "v5.13") // C 11-01-2002
|
||||
ROMX_LOAD("3310_607_PPM_C.fls", 0x000000, 0x200000, CRC(5743f6ba) SHA1(0e80b5f1698909c9850be770c1289566582aa77a), ROM_BIOS(1))
|
||||
ROMX_LOAD("3310 NR1 v5.79.fls", 0x000000, 0x200000, CRC(26b4f0df) SHA1(649de05ed88205a080693b918cd1295ac691dff1), ROM_BIOS(2))
|
||||
ROMX_LOAD("3310 v. 5.13 C.fls", 0x000000, 0x1d0000, CRC(0f66d256) SHA1(04d8dabe2c454d6a1161f352d85c69c409895000), ROM_BIOS(3))
|
||||
@ -782,7 +781,7 @@ ROM_START( noki3330 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "450", "v4.50") // C 12-10-2001
|
||||
ROM_SYSTEM_BIOS(0, "450", "v4.50") // C 12-10-2001
|
||||
ROMX_LOAD("3330F450C.fls", 0x000000, 0x350000, CRC(259313e7) SHA1(88bcc39d9358fd8a8562fe3a0280f0ce82f5897f), ROM_BIOS(1))
|
||||
ROM_LOAD("3330 virgin eeprom 005F0000.fls", 0x3f0000, 0x010000, CRC(23459c10) SHA1(68481effb39d90a1639e8f261009c66e97d3e668))
|
||||
ROM_END
|
||||
@ -791,7 +790,7 @@ ROM_START( noki3410 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "506", "v5.06") // C 29-11-2002
|
||||
ROM_SYSTEM_BIOS(0, "506", "v5.06") // C 29-11-2002
|
||||
ROMX_LOAD("3410_5-06c.fls", 0x000000, 0x370000, CRC(1483e094) SHA1(ef26026297c779de7b01923a364ded822e720c38), ROM_BIOS(1))
|
||||
ROM_END
|
||||
|
||||
@ -799,9 +798,9 @@ ROM_START( noki5210 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "540", "v5.40") // C 11-10-2003
|
||||
ROM_SYSTEM_BIOS(1, "525", "v5.25") // C 26-02-2003
|
||||
ROM_SYSTEM_BIOS(2, "520", "v5.20") // C 12-08-2002
|
||||
ROM_SYSTEM_BIOS(0, "540", "v5.40") // C 11-10-2003
|
||||
ROM_SYSTEM_BIOS(1, "525", "v5.25") // C 26-02-2003
|
||||
ROM_SYSTEM_BIOS(2, "520", "v5.20") // C 12-08-2002
|
||||
ROMX_LOAD("5210_5.40_PPM_C.FLS", 0x000000, 0x380000, CRC(e37d5beb) SHA1(726f000780dd67750b7d2859687f846ce17a1bf7), ROM_BIOS(1))
|
||||
ROMX_LOAD("5210_5.25_PPM_C.FLS", 0x000000, 0x380000, CRC(13bba458) SHA1(3b5244244743fba48f9061e158f95fc46b86446e), ROM_BIOS(2))
|
||||
ROMX_LOAD("5210_520_C.fls", 0x000000, 0x380000, CRC(38648cd3) SHA1(9210e15e6bd780f86c467bec33ef54d6393abe5a), ROM_BIOS(3))
|
||||
@ -811,7 +810,7 @@ ROM_START( noki6210 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "556", "v5.56") // C 25-01-2002
|
||||
ROM_SYSTEM_BIOS(0, "556", "v5.56") // C 25-01-2002
|
||||
ROMX_LOAD("6210_556C.fls", 0x000000, 0x3a0000, CRC(203fb962) SHA1(3d9ea319503e78ec69b60d72cda23e461e118ea9), ROM_BIOS(1))
|
||||
ROM_LOAD("6210 virgin eeprom 005FA000.fls", 0x3fa000, 0x006000, CRC(3c6d3437) SHA1(b3a527ede1be87bd715fb3741a81eef5bd422efa))
|
||||
ROM_END
|
||||
@ -820,7 +819,7 @@ ROM_START( noki6250 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "503", "v5.03") // C 06-12-2001
|
||||
ROM_SYSTEM_BIOS(0, "503", "v5.03") // C 06-12-2001
|
||||
ROMX_LOAD("6250-503mcuPPMC.fls", 0x000000, 0x3a0000, CRC(8dffb91b) SHA1(95607ce39c383bda75f1e6aeae67a214b787b0a1), ROM_BIOS(1))
|
||||
ROM_LOAD("6250 virgin eeprom 005FA000.fls", 0x3fa000, 0x006000, CRC(6087ce70) SHA1(57c29c8387caf864603d94a22bfb63ace427b7f9))
|
||||
ROM_END
|
||||
@ -829,7 +828,7 @@ ROM_START( noki7110 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "501", "v5.01") // C 08-12-2000
|
||||
ROM_SYSTEM_BIOS(0, "501", "v5.01") // C 08-12-2000
|
||||
ROMX_LOAD("7110F501_ppmC.fls", 0x000000, 0x390000, CRC(919ac753) SHA1(53af8324919f455ba8199d2c05f7a921cfb811d5), ROM_BIOS(1))
|
||||
ROM_LOAD("7110 virgin eeprom 005FA000.fls", 0x3fa000, 0x006000, CRC(78e7d8c1) SHA1(8b4dd782fc9d1306268ba63124ee463ac646912b))
|
||||
ROM_END
|
||||
@ -838,7 +837,7 @@ ROM_START( noki8210 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "531", "v5.31") // C 08-03-2002
|
||||
ROM_SYSTEM_BIOS(0, "531", "v5.31") // C 08-03-2002
|
||||
ROMX_LOAD("8210_5.31PPM_C.FLS", 0x000000, 0x1d0000, CRC(927022b1) SHA1(c1a0fe95cedb89a92b19654208cc4855e1a4988e), ROM_BIOS(1))
|
||||
ROM_LOAD("8210 virgin eeprom 003D0000.fls", 0x1d0000, 0x030000, CRC(37fddeea) SHA1(1c01ad3948ff9919890498a84f31052369d93e1d))
|
||||
ROM_END
|
||||
@ -847,7 +846,7 @@ ROM_START( noki8250 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "502", "v5.02") // K 28-01-2002
|
||||
ROM_SYSTEM_BIOS(0, "502", "v5.02") // K 28-01-2002
|
||||
ROMX_LOAD("8250-502mcuPPMK.fls", 0x000000, 0x1d0000, CRC(2c58e48b) SHA1(f26c98ffcfffbbd5714889e10cfa41c5f6dd2529), ROM_BIOS(1))
|
||||
ROM_LOAD("8250 virgin eeprom 003D0000.fls", 0x1d0000, 0x030000, CRC(7ca585e0) SHA1(a974fb5fddcd0438ac4aaf32b431f1453e8d923c))
|
||||
ROM_END
|
||||
@ -856,7 +855,7 @@ ROM_START( noki8850 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "531", "v5.31") // C 08-03-2002
|
||||
ROM_SYSTEM_BIOS(0, "531", "v5.31") // C 08-03-2002
|
||||
ROMX_LOAD("8850v531.fls", 0x000000, 0x1d0000, CRC(8864fcb3) SHA1(9f966787403b68a09530680ad911302403eb1521), ROM_BIOS(1))
|
||||
ROM_LOAD("8850 virgin eeprom 003D0000.fls", 0x1d0000, 0x030000, CRC(4823f27e) SHA1(b09455302d98fbedf35072c9ecfd7721a04924b0))
|
||||
ROM_END
|
||||
@ -865,7 +864,7 @@ ROM_START( noki8890 )
|
||||
MAD2_INTERNAL_ROMS
|
||||
|
||||
ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "1220", "v12.20") // C 19-03-2001
|
||||
ROM_SYSTEM_BIOS(0, "1220", "v12.20") // C 19-03-2001
|
||||
ROMX_LOAD("8890_12.20_ppmC.FLS", 0x000000, 0x1d0000, CRC(77206f78) SHA1(a214a0d69760ecd8eeca0b9d82f95c94bdfe70ed), ROM_BIOS(1))
|
||||
ROM_LOAD("8890 virgin eeprom 003D0000.fls", 0x1d0000, 0x030000, CRC(1d8ef3b5) SHA1(cc0924cfd4c0ce796fca157c640fc3183c2b5f2c))
|
||||
ROM_END
|
||||
|
@ -314,7 +314,7 @@ static INPUT_PORTS_START( nova2001 )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
|
||||
|
||||
PORT_START("IN2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(4)
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(4)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
|
||||
PORT_BIT( 0x78, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
@ -1020,7 +1020,7 @@ DRIVER_INIT_MEMBER(nova2001_state,raiders5)
|
||||
// many of these don't explicitly state Japan, eg. Nova 2001 could easily be used anywhere.
|
||||
|
||||
// YEAR, NAME, PARENT, MACHINE, INPUT, INIT, MONITOR,COMPANY,FULLNAME,FLAGS
|
||||
GAME( 1983, nova2001, 0, nova2001, nova2001, driver_device, 0, ROT0, "UPL", "Nova 2001 (Japan)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1983, nova2001, 0, nova2001, nova2001, driver_device, 0, ROT0, "UPL", "Nova 2001 (Japan)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1983, nova2001h, nova2001, nova2001, nova2001, driver_device, 0, ROT0, "UPL", "Nova 2001 (Japan, hack?)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1983, nova2001u, nova2001, nova2001, nova2001, driver_device, 0, ROT0, "UPL (Universal license)", "Nova 2001 (US)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1984, ninjakun, 0, ninjakun, ninjakun, driver_device, 0, ROT0, "UPL (Taito license)", "Ninjakun Majou no Bouken", MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -4156,7 +4156,7 @@ ROM_START( clubpacma )
|
||||
ROM_LOAD( "13.5f", 0x1000, 0x0800, CRC(22b0188a) SHA1(a9ed9ca8b36a60081fd364abc9bc23963932cc0b) )
|
||||
ROM_LOAD( "15.5j", 0x1800, 0x0800, CRC(50c7477d) SHA1(c04ec282a8cb528df5e38ad750d12ee71612695d) )
|
||||
|
||||
// Color PROMs have been dumped. They match the pacman/mspacman ones
|
||||
// Color PROMs have been dumped. They match the pacman/mspacman ones
|
||||
ROM_REGION( 0x0120, "proms", 0 )
|
||||
ROM_LOAD( "n82s123n.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) )
|
||||
ROM_LOAD( "m7611.4a", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) )
|
||||
@ -4177,7 +4177,7 @@ ROM_START( clubpacmb )
|
||||
ROM_LOAD( "13.5f", 0x1000, 0x0800, CRC(22b0188a) SHA1(a9ed9ca8b36a60081fd364abc9bc23963932cc0b) )
|
||||
ROM_LOAD( "15.5j", 0x1800, 0x0800, CRC(50c7477d) SHA1(c04ec282a8cb528df5e38ad750d12ee71612695d) )
|
||||
|
||||
// Color PROMs have been dumped. They match the pacman/mspacman ones
|
||||
// Color PROMs have been dumped. They match the pacman/mspacman ones
|
||||
ROM_REGION( 0x0120, "proms", 0 )
|
||||
ROM_LOAD( "n82s123n.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) )
|
||||
ROM_LOAD( "m7611.4a", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) )
|
||||
|
@ -189,7 +189,7 @@ protected:
|
||||
required_device<z80dart_device> m_z80sio;
|
||||
required_device<ay8910_device> m_ay;
|
||||
required_device<meters_device> m_meters;
|
||||
|
||||
|
||||
public:
|
||||
int m_meter;
|
||||
DECLARE_DRIVER_INIT(proconn);
|
||||
@ -379,7 +379,7 @@ static MACHINE_CONFIG_START( proconn, proconn_state )
|
||||
MCFG_SOUND_ADD("aysnd", AY8910, 1000000) /* ?? Mhz */ // YM2149F on PC92?
|
||||
MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(proconn_state, meter_w))
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.33)
|
||||
|
||||
|
||||
MCFG_DEVICE_ADD("meters", METERS, 0)
|
||||
MCFG_METERS_NUMBER(8)
|
||||
MACHINE_CONFIG_END
|
||||
|
@ -3,9 +3,9 @@
|
||||
/***************************************************************************
|
||||
|
||||
prophet600.cpp - Sequential Circuits Prophet-600, designed by Dave Smith
|
||||
|
||||
This was the first commercial synthesizer with built-in MIDI.
|
||||
|
||||
|
||||
This was the first commercial synthesizer with built-in MIDI.
|
||||
|
||||
Skeleton driver by R. Belmont
|
||||
|
||||
Hardware:
|
||||
@ -18,34 +18,34 @@
|
||||
0x4000-0x4001: DAC for CV/gate drive
|
||||
0x6000-0x6001: 6850 writes
|
||||
0xe000-0xe001: 6850 reads
|
||||
|
||||
|
||||
I/O map:
|
||||
00-07: 8253 PIT
|
||||
00-07: 8253 PIT
|
||||
08: set row to scan for keyboard/panel input and LED / lamp output
|
||||
09: read: analog comparitor, some value vs. the DAC. write: output for LEDs/lamps
|
||||
comparitor bits:
|
||||
bit 1: FFFStatus
|
||||
bit 2: output of 8253 channel 2
|
||||
bit 3: ADCCompare: returns sign of if current value is > or < the DAC value
|
||||
|
||||
0a: read: keyboard/panel input scan bits, write: select a pot on the panel for the comparitor
|
||||
comparitor bits:
|
||||
bit 1: FFFStatus
|
||||
bit 2: output of 8253 channel 2
|
||||
bit 3: ADCCompare: returns sign of if current value is > or < the DAC value
|
||||
|
||||
0a: read: keyboard/panel input scan bits, write: select a pot on the panel for the comparitor
|
||||
0b: write: update all gate signals
|
||||
0c: ???
|
||||
0d: write: select which CV signal will be updated with the current DAC value
|
||||
0e: write: mask, masks
|
||||
bit 0: FFFP -FF P
|
||||
bit 1: mask gate from 8253
|
||||
bit 3: FFFD FF D
|
||||
bit 4: FFFCL -FF CL
|
||||
|
||||
|
||||
bit 0: FFFP -FF P
|
||||
bit 1: mask gate from 8253
|
||||
bit 3: FFFD FF D
|
||||
bit 4: FFFCL -FF CL
|
||||
|
||||
|
||||
Info:
|
||||
- Prophet 600 Technical Manual
|
||||
|
||||
|
||||
- https://github.com/gligli/p600fw - GPLv3 licensed complete replacement firmware
|
||||
for the Prophet 600, but written in C and runs on an AVR that replaces the original
|
||||
Z80.
|
||||
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
@ -57,16 +57,16 @@
|
||||
|
||||
#include "prophet600.lh"
|
||||
|
||||
#define MAINCPU_TAG "z80"
|
||||
#define PIT_TAG "pit"
|
||||
#define UART_TAG "uart"
|
||||
#define MAINCPU_TAG "z80"
|
||||
#define PIT_TAG "pit"
|
||||
#define UART_TAG "uart"
|
||||
|
||||
enum
|
||||
{
|
||||
CV_CV_Osc1A = 0, CV_Osc2A, CV_Osc3A, CV_Osc4A, CV_Osc5A, CV_Osc6A,
|
||||
CV_Osc1B, CV_Osc2B, CV_Osc3B, CV_Osc4B, CV_Osc5B, CV_Osc6B,
|
||||
CV_Flt1, CV_Flt2, CV_Flt3, CV_Flt4, CV_Flt5, CV_Flt6,
|
||||
CV_Amp1, CV_Amp2, CV_Amp3, CV_Amp4, CV_Amp5, CV_Amp6,
|
||||
CV_CV_Osc1A = 0, CV_Osc2A, CV_Osc3A, CV_Osc4A, CV_Osc5A, CV_Osc6A,
|
||||
CV_Osc1B, CV_Osc2B, CV_Osc3B, CV_Osc4B, CV_Osc5B, CV_Osc6B,
|
||||
CV_Flt1, CV_Flt2, CV_Flt3, CV_Flt4, CV_Flt5, CV_Flt6,
|
||||
CV_Amp1, CV_Amp2, CV_Amp3, CV_Amp4, CV_Amp5, CV_Amp6,
|
||||
CV_PModOscB, CV_VolA, CV_VolB, CV_MasterVol, CV_APW, CV_ExtFilter, CV_Resonance, CV_BPW,
|
||||
|
||||
CV_MAX
|
||||
@ -188,7 +188,7 @@ READ8_MEMBER(prophet600_state::scan_r)
|
||||
WRITE8_MEMBER(prophet600_state::mask_w)
|
||||
{
|
||||
m_nmi_gate = (data & 0x02) ? true : false;
|
||||
if (m_nmi_gate) // gate is set, comparitor line is pulled up to Vcc
|
||||
if (m_nmi_gate) // gate is set, comparitor line is pulled up to Vcc
|
||||
{
|
||||
m_comparitor |= 0x04;
|
||||
}
|
||||
@ -197,7 +197,7 @@ WRITE8_MEMBER(prophet600_state::mask_w)
|
||||
m_comparitor &= ~0x04;
|
||||
}
|
||||
|
||||
// printf("8253 gate = %x\n", data & 0x02);
|
||||
// printf("8253 gate = %x\n", data & 0x02);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(prophet600_state::cv_w)
|
||||
@ -222,8 +222,8 @@ WRITE8_MEMBER(prophet600_state::gate_w)
|
||||
}
|
||||
|
||||
/* Pots: Mixer=0,Cutoff=1,Resonance=2,FilEnvAmt=3,FilRel=4,FilSus=5,
|
||||
FilDec=6,FilAtt=7,AmpRel=8,AmpSus=9,AmpDec=10,AmpAtt=11,
|
||||
Glide=12,BPW=13,MVol=14,MTune=15,PitchWheel=16,ModWheel=22,
|
||||
FilDec=6,FilAtt=7,AmpRel=8,AmpSus=9,AmpDec=10,AmpAtt=11,
|
||||
Glide=12,BPW=13,MVol=14,MTune=15,PitchWheel=16,ModWheel=22,
|
||||
Speed,APW,PModFilEnv,LFOFreq,PModOscB,LFOAmt,FreqB,FreqA,FreqBFine
|
||||
*/
|
||||
WRITE8_MEMBER(prophet600_state::potmux_w)
|
||||
@ -232,7 +232,7 @@ WRITE8_MEMBER(prophet600_state::potmux_w)
|
||||
|
||||
READ8_MEMBER(prophet600_state::comparitor_r)
|
||||
{
|
||||
// m_comparitor ^= 0x04;
|
||||
// m_comparitor ^= 0x04;
|
||||
return m_comparitor;
|
||||
}
|
||||
|
||||
@ -274,7 +274,7 @@ static MACHINE_CONFIG_START( prophet600, prophet600_state )
|
||||
MCFG_PIT8253_CLK1(XTAL_8MHz/4)
|
||||
MCFG_PIT8253_CLK2(XTAL_8MHz/4)
|
||||
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(prophet600_state, pit_ch0_tick_w))
|
||||
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(prophet600_state, pit_ch2_tick_w))
|
||||
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(prophet600_state, pit_ch2_tick_w))
|
||||
|
||||
MCFG_DEVICE_ADD(UART_TAG, ACIA6850, 0)
|
||||
MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("mdout", midi_port_device, write_txd))
|
||||
@ -285,7 +285,7 @@ static MACHINE_CONFIG_START( prophet600, prophet600_state )
|
||||
|
||||
MCFG_MIDI_PORT_ADD("mdout", midiout_slot, "midiout")
|
||||
|
||||
MCFG_DEVICE_ADD("acia_clock", CLOCK, XTAL_8MHz/16) // 500kHz = 16 times the MIDI rate
|
||||
MCFG_DEVICE_ADD("acia_clock", CLOCK, XTAL_8MHz/16) // 500kHz = 16 times the MIDI rate
|
||||
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(prophet600_state, acia_clock_w))
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
|
@ -321,7 +321,7 @@ Notes (23-Jan-2016 AS):
|
||||
- Bombs Away sports following issues, which indicates it's a unfinished product:
|
||||
- missing bullets (missing data from ROMs);
|
||||
- missing levels above 4 (missing data from ROMs);
|
||||
- occasionally wrong flip x when the player route is from up to down;
|
||||
- occasionally wrong flip x when the player route is from up to down;
|
||||
- enemy counter stops entirely when the S is collected;
|
||||
- boss fights uses always the same pattern;
|
||||
- single BGM repeated over and over, for every level;
|
||||
|
@ -71,7 +71,7 @@ static MACHINE_CONFIG_START( sc55, sc55_state )
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
ROM_START( sc55 )
|
||||
ROM_REGION( 0x40000, "maincpu", 0 ) // additional H8/532 code and patch data - revisions match main CPU revisions
|
||||
ROM_REGION( 0x40000, "maincpu", 0 ) // additional H8/532 code and patch data - revisions match main CPU revisions
|
||||
ROM_LOAD( "roland_r15209363.ic23", 0x000000, 0x040000, CRC(2dc58549) SHA1(9c17f85e784dc1549ac1f98d457b353393331f6b) )
|
||||
|
||||
ROM_REGION( 0x300000, "la", 0 )
|
||||
|
@ -2864,7 +2864,7 @@ ROM_START( calspeeda )
|
||||
ROM_SYSTEM_BIOS( 3, "up16_3", "Disk Update 1.0x to 2.1a (1.25) Step 3 of 3" )
|
||||
ROMX_LOAD("eprom #3 2.1A 3286", 0x000000, 0x100000, CRC(e7d8c88f) SHA1(06c11241ac439527b361826784aef4c58689892e), ROM_BIOS(4))
|
||||
|
||||
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" ) /* Release version 1.0r8a (4/10/98) (Guts 4/10/98, Main 4/10/98) */
|
||||
DISK_IMAGE( "cs_10r8a", 0, SHA1(ba4e7589740e0647938c81c5082bb71d8826bad4) )
|
||||
|
||||
|
@ -85,11 +85,11 @@ Player 2 Shoot | Z | 22| Player 1 Shoot
|
||||
GND | e | 27| GND
|
||||
GND | f | 28| GND
|
||||
|
||||
____
|
||||
____
|
||||
/ \
|
||||
| Dial |
|
||||
\____/
|
||||
/| |\
|
||||
/| |\
|
||||
/ | | \
|
||||
Blue Red Black Yellow
|
||||
/ | | \
|
||||
@ -510,22 +510,22 @@ static INPUT_PORTS_START( sfkick )
|
||||
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(-20)
|
||||
|
||||
PORT_START("DSW1") /* bitswapped at read! 76543210 -> 45673210 */
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:1")
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:1")
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Upright ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
|
||||
PORT_DIPNAME( 0x01, 0x01, "Stage Select" ) PORT_DIPLOCATION("SW1:2") /* How does this work?? */
|
||||
PORT_DIPNAME( 0x01, 0x01, "Stage Select" ) PORT_DIPLOCATION("SW1:2") /* How does this work?? */
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SW1:3")
|
||||
PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SW1:3")
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "Test Mode" ) PORT_DIPLOCATION("SW1:4")
|
||||
PORT_DIPNAME( 0x02, 0x02, "Test Mode" ) PORT_DIPLOCATION("SW1:4")
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:5")
|
||||
PORT_DIPNAME( 0x40, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:5")
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( No ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
|
||||
PORT_DIPNAME( 0x8c, 0x8c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:6,8,7")
|
||||
PORT_DIPNAME( 0x8c, 0x8c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:6,8,7")
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x84, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( 3C_2C ) )
|
||||
@ -537,20 +537,20 @@ static INPUT_PORTS_START( sfkick )
|
||||
|
||||
PORT_START("DSW2") /* bitswapped at read! 76543210 -> 45673210 */
|
||||
PORT_DIPUNUSED_DIPLOC( 0x10, IP_ACTIVE_LOW, "SW2:1" ) /* Manual states "No Comment" */
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:2")
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:2")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x41, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:3,4")
|
||||
PORT_DIPNAME( 0x41, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:3,4")
|
||||
PORT_DIPSETTING( 0x41, "1" )
|
||||
PORT_DIPSETTING( 0x40, "2" )
|
||||
PORT_DIPSETTING( 0x01, "3" )
|
||||
PORT_DIPSETTING( 0x00, "5" )
|
||||
PORT_DIPNAME( 0x82, 0x02, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:5,6")
|
||||
PORT_DIPNAME( 0x82, 0x02, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:5,6")
|
||||
PORT_DIPSETTING( 0x80, "Every 20,000" )
|
||||
PORT_DIPSETTING( 0x02, "20,000 & 50,000" )
|
||||
PORT_DIPSETTING( 0x00, "Every 50,000" )
|
||||
PORT_DIPSETTING( 0x82, DEF_STR( None ) )
|
||||
PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:7,8")
|
||||
PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:7,8")
|
||||
PORT_DIPSETTING( 0x0c, DEF_STR( Easy ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Hard ) )
|
||||
|
@ -4982,9 +4982,9 @@ ROM_START( ikariram )
|
||||
ROM_LOAD( "15.rom", 0x18000, 0x8000, CRC(65a61c99) SHA1(767694c919180de208b6211b593db68fc5a66ff1) )
|
||||
ROM_LOAD( "13.rom", 0x20000, 0x8000, CRC(315383d7) SHA1(1c1c5931e3447c4dcbd54fc8ae383b03cb5fbf5b) )
|
||||
ROM_LOAD( "16.rom", 0x28000, 0x8000, CRC(e9b03e07) SHA1(124e5328a965ea2af28c4d74934a82394a2ffd72) )
|
||||
|
||||
|
||||
ROM_REGION( 0x30000, "bootleg_proms", 0 )
|
||||
ROM_LOAD( "82s191.bin", 0x00000, 0x800, CRC(072f8622) SHA1(43b0d48656263e88067cddea1d01188755a2023d) ) //prom from a bootleg pcb
|
||||
ROM_LOAD( "82s191.bin", 0x00000, 0x800, CRC(072f8622) SHA1(43b0d48656263e88067cddea1d01188755a2023d) ) //prom from a bootleg pcb
|
||||
ROM_END
|
||||
|
||||
|
||||
|
@ -7,19 +7,19 @@ Samsung SPC-1500 driver by Miso Kim
|
||||
2015-12-16 preliminary driver initialized
|
||||
2015-12-18 cassette tape supported
|
||||
2015-12-26 80/40 column mode supported
|
||||
2015-12-28 double access mode supported for I/O
|
||||
2015-12-28 double access mode supported for I/O
|
||||
2016-01-02 Korean character input method and display enabled
|
||||
2016-01-03 user defined char (PCG, Programmable Character Generator) support
|
||||
2016-01-05 detection of color palette initialization
|
||||
2016-01-03 user defined char (PCG, Programmable Character Generator) support
|
||||
2016-01-05 detection of color palette initialization
|
||||
2016-01-06 80x16 mode graphic mode support
|
||||
2016-01-10 double character support
|
||||
2016-01-12 PCG adressing improved
|
||||
2016-01-13 Cassette tape motor improved
|
||||
|
||||
|
||||
TODO:
|
||||
- Verify PCG ram read for Korean character (english character is fine)
|
||||
- Support floppy disk drive with SD-1500A controller card
|
||||
|
||||
|
||||
****************************************************************************/
|
||||
|
||||
/*
|
||||
@ -32,7 +32,7 @@ TODO:
|
||||
* Market price 365,000 won ($430) on 04-01-1987
|
||||
|
||||
Hardware Specification
|
||||
|
||||
|
||||
1) SPC-1500
|
||||
RAM 122KB
|
||||
- Main Memory: 64KB
|
||||
@ -59,19 +59,19 @@ TODO:
|
||||
Two external power connector for FDD connection
|
||||
- DIP switch settings for the screen
|
||||
- Volume control
|
||||
|
||||
|
||||
2) SPC-1500A
|
||||
July 1987 Release
|
||||
RF modulator only remove the product from an existing model
|
||||
|
||||
|
||||
3) SPC-1500V
|
||||
This product can not confirm the release date because of PCB level modification.
|
||||
It equiped SPC-1500V VLSI chip embedded products and removed a lot of TTLs and the memory expansion card.
|
||||
- IOCS ROM Version: 1.6
|
||||
- Two internal 50-pin expension slots
|
||||
|
||||
|
||||
Firmware
|
||||
|
||||
|
||||
IOCS ROM
|
||||
The various versions with 32KB of capacity existed to date has confirmed the final version number 1.8
|
||||
- Version 1.3:
|
||||
@ -79,34 +79,34 @@ TODO:
|
||||
- Version 1.5:
|
||||
- Version 1.6:
|
||||
- Version 1.8: supports a variety of peripherals such as external hard disk, FM-Sound, RS-232C from Static soft (C)
|
||||
various memu appears on the initial screen.
|
||||
|
||||
various memu appears on the initial screen.
|
||||
|
||||
BASIC ROM
|
||||
Capacity and the final version number of the currently identified 32KB 1.3
|
||||
|
||||
|
||||
English ROM
|
||||
The final version of the verification of the capacity 8KB SS150-1222
|
||||
The character set of a 8x8 size, and are stored with the size 8x16 8x16 is a part of the size of the font data are written differently and 8x8.
|
||||
|
||||
|
||||
Hangul ROM
|
||||
8KB each is divided by a consonant and consonant and neutral.
|
||||
- Inital (Choseong) SS151-1223: 8 types of intial character (actual 6 types)
|
||||
- Middle (Jungseong) SS152-1224: 2 types of middle character
|
||||
- Final (Jongseong) SS153-1225: 2 types of final character
|
||||
|
||||
|
||||
Periperials - Monitor
|
||||
- , high-resolution monitor SM, color monitor model was to distinguish it from CD.
|
||||
|
||||
|
||||
1) MD-1255H (Low resolution monitors MD)
|
||||
- 12 inches Composite 15.734KHz / 60Hz
|
||||
- N displayed after the model name in the model is non - CRT scanning products
|
||||
- Stand adopted: if you put the rest on the bottom that can be placed slightly tilted back.
|
||||
|
||||
|
||||
2) MD-9052H (Low resolution monitors MD)
|
||||
- 9 inches Composite 15.734KHz / 60Hz
|
||||
- N from model name means 'anti-glare'
|
||||
- N from model name means 'anti-glare'
|
||||
- All parts except for the appearance and size is the same as the CRT 1255H.
|
||||
|
||||
|
||||
3) MD-2563 (color monitor SM)
|
||||
4) SM-1439A (high-resolution monitor SM)
|
||||
5) SM-1422 (high-resolution monitor SM)
|
||||
@ -115,38 +115,38 @@ TODO:
|
||||
- High-resolution monochrome monitor
|
||||
7) SM-1231A (high-resolution monitor SM)
|
||||
- The other part is other than the appearance of the stand is attached to the same as the model SM-1231
|
||||
|
||||
8) CD-1451D (color monitor SM)
|
||||
|
||||
8) CD-1451D (color monitor SM)
|
||||
- Composite color monitors
|
||||
9) CD-1462X (color monitor SM)
|
||||
10)CD-1464W (color monitor SM)
|
||||
11)CW-4644
|
||||
|
||||
11)CW-4644
|
||||
|
||||
FDD (floppy disk drive)
|
||||
|
||||
|
||||
1) SD-1500A
|
||||
- 5.25 "floppy drive for 2D composed of external disk drives diskettes
|
||||
2) SD-1500B
|
||||
2) SD-1500B
|
||||
- Dual external disk drives
|
||||
- The two models are idential except the number of FDD. They need the expension controller card named by SFC-1500.
|
||||
- IBM PC XT compatible FDD can be quipped. SFD-5x0 model is a genuine FDD from Samsung Electronics.
|
||||
|
||||
HDD (Hard Disk Drive)
|
||||
|
||||
|
||||
1) STH-20
|
||||
- External hard disk drive set having a capacity of 20MB SCSI controller and the way
|
||||
- The controller had not solved alone but the controller can be used to mount another hard disk products.
|
||||
- Release price: 450,000 won ($530).
|
||||
|
||||
|
||||
Joysticks
|
||||
- Joystick was limited to 1 as possible (The PCB was designed by supporting two joysticks.
|
||||
|
||||
- Joystick was limited to 1 as possible (The PCB was designed by supporting two joysticks.
|
||||
|
||||
1) SJ-1500
|
||||
- Release price: 8,000 won ($9.4)
|
||||
- SPC-1000A, MSX-compatible
|
||||
|
||||
|
||||
Printer
|
||||
|
||||
|
||||
1) SP-510S
|
||||
- Bitmap image output method Hangul support
|
||||
- Recommanded 80 columns dot-matrix printer
|
||||
@ -157,68 +157,68 @@ TODO:
|
||||
5) SP-570B
|
||||
|
||||
Expansion Cards
|
||||
|
||||
|
||||
1) SFC-1500
|
||||
- External FDD capacity of the floppy disk controller 5.25 inches / 320KB can connect up to two.
|
||||
|
||||
|
||||
2) Multi-controller
|
||||
- Floppy disk controllers and hard disk controllers on the same PCB.
|
||||
|
||||
|
||||
3) ST-PAC
|
||||
- FM sound card can play with up to 9 simultaneous sound or 5 simultaneous sound and 5 drum tones at the same time (FM-PAC compatible MSX)
|
||||
- Line output and speaker output volume, tone adjustment built-in volume
|
||||
- it can be used as a synthesizer by connecting the ST-KEY2 product
|
||||
- it can be used as a synthesizer by connecting the ST-KEY2 product
|
||||
- Release price: 60,000won ($71)
|
||||
|
||||
|
||||
SPC-1500 VDP card
|
||||
- MSX game support
|
||||
- MSX game support
|
||||
- Release price: 35,000won ($41) with composite output only
|
||||
- Release price: 60,000won ($71) with composite and RGB outputs simultaneously
|
||||
|
||||
|
||||
VDP UNIT I
|
||||
- Composite video output with built-in card expansion card using the same video chip and MSX (static soft)
|
||||
- Release price: 40,000won ($47).
|
||||
|
||||
|
||||
VDP UNIT II
|
||||
- Expansion using the same video chip and video card with built-in card MSX with an RGB output (static soft)
|
||||
- Release price: 55,000won ($59).
|
||||
|
||||
|
||||
LAN card (SAMNET-K)
|
||||
- It uses serial communication instead of an Ethernet network card has a way with two serial ports.
|
||||
- There are two kinds of host card without a DIP switch and the DIP switch is in the client card.
|
||||
- It was mainly supplied to the teacher / student in an educational institution.
|
||||
|
||||
|
||||
Super Pack Card
|
||||
- Expansion cards that enable the external expansion slot, etc.
|
||||
|
||||
|
||||
RS-232C card
|
||||
- At least 300bps, an external modem connected to the serial communication card that supports up to 19,200bps
|
||||
additionally available communications services using the PSTN network (general switched telephone network)
|
||||
and may also be connected to a 9-pin serial mouse.
|
||||
- Support for common serial communications functions,
|
||||
- At least 300bps, an external modem connected to the serial communication card that supports up to 19,200bps
|
||||
additionally available communications services using the PSTN network (general switched telephone network)
|
||||
and may also be connected to a 9-pin serial mouse.
|
||||
- Support for common serial communications functions,
|
||||
and if IOCS ROM version 1.8 or higher to connect an external modem to the PC communication card is available.
|
||||
- When used in this communication program is super soft static net programs (XMODEM protocol, FS 220-6 compatible
|
||||
- When used in this communication program is super soft static net programs (XMODEM protocol, FS 220-6 compatible
|
||||
and supporting Samsung/Sambo combination korean character code, and an 8-bit code completion support Hangul) is used.
|
||||
- Release price: 60,000won ($71).
|
||||
|
||||
|
||||
SS-1 ROM pack unit
|
||||
- The VDP unit containing 1 cartridge slot card and ROM pack
|
||||
- ROM pack was not compatible with original MSX ROM pack
|
||||
- Release price: 49,900won ($58)
|
||||
|
||||
|
||||
Super Pack
|
||||
- External ROM cartrige from Static Soft (C)
|
||||
- 1 cartridge slot and 3 expansion slots (up to five expansion slots available)
|
||||
- It is available to use the MSX ROM packs without any modification with the static soft VDP card
|
||||
- Release price: 60,000won ($71)
|
||||
|
||||
|
||||
ST-KEY2
|
||||
- For synthesizer external keyboard
|
||||
|
||||
|
||||
* Compatiblity with X1 series of Sharp Electronics
|
||||
- Almost the key components is the same as X1 models of Sharp Electronics and except for the keyboard input.
|
||||
- To port the X1 software to SPC-1500, Text attribute, keyboard input and DMA related code should be modified
|
||||
|
||||
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
@ -247,14 +247,14 @@ public:
|
||||
, m_pcgram(*this, "pcgram")
|
||||
, m_io_kb(*this, "LINE")
|
||||
, m_io_joy(*this, "JOY")
|
||||
, m_dipsw(*this, "DIP_SWITCH")
|
||||
, m_dipsw(*this, "DIP_SWITCH")
|
||||
, m_centronics(*this, "centronics")
|
||||
, m_pio(*this, "ppi8255")
|
||||
, m_sound(*this, "ay8910")
|
||||
, m_palette(*this, "palette")
|
||||
, m_timer(nullptr)
|
||||
{}
|
||||
DECLARE_READ8_MEMBER(psga_r);
|
||||
DECLARE_READ8_MEMBER(psga_r);
|
||||
DECLARE_READ8_MEMBER(porta_r);
|
||||
DECLARE_WRITE_LINE_MEMBER( centronics_busy_w ) { m_centronics_busy = state; }
|
||||
DECLARE_READ8_MEMBER(mc6845_videoram_r);
|
||||
@ -281,7 +281,7 @@ public:
|
||||
DECLARE_READ8_MEMBER(io_r);
|
||||
DECLARE_PALETTE_INIT(spc);
|
||||
DECLARE_VIDEO_START(spc);
|
||||
MC6845_UPDATE_ROW(crtc_update_row);
|
||||
MC6845_UPDATE_ROW(crtc_update_row);
|
||||
MC6845_RECONFIGURE(crtc_reconfig);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(timer);
|
||||
private:
|
||||
@ -315,8 +315,8 @@ private:
|
||||
required_device<centronics_device> m_centronics;
|
||||
required_device<i8255_device> m_pio;
|
||||
required_device<ay8910_device> m_sound;
|
||||
required_device<palette_device> m_palette;
|
||||
UINT8 *m_font;
|
||||
required_device<palette_device> m_palette;
|
||||
UINT8 *m_font;
|
||||
UINT8 m_priority;
|
||||
emu_timer *m_timer;
|
||||
void get_pcg_addr();
|
||||
@ -338,7 +338,7 @@ WRITE8_MEMBER( spc1500_state::romsel)
|
||||
if (m_ipl)
|
||||
membank("bank1")->set_entry(0);
|
||||
else
|
||||
membank("bank1")->set_entry(1);
|
||||
membank("bank1")->set_entry(1);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( spc1500_state::ramsel)
|
||||
@ -349,7 +349,7 @@ WRITE8_MEMBER( spc1500_state::ramsel)
|
||||
|
||||
WRITE8_MEMBER( spc1500_state::portb_w)
|
||||
{
|
||||
// m_ipl = data & (1 << 1);
|
||||
// m_ipl = data & (1 << 1);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( spc1500_state::psgb_w)
|
||||
@ -381,12 +381,12 @@ WRITE8_MEMBER( spc1500_state::portc_w)
|
||||
READ8_MEMBER( spc1500_state::portb_r)
|
||||
{
|
||||
UINT8 data = 0;
|
||||
data |= ((m_cass->get_state() & CASSETTE_MASK_UISTATE) == CASSETTE_STOPPED || ((m_cass->get_state() & CASSETTE_MASK_MOTOR) == CASSETTE_MOTOR_DISABLED));
|
||||
data |= (m_dipsw->read() & 1) << 4;
|
||||
data |= (m_cass->input() > 0.0038)<<1;
|
||||
data |= m_vdg->vsync_r()<<7;
|
||||
data &= ~((m_centronics_busy==0)<<3);
|
||||
return data;
|
||||
data |= ((m_cass->get_state() & CASSETTE_MASK_UISTATE) == CASSETTE_STOPPED || ((m_cass->get_state() & CASSETTE_MASK_MOTOR) == CASSETTE_MOTOR_DISABLED));
|
||||
data |= (m_dipsw->read() & 1) << 4;
|
||||
data |= (m_cass->input() > 0.0038)<<1;
|
||||
data |= m_vdg->vsync_r()<<7;
|
||||
data &= ~((m_centronics_busy==0)<<3);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( spc1500_state::crtc_w)
|
||||
@ -444,7 +444,7 @@ void spc1500_state::get_pcg_addr()
|
||||
m_pcg_offset[0] = 0;
|
||||
m_pcg_offset[1] = 0;
|
||||
m_pcg_offset[2] = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( spc1500_state::pcg_w)
|
||||
@ -506,13 +506,12 @@ PALETTE_INIT_MEMBER(spc1500_state,spc)
|
||||
|
||||
VIDEO_START_MEMBER(spc1500_state, spc)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
MC6845_RECONFIGURE(spc1500_state::crtc_reconfig)
|
||||
{
|
||||
// printf("reconfig. w:%d, h:%d, %f (%d,%d,%d,%d)\n", width, height, (float)frame_period, visarea.left(), visarea.top(), visarea.right(), visarea.bottom());
|
||||
// printf("register. m_vert_disp:%d, m_horiz_disp:%d, m_max_ras_addr:%d, m_vert_char_total:%d\n", m_crtc_vreg[6], m_crtc_vreg[1], m_crtc_vreg[9], m_crtc_vreg[0x4]);
|
||||
// printf("reconfig. w:%d, h:%d, %f (%d,%d,%d,%d)\n", width, height, (float)frame_period, visarea.left(), visarea.top(), visarea.right(), visarea.bottom());
|
||||
// printf("register. m_vert_disp:%d, m_horiz_disp:%d, m_max_ras_addr:%d, m_vert_char_total:%d\n", m_crtc_vreg[6], m_crtc_vreg[1], m_crtc_vreg[9], m_crtc_vreg[0x4]);
|
||||
}
|
||||
|
||||
MC6845_UPDATE_ROW(spc1500_state::crtc_update_row)
|
||||
@ -524,7 +523,7 @@ MC6845_UPDATE_ROW(spc1500_state::crtc_update_row)
|
||||
int j;
|
||||
int h1, h2, h3;
|
||||
UINT32 *p = &bitmap.pix32(y);
|
||||
|
||||
|
||||
unsigned char cho[] ={1,1,1,1,1,1,1,1,0,0,1,1,1,3,5,5,0,0,5,3,3,5,5,5,0,0,3,3,5,1};
|
||||
unsigned char jong[]={0,0,0,1,1,1,1,1,0,0,1,1,1,2,2,2,0,0,2,2,2,2,2,2,0,0,2,2,1,1};
|
||||
bool inv = false;
|
||||
@ -564,7 +563,7 @@ MC6845_UPDATE_ROW(spc1500_state::crtc_update_row)
|
||||
hfnt = hfnt & ((*pf << 8) | (*(pf+16)));
|
||||
pf = &m_font[0x6000+(h3 * 32) + (jong[h2]-1) * 16 * 2 * 32 + n];
|
||||
hfnt = hfnt & ((*pf << 8) | (*(pf+16)));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
ascii = *(pv+0x1001);
|
||||
@ -639,15 +638,15 @@ WRITE8_MEMBER( spc1500_state::double_w)
|
||||
if (offset < 0x1e00) { romsel(space, offset, data);} else
|
||||
if (offset < 0x1f00) { ramsel(space, offset, data);} else
|
||||
if (offset < 0x2000) {} else
|
||||
if (offset < 0x10000)
|
||||
{
|
||||
if (offset < 0x4000)
|
||||
if (offset < 0x10000)
|
||||
{
|
||||
if (offset < 0x4000)
|
||||
{
|
||||
offset &= 0xf7ff;
|
||||
m_p_videoram[offset-0x1800] = m_p_videoram[offset-0x2000] = data;
|
||||
}
|
||||
else
|
||||
m_p_videoram[offset-0x2000] = data;
|
||||
m_p_videoram[offset-0x2000] = data;
|
||||
};
|
||||
}
|
||||
}
|
||||
@ -655,7 +654,7 @@ WRITE8_MEMBER( spc1500_state::double_w)
|
||||
READ8_MEMBER( spc1500_state::io_r)
|
||||
{
|
||||
m_double_mode = false;
|
||||
if (offset < 0x1000) {} else
|
||||
if (offset < 0x1000) {} else
|
||||
if (offset < 0x1400) {} else
|
||||
if (offset < 0x1800) { return pcg_r(space, offset); } else
|
||||
if (offset < 0x1900) { return crtc_r(space, offset); } else
|
||||
@ -663,7 +662,7 @@ READ8_MEMBER( spc1500_state::io_r)
|
||||
if (offset < 0x1b00) { return m_pio->read(space, offset); } else
|
||||
if (offset < 0x1c00) { return m_sound->data_r(space, offset); } else
|
||||
if (offset < 0x2000) {} else
|
||||
if (offset < 0x10000){
|
||||
if (offset < 0x10000){
|
||||
if (offset < 0x4000)
|
||||
offset &= 0xf7ff;
|
||||
return m_p_videoram[offset - 0x2000]; }
|
||||
@ -680,13 +679,13 @@ ADDRESS_MAP_END
|
||||
#if 0
|
||||
static ADDRESS_MAP_START( spc1500_io , AS_IO, 8, spc1500_state )
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
// AM_RANGE(0x0000, 0x03ff) AM_DEVREADWRITE("userio", user_device, userio_r, userio_w)
|
||||
// AM_RANGE(0x0400, 0x05ff) AM_DEVREADWRITE("lanio", lan_device, lanio_r, lanio_w)
|
||||
// AM_RANGE(0x0600, 0x07ff) AM_DEVREADWRITE("rs232c", rs232c_device, rs232c_r, rs232c_w)
|
||||
// AM_RANGE(0x0800, 0x09ff) AM_DEVREADWRITE("fdcx", fdcx_device, fdcx_r, fdcx_w)
|
||||
// AM_RANGE(0x0a00, 0x0bff) AM_DEVREADWRITE("userio", user_device, userio_r, userio_w)
|
||||
// AM_RANGE(0x0c00, 0x0dff) AM_DEVREADWRITE("fdc", fdc_device, fdc_r, fdc_w)
|
||||
// AM_RANGE(0x0e00, 0x0fff) AM_DEVREADWRITE("extram", extram_device, extram_r, extram_w)
|
||||
// AM_RANGE(0x0000, 0x03ff) AM_DEVREADWRITE("userio", user_device, userio_r, userio_w)
|
||||
// AM_RANGE(0x0400, 0x05ff) AM_DEVREADWRITE("lanio", lan_device, lanio_r, lanio_w)
|
||||
// AM_RANGE(0x0600, 0x07ff) AM_DEVREADWRITE("rs232c", rs232c_device, rs232c_r, rs232c_w)
|
||||
// AM_RANGE(0x0800, 0x09ff) AM_DEVREADWRITE("fdcx", fdcx_device, fdcx_r, fdcx_w)
|
||||
// AM_RANGE(0x0a00, 0x0bff) AM_DEVREADWRITE("userio", user_device, userio_r, userio_w)
|
||||
// AM_RANGE(0x0c00, 0x0dff) AM_DEVREADWRITE("fdc", fdc_device, fdc_r, fdc_w)
|
||||
// AM_RANGE(0x0e00, 0x0fff) AM_DEVREADWRITE("extram", extram_device, extram_r, extram_w)
|
||||
AM_RANGE(0x1000, 0x10ff) AM_WRITE(paletb_w)
|
||||
AM_RANGE(0x1100, 0x11ff) AM_WRITE(paletr_w)
|
||||
AM_RANGE(0x1200, 0x12ff) AM_WRITE(paletg_w)
|
||||
@ -696,48 +695,48 @@ static ADDRESS_MAP_START( spc1500_io , AS_IO, 8, spc1500_state )
|
||||
AM_RANGE(0x1600, 0x16ff) AM_READWRITE(pcgr_r, pcgr_w)
|
||||
AM_RANGE(0x1700, 0x17ff) AM_WRITE(pcgg_w)
|
||||
AM_RANGE(0x1800, 0x18ff) AM_READWRITE(crtc_r, crtc_w)
|
||||
// AM_RANGE(0x1800, 0x1800) AM_DEVWRITE("mc6845", mc6845_device, address_w)
|
||||
// AM_RANGE(0x1801, 0x1801) AM_DEVREADWRITE("mc6845", mc6845_device, register_r, register_w)
|
||||
// AM_RANGE(0x1800, 0x1801) AM_READWRITE(crtc_r, crtc_w)
|
||||
// AM_RANGE(0x1800, 0x1800) AM_DEVWRITE("mc6845", mc6845_device, address_w)
|
||||
// AM_RANGE(0x1801, 0x1801) AM_DEVREADWRITE("mc6845", mc6845_device, register_r, register_w)
|
||||
// AM_RANGE(0x1800, 0x1801) AM_READWRITE(crtc_r, crtc_w)
|
||||
AM_RANGE(0x1900, 0x1909) AM_READ(keyboard_r)
|
||||
AM_RANGE(0x1a00, 0x1a03) AM_DEVREADWRITE("ppi8255", i8255_device, read, write)
|
||||
AM_RANGE(0x1a00, 0x1a03) AM_DEVREADWRITE("ppi8255", i8255_device, read, write)
|
||||
AM_RANGE(0x1b00, 0x1bff) AM_DEVREADWRITE("ay8910", ay8910_device, data_r, data_w)
|
||||
AM_RANGE(0x1c00, 0x1cff) AM_DEVWRITE("ay8910", ay8910_device, address_w)
|
||||
AM_RANGE(0x1d00, 0x1d00) AM_WRITE(romsel)
|
||||
AM_RANGE(0x1e00, 0x1e00) AM_WRITE(ramsel)
|
||||
AM_RANGE(0x2000, 0xffff) AM_RAM AM_SHARE("videoram")
|
||||
ADDRESS_MAP_END
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Input ports */
|
||||
static INPUT_PORTS_START( spc1500 )
|
||||
|
||||
PORT_START("DIP_SWITCH")
|
||||
PORT_DIPNAME( 0x01, 0x00, "40/80" )
|
||||
PORT_DIPSETTING( 0x00, "40COL" )
|
||||
PORT_DIPSETTING( 0x01, "80COL" )
|
||||
PORT_DIPNAME( 0x02, 0x02, "Language" )
|
||||
PORT_DIPSETTING( 0x02, "Korean" )
|
||||
PORT_DIPSETTING( 0x00, "English" )
|
||||
PORT_START("DIP_SWITCH")
|
||||
PORT_DIPNAME( 0x01, 0x00, "40/80" )
|
||||
PORT_DIPSETTING( 0x00, "40COL" )
|
||||
PORT_DIPSETTING( 0x01, "80COL" )
|
||||
PORT_DIPNAME( 0x02, 0x02, "Language" )
|
||||
PORT_DIPSETTING( 0x02, "Korean" )
|
||||
PORT_DIPSETTING( 0x00, "English" )
|
||||
PORT_DIPNAME( 0x04, 0x00, "V-Res" )
|
||||
PORT_DIPSETTING( 0x04, "400" )
|
||||
PORT_DIPSETTING( 0x04, "400" )
|
||||
PORT_DIPSETTING( 0x00, "200" )
|
||||
PORT_DIPNAME( 0x08, 0x08, "X1" )
|
||||
PORT_DIPSETTING( 0x08, "Compatible Mode" )
|
||||
PORT_DIPSETTING( 0x08, "Compatible Mode" )
|
||||
PORT_DIPSETTING( 0x00, "Non Compatible" )
|
||||
|
||||
|
||||
PORT_START("LINE.0")
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Shift") PORT_CODE(KEYCODE_RSHIFT) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_RCONTROL) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Break") PORT_CODE(KEYCODE_PAUSE)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("\\ |") PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') PORT_CHAR(0x1c)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Graph") PORT_CODE(KEYCODE_LALT)
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("LINE.1")
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("= +") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+')
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("= +") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+')
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right") PORT_CODE(KEYCODE_RIGHT)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
|
||||
@ -768,7 +767,7 @@ static INPUT_PORTS_START( spc1500 )
|
||||
|
||||
PORT_START("LINE.4")
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Del Ins") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) PORT_CHAR(8)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t')
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Home") PORT_CODE(KEYCODE_HOME)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("N") PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') PORT_CHAR(0x0e)
|
||||
@ -777,9 +776,9 @@ static INPUT_PORTS_START( spc1500 )
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4 $") PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
|
||||
|
||||
PORT_START("LINE.5")
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F1") PORT_CODE(KEYCODE_F1)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("M") PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') PORT_CHAR(0x0d)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("G") PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') PORT_CHAR(0x07)
|
||||
@ -787,7 +786,7 @@ static INPUT_PORTS_START( spc1500 )
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5 %") PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
|
||||
|
||||
PORT_START("LINE.6")
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F2") PORT_CODE(KEYCODE_F2)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("[ {") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') PORT_CHAR(0x1b)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("X") PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') PORT_CHAR(0x18)
|
||||
@ -797,9 +796,9 @@ static INPUT_PORTS_START( spc1500 )
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6 ^") PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^')
|
||||
|
||||
PORT_START("LINE.7")
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F3") PORT_CODE(KEYCODE_F3)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("P") PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') PORT_CHAR(0x10)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(". >") PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>')
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("J") PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') PORT_CHAR(0x0a)
|
||||
@ -807,9 +806,9 @@ static INPUT_PORTS_START( spc1500 )
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7 &") PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&')
|
||||
|
||||
PORT_START("LINE.8")
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F4") PORT_CODE(KEYCODE_F4)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("\' \"") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('\"')
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/ ?") PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("K") PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') PORT_CHAR(0x0b)
|
||||
@ -817,7 +816,7 @@ static INPUT_PORTS_START( spc1500 )
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8 *") PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*')
|
||||
|
||||
PORT_START("LINE.9")
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Hangul") PORT_CODE(KEYCODE_RALT)
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Hangul") PORT_CODE(KEYCODE_RALT)
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F5") PORT_CODE(KEYCODE_F5)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("- _") PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_')
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0 )") PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')')
|
||||
@ -834,12 +833,12 @@ static INPUT_PORTS_START( spc1500 )
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH,IPT_UNUSED) // DIP SW2 for Korean/English
|
||||
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
|
||||
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH,IPT_UNUSED) // DIP SW3 for 200/400 line
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH,IPT_UNUSED) // DIP SW3 for 200/400 line
|
||||
INPUT_PORTS_END
|
||||
|
||||
static ADDRESS_MAP_START(spc1500_mem, AS_PROGRAM, 8, spc1500_state )
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE_BANK("bank2")
|
||||
AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE_BANK("bank2")
|
||||
AM_RANGE(0x8000, 0xffff) AM_READWRITE_BANK("bank4")
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -848,7 +847,7 @@ void spc1500_state::machine_start()
|
||||
UINT8 *mem_basic = memregion("basic")->base();
|
||||
UINT8 *mem_ipl = memregion("ipl")->base();
|
||||
m_p_ram = m_ram->pointer();
|
||||
m_font = memregion("font1")->base();
|
||||
m_font = memregion("font1")->base();
|
||||
// configure and intialize banks 1 (read banks)
|
||||
membank("bank1")->configure_entry(0, mem_ipl);
|
||||
membank("bank1")->configure_entry(1, mem_basic);
|
||||
@ -859,7 +858,7 @@ void spc1500_state::machine_start()
|
||||
set_address_space(AS_IO, m_maincpu->space(AS_IO));
|
||||
// intialize banks 2, 3, 4 (write banks)
|
||||
membank("bank2")->set_base(m_p_ram);
|
||||
membank("bank4")->set_base(m_p_ram + 0x8000);
|
||||
membank("bank4")->set_base(m_p_ram + 0x8000);
|
||||
m_timer = timer_alloc(0);
|
||||
m_timer->adjust(attotime::zero);
|
||||
}
|
||||
@ -867,7 +866,7 @@ void spc1500_state::machine_start()
|
||||
void spc1500_state::machine_reset()
|
||||
{
|
||||
m_motor = false;
|
||||
m_time = machine().scheduler().time();
|
||||
m_time = machine().scheduler().time();
|
||||
m_double_mode = false;
|
||||
memset(&m_paltbl[0], 1, 8);
|
||||
m_char_count = 0;
|
||||
@ -904,30 +903,30 @@ static MACHINE_CONFIG_START( spc1500, spc1500_state )
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(spc1500_state, irq0_line_hold, 60)
|
||||
|
||||
/* video hardware */
|
||||
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
|
||||
MCFG_SCREEN_SIZE(640, 400)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0,640-1,0,400-1)
|
||||
MCFG_SCREEN_UPDATE_DEVICE("mc6845", mc6845_device, screen_update )
|
||||
MCFG_PALETTE_ADD("palette", 8)
|
||||
MCFG_PALETTE_ADD("palette", 8)
|
||||
MCFG_PALETTE_INIT_OWNER(spc1500_state, spc)
|
||||
MCFG_MC6845_ADD("mc6845", MC6845, "screen", (VDP_CLOCK/48)) //unknown divider
|
||||
MCFG_MC6845_SHOW_BORDER_AREA(false)
|
||||
MCFG_MC6845_CHAR_WIDTH(8)
|
||||
MCFG_MC6845_UPDATE_ROW_CB(spc1500_state, crtc_update_row)
|
||||
MCFG_MC6845_RECONFIGURE_CB(spc1500_state, crtc_reconfig)
|
||||
MCFG_VIDEO_START_OVERRIDE(spc1500_state, spc)
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(spc1500_state, spc)
|
||||
|
||||
MCFG_DEVICE_ADD("ppi8255", I8255, 0)
|
||||
MCFG_I8255_OUT_PORTA_CB(DEVWRITE8("cent_data_out", output_latch_device, write))
|
||||
MCFG_I8255_IN_PORTB_CB(READ8(spc1500_state, portb_r))
|
||||
MCFG_I8255_OUT_PORTB_CB(WRITE8(spc1500_state, portb_w))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(spc1500_state, portc_w))
|
||||
|
||||
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("1hz", spc1500_state, timer, attotime::from_hz(1))
|
||||
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
MCFG_SOUND_ADD("ay8910", AY8910, XTAL_4MHz / 2)
|
||||
@ -959,12 +958,12 @@ ROM_START( spc1500 )
|
||||
ROM_LOAD("ipl.rom", 0x0000, 0x8000, CRC(80d0704a) SHA1(01e4cbe8baad72effbbe01addd477c5b0ec85c16))
|
||||
ROM_REGION(0x8000, "basic", ROMREGION_ERASEFF)
|
||||
ROM_LOAD("basic.rom", 0x0000, 0x8000, CRC(f48328e1) SHA1(fb874ea7d20078726682f2d0e03ea0d1f8bdbb07))
|
||||
ROM_REGION(0x8000, "font1", 0)
|
||||
ROM_REGION(0x8000, "font1", 0)
|
||||
ROM_LOAD( "ss150fnt.bin", 0x0000, 0x2000, CRC(affdc5c0) SHA1(2a93582fcccf9e40b99ae238ce585d189afe9a5a) )
|
||||
ROM_LOAD( "ss151fnt.bin", 0x2000, 0x2000, CRC(83c2eb8d) SHA1(2adf7816206dc74b9f0d32cb3b56cbab31fa6044) )
|
||||
ROM_LOAD( "ss152fnt.bin", 0x4000, 0x2000, CRC(f4a5a590) SHA1(c9a02756107083bf602ae7c90cfe29b8b964e0df) )
|
||||
ROM_LOAD( "ss153fnt.bin", 0x6000, 0x2000, CRC(8677d5fa) SHA1(34bfacc855c3846744cd586c150c72e5cbe948b0) )
|
||||
|
||||
|
||||
ROM_END
|
||||
|
||||
|
||||
|
@ -236,7 +236,7 @@ void taitopjc_state::video_start()
|
||||
m_tilemap[1] = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(taitopjc_state::tile_get_info),this), tilemap_mapper_delegate(FUNC(taitopjc_state::tile_scan_layer1),this), 16, 16, 32, 32);
|
||||
m_tilemap[0]->set_transparent_pen(0);
|
||||
m_tilemap[1]->set_transparent_pen(1);
|
||||
|
||||
|
||||
m_gfxdecode->set_gfx(0, std::make_unique<gfx_element>(m_palette, char_layout, (UINT8*)m_screen_ram.get(), 0, m_palette->entries() / 256, 0));
|
||||
|
||||
machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(taitopjc_state::video_exit), this));
|
||||
@ -280,7 +280,7 @@ void taitopjc_state::videochip_w(offs_t address, UINT32 data)
|
||||
{
|
||||
UINT32 addr = address - 0x10000000;
|
||||
m_screen_ram[addr] = data;
|
||||
|
||||
|
||||
if (address >= 0x1003f000)
|
||||
{
|
||||
UINT32 a = address - 0x1003f000;
|
||||
|
@ -1368,7 +1368,7 @@ void taitotz_renderer::push_tnl_fifo(UINT32 data)
|
||||
UINT32 alpha = m_tnl_fifo[2];
|
||||
render_tnl_object(m_tnl_fifo[0] & 0x1fffff, scale, alpha);
|
||||
|
||||
// printf("TNL FIFO: %08X, %f, %08X, %08X\n", m_tnl_fifo[0], u2f(m_tnl_fifo[1]), m_tnl_fifo[2], m_tnl_fifo[3]);
|
||||
// printf("TNL FIFO: %08X, %f, %08X, %08X\n", m_tnl_fifo[0], u2f(m_tnl_fifo[1]), m_tnl_fifo[2], m_tnl_fifo[3]);
|
||||
m_tnl_fifo_ptr = 0;
|
||||
}
|
||||
}
|
||||
@ -1382,7 +1382,7 @@ void taitotz_renderer::push_direct_poly_fifo(UINT32 data)
|
||||
int expected_size;
|
||||
switch ((m_direct_fifo[0] >> 8) & 0x7)
|
||||
{
|
||||
case 0: expected_size = 24; break;
|
||||
case 0: expected_size = 24; break;
|
||||
case 2: expected_size = 16; break;
|
||||
case 3: expected_size = 24; break;
|
||||
case 4: expected_size = 24; break;
|
||||
@ -1650,7 +1650,7 @@ READ64_MEMBER(taitotz_state::video_chip_r)
|
||||
{
|
||||
case 0x14:
|
||||
{
|
||||
r |= 0xff; // more busy flags? (value & 0x11ff == 0xff expected)
|
||||
r |= 0xff; // more busy flags? (value & 0x11ff == 0xff expected)
|
||||
break;
|
||||
}
|
||||
|
||||
@ -2612,8 +2612,8 @@ void taitotz_state::init_taitotz_152()
|
||||
// rom[(0x2c620^4)/4] = 0x48000014; // ID check skip (not needed with correct serial number)
|
||||
|
||||
#if 0
|
||||
rom[(0x2c164^4)/4] = 0x39600001; // enable game debug output
|
||||
rom[(0x2c174^4)/4] = 0x39200001; // enable game debug output
|
||||
rom[(0x2c164^4)/4] = 0x39600001; // enable game debug output
|
||||
rom[(0x2c174^4)/4] = 0x39200001; // enable game debug output
|
||||
rom[(0x2c978^4)/4] = 0x48000028;
|
||||
#endif
|
||||
}
|
||||
@ -2751,9 +2751,9 @@ Logical Cylinders 14,848
|
||||
Logical Sectors/Track 63
|
||||
Physical Heads 6
|
||||
Physical Disks 3
|
||||
Sectors Per Drive 8,418,816
|
||||
Average Seek Time 10.0 ms (read)
|
||||
Buffer Size 128K
|
||||
Sectors Per Drive 8,418,816
|
||||
Average Seek Time 10.0 ms (read)
|
||||
Buffer Size 128K
|
||||
|
||||
*/
|
||||
|
||||
|
@ -60,7 +60,7 @@ void ticalc1x_state::machine_start()
|
||||
TI SR-16 (1974, first consumer product with TMS1000 series MCU)
|
||||
* TMS1000 MCU labeled TMS1001NL (die labeled 1000, 1001A)
|
||||
* 12-digit 7seg LED display
|
||||
|
||||
|
||||
TI SR-16 II (1975 version)
|
||||
* TMS1000 MCU labeled TMS1016NL (die labeled 1000B, 1016A)
|
||||
* notes: cost-reduced 'sequel', [10^x] was removed, and [pi] was added.
|
||||
@ -283,11 +283,11 @@ MACHINE_CONFIG_END
|
||||
TI-1250/TI-1200 (1976 version), TI-1400, TI-1450, TI-1205, TI-1255, LADY 1200, ABLE
|
||||
* TMS0970 MCU labeled TMS0972NL ZA0348, JP0972A (die labeled 0970D-72A)
|
||||
* 8-digit 7seg LED display, or 9 digits with leftmost unused
|
||||
|
||||
|
||||
As seen listed above, the basic 4-function TMS0972 calculator MCU was used
|
||||
in many calculators. It was licensed to other manufacturers too, one funny
|
||||
example being a Mattel Barbie handheld calculator.
|
||||
|
||||
|
||||
Some cheaper models lacked the memory buttons (the function itself still works).
|
||||
The ABLE series was for educational purposes, with each having a small subset of
|
||||
available buttons.
|
||||
|
@ -24,7 +24,7 @@
|
||||
Ballistix
|
||||
Be Ball
|
||||
Bomberman
|
||||
Chōzetsurinjin Beraboh Man (Super Foolish Man)
|
||||
Chozetsurinjin Beraboh Man (Super Foolish Man)
|
||||
Chuka Taisen
|
||||
Columns
|
||||
Coryoon
|
||||
@ -471,7 +471,7 @@ ROM_END
|
||||
|
||||
|
||||
|
||||
/* 1943 Kai */
|
||||
/* 1943 Kai */
|
||||
ROM_START(tv1943)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_1943_kia.bin", 0x00000, 0x100000, CRC(de4672ab) SHA1(2da1ee082bfb920c632a95014208f11fb48c58e1) )
|
||||
@ -479,7 +479,7 @@ ROM_START(tv1943)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Aero Blasters - Hudson / Kaneko */
|
||||
/* Aero Blasters - Hudson / Kaneko */
|
||||
ROM_START(tvablast)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_ablast.bin", 0x00000, 0x100000, CRC(9302f6d0) SHA1(76ef27a6d639514ed261b9d65f37217f2989d1c0) )
|
||||
@ -487,7 +487,7 @@ ROM_START(tvablast)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* After Burner */
|
||||
/* After Burner */
|
||||
ROM_START(tvaburn)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_afterburner.bin", 0x00000, 0x100000, CRC(5ce31322) SHA1(08918d443891bd70f1b0b0c739522b764b16bc96) )
|
||||
@ -495,7 +495,7 @@ ROM_START(tvaburn)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Armed-F */
|
||||
/* Armed-F */
|
||||
ROM_START(tvarmedf)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_armed-f.bin", 0x00000, 0x100000, CRC(056617f5) SHA1(d10eb80b8436b8d217170309647104181cca750a) )
|
||||
@ -503,7 +503,7 @@ ROM_START(tvarmedf)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Ballistix */
|
||||
/* Ballistix */
|
||||
ROM_START(tvbalstx)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_ballistix.bin", 0x00000, 0x100000, CRC(9d32ed98) SHA1(404cc3695940a7fdc802ac166ec564a858a894d0) )
|
||||
@ -511,7 +511,7 @@ ROM_START(tvbalstx)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Be Ball */
|
||||
/* Be Ball */
|
||||
ROM_START(tvbeball)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_be_ball.bin", 0x00000, 0x100000, CRC(4b1e2861) SHA1(bea449543284bb6f4b33b1fb4156cd18a782ad6a) )
|
||||
@ -519,7 +519,7 @@ ROM_START(tvbeball)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Bomberman */
|
||||
/* Bomberman */
|
||||
ROM_START(tvbomber)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_bomberman.bin", 0x00000, 0x100000, CRC(cfcabe78) SHA1(bdd1766fad43c6c76e1b0d6e8b4f0ba3363442d6) )
|
||||
@ -527,7 +527,7 @@ ROM_START(tvbomber)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Chōzetsurinjin Beraboh Man (Super Foolist Man) */
|
||||
/* Chozetsurinjin Beraboh Man (Super Foolist Man) */
|
||||
ROM_START(tvbrabho)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_chozetsurinjin_beraboh_man.bin", 0x00000, 0x100000, CRC(1f80cf04) SHA1(121bfb9ba4de4d047b08442d900b7f351210dd48) )
|
||||
@ -535,7 +535,7 @@ ROM_START(tvbrabho)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Chuka Taisen */
|
||||
/* Chuka Taisen */
|
||||
ROM_START(tvtaisen)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_chuka_taisen.bin", 0x00000, 0x100000, CRC(3b9e9185) SHA1(96f9f82a9fa6ee2b92c0294e71d47886e27fdc06) )
|
||||
@ -551,7 +551,7 @@ ROM_START(tvcolumn)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Coryoon */
|
||||
/* Coryoon */
|
||||
ROM_START(tvcoryon)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_corycoon.bin", 0x00000, 0x100000, CRC(c377db91) SHA1(1585d886f775ed361b2558839e544660533e9297) )
|
||||
@ -559,7 +559,7 @@ ROM_START(tvcoryon)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Daisenpu */
|
||||
/* Daisenpu */
|
||||
ROM_START(tvdsenpu)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_daisenpu.bin", 0x00000, 0x100000, CRC(5a8cef75) SHA1(00f27127114e4f5bf69c81212e66948caaec755d) )
|
||||
@ -567,7 +567,7 @@ ROM_START(tvdsenpu)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Dead Moon */
|
||||
/* Dead Moon */
|
||||
ROM_START(tvdmoon)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_dead_moon.bin", 0x00000, 0x100000, CRC(b54793c1) SHA1(8899947092d9a02f3be61ac9c293642e83a015ec) )
|
||||
@ -575,7 +575,7 @@ ROM_START(tvdmoon)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Devil Crash */
|
||||
/* Devil Crash */
|
||||
ROM_START(tvdevilc)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_devil_crash.bin", 0x00000, 0x100000, CRC(c163e5c1) SHA1(2134b3943df87af556694dbe6c77b30723f9175a) )
|
||||
@ -583,7 +583,7 @@ ROM_START(tvdevilc)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Dodge Ball */
|
||||
/* Dodge Ball */
|
||||
ROM_START(tvdodgeb)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_dodge_ball.bin", 0x00000, 0x100000, CRC(7a12cf72) SHA1(c477bc5dae4e82a89766052f185afb73ca2234f3) )
|
||||
@ -591,7 +591,7 @@ ROM_START(tvdodgeb)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Doraemon Meikyuu Daisakusen */
|
||||
/* Doraemon Meikyuu Daisakusen */
|
||||
ROM_START(tvdormon)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_doreamon.bin", 0x00000, 0x100000, CRC(22e8b5ba) SHA1(f21101358df8625c39a5078b9f1b1a0215470bed) )
|
||||
@ -599,7 +599,7 @@ ROM_START(tvdormon)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Dragon Spirit */
|
||||
/* Dragon Spirit */
|
||||
ROM_START(tvdrgnst)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_dragon_spirit.bin", 0x00000, 0x100000, CRC(5733951f) SHA1(0256b4c343a3ad1ca625c316a470cc91a5254e8e) )
|
||||
@ -620,7 +620,7 @@ ROM_START(tvdunexp)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Final Blaster */
|
||||
/* Final Blaster */
|
||||
ROM_START(tvfblast)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_final_blaster.bin", 0x00000, 0x100000, CRC(f5f7483c) SHA1(3933719bdd7a0c73cdad76de78d80463112b475a) )
|
||||
@ -636,7 +636,7 @@ ROM_START(tvflaptw)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Final Match Tennis */
|
||||
/* Final Match Tennis */
|
||||
ROM_START(tvftenis)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_final_match_tennis.bin", 0x00000, 0x100000, CRC(f83ed70f) SHA1(f566bd7a806c11f3d33ba0a976e36026a131e6fd) )
|
||||
@ -660,7 +660,7 @@ ROM_START(tvgomola)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Gunhed */
|
||||
/* Gunhed */
|
||||
ROM_START(tvgunhed)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_gunhed.bin", 0x00000, 0x100000, CRC(9baace99) SHA1(ab676ba72a80314e8cba3810789041d3cc6298f9) )
|
||||
@ -668,7 +668,7 @@ ROM_START(tvgunhed)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Hana Taka Daka (Super Long Nose Goblin) */
|
||||
/* Hana Taka Daka (Super Long Nose Goblin) */
|
||||
ROM_START(tvhtdaka)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_hana_taka_daka.bin", 0x00000, 0x100000, CRC(0fbfda5c) SHA1(02b2ce93ee5e2aaa11c8640ced15258d0d844e6f) )
|
||||
@ -684,7 +684,7 @@ ROM_START(tvjchan)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* jinmu Densho */
|
||||
/* jinmu Densho */
|
||||
ROM_START(tvdensho)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_dinmu_densho.bin", 0x00000, 0x100000, CRC(411a8643) SHA1(46258042dcf6510404ebccaf47034421928f72a8) )
|
||||
@ -692,7 +692,7 @@ ROM_START(tvdensho)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Kiki Kaikai */
|
||||
/* Kiki Kaikai */
|
||||
ROM_START(tvkaikai)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_kiki_kaikai.bin", 0x00000, 0x100000, CRC(2bdd93f9) SHA1(9b08606865abb8cc8fa17a22becae34b172ff81a) )
|
||||
@ -700,7 +700,7 @@ ROM_START(tvkaikai)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Ledgnd of Hero Tonma */
|
||||
/* Ledgnd of Hero Tonma */
|
||||
ROM_START(tvtonma)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_legend_of_hero_tonma.bin", 0x00000, 0x100000, CRC(e7c2efe3) SHA1(5767bdfa5600b1586e49c17cebd0fd7ef2c5426c) )
|
||||
@ -716,7 +716,7 @@ ROM_START(tvlegaxe)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Mizubaku Daibouken Liquid Kids */
|
||||
/* Mizubaku Daibouken Liquid Kids */
|
||||
ROM_START(tvlqkids)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_liquid_kids.bin", 0x00000, 0x100000, CRC(23a8636d) SHA1(752e03dcf8617b5a39cd250f4db1fe13cd13b761) )
|
||||
@ -724,7 +724,7 @@ ROM_START(tvlqkids)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Mr Heli */
|
||||
/* Mr Heli */
|
||||
ROM_START(tvmrheli)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_mr_heli.bin", 0x00000, 0x100000, CRC(bf197c7a) SHA1(048f91f8ab86220a39ab146e531081950eaf1138) )
|
||||
@ -732,7 +732,7 @@ ROM_START(tvmrheli)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Ninja Ryukenden */
|
||||
/* Ninja Ryukenden */
|
||||
ROM_START(tvninjar)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_ninja_ryukenden.bin", 0x00000, 0x100000, CRC(d9cc00ca) SHA1(42d914d338d7d0073b5cc98a4e85729e86bbfad1) )
|
||||
@ -740,7 +740,7 @@ ROM_START(tvninjar)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Operation Wolf */
|
||||
/* Operation Wolf */
|
||||
ROM_START(tvopwolf)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_operation_wolf.bin", 0x00000, 0x100000, CRC(d4a755a9) SHA1(cd236ba0c3439ba2356cb270f56a41a52e0d6dc6) )
|
||||
@ -748,7 +748,7 @@ ROM_START(tvopwolf)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Override */
|
||||
/* Override */
|
||||
ROM_START(tvovride)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_override.bin", 0x00000, 0x100000, CRC(4dbbf4ef) SHA1(180a68f87a881db1d01ffa3566e0d2e28303d09e) )
|
||||
@ -756,7 +756,7 @@ ROM_START(tvovride)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Pac-Land */
|
||||
/* Pac-Land */
|
||||
ROM_START(tvpaclnd)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_pac-land.bin", 0x00000, 0x100000, CRC(32aee4e2) SHA1(900a918e73aaa1dc5752f851ebd85217e736109b) )
|
||||
@ -764,7 +764,7 @@ ROM_START(tvpaclnd)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* PC Genjin Punkic Cyborg */
|
||||
/* PC Genjin Punkic Cyborg */
|
||||
ROM_START(tvpcybrg)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_pc_genijin_punkic_cyborg.bin", 0x00000, 0x100000, CRC(5dfdc8fd) SHA1(e4e263cf7c102837c7d669d27894085f3369dd9b) )
|
||||
@ -788,7 +788,7 @@ ROM_START(tvpow11)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Power Drift */
|
||||
/* Power Drift */
|
||||
ROM_START(tvpdrift)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_power_drift.bin", 0x00000, 0x100000, CRC(eb2fdf0b) SHA1(da2191dd6e9d186c10c1c4d415254b8d7c456159) )
|
||||
@ -811,7 +811,7 @@ ROM_START(tvpwlg4)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Pro Yakyuu World Stadium '91 */
|
||||
/* Pro Yakyuu World Stadium '91 */
|
||||
ROM_START(tvpros91)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_pro_yakyuu_world_stadium_91.bin", 0x00000, 0x100000, CRC(2a5f1283) SHA1(e5044e397e6ccbc5c5741fa3f073697b60116325) )
|
||||
@ -819,7 +819,7 @@ ROM_START(tvpros91)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Psycho Chaser */
|
||||
/* Psycho Chaser */
|
||||
ROM_START(tvpchasr)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_pyscho_chaser.bin", 0x00000, 0x100000, CRC(e0b65280) SHA1(83248975e9bea62e67b5314c663d372c12b08416) )
|
||||
@ -827,7 +827,7 @@ ROM_START(tvpchasr)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Puzzle Boy */
|
||||
/* Puzzle Boy */
|
||||
ROM_START(tvpzlboy)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_puzzle_boy.bin", 0x00000, 0x100000, CRC(0dd96cda) SHA1(652ce8b06f2aef69698d4372ff67b86362655de5) )
|
||||
@ -835,7 +835,7 @@ ROM_START(tvpzlboy)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Raiden */
|
||||
/* Raiden */
|
||||
ROM_START(tvraiden)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_raiden.bin", 0x00000, 0x100000, CRC(b99a85b6) SHA1(5c8b103c5a7bfeba20dcc490204d672b55e36452) )
|
||||
@ -856,7 +856,7 @@ ROM_START(tvrs2)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* R-Type II */
|
||||
/* R-Type II */
|
||||
ROM_START(tvrtype2)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_r-type_ii.bin", 0x00000, 0x100000, CRC(b03bfd7a) SHA1(cc8cec1fc4bae3937d0ed60468ff703d07ce9d0c) )
|
||||
@ -864,7 +864,7 @@ ROM_START(tvrtype2)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Saiga No Nindou - Ninja Spirit */
|
||||
/* Saiga No Nindou - Ninja Spirit */
|
||||
ROM_START(tvninjas)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_saiga_no_nindou.bin", 0x00000, 0x100000, CRC(87894514) SHA1(6845c29247f9dd805b7cd8cb046e88526e853a11) )
|
||||
@ -872,7 +872,7 @@ ROM_START(tvninjas)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Salamander */
|
||||
/* Salamander */
|
||||
ROM_START(tvslmndr)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_salamander.bin", 0x00000, 0x100000, CRC(ae8bcdf1) SHA1(3cc48fa594ab5ce1573c61861ec8e927163b6abb) )
|
||||
@ -880,7 +880,7 @@ ROM_START(tvslmndr)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Shinobi */
|
||||
/* Shinobi */
|
||||
ROM_START(tvshnobi)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_shinobi.bin", 0x00000, 0x100000, CRC(091a2b01) SHA1(aac2d5fadc74f837b73f662456f8a308413de57a) )
|
||||
@ -888,7 +888,7 @@ ROM_START(tvshnobi)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Side arms */
|
||||
/* Side arms */
|
||||
ROM_START(tvsdarms)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_side_arms.bin", 0x00000, 0x100000, CRC(04256267) SHA1(a4ff8f19fa528fc8a7aae5ad7e0c574dc52c3388) )
|
||||
@ -896,7 +896,7 @@ ROM_START(tvsdarms)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Skweek */
|
||||
/* Skweek */
|
||||
ROM_START(tvskweek)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_skweek.bin", 0x00000, 0x100000, CRC(b2a86ecc) SHA1(c1b113132ca6be1b0f3f16f31cc5ba894bee7e91) )
|
||||
@ -904,7 +904,7 @@ ROM_START(tvskweek)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Son Son II */
|
||||
/* Son Son II */
|
||||
ROM_START(tvsson2)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_son_son_ii.bin", 0x00000, 0x100000, CRC(8fb484cd) SHA1(553838dcb3524fe0b620ea60e926a57cc371068d) )
|
||||
@ -943,7 +943,7 @@ ROM_START(tvsvball)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Tatsujin */
|
||||
/* Tatsujin */
|
||||
ROM_START(tvtsujin)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_tatsujin.bin", 0x00000, 0x100000, CRC(023adbcc) SHA1(bef7d03fff2e74970a0747c12d31ec8661703deb) )
|
||||
@ -951,7 +951,7 @@ ROM_START(tvtsujin)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Terra Cresta II */
|
||||
/* Terra Cresta II */
|
||||
ROM_START(tvtcrst2)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_terra_cresta_ii.bin", 0x00000, 0x100000, CRC(8e7bb390) SHA1(af13afe006313b0db1273782c977efdad6100291) )
|
||||
@ -974,7 +974,7 @@ ROM_START(tvthbld)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Toy Shop Boys */
|
||||
/* Toy Shop Boys */
|
||||
ROM_START(tvtsboys)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_toy_shop_boys.bin", 0x00000, 0x100000, CRC(a9ed3440) SHA1(c519744cc16dad7a1455e359020ce95f4ac0b51a) )
|
||||
@ -997,7 +997,7 @@ ROM_START(tvusapb)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Veigues */
|
||||
/* Veigues */
|
||||
ROM_START(tveigues)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_veigues.bin", 0x00000, 0x100000, CRC(64ef8be7) SHA1(634191a181cbccbed8cf7a86e4f074691ba9b715) )
|
||||
@ -1013,7 +1013,7 @@ ROM_START(tvvolfd)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Winning Shot */
|
||||
/* Winning Shot */
|
||||
ROM_START(tvwnshot)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_winning_shot.bin", 0x00000, 0x100000, CRC(7196b2ca) SHA1(a1ae2e875541ad39751a95629d614d2c913b8c02) )
|
||||
@ -1021,7 +1021,7 @@ ROM_START(tvwnshot)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* W-Ring */
|
||||
/* W-Ring */
|
||||
ROM_START(tvwring)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_w-ring.bin", 0x00000, 0x100000, CRC(609dc08d) SHA1(191b8751fc5b8700c7d9dae23d194016fe84586c) )
|
||||
@ -1029,7 +1029,7 @@ ROM_START(tvwring)
|
||||
TOURVISION_BIOS
|
||||
ROM_END
|
||||
|
||||
/* Xevious */
|
||||
/* Xevious */
|
||||
ROM_START(tvxvious)
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "tourv_xevious.bin", 0x00000, 0x100000, CRC(3c0fb5a9) SHA1(1fd9ff582da83e1b9fee569da4db4de15e912f62) )
|
||||
@ -1061,7 +1061,7 @@ GAME( 1990, tvaburn, tourvis, tourvision, tourvision, pce_common_state, pce_com
|
||||
GAME( 1990, tvarmedf, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Nichibutsu / Big Don", "Armed-F (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
GAME( 1990, tvbeball, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Hudson Soft", "Be Ball (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
GAME( 1990, tvbomber, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Hudson Soft", "Bomberman (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
GAME( 1990, tvbrabho, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Namco / Namcot", "Chōzetsurinjin Beraboh Man (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
GAME( 1990, tvbrabho, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Namco / Namcot", "Ch??zetsurinjin Beraboh Man (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
GAME( 1990, tvdsenpu, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Toaplan / Nec Avenue", "Daisenpu (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
GAME( 1990, tvdevilc, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Naxat / Red", "Devil Crash (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
GAME( 1990, tvdodgeb, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Technos Japan Corp / Naxat Soft", "Dodge Ball (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
|
@ -124,20 +124,20 @@ ADDRESS_MAP_END
|
||||
|
||||
I/0 Port Addresses
|
||||
|
||||
System Status Switch 1 00
|
||||
Diagnostic Indicators 1 and 2 10
|
||||
Diagnostic Indicators 3 and 4 11
|
||||
RS-422 Control and Auto Wait 12
|
||||
Memory Bank Select 13
|
||||
STI Device (modem) 20-2F
|
||||
DART Dual Asynchronous Receiver Transmitter
|
||||
Device (keyboard, printer, mouse) 30-33
|
||||
RS-422 SIO Device· 40-43
|
||||
Floppy Disk Controller 80-83
|
||||
Floppy Disk Drive Decoder 90
|
||||
Winchester Disk Controller Reset A0
|
||||
Winchester Disk Controller B0-BF
|
||||
Graphics Controller C0-CF
|
||||
System Status Switch 1 00
|
||||
Diagnostic Indicators 1 and 2 10
|
||||
Diagnostic Indicators 3 and 4 11
|
||||
RS-422 Control and Auto Wait 12
|
||||
Memory Bank Select 13
|
||||
STI Device (modem) 20-2F
|
||||
DART Dual Asynchronous Receiver Transmitter
|
||||
Device (keyboard, printer, mouse) 30-33
|
||||
RS-422 SIO Device 40-43
|
||||
Floppy Disk Controller 80-83
|
||||
Floppy Disk Drive Decoder 90
|
||||
Winchester Disk Controller Reset A0
|
||||
Winchester Disk Controller B0-BF
|
||||
Graphics Controller C0-CF
|
||||
|
||||
*/
|
||||
static ADDRESS_MAP_START(ts803_io, AS_IO, 8, ts803_state)
|
||||
@ -176,7 +176,7 @@ WRITE8_MEMBER( ts803_state::keyboard_put )
|
||||
//m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
|
||||
|
||||
if (data==0x0d) m_maincpu->space(AS_PROGRAM).write_byte(0xf83f,0xC1);
|
||||
else
|
||||
else
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).write_byte(0xf83f,0x4f);
|
||||
m_maincpu->space(AS_PROGRAM).write_byte(0xf890,data);
|
||||
@ -260,7 +260,7 @@ READ8_MEMBER( ts803_state::ts803_porthi_r )
|
||||
WRITE8_MEMBER( ts803_state::ts803_porthi_w )
|
||||
{
|
||||
//printf("PortHI write [%2x] [%2x]\n",offset+0x91,data);
|
||||
|
||||
|
||||
switch (offset+0x91)
|
||||
{
|
||||
case 0xc4:
|
||||
@ -416,11 +416,11 @@ WRITE8_MEMBER( ts803_state::crtc_controlreg_w )
|
||||
{
|
||||
/*
|
||||
Bit 0 = 0 alpha mode
|
||||
1 graphics mode
|
||||
1 graphics mode
|
||||
Bit 1 = 0 page 1 (alpha mode only)
|
||||
1 page 2 (alpha mode only)
|
||||
1 page 2 (alpha mode only)
|
||||
Bit 2 = 0 alpha memory access (round off)
|
||||
1 graphics memory access (normal CPU address)
|
||||
1 graphics memory access (normal CPU address)
|
||||
*/
|
||||
|
||||
//printf("CRTC::c4 write [%2x]\n",data);
|
||||
|
@ -231,9 +231,9 @@ static ADDRESS_MAP_START( tabpkr_map, AS_PROGRAM, 16, wildpkr_state )
|
||||
AM_RANGE(0x300000, 0x303fff) AM_RAM
|
||||
AM_RANGE(0x400000, 0x4007ff) AM_RAM // dallas timekeeper?
|
||||
|
||||
// AM_RANGE(0x800200, 0x800201) AM_DEVWRITE8("ramdac", ramdac_device, index_w, 0xff00)
|
||||
// AM_RANGE(0x800202, 0x800203) AM_DEVWRITE8("ramdac", ramdac_device, pal_w, 0xff00)
|
||||
// AM_RANGE(0x800204, 0x800205) AM_DEVWRITE8("ramdac", ramdac_device, mask_w, 0xff00)
|
||||
// AM_RANGE(0x800200, 0x800201) AM_DEVWRITE8("ramdac", ramdac_device, index_w, 0xff00)
|
||||
// AM_RANGE(0x800202, 0x800203) AM_DEVWRITE8("ramdac", ramdac_device, pal_w, 0xff00)
|
||||
// AM_RANGE(0x800204, 0x800205) AM_DEVWRITE8("ramdac", ramdac_device, mask_w, 0xff00)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/* Unknown R/W:
|
||||
|
@ -493,7 +493,7 @@ are available at http://arcarc.xmission.com/PDF_Arcade_Williams/
|
||||
|
||||
It's a RAM-based palette with 4 bit red, green, blue and brightness/intensity components. It looks like the
|
||||
brightness component (from IC76, the uppermost of the four 2148 SRAMs) should be combined with the color
|
||||
components in a more complicated way than simply multiplying them like MAME does.
|
||||
components in a more complicated way than simply multiplying them like MAME does.
|
||||
|
||||
Reference video: https://www.youtube.com/watch?v=R5OeC6Wc_yI
|
||||
|
||||
|
@ -415,7 +415,7 @@ WRITE8_MEMBER(witch_state::write_a00x)
|
||||
case 0x02: //A002 bit 7&6 = m_bank ????
|
||||
{
|
||||
m_reg_a002 = data;
|
||||
|
||||
|
||||
membank("bank1")->set_entry((data>>6)&3);
|
||||
}
|
||||
break;
|
||||
@ -724,7 +724,7 @@ void witch_state::video_start()
|
||||
m_gfx0a_tilemap->set_palette_offset(0x100);
|
||||
m_gfx0b_tilemap->set_palette_offset(0x100);
|
||||
m_gfx1_tilemap->set_palette_offset(0x200);
|
||||
|
||||
|
||||
save_item(NAME(m_scrollx));
|
||||
save_item(NAME(m_scrolly));
|
||||
save_item(NAME(m_reg_a002));
|
||||
|
@ -42,9 +42,9 @@ public:
|
||||
bitmap_ind16 *m_pixel_bitmap1;
|
||||
bitmap_ind16 *m_pixel_bitmap2;
|
||||
int m_pixram_sel;
|
||||
bool m_color_bank;
|
||||
bool m_screen_disable;
|
||||
|
||||
bool m_color_bank;
|
||||
bool m_screen_disable;
|
||||
|
||||
/* sound-related */
|
||||
int m_sound_nmi_enable;
|
||||
int m_pending_nmi;
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user