mirror of
https://github.com/holub/mame
synced 2025-06-04 03:46:29 +03:00
init vars for coverity (bus/l-w)
This commit is contained in:
parent
5a29819506
commit
b206c1c7bd
@ -78,7 +78,7 @@ protected:
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uint8_t m_channel_check;
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uint8_t m_nmi_enabled;
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bool m_ide_io_ports_enabled;
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address_space *spaceio;
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address_space *spaceio = nullptr;
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void pc_select_dma_channel(int channel, bool state);
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@ -101,8 +101,8 @@ private:
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memory_share_creator<u8> m_share;
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memory_view m_view;
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memory_bank_array_creator<8> m_bank;
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uint8_t ram_bank_cr;
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uint8_t rom_map_cr;
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uint8_t ram_bank_cr = 0;
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uint8_t rom_map_cr = 0;
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void update_banks();
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@ -204,20 +204,20 @@ private:
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std::vector<uint8_t> m_sram;
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// EEPROM runtime vars
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uint8_t m_eeprom_sda; // current SDA
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uint8_t m_eeprom_prev_sda; // previous SDA
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uint8_t m_eeprom_scl; // current SCL
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uint8_t m_eeprom_prev_scl; // previous SCL
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uint8_t m_eeprom_cnt; // operation count in 0-9
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uint8_t m_eeprom_readwrite; // read/write bit
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uint16_t m_eeprom_slave_mask; // dev addr
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uint16_t m_eeprom_word_address; // memory addr
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uint16_t m_eeprom_devsel; // selected device
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uint16_t m_eeprom_byte; // byte to be written
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int m_eeprom_cur_state; // current state
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uint8_t m_eeprom_sda = 0; // current SDA
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uint8_t m_eeprom_prev_sda = 0; // previous SDA
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uint8_t m_eeprom_scl = 0; // current SCL
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uint8_t m_eeprom_prev_scl = 0; // previous SCL
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uint8_t m_eeprom_cnt = 0; // operation count in 0-9
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uint8_t m_eeprom_readwrite = 0; // read/write bit
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uint16_t m_eeprom_slave_mask = 0; // dev addr
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uint16_t m_eeprom_word_address = 0; // memory addr
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uint16_t m_eeprom_devsel = 0; // selected device
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uint16_t m_eeprom_byte = 0; // byte to be written
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int m_eeprom_cur_state = 0; // current state
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// EEPROM physical characteristics (configured at init)
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uint16_t m_eeprom_mask; // size of the memory - 1
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uint16_t m_eeprom_pagewrite_mask; // max number of bytes that can be written in a single write cycle
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uint16_t m_eeprom_mask = 0; // size of the memory - 1
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uint16_t m_eeprom_pagewrite_mask = 0; // max number of bytes that can be written in a single write cycle
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};
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@ -501,7 +501,7 @@ protected:
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virtual void device_reset() override;
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private:
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uint16_t m_retvalue;
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uint16_t m_retvalue = 0;
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};
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@ -30,7 +30,7 @@ private:
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uint32_t m_total_size;
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uint8_t m_bank_mask;
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uint8_t m_bank_selected[4];
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uint8_t *m_bank_base[4];
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uint8_t *m_bank_base[4]{};
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uint8_t m_ramio_set_bits;
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};
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@ -100,38 +100,38 @@ private:
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cpu_device *m_cpu; // When != nullptr: CPU is suspended in wait state
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bool m_cpu_rd;
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uint8_t m_ready_in;
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uint8_t m_ready_ff; // I-A44 & I-A43
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bool m_gate_lower; // I-A58-9
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bool m_irq; // C-A37-9
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uint8_t m_data_low_out; // C-A43
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uint8_t m_data_low_in; // C-A25
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uint8_t m_cpu_data;
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uint8_t m_addr_low_out; // C-A41
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bool m_mem_wrt; // I-A58-4
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bool m_wrt_inh; // I-A46-13
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bool m_direction; // I-A58-11
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bool m_ibus_cached;
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uint8_t m_ibus;
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uint16_t m_crc; // I-A62
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bool m_crc_enabled; // I-A58-13
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bool m_crc_out; // C-A16-2
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bool m_reading; // I-A46-9
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bool m_writing; // C-A16-4
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uint16_t m_data_sr; // C-A36 & C-A29 (MSB), next byte in LSB
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bool m_last_data_bit; // I-A48-6
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uint16_t m_clock_sr; // C-A34 & C-A27 (MSB), next byte in LSB
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uint8_t m_ready_ff = 0; // I-A44 & I-A43
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bool m_gate_lower = false; // I-A58-9
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bool m_irq = false; // C-A37-9
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uint8_t m_data_low_out = 0; // C-A43
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uint8_t m_data_low_in = 0; // C-A25
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uint8_t m_cpu_data = 0;
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uint8_t m_addr_low_out = 0; // C-A41
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bool m_mem_wrt = false; // I-A58-4
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bool m_wrt_inh = false; // I-A46-13
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bool m_direction = false; // I-A58-11
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bool m_ibus_cached = false;
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uint8_t m_ibus = 0;
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uint16_t m_crc = 0; // I-A62
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bool m_crc_enabled = false; // I-A58-13
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bool m_crc_out = false; // C-A16-2
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bool m_reading = false; // I-A46-9
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bool m_writing = false; // C-A16-4
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uint16_t m_data_sr = 0; // C-A36 & C-A29 (MSB), next byte in LSB
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bool m_last_data_bit = false; // I-A48-6
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uint16_t m_clock_sr = 0; // C-A34 & C-A27 (MSB), next byte in LSB
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attotime m_last_f_time;
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bool m_clock_gate; // I-A10-8
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bool m_amwrt; // I-A58-6
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bool m_dlyd_amwrt;
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bool m_clock_gate = false; // I-A10-8
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bool m_amwrt = false; // I-A58-6
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bool m_dlyd_amwrt = false;
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// PLL
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fdc_pll_t m_pll;
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// Timers
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emu_timer *m_timeout_timer;
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emu_timer *m_byte_timer;
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emu_timer *m_f_timer;
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emu_timer *m_timeout_timer = nullptr;
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emu_timer *m_byte_timer = nullptr;
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emu_timer *m_f_timer = nullptr;
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void set_output();
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unsigned selected_drive() const;
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@ -36,10 +36,10 @@ protected:
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virtual void device_add_mconfig(machine_config &config) override;
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private:
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uint8_t* m_fixed;
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uint32_t m_special_bank;
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uint16_t m_cart_ram[0x1000];
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uint16_t m_cart_ram2[0x10000];
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uint8_t* m_fixed = nullptr;
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uint32_t m_special_bank = 0;
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uint16_t m_cart_ram[0x1000]{};
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uint16_t m_cart_ram2[0x10000]{};
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};
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// device type definition
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@ -29,9 +29,9 @@ protected:
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virtual void device_reset() override;
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private:
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uint16_t m_overlay;
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uint32_t m_bank_base;
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uint16_t m_cartridge_ram[0x1000]; // bootlegs
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uint16_t m_overlay = 0;
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uint32_t m_bank_base = 0;
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uint16_t m_cartridge_ram[0x1000]{}; // bootlegs
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};
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#endif // MAME_BUS_NEOGEO_PROT_KOF2K3BL_H
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@ -334,7 +334,7 @@ protected:
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virtual void device_start() override;
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private:
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int m_type;
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int m_type = 0;
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device_neogeo_cart_interface* m_cart;
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};
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@ -40,7 +40,7 @@ protected:
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private:
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required_ioport_array<4> m_joy;
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required_ioport_array<2> m_ss;
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uint8_t m_ctrl_sel;
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uint8_t m_ctrl_sel = 0;
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};
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@ -57,7 +57,7 @@ private:
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uint16_t m_irq_count, m_irq_count_latch;
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int m_irq_enable, m_irq_repeat, m_irq_transfer;
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int m_disk_reg_enable;
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bool m_sound_en;
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bool m_sound_en = false;
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uint8_t m_fds_motor_on;
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uint8_t m_fds_door_closed;
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@ -42,27 +42,27 @@ protected:
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virtual void update_mirror() { update_mirror_typea(); }
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inline uint8_t unscramble(uint8_t bank);
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uint8_t m_mul[2];
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uint8_t m_latch;
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uint8_t m_reg[4];
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uint8_t m_chr_latch[2]; // type C uses a more complex CHR 4K mode, and these vars are only changed for those games
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uint8_t m_mmc_prg_bank[4];
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uint16_t m_mmc_nt_bank[4];
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uint16_t m_mmc_vrom_bank[8];
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uint16_t m_extra_chr_bank;
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uint16_t m_extra_chr_mask;
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int m_bank_6000;
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uint8_t m_mul[2]{};
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uint8_t m_latch = 0;
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uint8_t m_reg[4]{};
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uint8_t m_chr_latch[2]{}; // type C uses a more complex CHR 4K mode, and these vars are only changed for those games
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uint8_t m_mmc_prg_bank[4]{};
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uint16_t m_mmc_nt_bank[4]{};
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uint16_t m_mmc_vrom_bank[8]{};
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uint16_t m_extra_chr_bank = 0;
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uint16_t m_extra_chr_mask = 0;
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int m_bank_6000 = 0;
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uint8_t m_irq_mode;
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uint8_t m_irq_count;
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uint8_t m_irq_prescale;
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uint8_t m_irq_prescale_mask;
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uint8_t m_irq_flip;
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int m_irq_enable;
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int m_irq_up, m_irq_down;
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uint8_t m_irq_mode = 0;
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uint8_t m_irq_count = 0;
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uint8_t m_irq_prescale = 0;
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uint8_t m_irq_prescale_mask = 0;
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uint8_t m_irq_flip = 0;
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int m_irq_enable = 0;
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int m_irq_up = 0, m_irq_down = 0;
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static const device_timer_id TIMER_IRQ = 0;
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emu_timer *irq_timer;
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emu_timer *irq_timer = nullptr;
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attotime timer_freq;
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};
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@ -23,7 +23,7 @@ protected:
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virtual void device_start() override;
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private:
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u8 m_latch;
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u8 m_latch = 0;
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};
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@ -63,7 +63,7 @@ protected:
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virtual void device_start() override;
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private:
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uint8_t m_latch;
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uint8_t m_latch = 0;
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};
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@ -88,11 +88,11 @@ protected:
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virtual void device_start() override;
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param) override;
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u8 m_reg[8];
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u8 m_reg[8]{};
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private:
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void prg_update();
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u8 m_latch;
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u8 m_latch = 0;
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u16 m_irq_count, m_irq_count_latch;
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int m_irq_enable;
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@ -136,7 +136,7 @@ protected:
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virtual void device_start() override;
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private:
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u8 m_latch;
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u8 m_latch = 0;
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const u8 m_a15_flip;
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};
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@ -171,7 +171,7 @@ protected:
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param) override;
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private:
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uint8_t m_latch;
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uint8_t m_latch = 0;
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uint16_t m_irq_count;
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uint8_t m_irq_status;
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@ -218,7 +218,7 @@ protected:
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virtual void device_start() override;
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private:
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u8 m_latch;
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u8 m_latch = 0;
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};
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@ -327,7 +327,7 @@ protected:
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private:
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void update_prg();
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uint8_t m_latch;
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uint8_t m_latch = 0;
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uint8_t m_reg[8];
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};
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@ -187,7 +187,7 @@ protected:
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virtual void device_start() override;
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private:
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int m_prot;
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int m_prot = 0;
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};
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@ -320,7 +320,7 @@ protected:
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virtual void device_start() override;
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private:
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uint8_t m_prot;
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uint8_t m_prot = 0;
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};
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@ -314,7 +314,7 @@ public:
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// PRG
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inline int prg_8k_bank_num(int bank);
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inline void update_prg_banks(int prg_bank_start, int prg_bank_end);
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memory_bank *m_prg_bank_mem[4];
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memory_bank *m_prg_bank_mem[4]{};
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int m_prg_bank[4];
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uint32_t m_prg_chunks;
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uint32_t m_prg_mask;
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@ -337,7 +337,7 @@ public:
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//because some of these change multiple times per scanline!
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int m_chr_src[8]; //defines source of base pointer
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int m_chr_orig[8]; //defines offset of 0x400 byte segment at base pointer
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uint8_t *m_chr_access[8]; //source translated + origin -> valid pointer!
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uint8_t *m_chr_access[8]{}; //source translated + origin -> valid pointer!
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uint32_t m_vrom_chunks;
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uint32_t m_vram_chunks;
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@ -371,7 +371,7 @@ public:
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int m_nt_src[4];
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int m_nt_orig[4];
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int m_nt_writable[4];
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uint8_t *m_nt_access[4]; //quick banking structure for a maximum of 4K of RAM/ROM/ExRAM
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uint8_t *m_nt_access[4]{}; //quick banking structure for a maximum of 4K of RAM/ROM/ExRAM
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void set_nt_page(int page, int source, int bank, int writable);
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void set_nt_mirroring(int mirroring);
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virtual void device_start() override;
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private:
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uint8_t m_latch;
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uint8_t m_latch = 0;
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uint8_t m_ram[0xb00];
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};
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@ -174,7 +174,7 @@ protected:
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virtual void device_start() override;
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private:
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uint8_t m_latch;
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uint8_t m_latch = 0;
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};
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@ -198,7 +198,7 @@ protected:
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private:
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void update_banks();
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u8 m_latch;
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u8 m_latch = 0;
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u8 m_reg[6];
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u16 m_irq_count, m_irq_count_latch;
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@ -224,7 +224,7 @@ protected:
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virtual void device_start() override;
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private:
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uint16_t m_latch;
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uint16_t m_latch = 0;
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};
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@ -247,7 +247,7 @@ protected:
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private:
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u8 m_jumper;
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u16 m_latch;
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u16 m_latch = 0;
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u8 m_reg;
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};
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@ -272,7 +272,7 @@ protected:
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virtual void device_start() override;
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private:
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uint8_t m_latch;
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uint8_t m_latch = 0;
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};
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#endif
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virtual void device_start() override;
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private:
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u8 m_reg;
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u8 m_reg = 0;
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};
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@ -203,7 +203,7 @@ protected:
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private:
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u16 m_irq_count;
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u8 m_irq_latch;
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u8 m_irq_latch = 0;
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int m_irq_enable;
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static const device_timer_id TIMER_IRQ = 0;
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@ -230,7 +230,7 @@ protected:
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virtual void device_start() override;
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private:
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u8 m_chr_mask, m_chr_match;
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u8 m_chr_mask = 0, m_chr_match;
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};
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// ======================> nes_hengg_shjy3_device
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@ -62,12 +62,12 @@ private:
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void moton(int state);
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int m_paging;
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int m_ma16;
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int m_mpm;
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int m_fdc_att;
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int m_fdc_int;
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int m_pa15;
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int m_paging = 0;
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int m_ma16 = 0;
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int m_mpm = 0;
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int m_fdc_att = 0;
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int m_fdc_int = 0;
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int m_pa15 = 0;
|
||||
};
|
||||
|
||||
|
||||
|
@ -46,13 +46,13 @@ private:
|
||||
uint32_t bytes_per_block;
|
||||
int lba, cur_sector;
|
||||
required_device<cdrom_image_device> image;
|
||||
uint8_t mode_data[12];
|
||||
uint8_t mode_data[12]{};
|
||||
|
||||
char manufacturer[8];
|
||||
char product[16];
|
||||
char revision[4];
|
||||
uint8_t inquiry_data;
|
||||
uint8_t compliance;
|
||||
char manufacturer[8]{};
|
||||
char product[16]{};
|
||||
char revision[4]{};
|
||||
uint8_t inquiry_data = 0;
|
||||
uint8_t compliance = 0;
|
||||
|
||||
void return_no_cd();
|
||||
static int to_msf(int frame);
|
||||
|
@ -32,7 +32,7 @@ private:
|
||||
|
||||
required_device<m37710s4_device> m_cdcpu;
|
||||
|
||||
u8 m_mystery_address;
|
||||
u8 m_mystery_address = 0;
|
||||
};
|
||||
|
||||
class cdr4210_device : public cw7501_device
|
||||
|
@ -40,8 +40,8 @@ private:
|
||||
|
||||
std::vector<uint8_t> m_vram;
|
||||
uint32_t m_vbl_disable, m_palette[2];
|
||||
int m_prot_state;
|
||||
int m_toggle;
|
||||
int m_prot_state = 0;
|
||||
int m_toggle = 0;
|
||||
};
|
||||
|
||||
// device type definition
|
||||
|
@ -37,13 +37,13 @@ protected:
|
||||
|
||||
struct nbfilectx
|
||||
{
|
||||
uint32_t curcmd;
|
||||
char filename[128];
|
||||
uint32_t curcmd = 0;
|
||||
char filename[128]{};
|
||||
std::string curdir;
|
||||
osd::directory::ptr dirp;
|
||||
osd_file::ptr fd;
|
||||
uint64_t filelen;
|
||||
uint32_t bytecount;
|
||||
uint64_t filelen = 0;
|
||||
uint32_t bytecount = 0;
|
||||
};
|
||||
|
||||
nubus_image_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
@ -46,8 +46,8 @@ private:
|
||||
required_ioport_array<16> m_matrix;
|
||||
output_finder<3> m_leds;
|
||||
|
||||
u8 m_porta;
|
||||
u8 m_portc;
|
||||
u8 m_porta = 0;
|
||||
u8 m_portc = 0;
|
||||
};
|
||||
|
||||
// device type definition
|
||||
|
@ -103,7 +103,7 @@ private:
|
||||
const uint32_t m_bram_size = 0x800*4;
|
||||
uint8_t m_bram[0x800*4];
|
||||
|
||||
uint8_t m_bram_locked;
|
||||
uint8_t m_bram_locked = false;
|
||||
};
|
||||
|
||||
|
||||
|
@ -48,7 +48,7 @@ protected:
|
||||
private:
|
||||
required_device<ins8250_device> m_uart;
|
||||
|
||||
uint8_t m_vector;
|
||||
uint8_t m_vector = 0;
|
||||
};
|
||||
|
||||
|
||||
|
@ -60,8 +60,8 @@ private:
|
||||
memory_share_creator<uint8_t> m_nvram;
|
||||
required_ioport m_io_sw1;
|
||||
|
||||
bool m_sw1;
|
||||
bool m_ncc1_out;
|
||||
bool m_sw1 = false;
|
||||
bool m_ncc1_out = false;
|
||||
};
|
||||
|
||||
|
||||
|
@ -50,12 +50,12 @@ protected:
|
||||
|
||||
private:
|
||||
std::unique_ptr<uint8_t[]> m_videoram_base;
|
||||
uint8_t *m_videoram;
|
||||
uint8_t *m_videoram = nullptr;
|
||||
|
||||
uint16_t m_cr;
|
||||
uint16_t m_dr;
|
||||
uint16_t m_ar;
|
||||
uint16_t m_ct;
|
||||
uint16_t m_cr = 0;
|
||||
uint16_t m_dr = 0;
|
||||
uint16_t m_ar = 0;
|
||||
uint16_t m_ct = 0;
|
||||
};
|
||||
|
||||
|
||||
|
@ -61,17 +61,17 @@ private:
|
||||
int m_rxvec;
|
||||
int m_txvec;
|
||||
|
||||
device_image_interface *m_fd;
|
||||
device_image_interface *m_fd = nullptr;
|
||||
|
||||
line_state m_rxrdy;
|
||||
line_state m_txrdy;
|
||||
line_state m_rxrdy{};
|
||||
line_state m_txrdy{};
|
||||
|
||||
uint16_t m_rcsr;
|
||||
uint16_t m_rbuf;
|
||||
uint16_t m_tcsr;
|
||||
uint16_t m_tbuf;
|
||||
uint16_t m_rcsr = 0;
|
||||
uint16_t m_rbuf = 0;
|
||||
uint16_t m_tcsr = 0;
|
||||
uint16_t m_tbuf = 0;
|
||||
|
||||
const char *pc11_regnames[4];
|
||||
const char *pc11_regnames[4]{};
|
||||
};
|
||||
|
||||
|
||||
|
@ -57,8 +57,8 @@ private:
|
||||
void c000_w(u8 data) { m_c000_latch = data; };
|
||||
|
||||
void m6803_mem(address_map &map);
|
||||
int m_rx_state;
|
||||
u8 m_c000_latch;
|
||||
int m_rx_state = 0;
|
||||
u8 m_c000_latch = 0;
|
||||
};
|
||||
|
||||
mockingboard_d_device::mockingboard_d_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
|
@ -36,10 +36,10 @@ private:
|
||||
required_ioport_array<8> m_matrix[4];
|
||||
output_finder<3> m_leds;
|
||||
|
||||
bool m_t1;
|
||||
u8 m_bus;
|
||||
u8 m_p1;
|
||||
u8 m_p2;
|
||||
bool m_t1 = false;
|
||||
u8 m_bus = 0;
|
||||
u8 m_p1 = 0;
|
||||
u8 m_p2 = 0;
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(RTPC_KBD, rtpc_kbd_device)
|
||||
|
@ -34,7 +34,7 @@ public:
|
||||
protected:
|
||||
device_saturn_control_port_interface(const machine_config &mconfig, device_t &device);
|
||||
|
||||
uint8_t m_ctrl_id;
|
||||
uint8_t m_ctrl_id = 0;
|
||||
saturn_control_port_device *m_port;
|
||||
};
|
||||
|
||||
|
@ -470,36 +470,36 @@ protected:
|
||||
uint32_t m_itri_relx;
|
||||
uint32_t m_itri_rely;
|
||||
uint32_t m_itri_relz;
|
||||
uint32_t m_itri_r;
|
||||
uint32_t m_itri_g;
|
||||
uint32_t m_itri_b;
|
||||
uint32_t m_itri_a;
|
||||
uint32_t m_itri_r = 0;
|
||||
uint32_t m_itri_g = 0;
|
||||
uint32_t m_itri_b = 0;
|
||||
uint32_t m_itri_a = 0;
|
||||
|
||||
uint32_t m_iquad_absx;
|
||||
uint32_t m_iquad_absy;
|
||||
uint32_t m_iquad_absz;
|
||||
uint32_t m_iquad_relx;
|
||||
uint32_t m_iquad_rely;
|
||||
uint32_t m_iquad_relz;
|
||||
uint32_t m_iquad_r;
|
||||
uint32_t m_iquad_g;
|
||||
uint32_t m_iquad_b;
|
||||
uint32_t m_iquad_a;
|
||||
uint32_t m_iquad_absx = 0;
|
||||
uint32_t m_iquad_absy = 0;
|
||||
uint32_t m_iquad_absz = 0;
|
||||
uint32_t m_iquad_relx = 0;
|
||||
uint32_t m_iquad_rely = 0;
|
||||
uint32_t m_iquad_relz = 0;
|
||||
uint32_t m_iquad_r = 0;
|
||||
uint32_t m_iquad_g = 0;
|
||||
uint32_t m_iquad_b = 0;
|
||||
uint32_t m_iquad_a = 0;
|
||||
|
||||
uint32_t m_irect_absx;
|
||||
uint32_t m_irect_absy;
|
||||
uint32_t m_irect_absz;
|
||||
uint32_t m_irect_relx;
|
||||
uint32_t m_irect_rely;
|
||||
uint32_t m_irect_relz;
|
||||
uint32_t m_irect_r;
|
||||
uint32_t m_irect_g;
|
||||
uint32_t m_irect_b;
|
||||
uint32_t m_irect_a;
|
||||
uint32_t m_irect_absx = 0;
|
||||
uint32_t m_irect_absy = 0;
|
||||
uint32_t m_irect_absz = 0;
|
||||
uint32_t m_irect_relx = 0;
|
||||
uint32_t m_irect_rely = 0;
|
||||
uint32_t m_irect_relz = 0;
|
||||
uint32_t m_irect_r = 0;
|
||||
uint32_t m_irect_g = 0;
|
||||
uint32_t m_irect_b = 0;
|
||||
uint32_t m_irect_a = 0;
|
||||
|
||||
std::unique_ptr<vertex[]> m_prim_buf;
|
||||
uint32_t m_vertex_count;
|
||||
uint32_t m_curr_prim_type;
|
||||
uint32_t m_vertex_count = 0;
|
||||
uint32_t m_curr_prim_type = 0;
|
||||
};
|
||||
|
||||
uint32_t m_thc_misc;
|
||||
|
@ -100,12 +100,12 @@ protected:
|
||||
// internal state
|
||||
required_device<sparc_base_device> m_maincpu;
|
||||
required_address_space m_type1space;
|
||||
address_space *m_space;
|
||||
address_space *m_space = nullptr;
|
||||
|
||||
devcb_write_line::array<7> m_irq_cb;
|
||||
devcb_write32 m_buserr;
|
||||
|
||||
device_sbus_card_interface *m_device_list[3];
|
||||
device_sbus_card_interface *m_device_list[3]{};
|
||||
|
||||
private:
|
||||
void slot1_timeout_map(address_map &map);
|
||||
@ -148,7 +148,7 @@ protected:
|
||||
|
||||
optional_device<sbus_device> m_sbus_finder;
|
||||
sbus_device *m_sbus;
|
||||
const char *m_sbus_slottag;
|
||||
const char *m_sbus_slottag = nullptr;
|
||||
int m_slot;
|
||||
uint32_t m_base;
|
||||
};
|
||||
|
@ -24,7 +24,7 @@ protected:
|
||||
private:
|
||||
required_device<harddisk_image_device> m_image0;
|
||||
required_device<harddisk_image_device> m_image1;
|
||||
hard_disk_file::info m_param[2];
|
||||
hard_disk_file::info m_param[2]{};
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(OMTI5100, omti5100_device)
|
||||
|
@ -195,7 +195,7 @@ protected:
|
||||
int m_msg;
|
||||
int m_req;
|
||||
int m_ack;
|
||||
int m_atn;
|
||||
int m_atn = 0;
|
||||
int m_rst;
|
||||
int m_data0;
|
||||
int m_data1;
|
||||
|
@ -37,7 +37,7 @@ protected:
|
||||
char m_manufacturer[8];
|
||||
char m_product[16];
|
||||
char m_revision[4];
|
||||
uint8_t m_data;
|
||||
uint8_t m_data = 0;
|
||||
};
|
||||
|
||||
class dec_rrd45_device : public scsicd512_device
|
||||
|
@ -392,8 +392,8 @@ protected:
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
uint8_t m_gamesel;
|
||||
uint8_t m_readxor;
|
||||
uint8_t m_gamesel = 0;
|
||||
uint8_t m_readxor = 0;
|
||||
};
|
||||
|
||||
|
||||
@ -420,7 +420,7 @@ protected:
|
||||
virtual void device_reset() override;
|
||||
|
||||
private:
|
||||
uint8_t m_block;
|
||||
uint8_t m_block = 0;
|
||||
};
|
||||
|
||||
|
||||
@ -447,7 +447,7 @@ protected:
|
||||
virtual void device_reset() override;
|
||||
|
||||
private:
|
||||
uint8_t m_block;
|
||||
uint8_t m_block = 0;
|
||||
};
|
||||
|
||||
class sega8_x_terminator_device : public sega8_rom_device
|
||||
|
@ -72,7 +72,7 @@ public:
|
||||
protected:
|
||||
device_sg1000_expansion_slot_interface(const machine_config &mconfig, device_t &device);
|
||||
|
||||
sg1000_expansion_slot_device *m_port;
|
||||
sg1000_expansion_slot_device *m_port = nullptr;
|
||||
};
|
||||
|
||||
|
||||
|
@ -139,8 +139,8 @@ private:
|
||||
u8 m_iram_write_snes, m_iram_write_sa1;
|
||||
// $2230-$2231
|
||||
u8 m_dma_ctrl, m_dma_ccparam;
|
||||
u8 m_dma_cconv_size;
|
||||
u8 m_dma_cconv_bits;
|
||||
u8 m_dma_cconv_size = 0;
|
||||
u8 m_dma_cconv_bits = 8;
|
||||
// DMA Control (DCNT)
|
||||
inline const bool DCNT_DMAEN() { return BIT(m_dma_ctrl, 7); } // DMA Enable control
|
||||
//inline const bool DCNT_DPRIO() { return BIT(m_dma_ctrl, 6); } // Processing priority between SA-1 CPU and DMA; Not emulated currently
|
||||
|
@ -73,8 +73,8 @@ protected:
|
||||
|
||||
struct SDD1_PEM_ContextInfo
|
||||
{
|
||||
uint8_t status;
|
||||
uint8_t MPS;
|
||||
uint8_t status = 0;
|
||||
uint8_t MPS = 0;
|
||||
};
|
||||
|
||||
class SDD1_PEM //Probability Estimation Module
|
||||
@ -167,8 +167,8 @@ protected:
|
||||
|
||||
struct
|
||||
{
|
||||
uint32_t addr; // $43x2-$43x4 -- DMA transfer address
|
||||
uint16_t size; // $43x5-$43x6 -- DMA transfer size
|
||||
uint32_t addr = 0; // $43x2-$43x4 -- DMA transfer address
|
||||
uint16_t size = 0; // $43x5-$43x6 -- DMA transfer size
|
||||
} m_dma[8];
|
||||
|
||||
std::unique_ptr<SDD1_emu> m_sdd1emu;
|
||||
@ -176,9 +176,9 @@ protected:
|
||||
struct
|
||||
{
|
||||
std::unique_ptr<uint8_t[]> data; // pointer to decompressed S-DD1 data (65536 bytes)
|
||||
uint16_t offset; // read index into S-DD1 decompression buffer
|
||||
uint32_t size; // length of data buffer; reads decrement counter, set ready to false at 0
|
||||
uint8_t ready; // 1 when data[] is valid; 0 to invoke sdd1emu.decompress()
|
||||
uint16_t offset = 0; // read index into S-DD1 decompression buffer
|
||||
uint32_t size = 0; // length of data buffer; reads decrement counter, set ready to false at 0
|
||||
uint8_t ready = 0; // 1 when data[] is valid; 0 to invoke sdd1emu.decompress()
|
||||
} m_buffer;
|
||||
};
|
||||
|
||||
|
@ -60,10 +60,10 @@ protected:
|
||||
required_device_array<floppy_connector, 4> m_floppy;
|
||||
required_device<spectrum_expansion_slot_device> m_exp;
|
||||
|
||||
int m_romcs;
|
||||
u8 m_masterdisable;
|
||||
int m_romcs = 0;
|
||||
u8 m_masterdisable = 0;
|
||||
u8 m_control;
|
||||
bool m_motor_active;
|
||||
bool m_motor_active = false;
|
||||
void fdc_hld_w(int state);
|
||||
virtual void motors_control();
|
||||
|
||||
|
@ -86,9 +86,9 @@ protected:
|
||||
void fdc_drq_w(int state);
|
||||
virtual void nmi_check() override;
|
||||
|
||||
uint8_t m_control;
|
||||
int m_intrq;
|
||||
int m_drq;
|
||||
uint8_t m_control = 0;
|
||||
int m_intrq = 0;
|
||||
int m_drq = 0;
|
||||
};
|
||||
|
||||
class spectrum_d80_device :
|
||||
|
@ -56,8 +56,8 @@ protected:
|
||||
required_device_array<floppy_connector, 4> m_floppy;
|
||||
required_device<spectrum_expansion_slot_device> m_exp;
|
||||
|
||||
int m_romcs;
|
||||
// u8 m_control;
|
||||
int m_romcs = 0;
|
||||
// u8 m_control = 0;
|
||||
};
|
||||
|
||||
class spectrum_spdos_device :
|
||||
|
@ -46,8 +46,8 @@ protected:
|
||||
required_memory_region m_rom;
|
||||
required_device<centronics_device> m_centronics;
|
||||
|
||||
int m_romcs;
|
||||
int m_busy;
|
||||
int m_romcs = 0;
|
||||
int m_busy = 0;
|
||||
};
|
||||
|
||||
class spectrum_lprint3_device :
|
||||
@ -87,8 +87,8 @@ protected:
|
||||
required_device<rs232_port_device> m_rs232;
|
||||
required_device<spectrum_expansion_slot_device> m_exp;
|
||||
|
||||
int m_romcs;
|
||||
int m_busy;
|
||||
int m_romcs = 0;
|
||||
int m_busy = 0;
|
||||
};
|
||||
|
||||
class spectrum_kempcentrs_device :
|
||||
@ -115,7 +115,7 @@ protected:
|
||||
|
||||
required_device<centronics_device> m_centronics;
|
||||
|
||||
int m_busy;
|
||||
int m_busy = 0;
|
||||
};
|
||||
|
||||
class spectrum_kempcentre_device :
|
||||
@ -150,9 +150,9 @@ protected:
|
||||
required_memory_region m_rom;
|
||||
required_device<centronics_device> m_centronics;
|
||||
|
||||
int m_active;
|
||||
int m_romcs;
|
||||
int m_busy;
|
||||
int m_active = 0;
|
||||
int m_romcs = 0;
|
||||
int m_busy = 0;
|
||||
};
|
||||
|
||||
class spectrum_kempcentreu_device :
|
||||
|
@ -53,8 +53,8 @@ protected:
|
||||
required_memory_region m_rom;
|
||||
required_device<spectrum_expansion_slot_device> m_exp;
|
||||
|
||||
int m_romcs;
|
||||
int m_nmi_pending;
|
||||
int m_romcs = 0;
|
||||
int m_nmi_pending = 0;
|
||||
std::unique_ptr<uint8_t[]> m_ram;
|
||||
};
|
||||
|
||||
@ -143,7 +143,7 @@ protected:
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
int m_hidden;
|
||||
int m_hidden = 0;
|
||||
};
|
||||
|
||||
class spectrum_mface128v1_device : public spectrum_mface128_base_device
|
||||
@ -163,7 +163,7 @@ protected:
|
||||
virtual uint8_t iorq_r(offs_t offset) override;
|
||||
virtual void iorq_w(offs_t offset, uint8_t data) override;
|
||||
|
||||
int m_d3_ff; // no initial state
|
||||
int m_d3_ff = 0; // no initial state
|
||||
};
|
||||
|
||||
class spectrum_mface128_device : public spectrum_mface128v1_device
|
||||
@ -200,8 +200,8 @@ protected:
|
||||
virtual void iorq_w(offs_t offset, uint8_t data) override;
|
||||
|
||||
private:
|
||||
uint8_t m_reg_file[4]; // no initial state
|
||||
int m_disable;
|
||||
uint8_t m_reg_file[4]{}; // no initial state
|
||||
int m_disable = 0;
|
||||
};
|
||||
|
||||
class spectrum_mprint_device : public spectrum_mface128_base_device
|
||||
@ -227,7 +227,7 @@ private:
|
||||
|
||||
required_device<centronics_device> m_centronics;
|
||||
|
||||
int m_busy;
|
||||
int m_busy = 0;
|
||||
};
|
||||
|
||||
|
||||
|
@ -60,7 +60,7 @@ protected:
|
||||
required_device_array<floppy_connector, 2> m_floppy;
|
||||
required_device<centronics_device> m_centronics;
|
||||
|
||||
int m_romcs;
|
||||
int m_romcs = 0;
|
||||
uint8_t m_ram[8 * 1024];
|
||||
bool m_centronics_busy;
|
||||
};
|
||||
|
@ -64,10 +64,10 @@ protected:
|
||||
required_device<rs232_port_device> m_rs232;
|
||||
required_ioport m_joy;
|
||||
|
||||
int m_romcs;
|
||||
u8 m_ram[0x2000];
|
||||
u16 m_rombank;
|
||||
u8 m_control;
|
||||
int m_romcs = 0;
|
||||
u8 m_ram[0x2000]{};
|
||||
u16 m_rombank = 0;
|
||||
u8 m_control = 0;
|
||||
};
|
||||
|
||||
class spectrum_swiftdisc2_device :
|
||||
|
@ -70,8 +70,8 @@ private:
|
||||
optional_device<pia6821_device> m_pia;
|
||||
optional_device<ide_controller_device> m_ide;
|
||||
|
||||
uint8_t m_pia_porta;
|
||||
uint8_t m_pia_portb;
|
||||
uint8_t m_pia_porta = 0;
|
||||
uint8_t m_pia_portb = 0;
|
||||
|
||||
uint8_t pia_a_r();
|
||||
uint8_t pia_b_r();
|
||||
|
@ -64,8 +64,8 @@ private:
|
||||
|
||||
int m_beeper_state;
|
||||
uint8_t m_drive_control;
|
||||
int m_irq_enable;
|
||||
int m_drq_enable;
|
||||
int m_irq_enable = 0;
|
||||
int m_drq_enable = 0;
|
||||
};
|
||||
|
||||
|
||||
|
@ -51,7 +51,7 @@ protected:
|
||||
private:
|
||||
required_device<tanbus_device> m_tanbus;
|
||||
|
||||
int m_bus_num;
|
||||
int m_bus_num = 0;
|
||||
};
|
||||
|
||||
// device type definition
|
||||
|
@ -112,7 +112,7 @@ private:
|
||||
const std::string m_pathname;
|
||||
};
|
||||
|
||||
bool m_readrom;
|
||||
bool m_readrom = false;
|
||||
int m_pcbtype;
|
||||
int m_slot;
|
||||
int get_index_from_tagname();
|
||||
@ -155,12 +155,12 @@ protected:
|
||||
template <typename Format, typename... Params> void logerror(Format &&fmt, Params &&... args) const { m_cart->logerror(fmt, args...); }
|
||||
|
||||
ti99_cartridge_device* m_cart;
|
||||
tmc0430_device* m_grom[5];
|
||||
tmc0430_device* m_grom[5]{};
|
||||
bool m_grom_idle;
|
||||
int m_grom_size;
|
||||
int m_rom_size;
|
||||
int m_ram_size;
|
||||
int m_bank_mask;
|
||||
int m_bank_mask = 0;
|
||||
|
||||
uint8_t* m_rom_ptr;
|
||||
uint8_t* m_ram_ptr;
|
||||
|
@ -99,7 +99,7 @@ protected:
|
||||
virtual void device_config_complete() override;
|
||||
|
||||
gromport_device* m_gromport;
|
||||
bool m_grom_selected;
|
||||
bool m_grom_selected = false;
|
||||
};
|
||||
|
||||
} // end namespace bus::ti99::gromport
|
||||
|
@ -45,11 +45,11 @@ protected:
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
|
||||
private:
|
||||
bool m_readrom;
|
||||
bool m_readrom = false;
|
||||
int m_active_slot;
|
||||
int m_fixed_slot;
|
||||
int m_next_free_slot;
|
||||
ti99_cartridge_device* m_cartridge[NUMBER_OF_CARTRIDGE_SLOTS];
|
||||
ti99_cartridge_device* m_cartridge[NUMBER_OF_CARTRIDGE_SLOTS]{};
|
||||
|
||||
void set_slot(int slotnumber);
|
||||
int get_active_slot(bool changebase, offs_t offset);
|
||||
|
@ -236,7 +236,7 @@ private:
|
||||
video_waitstate_generator m_vidws;
|
||||
|
||||
// Pointer to mainboard
|
||||
mainboard8_device* m_mainboard;
|
||||
mainboard8_device* m_mainboard = nullptr;
|
||||
};
|
||||
|
||||
/*
|
||||
@ -323,7 +323,7 @@ private:
|
||||
int m_msast = 0;
|
||||
|
||||
// Pointer to mainboard
|
||||
mainboard8_device* m_mainboard;
|
||||
mainboard8_device* m_mainboard = nullptr;
|
||||
};
|
||||
|
||||
/*
|
||||
@ -381,7 +381,7 @@ private:
|
||||
uint8_t* m_sram = nullptr;
|
||||
|
||||
// Pointer to mainboard
|
||||
mainboard8_device* m_mainboard;
|
||||
mainboard8_device* m_mainboard = nullptr;
|
||||
|
||||
// Keep the system ready state
|
||||
int m_srdy = 0;
|
||||
|
@ -40,8 +40,8 @@ protected:
|
||||
virtual DECLARE_WRITE_LINE_MEMBER( data_write ) override;
|
||||
|
||||
private:
|
||||
emu_timer *m_poll_timer;
|
||||
emu_timer *m_send_timer;
|
||||
emu_timer *m_poll_timer = nullptr;
|
||||
emu_timer *m_send_timer = nullptr;
|
||||
|
||||
static constexpr unsigned KEYQUEUESIZE = 256;
|
||||
static constexpr unsigned MAXKEYMSGLENGTH = 10;
|
||||
@ -55,7 +55,7 @@ private:
|
||||
required_ioport_array<8> m_keys;
|
||||
|
||||
int m_queue_length;
|
||||
int m_queue_head;
|
||||
int m_queue_head = 0;
|
||||
uint8_t m_queue[KEYQUEUESIZE];
|
||||
uint32_t m_key_state_save[4];
|
||||
int m_autorepeat_code;
|
||||
@ -63,22 +63,22 @@ private:
|
||||
bool m_fake_shift_state;
|
||||
bool m_fake_unshift_state;
|
||||
|
||||
bool m_left_shift;
|
||||
bool m_right_shift;
|
||||
bool m_left_ctrl;
|
||||
bool m_right_ctrl;
|
||||
bool m_left_alt;
|
||||
bool m_altgr;
|
||||
bool m_numlock;
|
||||
bool m_left_shift = false;
|
||||
bool m_right_shift = false;
|
||||
bool m_left_ctrl = false;
|
||||
bool m_right_ctrl = false;
|
||||
bool m_left_alt = false;
|
||||
bool m_altgr = false;
|
||||
bool m_numlock = false;
|
||||
|
||||
bool m_resetting;
|
||||
|
||||
line_state m_clock_line;
|
||||
line_state m_data_line;
|
||||
int m_reset_timer;
|
||||
int m_reset_timer = 0;
|
||||
|
||||
int m_shift_reg;
|
||||
int m_shift_count;
|
||||
int m_shift_reg = 0;
|
||||
int m_shift_count = 0;
|
||||
};
|
||||
|
||||
|
||||
|
@ -113,7 +113,7 @@ private:
|
||||
required_device<ram_device> m_buffer_ram;
|
||||
|
||||
// Link to the attached floppy drives
|
||||
floppy_image_device* m_floppy[4];
|
||||
floppy_image_device* m_floppy[4]{};
|
||||
|
||||
// Currently selected floppy drive (1-4, 0=none)
|
||||
int m_sel_floppy;
|
||||
|
@ -90,7 +90,7 @@ protected:
|
||||
void operate_ready_line();
|
||||
|
||||
// Link to the attached floppy drives
|
||||
floppy_image_device* m_floppy[4];
|
||||
floppy_image_device* m_floppy[4]{};
|
||||
|
||||
// Motor monoflop
|
||||
required_device<ttl74123_device> m_motormf;
|
||||
|
@ -42,11 +42,11 @@ public:
|
||||
protected:
|
||||
struct evpc_palette
|
||||
{
|
||||
uint8_t read_index, write_index, mask;
|
||||
int read;
|
||||
int state;
|
||||
struct { uint8_t red, green, blue; } color[0x100];
|
||||
//int dirty;
|
||||
uint8_t read_index = 0, write_index = 0, mask = 0;
|
||||
int read = 0;
|
||||
int state = 0;
|
||||
struct { uint8_t red = 0, green = 0, blue = 0; } color[0x100];
|
||||
//int dirty = 0;
|
||||
};
|
||||
|
||||
void device_start() override;
|
||||
@ -66,7 +66,7 @@ private:
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( video_interrupt_in );
|
||||
|
||||
int m_address;
|
||||
int m_address = 0;
|
||||
int m_dsr_page;
|
||||
bool m_inDsrArea;
|
||||
bool m_novram_accessed;
|
||||
|
@ -100,10 +100,10 @@ private:
|
||||
required_device<mm58274c_device> m_clock;
|
||||
|
||||
// Link to the attached floppy drives
|
||||
floppy_image_device* m_floppy_unit[4];
|
||||
floppy_image_device* m_floppy_unit[4]{};
|
||||
|
||||
// Link to the attached hard disks
|
||||
mfm_harddisk_device* m_harddisk_unit[3];
|
||||
mfm_harddisk_device* m_harddisk_unit[3]{};
|
||||
|
||||
// Currently selected floppy drive
|
||||
floppy_image_device* m_current_floppy;
|
||||
|
@ -77,8 +77,8 @@ private:
|
||||
int m_cru_base_phoenix;
|
||||
|
||||
// Debugging
|
||||
int m_current_bank;
|
||||
int m_current_page;
|
||||
int m_current_bank = 0;
|
||||
int m_current_page = 0;
|
||||
};
|
||||
|
||||
} // end namespace bus::ti99::peb
|
||||
|
@ -39,7 +39,7 @@ protected:
|
||||
private:
|
||||
bool access_enabled(offs_t offset);
|
||||
required_device<ram_device> m_ram;
|
||||
uint8_t m_switches;
|
||||
uint8_t m_switches = 0;
|
||||
};
|
||||
|
||||
} // end namespace bus::ti99::peb
|
||||
|
@ -86,7 +86,7 @@ private:
|
||||
uint8_t* m_dsrrom;
|
||||
|
||||
// Link to the attached floppy drives
|
||||
floppy_image_device* m_floppy[4];
|
||||
floppy_image_device* m_floppy[4]{};
|
||||
|
||||
// Debugger accessors
|
||||
void debug_read(offs_t offset, uint8_t* value);
|
||||
|
@ -191,7 +191,7 @@ protected:
|
||||
device_ti99_peribox_card_interface(const machine_config &mconfig, device_t &device);
|
||||
virtual void interface_config_complete() override;
|
||||
|
||||
peribox_slot_device *m_slot; // using a link to the slot for callbacks
|
||||
peribox_slot_device *m_slot = nullptr; // using a link to the slot for callbacks
|
||||
int m_senila;
|
||||
int m_senilb;
|
||||
|
||||
|
@ -43,9 +43,9 @@ private:
|
||||
void device_add_mconfig(machine_config &config) override;
|
||||
|
||||
// Settings
|
||||
bool m_active;
|
||||
uint16_t m_crubase;
|
||||
bool m_pgramplus;
|
||||
bool m_active = false;
|
||||
uint16_t m_crubase = 0;
|
||||
bool m_pgramplus = false;
|
||||
|
||||
ioport_constructor device_input_ports() const override;
|
||||
|
||||
|
@ -61,13 +61,13 @@ private:
|
||||
required_device<nscsi_bus_device> m_scsibus;
|
||||
|
||||
// DSR ROM
|
||||
uint8_t* m_eprom;
|
||||
uint8_t* m_eprom = nullptr;
|
||||
|
||||
// Recent address
|
||||
int m_address;
|
||||
int m_address = 0;
|
||||
|
||||
// Settings
|
||||
int m_sw2;
|
||||
int m_sw2 = 0;
|
||||
|
||||
// Latches for the lines
|
||||
// Should be removed and accessor functions be added to ncr5380
|
||||
|
@ -87,7 +87,7 @@ private:
|
||||
bool m_inDsrArea;
|
||||
|
||||
// When true the CPU is halted while DRQ/IRQ are true.
|
||||
bool m_WAITena;
|
||||
bool m_WAITena = false;
|
||||
|
||||
// WD chip selected
|
||||
bool m_WDsel;
|
||||
@ -105,7 +105,7 @@ private:
|
||||
uint8_t* m_dsrrom;
|
||||
|
||||
// Link to the attached floppy drives
|
||||
floppy_image_device* m_floppy[3];
|
||||
floppy_image_device* m_floppy[3]{};
|
||||
|
||||
// Currently selected floppy drive
|
||||
int m_sel_floppy;
|
||||
|
@ -64,23 +64,23 @@ private:
|
||||
bool m_portaccess;
|
||||
|
||||
// DSR ROM
|
||||
uint8_t* m_eprom;
|
||||
uint8_t* m_eprom = nullptr;
|
||||
|
||||
// Websocket support
|
||||
std::unique_ptr<webpp::ws_client> m_wsclient;
|
||||
std::shared_ptr<webpp::ws_client::SendStream> m_send_stream;
|
||||
std::unique_ptr<u8[]> m_rpimessage;
|
||||
int m_msgindex;
|
||||
int m_msglength;
|
||||
emu_timer* m_restart_timer;
|
||||
int m_attempts;
|
||||
bool m_connected;
|
||||
int m_msgindex = 0;
|
||||
int m_msglength = 0;
|
||||
emu_timer* m_restart_timer = nullptr;
|
||||
int m_attempts = 0;
|
||||
bool m_connected = 0;
|
||||
|
||||
// Computer interface
|
||||
u8 m_tc;
|
||||
u8 m_td;
|
||||
u8 m_rc;
|
||||
u8 m_rd;
|
||||
u8 m_tc = 0;
|
||||
u8 m_td = 0;
|
||||
u8 m_rc = 0;
|
||||
u8 m_rd = 0;
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -63,7 +63,7 @@ private:
|
||||
int m_page;
|
||||
|
||||
// Is the SRAM buffered?
|
||||
bool m_srammap;
|
||||
bool m_srammap = false;
|
||||
|
||||
// RTC type
|
||||
int m_rtctype;
|
||||
@ -77,7 +77,7 @@ private:
|
||||
|
||||
void decode(offs_t offset, bool& mmap, bool& sramsel, bool& xramsel, bool& rtcsel, bool& cs1fx, bool& cs3fx);
|
||||
|
||||
int m_rtc_int;
|
||||
int m_rtc_int = 0;
|
||||
};
|
||||
|
||||
} // end namespace bus::ti99::peb
|
||||
|
@ -91,7 +91,7 @@ protected:
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
|
||||
device_tmc600_eurobus_card_interface *m_card;
|
||||
device_tmc600_eurobus_card_interface *m_card = nullptr;
|
||||
};
|
||||
|
||||
|
||||
|
@ -30,13 +30,13 @@ protected:
|
||||
static constexpr device_timer_id TIMER_OSC = 0;
|
||||
|
||||
struct df_t {
|
||||
uint8_t top;
|
||||
uint8_t bottom;
|
||||
uint8_t low;
|
||||
uint8_t high;
|
||||
uint8_t flag;
|
||||
uint8_t music_mode; /* Only used by data fetchers 5,6, and 7 */
|
||||
uint8_t osc_clk; /* Only used by data fetchers 5,6, and 7 */
|
||||
uint8_t top = 0;
|
||||
uint8_t bottom = 0;
|
||||
uint8_t low = 0;
|
||||
uint8_t high = 0;
|
||||
uint8_t flag = 0;
|
||||
uint8_t music_mode = 0; /* Only used by data fetchers 5,6, and 7 */
|
||||
uint8_t osc_clk = 0; /* Only used by data fetchers 5,6, and 7 */
|
||||
};
|
||||
|
||||
// device-level overrides
|
||||
|
@ -118,7 +118,7 @@ protected:
|
||||
|
||||
// callbacks
|
||||
devcb_write_line m_vme_j1_callback;
|
||||
device_vme_card_interface *m_card;
|
||||
device_vme_card_interface *m_card = nullptr;
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(VME, vme_device)
|
||||
@ -195,12 +195,12 @@ protected:
|
||||
virtual space_config_vector memory_space_config() const override;
|
||||
|
||||
// internal state
|
||||
cpu_device *m_maincpu;
|
||||
cpu_device *m_maincpu = nullptr;
|
||||
|
||||
// address spaces
|
||||
address_space *m_prgspace;
|
||||
int m_prgwidth;
|
||||
bool m_allocspaces;
|
||||
address_space *m_prgspace = nullptr;
|
||||
int m_prgwidth = 0;
|
||||
bool m_allocspaces = false;
|
||||
|
||||
const char *m_cputag;
|
||||
|
||||
|
@ -46,11 +46,11 @@ private:
|
||||
|
||||
// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
|
||||
memory_passthrough_handler m_rom_shadow_tap;
|
||||
bool m_bus_error;
|
||||
emu_timer *m_bus_error_timer;
|
||||
bool m_bus_error = false;
|
||||
emu_timer *m_bus_error_timer = nullptr;
|
||||
|
||||
uint8_t bim_irq_state;
|
||||
int bim_irq_level;
|
||||
uint8_t bim_irq_state = 0;
|
||||
int bim_irq_level = 0;
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(bim_irq_callback);
|
||||
void update_irq_to_maincpu();
|
||||
|
@ -49,10 +49,10 @@ protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
|
||||
uint8_t bim_irq_state;
|
||||
int bim_irq_level;
|
||||
uint8_t bim_irq_state = 0;
|
||||
int bim_irq_level = 0;
|
||||
|
||||
emu_timer *m_arbiter_start; // Need a startup delay because it is hooked up to the sense inputs of the PIT
|
||||
emu_timer *m_arbiter_start = nullptr; // Need a startup delay because it is hooked up to the sense inputs of the PIT
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
|
||||
@ -78,7 +78,7 @@ private:
|
||||
required_device<mpcc68561_device> m_mpcc3;
|
||||
|
||||
// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
|
||||
uint32_t *m_sysrom;
|
||||
uint32_t *m_sysrom = nullptr;
|
||||
uint32_t m_sysram[2];
|
||||
void update_irq_to_maincpu();
|
||||
const fc_board_t m_board_id;
|
||||
|
@ -48,7 +48,7 @@ private:
|
||||
required_device<bim68153_device> m_bim;
|
||||
|
||||
// Pointer to System ROMs needed by bootvect_r
|
||||
uint16_t *m_sysrom;
|
||||
uint16_t *m_sysrom = nullptr;
|
||||
};
|
||||
|
||||
#endif // MAME_BUS_VME_VME_FCISIO_H
|
||||
|
@ -30,8 +30,8 @@ protected:
|
||||
|
||||
void update_irq_to_maincpu();
|
||||
|
||||
uint8_t fdc_irq_state;
|
||||
uint8_t dmac_irq_state;
|
||||
uint8_t fdc_irq_state = 0;
|
||||
uint8_t dmac_irq_state = 0;
|
||||
|
||||
private:
|
||||
//dmac
|
||||
@ -66,7 +66,7 @@ private:
|
||||
uint8_t m_tcr;
|
||||
|
||||
// Pointer to System ROMs needed by bootvect_r
|
||||
uint16_t *m_sysrom;
|
||||
uint16_t *m_sysrom = nullptr;
|
||||
};
|
||||
|
||||
#endif // MAME_BUS_VME_VME_FCSCSI_H
|
||||
|
@ -62,13 +62,13 @@ private:
|
||||
|
||||
// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
|
||||
memory_passthrough_handler m_rom_shadow_tap;
|
||||
uint16_t m_irq_state;
|
||||
uint16_t m_irq_mask;
|
||||
uint8_t m_rtc_reg[16];
|
||||
bool m_rtc_hack;
|
||||
int m_fdcdrq_hack;
|
||||
bool m_bus_error;
|
||||
emu_timer *m_bus_error_timer;
|
||||
uint16_t m_irq_state = 0;
|
||||
uint16_t m_irq_mask = 0;
|
||||
uint8_t m_rtc_reg[16]{};
|
||||
bool m_rtc_hack = false;
|
||||
int m_fdcdrq_hack = 0;
|
||||
bool m_bus_error = false;
|
||||
emu_timer *m_bus_error_timer = nullptr;
|
||||
|
||||
uint32_t irq_state_r(offs_t offset);
|
||||
void irq_mask_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
@ -31,7 +31,7 @@ protected:
|
||||
virtual void device_start() override;
|
||||
virtual void device_resolve_objects() override;
|
||||
|
||||
uint32_t m_bank_offset;
|
||||
uint32_t m_bank_offset = 0;
|
||||
};
|
||||
|
||||
|
||||
|
@ -66,7 +66,7 @@ protected:
|
||||
private:
|
||||
required_address_space m_iospace;
|
||||
|
||||
device_vtech_ioexp_interface *m_module;
|
||||
device_vtech_ioexp_interface *m_module = nullptr;
|
||||
};
|
||||
|
||||
// class representing interface-specific live ioexp device
|
||||
|
@ -89,7 +89,7 @@ private:
|
||||
devcb_write_line m_nmi_handler;
|
||||
devcb_write_line m_reset_handler;
|
||||
|
||||
device_vtech_memexp_interface *m_module;
|
||||
device_vtech_memexp_interface *m_module = nullptr;
|
||||
};
|
||||
|
||||
// class representing interface-specific live memexp device
|
||||
|
@ -34,7 +34,7 @@ protected:
|
||||
|
||||
u16 m_io_regs[8];
|
||||
u32 m_base20, m_base30, m_base40;
|
||||
u32 m_rom_mask;
|
||||
u32 m_rom_mask = 0;
|
||||
|
||||
// RTC
|
||||
u8 m_rtc_setting; /* Timer setting byte */
|
||||
@ -122,14 +122,14 @@ private:
|
||||
READ_MODE = 0,
|
||||
COMMAND_MODE
|
||||
};
|
||||
u8 m_flash_seq;
|
||||
u8 m_flash_command;
|
||||
bool m_write_flash;
|
||||
bool m_writing_flash;
|
||||
bool m_write_resetting;
|
||||
u8 m_flash_mode;
|
||||
u8 m_flash_status;
|
||||
u8 m_flash_count;
|
||||
u8 m_flash_seq = 0;
|
||||
u8 m_flash_command = 0;
|
||||
bool m_write_flash = false;
|
||||
bool m_writing_flash = false;
|
||||
bool m_write_resetting = false;
|
||||
u8 m_flash_mode = 0;
|
||||
u8 m_flash_status = 0;
|
||||
u8 m_flash_count = 0;
|
||||
};
|
||||
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user