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https://github.com/holub/mame
synced 2025-07-06 10:29:38 +03:00
konamigx.cpp: fix sprite DMA transfers for type 3/4 right monitor, and fixed right screen protection in Rushing Heroes and Run & Gun 2. This makes dual monitor 4 players play possible (and enabled by default) [Angelo Salese]
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@ -869,6 +869,8 @@ WRITE32_MEMBER(konamigx_state::type4_prot_w)
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}
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else
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{
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if ((data & 0xff00) == 0)
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m_last_prot_param = data & 0xffff;
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data >>= 16;
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clk = data & 0x200;
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@ -908,11 +910,23 @@ WRITE32_MEMBER(konamigx_state::type4_prot_w)
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}
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else if(m_last_prot_op == 0xd97) // rushhero
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{
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int src = 0xc09ff0;
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int dst = 0xd20000;
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int spr;
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for (spr = 0; spr < 256; spr++)
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u32 src = 0xc09ff0;
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u32 dst = 0xd20000;
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//u32 input_src = 0xc01cc0;
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//u32 input_dst = 0xc00507;
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// screen 1
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// if (m_last_prot_param == 0x004a)
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// screen 2
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if (m_last_prot_param == 0x0062)
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{
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src = 0xc19ff0;
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dst = 0xd21000;
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//input_src += 0x10000;
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//input_dst += 0x40;
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}
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for (int spr = 0; spr < 256; spr++)
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{
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for (i = 0; i <= 0x10; i += 4)
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{
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@ -924,10 +938,15 @@ WRITE32_MEMBER(konamigx_state::type4_prot_w)
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}
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/* Input buffer copiers, only this command is executed so it's safe to assume that's polled here */
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space.write_byte(0xc01cc0, ~space.read_byte(0xc00507));
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space.write_byte(0xc01cc1, ~space.read_byte(0xc00527));
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space.write_byte(0xc01cc4, ~space.read_byte(0xc00547));
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space.write_byte(0xc01cc5, ~space.read_byte(0xc00567));
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space.write_byte(0xc01cc0 + 0, ~space.read_byte(0xc00507 + 0x00));
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space.write_byte(0xc01cc0 + 1, ~space.read_byte(0xc00507 + 0x20));
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space.write_byte(0xc01cc0 + 4, ~space.read_byte(0xc00507 + 0x40));
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space.write_byte(0xc01cc0 + 5, ~space.read_byte(0xc00507 + 0x60));
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space.write_byte(0xc11cc0 + 0, ~space.read_byte(0xc00507 + 0x00));
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space.write_byte(0xc11cc0 + 1, ~space.read_byte(0xc00507 + 0x20));
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space.write_byte(0xc11cc0 + 4, ~space.read_byte(0xc00507 + 0x40));
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space.write_byte(0xc11cc0 + 5, ~space.read_byte(0xc00507 + 0x60));
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}
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else if(m_last_prot_op == 0xb16) // slamdnk2
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{
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@ -944,6 +963,20 @@ WRITE32_MEMBER(konamigx_state::type4_prot_w)
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//maybe here there's a [$d8001f] <- 0x31 write too?
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}
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// TODO: it actually calls 0x1b54-335e-125c-3a56-1b55-3357-1255-3a4f on odd frames
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// should first move a block to a work RAM buffer then send it to the actual sprite entries
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else if (m_last_prot_op == 0x3a4f) // slamdnk2 right screen
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{
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u32 src = 0xc18400;
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u32 dst = 0xd21000;
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for (int spr = 0; spr < 0x400; spr++)
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{
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space.write_word(dst, space.read_word(src));
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src += 4;
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dst += 2;
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}
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}
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else if(m_last_prot_op == 0x515) // vsnetscr screen 1
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{
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int adr;
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@ -1046,11 +1079,12 @@ void konamigx_state::gx_type2_map(address_map &map)
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void konamigx_state::gx_type3_map(address_map &map)
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{
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gx_base_memmap(map);
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map(0xd20000, 0xd21fff).rw(m_k055673, FUNC(k055673_device::k053247_word_r), FUNC(k055673_device::k053247_word_w));
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map(0xd90000, 0xd97fff).ram();
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//map(0xcc0000, 0xcc0007).w(FUNC(konamigx_state::type4_prot_w));
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map(0xe00000, 0xe0001f).ram().share("k053936_0_ctrl");
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//map(0xe20000, 0xe20003).nopw();
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map(0xe40000, 0xe40003).w(FUNC(konamigx_state::konamigx_type3_psac2_bank_w)).share("psac2_bank");
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map(0xe40000, 0xe40003).w(FUNC(konamigx_state::type3_bank_w)).umask32(0xffffffff);
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map(0xe60000, 0xe60fff).ram().share("k053936_0_line");
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map(0xe80000, 0xe83fff).ram().share("paletteram"); // main monitor palette
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map(0xea0000, 0xea3fff).ram().share("subpaletteram");
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@ -1062,10 +1096,11 @@ void konamigx_state::gx_type4_map(address_map &map)
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{
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gx_base_memmap(map);
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map(0xcc0000, 0xcc0007).w(FUNC(konamigx_state::type4_prot_w));
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map(0xd20000, 0xd21fff).rw(m_k055673, FUNC(k055673_device::k053247_word_r), FUNC(k055673_device::k053247_word_w));
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map(0xd90000, 0xd97fff).ram();
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map(0xe00000, 0xe0001f).ram().share("k053936_0_ctrl");
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map(0xe20000, 0xe20003).nopw();
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map(0xe40000, 0xe40003).nopw();
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map(0xe40000, 0xe40003).w(FUNC(konamigx_state::type3_bank_w)).umask32(0xffffffff);
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map(0xe60000, 0xe60fff).ram().share("k053936_0_line"); // 29C & 29G (PSAC2 line control)
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map(0xe80000, 0xe87fff).ram().share("paletteram"); // 11G/13G/15G (main screen palette RAM)
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map(0xea0000, 0xea7fff).ram().share("subpaletteram"); // 5G/7G/9G (sub screen palette RAM)
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@ -1507,7 +1542,7 @@ static INPUT_PORTS_START( type3 )
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PORT_DIPNAME( 0x04000000, 0x04000000, "Right Monitor Flip Screen" ) PORT_DIPLOCATION("SW1:3")
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PORT_DIPSETTING( 0x04000000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x08000000, 0x08000000, "Number of Screens" ) PORT_DIPLOCATION("SW1:4")
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PORT_DIPNAME( 0x08000000, 0x00000000, "Number of Screens" ) PORT_DIPLOCATION("SW1:4")
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PORT_DIPSETTING( 0x08000000, "1" )
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PORT_DIPSETTING( 0x00000000, "2" )
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INPUT_PORTS_END
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@ -49,7 +49,6 @@ public:
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, m_k053936_0_linectrl(*this, "k053936_0_line", 32)
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, m_k053936_0_ctrl_16(*this, "k053936_0_ct16", 16)
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, m_k053936_0_linectrl_16(*this, "k053936_0_li16", 16)
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, m_konamigx_type3_psac2_bank(*this, "psac2_bank")
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, m_generic_paletteram_32(*this, "paletteram")
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, m_an0(*this, "AN0")
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, m_an1(*this, "AN1")
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@ -78,7 +77,7 @@ public:
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DECLARE_WRITE16_MEMBER(K055550_word_w);
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DECLARE_WRITE16_MEMBER(K053990_martchmp_word_w);
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DECLARE_WRITE32_MEMBER(fantjour_dma_w);
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DECLARE_WRITE32_MEMBER(konamigx_type3_psac2_bank_w);
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DECLARE_WRITE8_MEMBER(type3_bank_w);
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DECLARE_WRITE32_MEMBER(konamigx_tilebank_w);
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DECLARE_WRITE32_MEMBER(konamigx_t1_psacmap_w);
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DECLARE_WRITE32_MEMBER(konamigx_t4_psacmap_w);
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@ -216,7 +215,6 @@ protected:
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optional_shared_ptr<uint16_t> m_k053936_0_linectrl;
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optional_shared_ptr<uint16_t> m_k053936_0_ctrl_16;
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optional_shared_ptr<uint16_t> m_k053936_0_linectrl_16;
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optional_shared_ptr<uint32_t> m_konamigx_type3_psac2_bank;
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optional_shared_ptr<uint32_t> m_generic_paletteram_32;
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optional_ioport m_an0, m_an1, m_light0_x, m_light0_y, m_light1_x, m_light1_y, m_eepromout;
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@ -232,6 +230,7 @@ protected:
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int m_gx_cfgport;
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int m_suspension_active, m_resume_trigger;
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int m_last_prot_op, m_last_prot_clk;
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u16 m_last_prot_param;
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uint8_t m_prev_pixel_clock;
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uint8_t m_esc_program[4096];
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@ -291,7 +290,8 @@ protected:
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std::unique_ptr<bitmap_ind16> m_gxtype1_roz_dstbitmap2;
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rectangle m_gxtype1_roz_dstbitmapclip;
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int m_konamigx_type3_psac2_actual_bank;
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u8 m_type3_psac2_bank;
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u8 m_type3_spriteram_bank;
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//int m_konamigx_type3_psac2_actual_last_bank = 0;
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int m_use_68020_post_clock_hack;
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output_finder<> m_lamp;
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@ -273,7 +273,7 @@ void konamigx_state::wipezbuf(int noshadow)
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* shadow enables transparent shadows. Note that it applies to the last sprite pen ONLY.
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* The rest of the sprite remains normal.
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*/
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#define GX_MAX_SPRITES 512
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#define GX_MAX_SPRITES 512*2
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#define GX_MAX_LAYERS 6
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#define GX_MAX_OBJECTS (GX_MAX_SPRITES + GX_MAX_LAYERS)
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@ -292,7 +292,7 @@ void konamigx_state::konamigx_mixer_init(screen_device &screen, int objdma)
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if (objdma)
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{
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m_gx_spriteram = auto_alloc_array(machine(), uint16_t, 0x1000/2);
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m_gx_spriteram = auto_alloc_array(machine(), uint16_t, 0x2000/2);
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m_gx_objdma = 1;
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}
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else
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@ -489,7 +489,11 @@ void konamigx_state::konamigx_mixer(screen_device &screen, bitmap_rgb32 &bitmap,
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// i = j = 0xff;
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int l = 0;
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for (int offs=0; offs<0x800; offs+=8)
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u32 start_addr = m_type3_spriteram_bank ? 0x800 : 0;
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u32 end_addr = start_addr + 0x800;
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for (int offs=start_addr; offs<end_addr; offs+=8)
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{
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int pri = 0;
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@ -920,12 +924,21 @@ TILE_GET_INFO_MEMBER(konamigx_state::get_gx_psac_tile_info)
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}
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WRITE32_MEMBER(konamigx_state::konamigx_type3_psac2_bank_w)
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WRITE8_MEMBER(konamigx_state::type3_bank_w)
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{
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// other bits are used for something...
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COMBINE_DATA(&m_konamigx_type3_psac2_bank[offset]);
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m_konamigx_type3_psac2_actual_bank = (m_konamigx_type3_psac2_bank[0] & 0x10000000) >> 28;
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if (offset == 0)
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{
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m_type3_psac2_bank = (data & 0x10) >> 4;
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// swap sprite display bank for left/right screens
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// bit 6 works for soccerss, doesn't for type4 (where they never enable it)
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// so the best candidate is bit 0
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//m_type3_spriteram_bank = (data & 0x40) >> 6;
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m_type3_spriteram_bank = (data & 0x01);
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}
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else
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logerror("Write to type3 bank %02x address %02x\n",offset, data);
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/* handle this by creating 2 roz tilemaps instead, otherwise performance dies completely on dual screen mode
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if (m_konamigx_type3_psac2_actual_bank!=m_konamigx_type3_psac2_actual_last_bank)
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@ -940,7 +953,7 @@ WRITE32_MEMBER(konamigx_state::konamigx_type3_psac2_bank_w)
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/* Soccer Superstars (tile and flip bits now TRUSTED) */
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TILE_GET_INFO_MEMBER(konamigx_state::get_gx_psac3_tile_info)
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{
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{
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int tileno, colour, flip;
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uint8_t *tmap = memregion("gfx4")->base();
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@ -958,10 +971,10 @@ TILE_GET_INFO_MEMBER(konamigx_state::get_gx_psac3_tile_info)
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if (tmap[(base_index*2)+1] & 0x10) flip |= TILE_FLIPX;
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tileinfo.set(0, tileno, colour, flip);
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}
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}
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TILE_GET_INFO_MEMBER(konamigx_state::get_gx_psac3_alt_tile_info)
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{
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{
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int tileno, colour, flip;
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uint8_t *tmap = memregion("gfx4")->base()+0x20000;
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@ -979,7 +992,7 @@ TILE_GET_INFO_MEMBER(konamigx_state::get_gx_psac3_alt_tile_info)
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if (tmap[(base_index*2)+1] & 0x10) flip |= TILE_FLIPX;
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tileinfo.set(0, tileno, colour, flip);
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}
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}
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/* PSAC4 */
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@ -1433,7 +1446,7 @@ uint32_t konamigx_state::screen_update_konamigx(screen_device &screen, bitmap_rg
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temprect = cliprect;
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temprect.max_x = cliprect.min_x+320;
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if (m_konamigx_type3_psac2_actual_bank == 1) K053936_0_zoom_draw(screen, *m_type3_roz_temp_bitmap, temprect,m_gx_psac_tilemap_alt, 0,0,0); // soccerss playfield
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if (m_type3_psac2_bank == 1) K053936_0_zoom_draw(screen, *m_type3_roz_temp_bitmap, temprect,m_gx_psac_tilemap_alt, 0,0,0); // soccerss playfield
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else K053936_0_zoom_draw(screen, *m_type3_roz_temp_bitmap, temprect,m_gx_psac_tilemap, 0,0,0); // soccerss playfield
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