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Cleanups and version bump to 0.124u3.

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This commit is contained in:
Aaron Giles 2008-04-17 05:26:05 +00:00
parent 2028ecc2f7
commit b35c15fef5
25 changed files with 112 additions and 112 deletions
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2
src/emu/cpu/cdp1802/cdp1802.h
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@ -104,7 +104,7 @@ struct _cdp1802_interface
/* if specified, this gets called for every DMA read */
cdp1802_dma_read_func dma_r;
/* if specified, this gets called for every DMA write */
cdp1802_dma_write_func dma_w;
};

12
src/emu/machine/idectrl.c
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@ -101,7 +101,7 @@ typedef struct _ide_state ide_state;
struct _ide_state
{
const device_config *device;
UINT8 adapter_control;
UINT8 status;
UINT8 error;
@ -198,7 +198,7 @@ INLINE ide_state *get_safe_token(const device_config *device)
INLINE void signal_interrupt(ide_state *ide)
{
const ide_config *config = ide->device->inline_config;
LOG(("IDE interrupt assert\n"));
/* signal an interrupt */
@ -1289,7 +1289,7 @@ static UINT32 ide_controller_read(const device_config *device, offs_t offset, in
static void ide_controller_write(const device_config *device, offs_t offset, int size, UINT32 data)
{
ide_state *ide = get_safe_token(device);
/* logit */
if (offset != IDE_ADDR_DATA)
LOG(("%08X:IDE write to %03X = %08X, size=%d\n", activecpu_get_previouspc(), offset, data, size));
@ -1439,7 +1439,7 @@ static void ide_controller_write(const device_config *device, offs_t offset, int
static UINT32 ide_bus_master_read(const device_config *device, offs_t offset, int size)
{
ide_state *ide = get_safe_token(device);
LOG(("%08X:ide_bus_master_read(%d, %d)\n", activecpu_get_previouspc(), offset, size));
/* command register */
@ -1678,7 +1678,7 @@ static DEVICE_START( ide_controller )
assert(device->inline_config != NULL);
assert(device->machine != NULL);
assert(device->machine->config != NULL);
/* store a pointer back to the device */
ide->device = device;
@ -1768,7 +1768,7 @@ static DEVICE_STOP( ide_controller )
{
ide_state *ide = get_safe_token(device);
/* close the hard disk */
/* close the hard disk */
if (ide->disk != NULL)
hard_disk_close(ide->disk);
}

54
src/emu/memory.c
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@ -1282,7 +1282,7 @@ int memory_get_log_unmap(int spacenum)
/*-------------------------------------------------
memory_install_handlerX - install
dynamic machine read and write handlers for
dynamic machine read and write handlers for
X-bit case
-------------------------------------------------*/
@ -1345,8 +1345,8 @@ UINT64 *_memory_install_handler64(running_machine *machine, int cpunum, int spac
/*-------------------------------------------------
memory_install_device_handlerX -
install dynamic device read and write handlers
memory_install_device_handlerX -
install dynamic device read and write handlers
for X-bit case
-------------------------------------------------*/
@ -1852,13 +1852,13 @@ static void table_compute_subhandler(handler_data *table, UINT8 entry, read_or_w
int maxunits = spacebits / handlerbits;
handler_data *hdata = &table[entry];
int unitnum;
assert_always(!HANDLER_IS_STATIC(entry), "table_compute_subhandler called with static handlers and mismatched data bus widths");
assert_always(!HANDLER_IS_STATIC(entry), "table_compute_subhandler called with static handlers and mismatched data bus widths");
/* copy raw data to the subhandler data */
hdata->subobject = hdata->object;
hdata->subhandler = hdata->handler;
/* fill in a stub as the real handler */
hdata->object = hdata;
hdata->handler = get_stub_handler(readorwrite, spacebits, handlerbits);
@ -1952,8 +1952,8 @@ static void table_populate_range(table_data *tabledata, offs_t bytestart, offs_t
/*-------------------------------------------------
table_populate_range_mirrored - assign a
memory handler to a range of addresses
table_populate_range_mirrored - assign a
memory handler to a range of addresses
including mirrors
-------------------------------------------------*/
@ -3027,7 +3027,7 @@ static READ16_HANDLER( stub_read8_from_16 )
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
UINT16 result = 0;
offset *= subunits;
while (subunits-- != 0)
{
@ -3051,7 +3051,7 @@ static READ32_HANDLER( stub_read8_from_32 )
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
UINT32 result = 0;
offset *= subunits;
while (subunits-- != 0)
{
@ -3075,7 +3075,7 @@ static READ64_HANDLER( stub_read8_from_64 )
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
UINT64 result = 0;
offset *= subunits;
while (subunits-- != 0)
{
@ -3099,7 +3099,7 @@ static READ32_HANDLER( stub_read16_from_32 )
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
UINT32 result = 0;
offset *= subunits;
while (subunits-- != 0)
{
@ -3123,7 +3123,7 @@ static READ64_HANDLER( stub_read16_from_64 )
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
UINT64 result = 0;
offset *= subunits;
while (subunits-- != 0)
{
@ -3147,7 +3147,7 @@ static READ64_HANDLER( stub_read32_from_64 )
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
UINT64 result = 0;
offset *= subunits;
while (subunits-- != 0)
{
@ -3175,7 +3175,7 @@ static WRITE16_HANDLER( stub_write8_from_16 )
const handler_data *handler = (const handler_data *)machine;
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
offset *= subunits;
while (subunits-- != 0)
{
@ -3197,7 +3197,7 @@ static WRITE32_HANDLER( stub_write8_from_32 )
const handler_data *handler = (const handler_data *)machine;
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
offset *= subunits;
while (subunits-- != 0)
{
@ -3219,7 +3219,7 @@ static WRITE64_HANDLER( stub_write8_from_64 )
const handler_data *handler = (const handler_data *)machine;
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
offset *= subunits;
while (subunits-- != 0)
{
@ -3241,7 +3241,7 @@ static WRITE32_HANDLER( stub_write16_from_32 )
const handler_data *handler = (const handler_data *)machine;
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
offset *= subunits;
while (subunits-- != 0)
{
@ -3263,7 +3263,7 @@ static WRITE64_HANDLER( stub_write16_from_64 )
const handler_data *handler = (const handler_data *)machine;
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
offset *= subunits;
while (subunits-- != 0)
{
@ -3285,7 +3285,7 @@ static WRITE64_HANDLER( stub_write32_from_64 )
const handler_data *handler = (const handler_data *)machine;
const UINT8 *subshift = handler->subshift;
int subunits = handler->subunits;
offset *= subunits;
while (subunits-- != 0)
{
@ -3310,7 +3310,7 @@ static WRITE64_HANDLER( stub_write32_from_64 )
static memory_handler get_stub_handler(read_or_write readorwrite, int spacedbits, int handlerdbits)
{
memory_handler result = { 0 };
/* read stubs */
if (readorwrite == ROW_READ)
{
@ -3320,7 +3320,7 @@ static memory_handler get_stub_handler(read_or_write readorwrite, int spacedbits
if (handlerdbits == 8)
result.read.mhandler16 = stub_read8_from_16;
}
/* 32-bit read stubs */
else if (spacedbits == 32)
{
@ -3329,7 +3329,7 @@ static memory_handler get_stub_handler(read_or_write readorwrite, int spacedbits
else if (handlerdbits == 16)
result.read.mhandler32 = stub_read16_from_32;
}
/* 64-bit read stubs */
else if (spacedbits == 64)
{
@ -3341,7 +3341,7 @@ static memory_handler get_stub_handler(read_or_write readorwrite, int spacedbits
result.read.mhandler64 = stub_read32_from_64;
}
}
/* write stubs */
else if (readorwrite == ROW_WRITE)
{
@ -3351,7 +3351,7 @@ static memory_handler get_stub_handler(read_or_write readorwrite, int spacedbits
if (handlerdbits == 8)
result.write.mhandler16 = stub_write8_from_16;
}
/* 32-bit write stubs */
else if (spacedbits == 32)
{
@ -3360,7 +3360,7 @@ static memory_handler get_stub_handler(read_or_write readorwrite, int spacedbits
else if (handlerdbits == 16)
result.write.mhandler32 = stub_write16_from_32;
}
/* 64-bit write stubs */
else if (spacedbits == 64)
{
@ -3372,7 +3372,7 @@ static memory_handler get_stub_handler(read_or_write readorwrite, int spacedbits
result.write.mhandler64 = stub_write32_from_64;
}
}
assert(result.read.generic != NULL);
return result;
}

2
src/mame/drivers/aerofgt.c
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@ -373,7 +373,7 @@ static ADDRESS_MAP_START( aerfboo2_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0fe006, 0x0fe007) AM_WRITE(aerofgt_bg2scrolly_w)
AM_RANGE(0x0fe008, 0x0fe00b) AM_WRITE(turbofrc_gfxbank_w)
AM_RANGE(0x0fe010, 0x0fe011) AM_WRITENOP
// AM_RANGE(0x0fe012, 0x0fe013) AM_WRITE(aerfboot_soundlatch_w)
// AM_RANGE(0x0fe012, 0x0fe013) AM_WRITE(aerfboot_soundlatch_w)
AM_RANGE(0x0fe400, 0x0fe401) AM_WRITENOP
AM_RANGE(0x0fe402, 0x0fe403) AM_WRITENOP
AM_RANGE(0x0ff000, 0x0fffff) AM_RAM AM_BASE(&aerofgt_rasterram) /* used only for the scroll registers */

2
src/mame/drivers/armedf.c
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@ -300,7 +300,7 @@ static ADDRESS_MAP_START( cclimbr2_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x061000, 0x063fff) AM_RAM
AM_RANGE(0x064000, 0x064fff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x068000, 0x069fff) AM_RAM_WRITE(armedf_text_videoram_w) AM_BASE(&terraf_text_videoram)
AM_RANGE(0x06a000, 0x06a9ff) AM_RAM
AM_RANGE(0x06a000, 0x06a9ff) AM_RAM
AM_RANGE(0x06c000, 0x06c9ff) AM_RAM
AM_RANGE(0x06ca00, 0x06cbff) AM_WRITEONLY
AM_RANGE(0x070000, 0x070fff) AM_RAM_WRITE(armedf_fg_videoram_w) AM_BASE(&armedf_fg_videoram)

2
src/mame/drivers/cojag.c
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@ -1003,7 +1003,7 @@ static MACHINE_DRIVER_START( cojagr3k )
MDRV_MACHINE_RESET(cojag)
MDRV_NVRAM_HANDLER(generic_1fill)
MDRV_IDE_CONTROLLER_ADD("ide", 0, jaguar_external_int)
/* video hardware */

2
src/mame/drivers/djmain.c
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@ -1232,7 +1232,7 @@ static MACHINE_DRIVER_START( djmain )
MDRV_MACHINE_START(djmain)
MDRV_MACHINE_RESET(djmain)
MDRV_IDE_CONTROLLER_ADD("ide", 0, ide_interrupt)
/* video hardware */

2
src/mame/drivers/gamecstl.c
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@ -661,7 +661,7 @@ static MACHINE_DRIVER_START(gamecstl)
MDRV_DEVICE_ADD( "pic8259_2", PIC8259 )
MDRV_DEVICE_CONFIG( gamecstl_pic8259_2_config )
MDRV_IDE_CONTROLLER_ADD("ide", 0, ide_interrupt)
MDRV_NVRAM_HANDLER( mc146818 )

2
src/mame/drivers/kinst.c
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@ -685,7 +685,7 @@ static MACHINE_DRIVER_START( kinst )
MDRV_MACHINE_START(kinst)
MDRV_MACHINE_RESET(kinst)
MDRV_IDE_CONTROLLER_ADD("ide", 0, ide_interrupt)
/* video hardware */

2
src/mame/drivers/mediagx.c
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@ -1055,7 +1055,7 @@ static MACHINE_DRIVER_START(mediagx)
MDRV_DEVICE_ADD( "pic8259_2", PIC8259 )
MDRV_DEVICE_CONFIG( mediagx_pic8259_2_config )
MDRV_IDE_CONTROLLER_ADD("ide", 0, ide_interrupt)
MDRV_NVRAM_HANDLER( mc146818 )

2
src/mame/drivers/midvunit.c
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@ -1044,7 +1044,7 @@ static MACHINE_DRIVER_START( midvplus )
MDRV_MACHINE_RESET(midvplus)
MDRV_NVRAM_HANDLER(midway_serial_pic2)
MDRV_IDE_CONTROLLER_ADD("ide", 0, NULL)
/* sound hardware */

4
src/mame/drivers/qdrmfgp.c
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@ -663,7 +663,7 @@ static MACHINE_DRIVER_START( qdrmfgp )
MDRV_MACHINE_START(qdrmfgp)
MDRV_MACHINE_RESET(qdrmfgp)
MDRV_NVRAM_HANDLER(generic_1fill)
MDRV_IDE_CONTROLLER_ADD("ide", 0, ide_interrupt)
/* video hardware */
@ -698,7 +698,7 @@ static MACHINE_DRIVER_START( qdrmfgp2 )
MDRV_MACHINE_START(qdrmfgp)
MDRV_MACHINE_RESET(qdrmfgp2)
MDRV_NVRAM_HANDLER(generic_1fill)
MDRV_IDE_CONTROLLER_ADD("ide", 0, gp2_ide_interrupt)
/* video hardware */

2
src/mame/drivers/seattle.c
View File

@ -2458,7 +2458,7 @@ static MACHINE_DRIVER_START( seattle_common )
MDRV_MACHINE_RESET(seattle)
MDRV_NVRAM_HANDLER(generic_1fill)
MDRV_IDE_CONTROLLER_ADD("ide", 0, ide_interrupt)
/* video hardware */

6
src/mame/drivers/taito_l.c
View File

@ -952,7 +952,7 @@ static ADDRESS_MAP_START( puzznici_readmem, ADDRESS_SPACE_PROGRAM, 8 )
COMMON_SINGLE_READ
AM_RANGE(0xa800, 0xa800) AM_READ(SMH_NOP) // Watchdog
AM_RANGE(0xb000, 0xb7ff) AM_READ(SMH_RAM) // Wrong, used to overcome protection
// AM_RANGE(0xb800, 0xb800) AM_READ(mcu_data_r)
// AM_RANGE(0xb800, 0xb800) AM_READ(mcu_data_r)
AM_RANGE(0xb801, 0xb801) AM_READ(mcu_control_r)
ADDRESS_MAP_END
@ -960,8 +960,8 @@ static ADDRESS_MAP_START( puzznici_writemem, ADDRESS_SPACE_PROGRAM, 8 )
COMMON_BANKS_WRITE
COMMON_SINGLE_WRITE
AM_RANGE(0xb000, 0xb7ff) AM_WRITE(SMH_RAM) // Wrong, used to overcome protection
// AM_RANGE(0xb800, 0xb800) AM_WRITE(mcu_data_w)
// AM_RANGE(0xb801, 0xb801) AM_WRITE(mcu_control_w)
// AM_RANGE(0xb800, 0xb800) AM_WRITE(mcu_data_w)
// AM_RANGE(0xb801, 0xb801) AM_WRITE(mcu_control_w)
AM_RANGE(0xbc00, 0xbc00) AM_WRITE(SMH_NOP) // Control register, function unknown
ADDRESS_MAP_END

2
src/mame/drivers/taitowlf.c
View File

@ -627,7 +627,7 @@ static MACHINE_DRIVER_START(taitowlf)
MDRV_DEVICE_ADD( "pic8259_2", PIC8259 )
MDRV_DEVICE_CONFIG( taitowlf_pic8259_2_config )
MDRV_IDE_CONTROLLER_ADD("ide", 0, ide_interrupt)
MDRV_NVRAM_HANDLER( mc146818 )

42
src/mame/drivers/toaplan2.c
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@ -1432,8 +1432,8 @@ static ADDRESS_MAP_START( dogyuun_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x200018, 0x200019) AM_READ_PORT("SYS")
AM_RANGE(0x20001c, 0x20001d) AM_WRITE(toaplan2_v25_coin_word_w)
#if USE_V25
// AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $21f000 status port */
// AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
// AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $21f000 status port */
// AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
AM_RANGE(0x210000, 0x21efff) AM_RAM AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
AM_RANGE(0x21f000, 0x21ffff) AM_RAM AM_READWRITE( batsugun_share_r, batsugun_share_w )
#else
@ -1591,8 +1591,8 @@ static ADDRESS_MAP_START( fixeight_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x200010, 0x200011) AM_READ_PORT("SYS")
AM_RANGE(0x20001c, 0x20001d) AM_WRITE(toaplan2_coin_word_w) /* Coin count/lock */
#if USE_V25
// AM_RANGE(0x28e000, 0x28fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $28f000 status port */
// AM_RANGE(0x28fc00, 0x28ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
// AM_RANGE(0x28e000, 0x28fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $28f000 status port */
// AM_RANGE(0x28fc00, 0x28ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
AM_RANGE(0x280000, 0x28efff) AM_RAM AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
AM_RANGE(0x28f000, 0x28ffff) AM_RAM AM_READWRITE( batsugun_share_r, batsugun_share_w )
AM_RANGE(0x700000, 0x700001) AM_WRITE(fixeight_subcpu_ctrl) // guess!!!
@ -1653,8 +1653,8 @@ static ADDRESS_MAP_START( vfive_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x200018, 0x200019) AM_READ_PORT("SYS")
AM_RANGE(0x20001c, 0x20001d) AM_WRITE(toaplan2_v25_coin_word_w) /* Coin count/lock */
#if USE_V25
// AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $21f000 status port */
// AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
// AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $21f000 status port */
// AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
AM_RANGE(0x210000, 0x21efff) AM_RAM AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
AM_RANGE(0x21f000, 0x21ffff) AM_RAM AM_READWRITE( batsugun_share_r, batsugun_share_w )
#else
@ -1687,11 +1687,11 @@ static READ16_HANDLER( batsugun_share_r )
static WRITE16_HANDLER( batsugun_share_w )
{
/*
if (ACCESSING_BITS_8_15)
{
batsugun_share[offset] = data >> 8;
}
*/
if (ACCESSING_BITS_8_15)
{
batsugun_share[offset] = data >> 8;
}
*/
if (ACCESSING_BITS_0_7)
{
batsugun_share[offset] = data;
@ -1707,11 +1707,11 @@ static READ16_HANDLER( batsugun_share2_r )
static WRITE16_HANDLER( batsugun_share2_w )
{
/*
if (ACCESSING_BITS_8_15)
{
batsugun_share2[offset] = data >> 8;
}
*/
if (ACCESSING_BITS_8_15)
{
batsugun_share2[offset] = data >> 8;
}
*/
if (ACCESSING_BITS_0_7)
{
@ -1728,8 +1728,8 @@ static ADDRESS_MAP_START( batsugun_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x200018, 0x200019) AM_READ_PORT("SYS")
AM_RANGE(0x20001c, 0x20001d) AM_WRITE(toaplan2_v25_coin_word_w) /* Coin count/lock + v25 reset/hold control lines? */
#if USE_V25
// AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $21f000 status port */
// AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
// AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $21f000 status port */
// AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
AM_RANGE(0x210000, 0x21efff) AM_RAM AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
AM_RANGE(0x21f000, 0x21ffff) AM_RAM AM_READWRITE( batsugun_share_r, batsugun_share_w )
#else
@ -2022,13 +2022,13 @@ static ADDRESS_MAP_START( V25_mem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x04000, 0x04000) AM_READWRITE(YM2151_status_port_0_r, YM2151_register_port_0_w)
AM_RANGE(0x04001, 0x04001) AM_WRITE(YM2151_data_port_0_w)
AM_RANGE(0x04002, 0x04002) AM_READWRITE(OKIM6295_status_0_r, OKIM6295_data_0_w)
// AM_RANGE(0x04004, 0x04004) AM_WRITE(oki_bankswitch_w)
// AM_RANGE(0x04004, 0x04004) AM_WRITE(oki_bankswitch_w)
AM_RANGE(0x04008, 0x04008) AM_READ_PORT("IN1")
AM_RANGE(0x0400a, 0x0400a) AM_READ_PORT("IN2")
AM_RANGE(0x0400c, 0x0400c) AM_READ_PORT("SYS")
AM_RANGE(0x0400e, 0x0400e) AM_WRITE(toaplan2_coin_w)
AM_RANGE(0x0fe00, 0x0ffff) AM_RAM /* Internal 512 bytes of RAM */
// AM_RANGE(0x80000, 0x87fff) AM_RAM AM_BASE(&V25_sharedram) /* External shared RAM (ROM for KBASH) */
// AM_RANGE(0x80000, 0x87fff) AM_RAM AM_BASE(&V25_sharedram) /* External shared RAM (ROM for KBASH) */
ADDRESS_MAP_END
@ -3905,7 +3905,7 @@ MACHINE_RESET(batsugun)
void batsugun_ym2151_irqhandler(int linestate)
{
logerror("batsugun_ym2151_irqhandler %02x\n",linestate);
// update_irq_lines(Machine, linestate ? assert : clear);
// update_irq_lines(Machine, linestate ? assert : clear);
}
const struct YM2151interface batsugun_ym2151_interface =

2
src/mame/drivers/vegas.c
View File

@ -2234,7 +2234,7 @@ static MACHINE_DRIVER_START( vegascore )
MDRV_MACHINE_RESET(vegas)
MDRV_NVRAM_HANDLER(timekeeper_save)
MDRV_IDE_CONTROLLER_ADD("ide", 0, ide_interrupt)
/* video hardware */

2
src/mame/drivers/viper.c
View File

@ -646,7 +646,7 @@ static MACHINE_DRIVER_START(viper)
MDRV_MACHINE_RESET(viper)
MDRV_NVRAM_HANDLER(timekeeper_0)
MDRV_IDE_CONTROLLER_ADD("ide", 0, ide_interrupt)
/* video hardware */

6
src/mame/drivers/zn.c
View File

@ -1692,7 +1692,7 @@ static void atpsx_dma_write( UINT32 n_address, INT32 n_size )
static DRIVER_INIT( coh1000w )
{
const device_config *ide = device_list_find_by_tag(machine->config->devicelist, IDE_CONTROLLER, "ide");
memory_install_read32_handler ( machine, 0, ADDRESS_SPACE_PROGRAM, 0x1f000000, 0x1f1fffff, 0, 0, SMH_BANK1 );
memory_install_write32_handler ( machine, 0, ADDRESS_SPACE_PROGRAM, 0x1f000000, 0x1f000003, 0, 0, SMH_NOP );
memory_install_readwrite32_device_handler( ide, 0, ADDRESS_SPACE_PROGRAM, 0x1f7e4000, 0x1f7e4fff, 0, 0, ide_controller32_r, ide_controller32_w );
@ -1717,7 +1717,7 @@ static MACHINE_DRIVER_START( coh1000w )
MDRV_MACHINE_RESET( coh1000w )
MDRV_NVRAM_HANDLER( at28c16_0 )
MDRV_IDE_CONTROLLER_ADD("ide", 0, atpsx_interrupt)
MACHINE_DRIVER_END
@ -2251,7 +2251,7 @@ static MACHINE_DRIVER_START( coh1000a_ide )
MDRV_MACHINE_RESET( coh1000a )
MDRV_NVRAM_HANDLER( at28c16_0 )
MDRV_IDE_CONTROLLER_ADD("ide", 0, jdredd_ide_interrupt)
MACHINE_DRIVER_END

16
src/mame/machine/irem_cpu.c
View File

@ -111,23 +111,23 @@ const UINT8 lethalth_decryption_table[256] = {
0x7d,0x26,0x5d,xxxx,0xba,xxxx,0x1e,0x5e, 0xb8,xxxx,0xbc,0xe8,0x01,xxxx,0x4a,0x25, /* 00 */
// ???? !!!! !!!! !!!! !!!! !!!! !!!! !!!! !!!! !!!! !!!!
xxxx,0xbd,xxxx,0x22,0x10,xxxx,0x02,0x57, 0x70,xxxx,0x7e,xxxx,0xe7,0x52,xxxx,0xa9, /* 10 */
// !!!! !!!! !!!! ???? !!!! !!!! gggg
// !!!! !!!! !!!! ???? !!!! !!!! gggg
xxxx,xxxx,0xc6,0x06,0xa0,0xfe,0xcf,0x8e, 0x43,0x8f,0x2d,xxxx,0xd4,0x85,0x75,0xa2, /* 20 */
// !!!! !!!! !!!! !!!! !!!! !!!! !!!! !!!!
0x3d,xxxx,xxxx,0x38,0x78,0x89,0xd1,0x80, 0x3b,0x72,0x07,xxxx,0x42,0x37,0x0a,0x18, /* 30 */
// gggg !!!! ???? !!!! !!!! !!!! !!!! !!!! !!!! !!!!
// gggg !!!! ???? !!!! !!!! !!!! !!!! !!!! !!!! !!!!
0x88,0xb4,0x98,0x8b,0xb9,0x9c,0xad,0x0e, 0x2b,xxxx,0xbf,xxxx,0x55,xxxx,0x56,0xb0, /* 40 */
// !!!! !!!! !!!! !!!! !!!! gggg !!!! !!!! !!!! !!!!
0x93,0x91,xxxx,0xeb,xxxx,0x50,0x41,0x29, 0x47,xxxx,xxxx,0x60,xxxx,0xab,xxxx,xxxx, /* 50 */
// !!!! !!!! !!!! !!!! !!!! !!!! !!!!
// !!!! !!!! !!!! !!!! !!!! !!!! !!!!
0xc3,0xe2,0xd0,0xb2,0x11,0x79,xxxx,0x08, xxxx,0xfb,xxxx,0x2c,0x23,xxxx,0x28,0x0d, /* 60 */
// !!!! !!!! !!!! !!!! ???? !!!! !!!!
// !!!! !!!! !!!! !!!! ???? !!!! !!!!
xxxx,xxxx,xxxx,0x83,0x3c,xxxx,0x1b,0x34, 0x5b,xxxx,0x40,xxxx,xxxx,0x04,0xfc,0x30, /* 70 */
// !!!! !!!! !!!! !!!! !!!! ????
// !!!! !!!! !!!! !!!! !!!! ????
0xb1,0xf3,0x8a,xxxx,xxxx,0x87,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,0xbe,0x84,0x1f,0xe6, /* 80 */
// !!!! !!!! !!!! !!!! !!!!
0xff,xxxx,0x12,xxxx,0xb5,0x36,xxxx,0xb3, xxxx,xxxx,xxxx,0xd2,0x4e,xxxx,xxxx,xxxx, /* 90 */
// !!!! !!!! !!!!
// !!!! !!!! !!!!
0xa5,xxxx,xxxx,0xc7,xxxx,0x27,0x0b,xxxx, 0x20,xxxx,xxxx,xxxx,xxxx,xxxx,0x61,0x7f, /* A0 */
// !!!! !!!! !!!! !!!! ????
xxxx,xxxx,0x86,0x0f,xxxx,0xb7,xxxx,0x4f, xxxx,xxxx,0xc0,0xfd,xxxx,0x39,xxxx,0x77, /* B0 */
@ -139,7 +139,7 @@ const UINT8 lethalth_decryption_table[256] = {
xxxx,0xb6,xxxx,0xea,xxxx,0x73,0xe5,0x58, 0x00,0xf7,xxxx,0x74,xxxx,0x76,xxxx,0xa3, /* E0 */
// !!!! gggg !!!! !!!! !!!! !!!! ???? !!!!
xxxx,0x5a,0xf6,0x32,0x46,0x2a,xxxx,xxxx, 0x53,0x4b,0x90,0x0d,0x51,0x68,0x99,0x13, /* F0 */
// !!!! !!!! !!!! !!!! !!!! !!!! !!!! ???? !!!! !!!!
// !!!! !!!! !!!! !!!! !!!! !!!! !!!! ???? !!!! !!!!
};
/*
missing opcode:
@ -157,7 +157,7 @@ missing opcode:
af -> (79,7d,7f) (strange 71) ->
d9 -> (11e07 from 11de6) (70,78 -> to handle a01ce=000-7d0 -> 0x78
ed -> (p76,78,7c,7e) ->
fb ->
fb ->
probably:
7f -> 30 (little machine in the game)

10
src/mame/machine/seicop.c
View File

@ -1423,7 +1423,7 @@ READ16_HANDLER( cupsoc_mcu_r )
// return cop_mcu_ram[offset];
/* returning 0xffff for some inputs for now, breaks coinage but
allows cupsoc to boot */
allows cupsoc to boot */
case (0x300/2): return input_port_1_word_r(machine,0,0);
case (0x304/2): return input_port_2_word_r(machine,0,0);
case (0x308/2): return input_port_4_word_r(machine,0,0);
@ -1483,10 +1483,10 @@ WRITE16_HANDLER( cupsoc_mcu_w )
program_write_word(src+0x4,(y+y_rel));
program_write_word(src+0x8,(x+x_rel));
/*logerror("%08x %08x %08x %08x %08x\n",cop_register[0],
program_read_word(cop_reg[0]+0x4),
program_read_word(cop_reg[0]+0x8),
program_read_word(cop_reg[0]+0x10),
program_read_word(cop_reg[0]+0x14));*/
program_read_word(cop_reg[0]+0x4),
program_read_word(cop_reg[0]+0x8),
program_read_word(cop_reg[0]+0x10),
program_read_word(cop_reg[0]+0x14));*/
break;
}
/*???*/

2
src/mame/video/bionicc.c
View File

@ -139,7 +139,7 @@ WRITE16_HANDLER( bionicc_paletteram_w )
r = ((data>>12)&0x0f) * 0x11;
g = ((data>>8 )&0x0f) * 0x11;
b = ((data>>4 )&0x0f) * 0x11;
if ((bright & 0x08) == 0)
{
r = r * (0x07 + bright) / 0x0e;

38
src/mame/video/cps1.c
View File

@ -25,7 +25,7 @@ Forgotten Worlds / Lost Worlds 1988 88618B-2 LWCHR LWI
Ghouls 'n Ghosts (World / US) 1988 88620B-2 DM620 LWIO None CPS-B-01 DL-0411-10001 None
(alt B-board revision - Japan) 88622B-2 DM22A LWIO 88622-C-1 CPS-B-01 DL-0411-10001 None
Strider 1989 89624B-2 ST24M1 LWIO 88622-C-1 CPS-B-01 DL-0411-10001 None
(alt B-board revision) 89624B-3 ST24B2 LWIO
(alt B-board revision) 89624B-3 ST24B2 LWIO
(alt B-board revision) ? ST22B ?
Dynasty Wars 1989 88622B-3 TK22B IOB1 88622-C-2 CPS-B-02 DL-0411-10002
Willow 1989 89624B-3 WL24B LWIO 88622-C-4 CPS-B-03 DL-0411-10003 None
@ -45,14 +45,14 @@ Nemo 1990 89624B-3 NM24B IOB
Carrier Air Wing / U.S. Navy 1990 89624B-3 CA24B IOB1 88622-C-5 CPS-B-16 DL-0411-10011 None
(alt B-board revision - Japan) 89625B-1 CA22B
Street Fighter II (910214) 1991 89622B-3 STF29 IOB1 90632C-1 CPS-B-17 DL-0411-10012 C632
Street Fighter II (US 910206) CPS-B-17 DL-0411-10012
Street Fighter II (US 910206) CPS-B-17 DL-0411-10012
Street Fighter II (US 910228) ? CPS-B-18 ?
Street Fighter II (Japan 910306) CPS-B-12 DL-0411-10007
Street Fighter II (US 910318) CPS-B-05 DL-0411-10006
Street Fighter II (US 910411) CPS-B-15 DL-0411-10010
Street Fighter II (World 910522) CPS-B-11 DL-0411-10004
Street Fighter II (US 910522) CPS-B-14 DL-0411-10009
Street Fighter II (US 911101) CPS-B-17 DL-0411-10012
Street Fighter II (US 911101) CPS-B-17 DL-0411-10012
Street Fighter II (Japan 911210) CPS-B-13 DL-0411-10008
Three Wonders* 1991 89624B-3 RT24B IOB1 90630C-4 CPS-B-21 DL-0921-10014 IOC1
(alt B-board revision - Japan) 89625B-1 RT22B IOB1
@ -140,7 +140,7 @@ OUTPUT PORTS
TODO:
the scroll2/scroll3 disable bits are supported by the emulation,
while the scroll1 weird effect is not (it doesn't seem to make a
while the scroll1 weird effect is not (it doesn't seem to make a
difference on any game).
@ -1343,13 +1343,13 @@ if (cps1_game_config->priority[0] && offset == cps1_game_config->priority[0]/2 &
}
/*
The main CPU writes the palette to gfxram, and the CPS-B custom copies it
to the real palette RAM, which is separated from gfxram.
This is done ONLY after the palette base register is written to. It is not
known what the exact timing should be, how long it should take and when it
should happen. We are assuming that the copy happens immediately, since it
fixes glitches in the ghouls intro, but it might happen at next vblank.
*/
The main CPU writes the palette to gfxram, and the CPS-B custom copies it
to the real palette RAM, which is separated from gfxram.
This is done ONLY after the palette base register is written to. It is not
known what the exact timing should be, how long it should take and when it
should happen. We are assuming that the copy happens immediately, since it
fixes glitches in the ghouls intro, but it might happen at next vblank.
*/
if (offset == CPS1_PALETTE_BASE/2)
cps1_build_palette(machine, cps1_base(CPS1_PALETTE_BASE,cps1_palette_align));
}
@ -1602,7 +1602,7 @@ static int gfxrom_bank_mapper(running_machine *machine, int type, int code)
{
int base = 0;
int i;
for (i = 0; i < range->bank; ++i)
base += cps1_game_config->bank_sizes[i];
@ -1614,7 +1614,7 @@ static int gfxrom_bank_mapper(running_machine *machine, int type, int code)
}
#ifdef MAME_DEBUG
// popmessage("tile %02x/%04x out of range", type,code>>shift);
// popmessage("tile %02x/%04x out of range", type,code>>shift);
#endif
return -1;
@ -1656,8 +1656,8 @@ static TILE_GET_INFO( get_tile0_info )
code = gfxrom_bank_mapper(machine, GFXTYPE_SCROLL1, code);
/* allows us to reproduce a problem seen with a ffight board where USA and Japanese
roms have been mixed to be reproduced (ffightua) -- it looks like each column
should alternate between the left and right side of the 16x16 tiles */
roms have been mixed to be reproduced (ffightua) -- it looks like each column
should alternate between the left and right side of the 16x16 tiles */
gfxset = (tile_index & 0x20) >> 5;
SET_TILE_INFO(
@ -1813,10 +1813,10 @@ static void cps1_build_palette(running_machine *machine, const UINT16* const pal
int ctrl = cps1_port(cps1_game_config->palette_control);
/*
The palette is copied only for pages that are enabled in the ctrl
register. Note that if the first palette pages are skipped, all
the following pages are scaled down.
*/
The palette is copied only for pages that are enabled in the ctrl
register. Note that if the first palette pages are skipped, all
the following pages are scaled down.
*/
for (page = 0; page < 6; ++page)
{
if (BIT(ctrl,page))

6
src/mame/video/lastduel.c
View File

@ -189,14 +189,14 @@ WRITE16_HANDLER( lastduel_palette_word_w )
{
int red, green, blue, bright;
data = COMBINE_DATA(&paletteram16[offset]);
// Brightness parameter interpreted same way as CPS1
bright = 0x10 + (data&0x0f);
red = ((data>>12)&0x0f) * bright * 0x11 / 0x1f;
green = ((data>>8 )&0x0f) * bright * 0x11 / 0x1f;
blue = ((data>>4 )&0x0f) * bright * 0x11 / 0x1f;
palette_set_color (machine, offset, MAKE_RGB(red, green, blue));
}

2
src/version.c
View File

@ -9,4 +9,4 @@
***************************************************************************/
const char build_version[] = "0.124u2 ("__DATE__")";
const char build_version[] = "0.124u3 ("__DATE__")";