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taito68705interface improvements:

Browse Source 
* remove non-obvious mcu_status_r and semaphore_r members and move to drivers (varies by system)
* slap fight functionality can be safely folded into base class so do so
* remove leftover crud from driver state classes

qix.cpp, bub68705, changela: use new MC68705P3 core
This commit is contained in:
Vas Crabb 2017-01-15 12:00:10 +11:00
parent d57170d5a5
commit b36d61fbf2
35 changed files with 317 additions and 517 deletions
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2
scripts/target/mame/arcade.lua
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@ -3547,7 +3547,6 @@ files {
MAME_DIR .. "src/mame/video/asuka.cpp",
MAME_DIR .. "src/mame/drivers/bigevglf.cpp",
MAME_DIR .. "src/mame/includes/bigevglf.h",
MAME_DIR .. "src/mame/machine/bigevglf.cpp",
MAME_DIR .. "src/mame/video/bigevglf.cpp",
MAME_DIR .. "src/mame/drivers/bking.cpp",
MAME_DIR .. "src/mame/includes/bking.h",
@ -3641,7 +3640,6 @@ files {
MAME_DIR .. "src/mame/video/ninjaw.cpp",
MAME_DIR .. "src/mame/drivers/nycaptor.cpp",
MAME_DIR .. "src/mame/includes/nycaptor.h",
MAME_DIR .. "src/mame/machine/nycaptor.cpp",
MAME_DIR .. "src/mame/video/nycaptor.cpp",
MAME_DIR .. "src/mame/drivers/opwolf.cpp",
MAME_DIR .. "src/mame/includes/opwolf.h",

11
src/mame/drivers/40love.cpp
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@ -294,6 +294,15 @@ WRITE8_MEMBER(fortyl_state::pix1_w)
m_pix1 = data;
}
READ8_MEMBER(fortyl_state::fortyl_mcu_status_r)
{
// bit 0 = when 1, MCU is ready to receive data from main CPU
// bit 1 = when 1, MCU has sent data to the main CPU
return
((CLEAR_LINE == m_bmcu->host_semaphore_r()) ? 0x01 : 0x00) |
((CLEAR_LINE != m_bmcu->mcu_semaphore_r()) ? 0x02 : 0x00);
}
WRITE8_MEMBER(fortyl_state::pix1_mcu_w)
{
// if (data > 7)
@ -629,7 +638,7 @@ static ADDRESS_MAP_START( 40love_map, AS_PROGRAM, 8, fortyl_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_RAM /* M5517P on main board */
AM_RANGE(0x8800, 0x8800) AM_DEVREADWRITE("bmcu", taito68705_mcu_device, data_r, data_w)
AM_RANGE(0x8801, 0x8801) AM_DEVREAD("bmcu", taito68705_mcu_device, mcu_status_r) AM_WRITE(pix1_mcu_w) //pixel layer related
AM_RANGE(0x8801, 0x8801) AM_READWRITE(fortyl_mcu_status_r, pix1_mcu_w) //pixel layer related
AM_RANGE(0x8802, 0x8802) AM_WRITE(bank_select_w)
AM_RANGE(0x8803, 0x8803) AM_READWRITE(pix2_r, pix2_w) //pixel layer related
AM_RANGE(0x8804, 0x8804) AM_READWRITE(from_snd_r, sound_command_w)

10
src/mame/drivers/arkanoid.cpp
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@ -13,7 +13,7 @@
arkanoid The earlier revisions. They each differ in the country byte. These
arkanoiduo versions work fine both the bootleg A75-06.IC16 MCU rom and the
arkanoidjb genuine decapped Taito A75__06.IC16 M68705 MCU.
arkanoidjb genuine decapped Taito A75__06.IC16 MC68705 MCU.
arkanoidu USA version. A later revision, code has been inserted NOT patched.
The 68705 code for this one was not available; Brad Oliver[?]
made it up from the bootleg A75-06.IC16 by changing the level
@ -45,9 +45,9 @@
player will die for no reason.
Measured Clocks:
Z80 - 5997077Hz (6Mhz)
M68705 - 2998533Hz (3Mhz)
YM2149 - 2998531Hz (3Mhz)
Z80 - 5997077Hz (6Mhz)
MC68705 - 2998533Hz (3Mhz)
YM2149 - 2998531Hz (3Mhz)
****************************************************************************
Game Credits:
@ -968,7 +968,7 @@ static INPUT_PORTS_START( arkanoid )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 )
PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER("mcu", arkanoid_mcu_device_base, semaphore_r, nullptr) /* Z80 and MCU Semaphores */
PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, arkanoid_state, arkanoid_semaphore_input_r, nullptr) // Z80 and MCU Semaphores
PORT_START("BUTTONS")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )

6
src/mame/drivers/bigevglf.cpp
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@ -332,7 +332,11 @@ READ8_MEMBER(bigevglf_state::sub_cpu_mcu_coin_port_r)
*/
m_mcu_coin_bit5 ^= 0x20;
return bigevglf_mcu_status_r(space, 0) | (ioport("PORT04")->read() & 3) | m_mcu_coin_bit5; /* bit 0 and bit 1 - coin inputs */
return
(ioport("PORT04")->read() & 0x03) |
((CLEAR_LINE == m_bmcu->host_semaphore_r()) ? 0x08 : 0x00) |
((CLEAR_LINE != m_bmcu->mcu_semaphore_r()) ? 0x10 : 0x00) |
m_mcu_coin_bit5; /* bit 0 and bit 1 - coin inputs */
}
static ADDRESS_MAP_START( bigevglf_sub_portmap, AS_IO, 8, bigevglf_state )

11
src/mame/drivers/bking.cpp
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@ -78,6 +78,15 @@ READ8_MEMBER(bking_state::bking3_ext_check_r)
return 0x31; //no "bad rom.", no "bad ext."
}
READ8_MEMBER(bking_state::bking3_mcu_status_r)
{
// bit 0 = when 1, MCU is ready to receive data from main CPU
// bit 1 = when 1, MCU has sent data to the main CPU
return
((CLEAR_LINE == m_bmcu->host_semaphore_r()) ? 0x01 : 0x00) |
((CLEAR_LINE != m_bmcu->mcu_semaphore_r()) ? 0x02 : 0x00);
}
static ADDRESS_MAP_START( bking_map, AS_PROGRAM, 8, bking_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x83ff) AM_RAM
@ -121,7 +130,7 @@ static ADDRESS_MAP_START( bking3_io_map, AS_IO, 8, bking_state )
AM_RANGE(0x0d, 0x0d) AM_WRITE(bking_hitclr_w)
AM_RANGE(0x07, 0x1f) AM_READ(bking_pos_r)
AM_RANGE(0x2f, 0x2f) AM_DEVREADWRITE("bmcu", taito68705_mcu_device, data_r, data_w)
AM_RANGE(0x4f, 0x4f) AM_DEVREAD("bmcu", taito68705_mcu_device, mcu_status_r) AM_WRITE(unk_w)
AM_RANGE(0x4f, 0x4f) AM_READWRITE(bking3_mcu_status_r, unk_w)
AM_RANGE(0x60, 0x60) AM_READ(bking3_extrarom_r)
AM_RANGE(0x6f, 0x6f) AM_READWRITE(bking3_ext_check_r, bking3_addr_h_w)
AM_RANGE(0x8f, 0x8f) AM_WRITE(bking3_addr_l_w)

49
src/mame/drivers/bublbobl.cpp
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@ -279,7 +279,6 @@ TODO:
#include "machine/watchdog.h"
#include "sound/2203intf.h"
#include "sound/3526intf.h"
#include "cpu/m6805/m68705.h"
#include "includes/bublbobl.h"
@ -335,19 +334,6 @@ static ADDRESS_MAP_START( mcu_map, AS_PROGRAM, 8, bublbobl_state )
AM_RANGE(0xf000, 0xffff) AM_ROM
ADDRESS_MAP_END
// The 68705 is from a bootleg, the original MCU is a 6801U4
static ADDRESS_MAP_START( bootlegmcu_map, AS_PROGRAM, 8, bublbobl_state )
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
AM_RANGE(0x000, 0x000) AM_READWRITE(bublbobl_68705_port_a_r, bublbobl_68705_port_a_w)
AM_RANGE(0x001, 0x001) AM_READWRITE(bublbobl_68705_port_b_r, bublbobl_68705_port_b_w)
AM_RANGE(0x002, 0x002) AM_READ_PORT("IN0") // COIN
AM_RANGE(0x004, 0x004) AM_WRITE(bublbobl_68705_ddr_a_w)
AM_RANGE(0x005, 0x005) AM_WRITE(bublbobl_68705_ddr_b_w)
AM_RANGE(0x006, 0x006) AM_WRITENOP // ???
AM_RANGE(0x010, 0x07f) AM_RAM
AM_RANGE(0x080, 0x7ff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( bootleg_map, AS_PROGRAM, 8, bublbobl_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
@ -709,8 +695,8 @@ static INPUT_PORTS_START( tokio )
PORT_INCLUDE( tokio_base )
PORT_MODIFY("IN0")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM_MEMBER("bmcu", taito68705_mcu_device, host_flag_r, nullptr)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM_MEMBER("bmcu", taito68705_mcu_device, mcu_flag_r, nullptr)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM_MEMBER("bmcu", taito68705_mcu_device, host_semaphore_r, nullptr)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM_MEMBER("bmcu", taito68705_mcu_device, mcu_semaphore_r, nullptr)
INPUT_PORTS_END
/*************************************
@ -945,45 +931,40 @@ static MACHINE_CONFIG_DERIVED( boblbobl, bublbobl )
MACHINE_CONFIG_END
MACHINE_START_MEMBER(bublbobl_state,bub68705)
MACHINE_START_MEMBER(bub68705_state, bub68705)
{
MACHINE_START_CALL_MEMBER(common);
save_item(NAME(m_port_a_in));
save_item(NAME(m_port_a_out));
save_item(NAME(m_ddr_a));
save_item(NAME(m_port_b_in));
save_item(NAME(m_port_b_out));
save_item(NAME(m_ddr_b));
save_item(NAME(m_address));
save_item(NAME(m_latch));
m_port_a_out = 0xff;
m_port_b_out = 0xff;
}
MACHINE_RESET_MEMBER(bublbobl_state,bub68705)
MACHINE_RESET_MEMBER(bub68705_state, bub68705)
{
MACHINE_RESET_CALL_MEMBER(common);
m_port_a_in = 0;
m_port_a_out = 0;
m_ddr_a = 0;
m_port_b_in = 0;
m_port_b_out = 0;
m_ddr_b = 0;
m_address = 0;
m_latch = 0;
}
static MACHINE_CONFIG_DERIVED( bub68705, bublbobl )
static MACHINE_CONFIG_DERIVED_CLASS( bub68705, bublbobl, bub68705_state )
/* basic machine hardware */
MCFG_DEVICE_REMOVE("mcu")
MCFG_CPU_ADD("mcu", M68705, XTAL_4MHz) // xtal is 4MHz, divided by 4 internally
MCFG_CPU_PROGRAM_MAP(bootlegmcu_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bublbobl_state, bublbobl_m68705_interrupt) // ??? should come from the same clock which latches the INT pin on the second Z80
MCFG_CPU_ADD("mcu", M68705P3, XTAL_4MHz) // xtal is 4MHz, divided by 4 internally
MCFG_M68705_PORTC_R_CB(IOPORT("IN0"))
MCFG_M68705_PORTA_W_CB(WRITE8(bub68705_state, port_a_w))
MCFG_M68705_PORTB_W_CB(WRITE8(bub68705_state, port_b_w))
MCFG_CPU_VBLANK_INT_DRIVER("screen", bub68705_state, bublbobl_m68705_interrupt) // ??? should come from the same clock which latches the INT pin on the second Z80
MCFG_MACHINE_START_OVERRIDE(bublbobl_state,bub68705)
MCFG_MACHINE_RESET_OVERRIDE(bublbobl_state,bub68705)
MCFG_MACHINE_START_OVERRIDE(bub68705_state, bub68705)
MCFG_MACHINE_RESET_OVERRIDE(bub68705_state, bub68705)
MACHINE_CONFIG_END

10
src/mame/drivers/buggychl.cpp
View File

@ -126,6 +126,14 @@ WRITE8_MEMBER(buggychl_state::sound_enable_w)
machine().sound().system_enable(data & 1);
}
READ8_MEMBER(buggychl_state::mcu_status_r)
{
// bit 0 = when 1, MCU is ready to receive data from main CPU
// bit 1 = when 1, MCU has sent data to the main CPU
return
((CLEAR_LINE == m_bmcu->host_semaphore_r()) ? 0x01 : 0x00) |
((CLEAR_LINE != m_bmcu->mcu_semaphore_r()) ? 0x02 : 0x00);
}
static ADDRESS_MAP_START( buggychl_map, AS_PROGRAM, 8, buggychl_state )
@ -141,7 +149,7 @@ static ADDRESS_MAP_START( buggychl_map, AS_PROGRAM, 8, buggychl_state )
AM_RANGE(0xd300, 0xd300) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0xd303, 0xd303) AM_WRITE(buggychl_sprite_lookup_bank_w)
AM_RANGE(0xd400, 0xd400) AM_DEVREADWRITE("bmcu", taito68705_mcu_device, data_r, data_w)
AM_RANGE(0xd401, 0xd401) AM_DEVREAD("bmcu", taito68705_mcu_device, mcu_status_r)
AM_RANGE(0xd401, 0xd401) AM_READ(mcu_status_r)
AM_RANGE(0xd500, 0xd57f) AM_WRITEONLY AM_SHARE("spriteram")
AM_RANGE(0xd600, 0xd600) AM_READ_PORT("DSW1")
AM_RANGE(0xd601, 0xd601) AM_READ_PORT("DSW2")

122
src/mame/drivers/changela.cpp
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@ -11,11 +11,11 @@ Tomasz Slanina
***************************************************************************/
#include "emu.h"
#include "includes/changela.h"
#include "cpu/z80/z80.h"
#include "cpu/m6805/m68705.h"
#include "machine/watchdog.h"
#include "sound/ay8910.h"
#include "includes/changela.h"
#include "changela.lh"
@ -30,6 +30,8 @@ READ8_MEMBER(changela_state::mcu_r)
WRITE8_MEMBER(changela_state::mcu_w)
{
m_mcu_in = data;
if (!BIT(m_port_c_out, 2))
m_mcu->pa_w(space, 0, data);
}
@ -37,83 +39,30 @@ WRITE8_MEMBER(changela_state::mcu_w)
MCU
*********************************/
READ8_MEMBER(changela_state::changela_68705_port_a_r)
{
return (m_port_a_out & m_ddr_a) | (m_port_a_in & ~m_ddr_a);
}
WRITE8_MEMBER(changela_state::changela_68705_port_a_w)
{
m_port_a_out = data;
}
WRITE8_MEMBER(changela_state::changela_68705_ddr_a_w)
{
m_ddr_a = data;
}
READ8_MEMBER(changela_state::changela_68705_port_b_r)
{
return (m_port_b_out & m_ddr_b) | (ioport("MCU")->read() & ~m_ddr_b);
}
WRITE8_MEMBER(changela_state::changela_68705_port_b_w)
{
m_port_b_out = data;
}
WRITE8_MEMBER(changela_state::changela_68705_ddr_b_w)
{
m_ddr_b = data;
}
READ8_MEMBER(changela_state::changela_68705_port_c_r)
{
return (m_port_c_out & m_ddr_c) | (m_port_c_in & ~m_ddr_c);
}
WRITE8_MEMBER(changela_state::changela_68705_port_c_w)
{
/* PC3 is connected to the CLOCK input of the LS374,
so we latch the data on positive going edge of the clock */
/* this is strange because if we do this corectly - it just doesn't work */
if ((data & 8) /*& (!(m_port_c_out & 8))*/ )
m_mcu_out = m_port_a_out;
/* PC3 is connected to the CLOCK input of the LS374, so we latch the data on rising edge */
if (BIT(data, 3) && ~BIT(m_port_c_out, 3))
m_mcu_out = m_port_a_out & (BIT(m_port_c_out, 2) ? 0xff : m_mcu_in);
/* PC2 is connected to the /OE input of the LS374 */
if (!(data & 4))
m_port_a_in = m_mcu_in;
if (BIT(data, 2))
m_mcu->pa_w(space, 0, BIT(data, 2) ? 0xff : m_mcu_in);
m_port_c_out = data;
}
WRITE8_MEMBER(changela_state::changela_68705_ddr_c_w)
{
m_ddr_c = data;
}
static ADDRESS_MAP_START( mcu_map, AS_PROGRAM, 8, changela_state )
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
AM_RANGE(0x0000, 0x0000) AM_READWRITE(changela_68705_port_a_r, changela_68705_port_a_w)
AM_RANGE(0x0001, 0x0001) AM_READWRITE(changela_68705_port_b_r, changela_68705_port_b_w)
AM_RANGE(0x0002, 0x0002) AM_READWRITE(changela_68705_port_c_r, changela_68705_port_c_w)
AM_RANGE(0x0004, 0x0004) AM_WRITE(changela_68705_ddr_a_w)
AM_RANGE(0x0005, 0x0005) AM_WRITE(changela_68705_ddr_b_w)
AM_RANGE(0x0006, 0x0006) AM_WRITE(changela_68705_ddr_c_w)
AM_RANGE(0x0000, 0x007f) AM_RAM
AM_RANGE(0x0080, 0x07ff) AM_ROM
ADDRESS_MAP_END
/* U30 */
READ8_MEMBER(changela_state::changela_24_r)
{
return ((m_port_c_out & 2) << 2) | 7; /* bits 2,1,0-N/C inputs */
return (BIT(m_port_c_out, 1) << 3) | 0x07; /* bits 2,1,0-N/C inputs */
}
READ8_MEMBER(changela_state::changela_25_r)
@ -168,15 +117,15 @@ READ8_MEMBER(changela_state::changela_2d_r)
/* Gas pedal is made up of 2 switches, 1 active low, 1 active high */
switch (ioport("IN1")->read() & 0x03)
{
case 0x02:
gas = 0x80;
break;
case 0x01:
gas = 0x00;
break;
default:
gas = 0x40;
break;
case 0x02:
gas = 0x80;
break;
case 0x01:
gas = 0x00;
break;
default:
gas = 0x40;
break;
}
return (ioport("IN1")->read() & 0x20) | gas | (v8 << 4);
@ -184,7 +133,7 @@ READ8_MEMBER(changela_state::changela_2d_r)
WRITE8_MEMBER(changela_state::mcu_pc_0_w)
{
m_port_c_in = (m_port_c_in & 0xfe) | (data & 1);
m_mcu->pc_w(space, 0, 0xfe | (data & 0x01));
}
WRITE8_MEMBER(changela_state::changela_collision_reset_0)
@ -409,19 +358,10 @@ void changela_state::machine_start()
save_item(NAME(m_tree_on));
/* mcu */
save_item(NAME(m_port_a_in));
save_item(NAME(m_port_a_out));
save_item(NAME(m_ddr_a));
save_item(NAME(m_port_b_out));
save_item(NAME(m_ddr_b));
save_item(NAME(m_port_c_in));
save_item(NAME(m_port_c_out));
save_item(NAME(m_ddr_c));
save_item(NAME(m_mcu_out));
save_item(NAME(m_mcu_in));
save_item(NAME(m_mcu_pc_1));
save_item(NAME(m_mcu_pc_0));
/* misc */
save_item(NAME(m_tree0_col));
@ -433,6 +373,9 @@ void changela_state::machine_start()
save_item(NAME(m_tree_collision_reset));
save_item(NAME(m_prev_value_31));
save_item(NAME(m_dir_31));
m_port_a_out = 0xff;
m_port_c_out = 0xff;
}
void changela_state::machine_reset()
@ -448,17 +391,6 @@ void changela_state::machine_reset()
m_tree_on[1] = 0;
/* mcu */
m_mcu_pc_1 = 0;
m_mcu_pc_0 = 0;
m_port_a_in = 0;
m_port_a_out = 0;
m_ddr_a = 0;
m_port_b_out = 0;
m_ddr_b = 0;
m_port_c_in = 0;
m_port_c_out = 0;
m_ddr_c = 0;
m_mcu_out = 0;
m_mcu_in = 0;
@ -480,8 +412,10 @@ static MACHINE_CONFIG_START( changela, changela_state )
MCFG_CPU_PROGRAM_MAP(changela_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", changela_state, changela_scanline, "screen", 0, 1)
MCFG_CPU_ADD("mcu", M68705,2500000)
MCFG_CPU_PROGRAM_MAP(mcu_map)
MCFG_CPU_ADD("mcu", M68705P3, 2500000)
MCFG_M68705_PORTB_R_CB(IOPORT("MCU"))
MCFG_M68705_PORTA_W_CB(WRITE8(changela_state, changela_68705_port_a_w))
MCFG_M68705_PORTC_W_CB(WRITE8(changela_state, changela_68705_port_c_w))
MCFG_CPU_VBLANK_INT_DRIVER("screen", changela_state, chl_mcu_irq)
MCFG_WATCHDOG_ADD("watchdog")
@ -518,7 +452,7 @@ ROM_START( changela )
ROM_LOAD( "cl22", 0x6000, 0x2000, CRC(796e0abd) SHA1(64dd9fc1f9bc44519a253ef0c02e181dd13904bf) )
ROM_LOAD( "cl27", 0xb000, 0x1000, CRC(3668afb8) SHA1(bcfb788baf806edcb129ea9f9dcb1d4260684773) )
ROM_REGION( 0x10000, "mcu", 0 ) /* 68705U3 */
ROM_REGION( 0x00800, "mcu", 0 ) /* 68705P3 */
ROM_LOAD( "cl38a", 0x0000, 0x800, CRC(b70156ce) SHA1(c5eab8bbd65c4f587426298da4e22f991ce01dde) )
ROM_REGION( 0x4000, "gfx1", 0 ) /* tile data */

2
src/mame/drivers/flstory.cpp
View File

@ -81,7 +81,7 @@ static ADDRESS_MAP_START( flstory_map, AS_PROGRAM, 8, flstory_state )
AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
AM_RANGE(0xd803, 0xd803) AM_READ_PORT("SYSTEM")
AM_RANGE(0xd804, 0xd804) AM_READ_PORT("P1")
AM_RANGE(0xd805, 0xd805) AM_DEVREAD("bmcu", taito68705_mcu_device, mcu_status_r)
AM_RANGE(0xd805, 0xd805) AM_READ(flstory_mcu_status_r)
AM_RANGE(0xd806, 0xd806) AM_READ_PORT("P2")
// AM_RANGE(0xda00, 0xda00) AM_WRITEONLY
AM_RANGE(0xdc00, 0xdc9f) AM_RAM AM_SHARE("spriteram")

15
src/mame/drivers/lkage.cpp
View File

@ -157,12 +157,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( lkage_map_mcu, AS_PROGRAM, 8, lkage_state )
AM_IMPORT_FROM(lkage_map)
AM_RANGE(0xf062, 0xf062) AM_DEVREADWRITE("bmcu", taito68705_mcu_device, data_r, data_w)
AM_RANGE(0xf087, 0xf087) AM_DEVREAD("bmcu", taito68705_mcu_device, mcu_status_r)
AM_RANGE(0xf087, 0xf087) AM_READ(mcu_status_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( lkage_map_boot, AS_PROGRAM, 8, lkage_state )
AM_IMPORT_FROM(lkage_map)
AM_RANGE(0xf062, 0xf062) AM_READWRITE(fake_mcu_r,fake_mcu_w)
AM_RANGE(0xf062, 0xf062) AM_READWRITE(fake_mcu_r, fake_mcu_w)
AM_RANGE(0xf087, 0xf087) AM_READ(fake_status_r)
ADDRESS_MAP_END
@ -864,7 +864,16 @@ ROM_START( bygone )
ROM_END
/*Note: This probably uses another MCU dump,which is undumped.*/
READ8_MEMBER(lkage_state::mcu_status_r)
{
// bit 0 = when 1, MCU is ready to receive data from main CPU
// bit 1 = when 1, MCU has sent data to the main CPU
return
((CLEAR_LINE == m_bmcu->host_semaphore_r()) ? 0x01 : 0x00) |
((CLEAR_LINE != m_bmcu->mcu_semaphore_r()) ? 0x02 : 0x00);
}
// Note: This probably uses another MCU program, which is undumped.
READ8_MEMBER(lkage_state::fake_mcu_r)
{

9
src/mame/drivers/matmania.cpp
View File

@ -50,8 +50,9 @@ The driver has been updated accordingly.
READ8_MEMBER(matmania_state::maniach_mcu_status_r)
{
// semaphore bits swapped compared to other games
return (m_mcu->get_main_sent() ? 0x00 : 0x02) | (m_mcu->get_mcu_sent() ? 0x00 : 0x01);
return
((CLEAR_LINE == m_mcu->mcu_semaphore_r()) ? 0x01 : 0x00) |
((CLEAR_LINE == m_mcu->host_semaphore_r()) ? 0x02 : 0x00);
}
WRITE8_MEMBER(matmania_state::matmania_sh_command_w)
@ -346,9 +347,9 @@ static MACHINE_CONFIG_START( maniach, matmania_state )
MCFG_CPU_ADD("audiocpu", M6809, 1500000) /* 1.5 MHz ???? */
MCFG_CPU_PROGRAM_MAP(maniach_sound_map)
MCFG_CPU_ADD("mcu", TAITO68705_MCU, 1500000) /* (don't know really how fast, but it doesn't need to even be this fast) */
MCFG_CPU_ADD("mcu", TAITO68705_MCU, 1500000*2) /* (don't know really how fast, but it doesn't need to even be this fast) */
MCFG_QUANTUM_PERFECT_CPU("mcu:mcu") /* high interleaving to sync main and mcu */
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slice per frame - high interleaving to sync main and mcu */
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

12
src/mame/drivers/nycaptor.cpp
View File

@ -244,6 +244,18 @@ WRITE8_MEMBER(nycaptor_state::sound_cpu_reset_w)
m_audiocpu->set_input_line(INPUT_LINE_RESET, (data&1 )? ASSERT_LINE : CLEAR_LINE);
}
READ8_MEMBER(nycaptor_state::nycaptor_mcu_status_r1)
{
/* bit 1 = when 1, mcu has sent data to the main cpu */
return (CLEAR_LINE != m_bmcu->mcu_semaphore_r()) ? 2 : 0;
}
READ8_MEMBER(nycaptor_state::nycaptor_mcu_status_r2)
{
/* bit 0 = when 1, mcu is ready to receive data from main cpu */
return (CLEAR_LINE != m_bmcu->host_semaphore_r()) ? 0 : 1;
}
MACHINE_RESET_MEMBER(nycaptor_state,ta7630)
{

30
src/mame/drivers/qix.cpp
View File

@ -230,10 +230,9 @@ Interrupts:
***************************************************************************/
#include "emu.h"
#include "cpu/m6805/m68705.h"
#include "rendlay.h"
#include "includes/qix.h"
#include "cpu/m6809/m6809.h"
#include "rendlay.h"
#include "machine/nvram.h"
#include "elecyoyo.lh"
@ -290,24 +289,6 @@ ADDRESS_MAP_END
/*************************************
*
* Coin CPU memory handlers
*
*************************************/
static ADDRESS_MAP_START( mcu_map, AS_PROGRAM, 8, qix_state )
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
AM_RANGE(0x0000, 0x0000) AM_READWRITE(qix_68705_portA_r, qix_68705_portA_w) AM_SHARE("68705_port_out")
AM_RANGE(0x0001, 0x0001) AM_READWRITE(qix_68705_portB_r, qix_68705_portB_w)
AM_RANGE(0x0002, 0x0002) AM_READWRITE(qix_68705_portC_r, qix_68705_portC_w)
AM_RANGE(0x0004, 0x0007) AM_WRITEONLY AM_SHARE("68705_ddr")
AM_RANGE(0x0010, 0x007f) AM_RAM
AM_RANGE(0x0080, 0x07ff) AM_ROM
ADDRESS_MAP_END
/*************************************
*
* Input port definitions
@ -669,8 +650,11 @@ static MACHINE_CONFIG_DERIVED( mcu, qix )
/* basic machine hardware */
MCFG_CPU_ADD("mcu", M68705, COIN_CLOCK_OSC) /* 1.00 MHz */
MCFG_CPU_PROGRAM_MAP(mcu_map)
MCFG_CPU_ADD("mcu", M68705P3, COIN_CLOCK_OSC) /* 1.00 MHz */
MCFG_M68705_PORTB_R_CB(READ8(qix_state, qix_68705_portB_r))
MCFG_M68705_PORTC_R_CB(READ8(qix_state, qix_68705_portC_r))
MCFG_M68705_PORTA_W_CB(WRITE8(qix_state, qix_68705_portA_w))
MCFG_M68705_PORTB_W_CB(WRITE8(qix_state, qix_68705_portB_w))
MCFG_MACHINE_START_OVERRIDE(qix_state,qixmcu)

4
src/mame/drivers/slapfght.cpp
View File

@ -1044,8 +1044,8 @@ static MACHINE_CONFIG_START( slapfigh, slapfght_state )
MCFG_CPU_PROGRAM_MAP(tigerh_sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(slapfght_state, sound_nmi, 180)
MCFG_DEVICE_ADD("bmcu", TAITO68705_MCU_SLAP, XTAL_36MHz/12) // 3MHz
MCFG_TAITO_M68705_EXTENSION_CB(WRITE8(slapfght_state, scroll_from_mcu_w))
MCFG_DEVICE_ADD("bmcu", TAITO68705_MCU, XTAL_36MHz/12) // 3MHz
MCFG_TAITO_M68705_AUX_STROBE_CB(WRITE8(slapfght_state, scroll_from_mcu_w))
MCFG_QUANTUM_PERFECT_CPU("maincpu")

8
src/mame/drivers/xain.cpp
View File

@ -271,10 +271,10 @@ CUSTOM_INPUT_MEMBER(xain_state::vblank_r)
CUSTOM_INPUT_MEMBER(xain_state::mcu_status_r)
{
if (m_mcu)
return bitswap(m_mcu->semaphore_r(field, param), 0, 1);
else
return 3;
// bit 0 is host MCU flag, bit 1 is host semaphore flag (both active low)
return
((m_mcu && (CLEAR_LINE != m_mcu->mcu_semaphore_r())) ? 0x00 : 0x01) |
((m_mcu && (CLEAR_LINE != m_mcu->host_semaphore_r())) ? 0x00 : 0x02);
}
READ8_MEMBER(xain_state::mcu_comm_reset_r)

3
src/mame/includes/40love.h
View File

@ -53,8 +53,6 @@ public:
/* fake mcu */
uint8_t m_from_mcu;
int m_mcu_sent;
int m_main_sent;
uint8_t m_mcu_in[2][16];
uint8_t m_mcu_out[2][16];
int m_mcu_cmd;
@ -93,6 +91,7 @@ public:
DECLARE_READ8_MEMBER(from_snd_r);
DECLARE_READ8_MEMBER(snd_flag_r);
DECLARE_WRITE8_MEMBER(to_main_w);
DECLARE_READ8_MEMBER(fortyl_mcu_status_r);
DECLARE_WRITE8_MEMBER(fortyl_pixram_sel_w);
DECLARE_READ8_MEMBER(fortyl_pixram_r);
DECLARE_WRITE8_MEMBER(fortyl_pixram_w);

1
src/mame/includes/arkanoid.h
View File

@ -74,6 +74,7 @@ public:
DECLARE_WRITE8_MEMBER(hexaa_f000_w);
DECLARE_WRITE8_MEMBER(hexaa_sub_80_w);
DECLARE_READ8_MEMBER(hexaa_sub_90_r);
DECLARE_CUSTOM_INPUT_MEMBER(arkanoid_semaphore_input_r);
DECLARE_CUSTOM_INPUT_MEMBER(arkanoid_input_mux);
DECLARE_DRIVER_INIT(block2);
DECLARE_DRIVER_INIT(arkblock);

12
src/mame/includes/bigevglf.h
View File

@ -67,18 +67,6 @@ public:
DECLARE_READ8_MEMBER(beg_trackball_y_r);
DECLARE_WRITE8_MEMBER(beg_port08_w);
DECLARE_READ8_MEMBER(sub_cpu_mcu_coin_port_r);
DECLARE_READ8_MEMBER(bigevglf_68705_port_a_r);
DECLARE_WRITE8_MEMBER(bigevglf_68705_port_a_w);
DECLARE_WRITE8_MEMBER(bigevglf_68705_ddr_a_w);
DECLARE_READ8_MEMBER(bigevglf_68705_port_b_r);
DECLARE_WRITE8_MEMBER(bigevglf_68705_port_b_w);
DECLARE_WRITE8_MEMBER(bigevglf_68705_ddr_b_w);
DECLARE_READ8_MEMBER(bigevglf_68705_port_c_r);
DECLARE_WRITE8_MEMBER(bigevglf_68705_port_c_w);
DECLARE_WRITE8_MEMBER(bigevglf_68705_ddr_c_w);
DECLARE_WRITE8_MEMBER(bigevglf_mcu_w);
DECLARE_READ8_MEMBER(bigevglf_mcu_r);
DECLARE_READ8_MEMBER(bigevglf_mcu_status_r);
DECLARE_WRITE8_MEMBER(bigevglf_palette_w);
DECLARE_WRITE8_MEMBER(bigevglf_gfxcontrol_w);
DECLARE_WRITE8_MEMBER(bigevglf_vidram_addr_w);

5
src/mame/includes/bking.h
View File

@ -15,7 +15,9 @@ public:
m_gfxdecode(*this, "gfxdecode"),
m_screen(*this, "screen"),
m_palette(*this, "palette"),
m_soundlatch(*this, "soundlatch") { }
m_soundlatch(*this, "soundlatch")
{
}
/* memory pointers */
required_shared_ptr<uint8_t> m_playfield_ram;
@ -63,6 +65,7 @@ public:
DECLARE_WRITE8_MEMBER(bking3_addr_h_w);
DECLARE_READ8_MEMBER(bking3_extrarom_r);
DECLARE_READ8_MEMBER(bking3_ext_check_r);
DECLARE_READ8_MEMBER(bking3_mcu_status_r);
DECLARE_WRITE8_MEMBER(bking_xld1_w);
DECLARE_WRITE8_MEMBER(bking_yld1_w);
DECLARE_WRITE8_MEMBER(bking_xld2_w);

55
src/mame/includes/bublbobl.h
View File

@ -1,6 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:Chris Moore, Nicola Salmoria
#include "cpu/m6805/m68705.h"
#include "machine/gen_latch.h"
#include "machine/taito68705interface.h"
@ -55,15 +57,6 @@ public:
uint8_t m_port2_out;
uint8_t m_port3_out;
uint8_t m_port4_out;
/* Bubble Bobble 68705 */
uint8_t m_port_a_in;
uint8_t m_port_a_out;
uint8_t m_ddr_a;
uint8_t m_port_b_in;
uint8_t m_port_b_out;
uint8_t m_ddr_b;
int m_address;
int m_latch;
/* Bobble Bobble */
int m_ic43_a;
int m_ic43_b;
@ -109,12 +102,6 @@ public:
DECLARE_WRITE8_MEMBER(boblbobl_ic43_a_w);
DECLARE_WRITE8_MEMBER(boblbobl_ic43_b_w);
DECLARE_READ8_MEMBER(boblbobl_ic43_b_r);
DECLARE_READ8_MEMBER(bublbobl_68705_port_a_r);
DECLARE_WRITE8_MEMBER(bublbobl_68705_port_a_w);
DECLARE_WRITE8_MEMBER(bublbobl_68705_ddr_a_w);
DECLARE_READ8_MEMBER(bublbobl_68705_port_b_r);
DECLARE_WRITE8_MEMBER(bublbobl_68705_port_b_w);
DECLARE_WRITE8_MEMBER(bublbobl_68705_ddr_b_w);
DECLARE_DRIVER_INIT(tokio);
DECLARE_DRIVER_INIT(dland);
@ -125,14 +112,44 @@ public:
DECLARE_MACHINE_RESET(bublbobl);
DECLARE_MACHINE_START(boblbobl);
DECLARE_MACHINE_RESET(boblbobl);
DECLARE_MACHINE_START(bub68705);
DECLARE_MACHINE_RESET(bub68705);
DECLARE_MACHINE_START(common);
DECLARE_MACHINE_RESET(common);
uint32_t screen_update_bublbobl(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(bublbobl_m68705_interrupt);
void configure_banks( );
void configure_banks();
protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
};
class bub68705_state : public bublbobl_state
{
public:
bub68705_state(const machine_config &mconfig, device_type type, const char *tag)
: bublbobl_state(mconfig, type, tag)
, m_mcu(*this, "mcu")
, m_mux_ports(*this, { "DSW0", "DSW1", "IN1", "IN2" })
, m_port_a_out(0xff)
, m_port_b_out(0xff)
, m_address(0)
, m_latch(0)
{
}
DECLARE_WRITE8_MEMBER(port_a_w);
DECLARE_WRITE8_MEMBER(port_b_w);
INTERRUPT_GEN_MEMBER(bublbobl_m68705_interrupt);
DECLARE_MACHINE_START(bub68705);
DECLARE_MACHINE_RESET(bub68705);
protected:
required_device<m68705p_device> m_mcu;
required_ioport_array<4> m_mux_ports;
uint8_t m_port_a_out;
uint8_t m_port_b_out;
uint16_t m_address;
uint8_t m_latch;
};

1
src/mame/includes/buggychl.h
View File

@ -64,6 +64,7 @@ public:
DECLARE_WRITE8_MEMBER(nmi_disable_w);
DECLARE_WRITE8_MEMBER(nmi_enable_w);
DECLARE_WRITE8_MEMBER(sound_enable_w);
DECLARE_READ8_MEMBER(mcu_status_r);
DECLARE_WRITE8_MEMBER(buggychl_chargen_w);
DECLARE_WRITE8_MEMBER(buggychl_sprite_lookup_bank_w);
DECLARE_WRITE8_MEMBER(buggychl_sprite_lookup_w);

71
src/mame/includes/changela.h
View File

@ -1,24 +1,27 @@
// license:GPL-2.0+
// copyright-holders:Jarek Burczynski, Phil Stroffolino, Tomasz Slanina
#include "cpu/m6805/m68705.h"
class changela_state : public driver_device
{
public:
changela_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_spriteram(*this, "spriteram"),
m_videoram(*this, "videoram"),
m_colorram(*this, "colorram"),
m_mcu(*this, "mcu"),
m_maincpu(*this, "maincpu"),
m_screen(*this, "screen"),
m_palette(*this, "palette") { }
/* memory pointers */
required_shared_ptr<uint8_t> m_spriteram;
required_shared_ptr<uint8_t> m_videoram;
required_shared_ptr<uint8_t> m_colorram;
: driver_device(mconfig, type, tag)
, m_spriteram(*this, "spriteram")
, m_videoram(*this, "videoram")
, m_colorram(*this, "colorram")
, m_mcu(*this, "mcu")
, m_maincpu(*this, "maincpu")
, m_screen(*this, "screen")
, m_palette(*this, "palette")
, m_port_a_out(0xff)
, m_port_c_out(0xff)
, m_mcu_out(0xff)
, m_mcu_in(0xff)
{
}
/* video-related */
bitmap_ind16 m_obj0_bitmap;
@ -47,34 +50,11 @@ public:
uint8_t m_prev_value_31;
int m_dir_31;
/* mcu-related */
uint8_t m_port_a_in;
uint8_t m_port_a_out;
uint8_t m_ddr_a;
uint8_t m_port_b_out;
uint8_t m_ddr_b;
uint8_t m_port_c_in;
uint8_t m_port_c_out;
uint8_t m_ddr_c;
uint8_t m_mcu_out;
uint8_t m_mcu_in;
uint8_t m_mcu_pc_1;
uint8_t m_mcu_pc_0;
/* devices */
optional_device<cpu_device> m_mcu;
DECLARE_READ8_MEMBER(mcu_r);
DECLARE_WRITE8_MEMBER(mcu_w);
DECLARE_READ8_MEMBER(changela_68705_port_a_r);
DECLARE_WRITE8_MEMBER(changela_68705_port_a_w);
DECLARE_WRITE8_MEMBER(changela_68705_ddr_a_w);
DECLARE_READ8_MEMBER(changela_68705_port_b_r);
DECLARE_WRITE8_MEMBER(changela_68705_port_b_w);
DECLARE_WRITE8_MEMBER(changela_68705_ddr_b_w);
DECLARE_READ8_MEMBER(changela_68705_port_c_r);
DECLARE_WRITE8_MEMBER(changela_68705_port_c_w);
DECLARE_WRITE8_MEMBER(changela_68705_ddr_c_w);
DECLARE_READ8_MEMBER(changela_24_r);
DECLARE_READ8_MEMBER(changela_25_r);
DECLARE_READ8_MEMBER(changela_30_r);
@ -102,7 +82,22 @@ public:
void draw_obj1( bitmap_ind16 &bitmap );
void draw_river( bitmap_ind16 &bitmap, int sy );
void draw_tree( bitmap_ind16 &bitmap, int sy, int tree_num );
required_device<cpu_device> m_maincpu;
required_device<screen_device> m_screen;
protected:
// memory pointers
required_shared_ptr<u8> m_spriteram;
required_shared_ptr<u8> m_videoram;
required_shared_ptr<u8> m_colorram;
// devices
required_device<m68705p_device> m_mcu;
required_device<cpu_device> m_maincpu;
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;
// mcu-related
u8 m_port_a_out;
u8 m_port_c_out;
u8 m_mcu_out;
u8 m_mcu_in;
};

1
src/mame/includes/flstory.h
View File

@ -76,6 +76,7 @@ public:
DECLARE_WRITE8_MEMBER(sound_command_w);
DECLARE_WRITE8_MEMBER(nmi_disable_w);
DECLARE_WRITE8_MEMBER(nmi_enable_w);
DECLARE_READ8_MEMBER(flstory_mcu_status_r);
DECLARE_READ8_MEMBER(rumba_mcu_r);
DECLARE_WRITE8_MEMBER(rumba_mcu_w);
DECLARE_WRITE8_MEMBER(onna34ro_mcu_w);

1
src/mame/includes/lkage.h
View File

@ -56,6 +56,7 @@ public:
DECLARE_WRITE8_MEMBER(lkage_sh_nmi_enable_w);
DECLARE_READ8_MEMBER(sound_status_r);
DECLARE_READ8_MEMBER(port_fetch_r);
DECLARE_READ8_MEMBER(mcu_status_r);
DECLARE_READ8_MEMBER(fake_mcu_r);
DECLARE_WRITE8_MEMBER(fake_mcu_w);
DECLARE_READ8_MEMBER(fake_status_r);

19
src/mame/includes/qix.h
View File

@ -8,10 +8,15 @@
***************************************************************************/
#include "cpu/m6809/m6809.h"
#include "video/mc6845.h"
#include "cpu/m6805/m68705.h"
#include "machine/6821pia.h"
#include "sound/sn76496.h"
#include "sound/discrete.h"
#include "sound/sn76496.h"
#include "video/mc6845.h"
#define MAIN_CLOCK_OSC 20000000 /* 20 MHz */
#define SLITHER_CLOCK_OSC 21300000 /* 21.3 MHz */
@ -39,8 +44,6 @@ public:
m_sn1 (*this, "sn1"),
m_sn2 (*this, "sn2"),
m_discrete(*this, "discrete"),
m_68705_port_out(*this, "68705_port_out"),
m_68705_ddr(*this, "68705_ddr"),
m_paletteram(*this, "paletteram"),
m_videoram(*this, "videoram"),
m_videoram_address(*this, "videoram_addr"),
@ -54,7 +57,7 @@ public:
required_device<m6809_base_device> m_maincpu;
optional_device<cpu_device> m_audiocpu;
required_device<m6809_base_device> m_videocpu;
optional_device<cpu_device> m_mcu;
optional_device<m68705p_device> m_mcu;
required_device<mc6845_device> m_crtc;
required_device<pia6821_device> m_pia0;
required_device<pia6821_device> m_pia1;
@ -67,9 +70,7 @@ public:
optional_device<discrete_device> m_discrete;
/* machine state */
optional_shared_ptr<uint8_t> m_68705_port_out;
optional_shared_ptr<uint8_t> m_68705_ddr;
uint8_t m_68705_port_in[3];
uint8_t m_68705_portA_out;
uint8_t m_coinctrl;
/* video state */
@ -96,12 +97,10 @@ public:
DECLARE_WRITE8_MEMBER(qix_video_firq_ack_w);
DECLARE_READ8_MEMBER(qix_video_firq_r);
DECLARE_READ8_MEMBER(qix_video_firq_ack_r);
DECLARE_READ8_MEMBER(qix_68705_portA_r);
DECLARE_READ8_MEMBER(qix_68705_portB_r);
DECLARE_READ8_MEMBER(qix_68705_portC_r);
DECLARE_WRITE8_MEMBER(qix_68705_portA_w);
DECLARE_WRITE8_MEMBER(qix_68705_portB_w);
DECLARE_WRITE8_MEMBER(qix_68705_portC_w);
DECLARE_READ8_MEMBER(qix_videoram_r);
DECLARE_WRITE8_MEMBER(qix_videoram_w);
DECLARE_WRITE8_MEMBER(slither_videoram_w);

8
src/mame/machine/arkanoid.cpp
View File

@ -17,6 +17,14 @@
#define ARKANOID_BOOTLEG_VERBOSE 1
CUSTOM_INPUT_MEMBER(arkanoid_state::arkanoid_semaphore_input_r)
{
// bit 0 is host semaphore flag, bit 1 is MCU semaphore flag (both active low)
return
((CLEAR_LINE != m_mcuintf->host_semaphore_r()) ? 0x00 : 0x01) |
((CLEAR_LINE != m_mcuintf->mcu_semaphore_r()) ? 0x00 : 0x02);
}
CUSTOM_INPUT_MEMBER(arkanoid_state::arkanoid_input_mux)
{
return m_muxports[(0 == m_paddle_select) ? 0 : 1]->read();

27
src/mame/machine/bigevglf.cpp
View File

@ -1,27 +0,0 @@
// license:GPL-2.0+
// copyright-holders:Jarek Burczynski, Tomasz Slanina
/***************************************************************************
machine.c
Functions to emulate general aspects of the machine (RAM, ROM, interrupts,
I/O ports)
***************************************************************************/
#include "emu.h"
#include "includes/bigevglf.h"
READ8_MEMBER(bigevglf_state::bigevglf_mcu_status_r)
{
int res = 0;
if (!m_bmcu->get_main_sent())
res |= 0x08;
if (m_bmcu->get_mcu_sent())
res |= 0x10;
return res;
}

70
src/mame/machine/bublbobl.cpp
View File

@ -355,30 +355,19 @@ READ8_MEMBER(bublbobl_state::boblbobl_ic43_b_r)
The following is ENTIRELY GUESSWORK!!!
***************************************************************************/
INTERRUPT_GEN_MEMBER(bublbobl_state::bublbobl_m68705_interrupt)
INTERRUPT_GEN_MEMBER(bub68705_state::bublbobl_m68705_interrupt)
{
device.execute().set_input_line(0, ASSERT_LINE);
device.execute().set_input_line(M68705_IRQ_LINE, ASSERT_LINE);
timer_set(attotime::from_msec(1000/60), TIMER_M68705_IRQ_ACK); /* TODO: understand how this is ack'ed */
}
READ8_MEMBER(bublbobl_state::bublbobl_68705_port_a_r)
{
//logerror("%04x: 68705 port A read %02x\n", space.device().safe_pc(), m_port_a_in);
return (m_port_a_out & m_ddr_a) | (m_port_a_in & ~m_ddr_a);
}
WRITE8_MEMBER(bublbobl_state::bublbobl_68705_port_a_w)
WRITE8_MEMBER(bub68705_state::port_a_w)
{
//logerror("%04x: 68705 port A write %02x\n", space.device().safe_pc(), data);
m_port_a_out = data;
}
WRITE8_MEMBER(bublbobl_state::bublbobl_68705_ddr_a_w)
{
m_ddr_a = data;
}
/*
@ -400,37 +389,30 @@ WRITE8_MEMBER(bublbobl_state::bublbobl_68705_ddr_a_w)
* 7 W not used?
*/
READ8_MEMBER(bublbobl_state::bublbobl_68705_port_b_r)
{
return (m_port_b_out & m_ddr_b) | (m_port_b_in & ~m_ddr_b);
}
WRITE8_MEMBER(bublbobl_state::bublbobl_68705_port_b_w)
WRITE8_MEMBER(bub68705_state::port_b_w)
{
//logerror("%04x: 68705 port B write %02x\n", space.device().safe_pc(), data);
static const char *const portnames[] = { "DSW0", "DSW1", "IN1", "IN2" };
if ((m_ddr_b & 0x01) && (~data & 0x01) && (m_port_b_out & 0x01))
{
m_port_a_in = m_latch;
}
if ((m_ddr_b & 0x02) && (data & 0x02) && (~m_port_b_out & 0x02)) /* positive edge trigger */
if (BIT(mem_mask, 0) && !BIT(data, 0) && BIT(m_port_b_out, 0))
m_mcu->pa_w(space, 0, m_latch);
if (BIT(mem_mask, 1) && BIT(data, 1) && !BIT(m_port_b_out, 1)) /* positive edge trigger */
{
m_address = (m_address & 0xff00) | m_port_a_out;
//logerror("%04x: 68705 address %02x\n", space.device().safe_pc(), m_port_a_out);
}
if ((m_ddr_b & 0x04) && (data & 0x04) && (~m_port_b_out & 0x04)) /* positive edge trigger */
{
if (BIT(mem_mask, 2) && BIT(data, 2) && !BIT(m_port_b_out, 2)) /* positive edge trigger */
m_address = (m_address & 0x00ff) | ((m_port_a_out & 0x0f) << 8);
}
if ((m_ddr_b & 0x10) && (~data & 0x10) && (m_port_b_out & 0x10))
if (BIT(mem_mask, 4) && !BIT(data, 4) && BIT(m_port_b_out, 4))
{
if (data & 0x08) /* read */
if (BIT(data, 3)) /* read */
{
if ((m_address & 0x0800) == 0x0000)
{
//logerror("%04x: 68705 read input port %02x\n", space.device().safe_pc(), m_address);
m_latch = ioport(portnames[m_address & 3])->read();
m_latch = m_mux_ports[m_address & 3]->read();
}
else if ((m_address & 0x0c00) == 0x0c00)
{
@ -438,9 +420,11 @@ WRITE8_MEMBER(bublbobl_state::bublbobl_68705_port_b_w)
m_latch = m_mcu_sharedram[m_address & 0x03ff];
}
else
{
logerror("%04x: 68705 unknown read address %04x\n", space.device().safe_pc(), m_address);
}
}
else /* write */
else /* write */
{
if ((m_address & 0x0c00) == 0x0c00)
{
@ -448,10 +432,13 @@ WRITE8_MEMBER(bublbobl_state::bublbobl_68705_port_b_w)
m_mcu_sharedram[m_address & 0x03ff] = m_port_a_out;
}
else
{
logerror("%04x: 68705 unknown write to address %04x\n", space.device().safe_pc(), m_address);
}
}
}
if ((m_ddr_b & 0x20) && (~data & 0x20) && (m_port_b_out & 0x20))
if (BIT(mem_mask, 5) && !BIT(data, 5) && BIT(m_port_b_out, 5))
{
/* hack to get random EXTEND letters (who is supposed to do this? 68705? PAL?) */
m_mcu_sharedram[0x7c] = machine().rand() % 6;
@ -459,19 +446,12 @@ WRITE8_MEMBER(bublbobl_state::bublbobl_68705_port_b_w)
m_maincpu->set_input_line_vector(0, m_mcu_sharedram[0]);
m_maincpu->set_input_line(0, HOLD_LINE);
}
if ((m_ddr_b & 0x40) && (~data & 0x40) && (m_port_b_out & 0x40))
{
if (BIT(mem_mask, 6) && !BIT(data, 6) && BIT(m_port_b_out, 6))
logerror("%04x: 68705 unknown port B bit %02x\n", space.device().safe_pc(), data);
}
if ((m_ddr_b & 0x80) && (~data & 0x80) && (m_port_b_out & 0x80))
{
if (BIT(mem_mask, 7) && !BIT(data, 7) && BIT(m_port_b_out, 7))
logerror("%04x: 68705 unknown port B bit %02x\n", space.device().safe_pc(), data);
}
m_port_b_out = data;
}
WRITE8_MEMBER(bublbobl_state::bublbobl_68705_ddr_b_w)
{
m_ddr_b = data;
}

9
src/mame/machine/flstory.cpp
View File

@ -12,6 +12,15 @@
#include "emu.h"
#include "includes/flstory.h"
READ8_MEMBER(flstory_state::flstory_mcu_status_r)
{
// bit 0 = when 1, MCU is ready to receive data from main CPU
// bit 1 = when 1, MCU has sent data to the main CPU
return
((CLEAR_LINE == m_bmcu->host_semaphore_r()) ? 0x01 : 0x00) |
((CLEAR_LINE != m_bmcu->mcu_semaphore_r()) ? 0x02 : 0x00);
}
WRITE8_MEMBER(flstory_state::onna34ro_mcu_w)
{
uint16_t score_adr = m_workram[0x29e] * 0x100 + m_workram[0x29d];

8
src/mame/machine/lsasquad.cpp
View File

@ -95,9 +95,9 @@ READ8_MEMBER(lsasquad_state::lsasquad_mcu_status_r)
//logerror("%04x: mcu_status_r\n",space.device().safe_pc());
if (m_bmcu)
{
if (!m_bmcu->get_main_sent())
if (CLEAR_LINE == m_bmcu->host_semaphore_r())
res |= 0x01;
if (!m_bmcu->get_mcu_sent())
if (CLEAR_LINE == m_bmcu->mcu_semaphore_r())
res |= 0x02;
}
@ -113,9 +113,9 @@ READ8_MEMBER(lsasquad_state::daikaiju_mcu_status_r)
//logerror("%04x: mcu_status_r\n",space.device().safe_pc());
if (m_bmcu)
{
if (!m_bmcu->get_main_sent())
if (CLEAR_LINE == m_bmcu->host_semaphore_r())
res |= 0x01;
if (!m_bmcu->get_mcu_sent())
if (CLEAR_LINE == m_bmcu->mcu_semaphore_r())
res |= 0x02;
}

26
src/mame/machine/nycaptor.cpp
View File

@ -1,26 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:Tomasz Slanina
/***************************************************************************
machine.c
Functions to emulate general aspects of the machine (RAM, ROM, interrupts,
I/O ports)
***************************************************************************/
#include "emu.h"
#include "includes/nycaptor.h"
READ8_MEMBER(nycaptor_state::nycaptor_mcu_status_r1)
{
/* bit 1 = when 1, mcu has sent data to the main cpu */
return m_bmcu->get_mcu_sent() ? 2 : 0;
}
READ8_MEMBER(nycaptor_state::nycaptor_mcu_status_r2)
{
/* bit 0 = when 1, mcu is ready to receive data from main cpu */
return m_bmcu->get_main_sent() ? 0 : 1;
}

47
src/mame/machine/qix.cpp
View File

@ -8,11 +8,10 @@
***************************************************************************/
#include "emu.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6805/m68705.h"
#include "cpu/m6809/m6809.h"
#include "includes/qix.h"
#include "cpu/m6800/m6800.h"
/*************************************
*
@ -30,7 +29,7 @@ void qix_state::machine_reset()
MACHINE_START_MEMBER(qix_state,qixmcu)
{
/* set up save states */
save_item(NAME(m_68705_port_in));
save_item(NAME(m_68705_portA_out));
save_item(NAME(m_coinctrl));
}
@ -138,8 +137,8 @@ READ8_MEMBER(qix_state::qix_video_firq_ack_r)
READ8_MEMBER(qix_state::qixmcu_coin_r)
{
logerror("6809:qixmcu_coin_r = %02X\n", m_68705_port_out[0]);
return m_68705_port_out[0];
logerror("6809:qixmcu_coin_r = %02X\n", m_68705_portA_out);
return m_68705_portA_out;
}
@ -148,14 +147,13 @@ WRITE8_MEMBER(qix_state::qixmcu_coin_w)
logerror("6809:qixmcu_coin_w = %02X\n", data);
/* this is a callback called by pia6821_device::write(), so I don't need to synchronize */
/* the CPUs - they have already been synchronized by qix_pia_w() */
m_68705_port_in[0] = data;
m_mcu->pa_w(space, 0, data, mem_mask);
}
WRITE8_MEMBER(qix_state::qixmcu_coinctrl_w)
{
/* if (!(data & 0x04)) */
if (data & 0x04)
if (BIT(data, 2))
{
m_mcu->set_input_line(M68705_IRQ_LINE, ASSERT_LINE);
/* temporarily boost the interleave to sync things up */
@ -163,7 +161,9 @@ WRITE8_MEMBER(qix_state::qixmcu_coinctrl_w)
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(50));
}
else
{
m_mcu->set_input_line(M68705_IRQ_LINE, CLEAR_LINE);
}
/* this is a callback called by pia6821_device::write(), so I don't need to synchronize */
/* the CPUs - they have already been synchronized by qix_pia_w() */
@ -179,31 +179,15 @@ WRITE8_MEMBER(qix_state::qixmcu_coinctrl_w)
*
*************************************/
READ8_MEMBER(qix_state::qix_68705_portA_r)
{
uint8_t ddr = m_68705_ddr[0];
uint8_t out = m_68705_port_out[0];
uint8_t in = m_68705_port_in[0];
logerror("68705:portA_r = %02X (%02X)\n", (out & ddr) | (in & ~ddr), in);
return (out & ddr) | (in & ~ddr);
}
READ8_MEMBER(qix_state::qix_68705_portB_r)
{
uint8_t ddr = m_68705_ddr[1];
uint8_t out = m_68705_port_out[1];
uint8_t in = (ioport("COIN")->read() & 0x0f) | ((ioport("COIN")->read() & 0x80) >> 3);
return (out & ddr) | (in & ~ddr);
return (ioport("COIN")->read() & 0x0f) | ((ioport("COIN")->read() & 0x80) >> 3);
}
READ8_MEMBER(qix_state::qix_68705_portC_r)
{
uint8_t ddr = m_68705_ddr[2];
uint8_t out = m_68705_port_out[2];
uint8_t in = (m_coinctrl & 0x08) | ((ioport("COIN")->read() & 0x70) >> 4);
return (out & ddr) | (in & ~ddr);
return (m_coinctrl & 0x08) | ((ioport("COIN")->read() & 0x70) >> 4);
}
@ -217,24 +201,17 @@ READ8_MEMBER(qix_state::qix_68705_portC_r)
WRITE8_MEMBER(qix_state::qix_68705_portA_w)
{
logerror("68705:portA_w = %02X\n", data);
m_68705_port_out[0] = data;
m_68705_portA_out = data;
}
WRITE8_MEMBER(qix_state::qix_68705_portB_w)
{
m_68705_port_out[1] = data;
machine().bookkeeping().coin_lockout_w(0, (~data >> 6) & 1);
machine().bookkeeping().coin_counter_w(0, (data >> 7) & 1);
}
WRITE8_MEMBER(qix_state::qix_68705_portC_w)
{
m_68705_port_out[2] = data;
}
/*************************************
*

20
src/mame/machine/slapfght.cpp
View File

@ -16,26 +16,18 @@
READ8_MEMBER(slapfght_state::tigerh_mcu_status_r)
{
// d0 is vblank
uint8_t res = m_screen->vblank() ? 1 : 0;
if (m_bmcu)
{
if (!m_bmcu->get_main_sent())
res |= 0x02;
if (!m_bmcu->get_mcu_sent())
res |= 0x04;
}
return res;
return
(m_screen->vblank() ? 0x01 : 0x00) |
((m_bmcu && (CLEAR_LINE == m_bmcu->host_semaphore_r())) ? 0x02 : 0x00) |
((m_bmcu && (CLEAR_LINE == m_bmcu->mcu_semaphore_r())) ? 0x04 : 0x00);
}
WRITE8_MEMBER(slapfght_state::scroll_from_mcu_w)
{
switch (offset)
{
case 0x00: m_scrollx_lo = data; break;
case 0x01: m_scrollx_hi = data; break;
case 0x01: m_scrollx_lo = data; break; // PB3
case 0x02: m_scrollx_hi = data; break; // PB4
}
}

95
src/mame/machine/taito68705interface.cpp
View File

@ -22,22 +22,21 @@
bigevglf.cpp - bigevglf
xain.cpp - xsleena
matmania.cpp - maniach
slapfght.cpp - slapfght
and the following with slight changes:
slapfght.cpp - tigerh (inverted status bits read on port C)
- slapfght (extended outputs for scrolling)
arkanoid.cpp - arkanoid (latch control on port C, inputs on port B)
taito_l.cpp - puzznic (latch control on port C)
not hooked up here, but possible (needs investigating)
pitnrun.cpp - have more functionality on portB, currently using 'instant timers' for latches
taitosj.cpp - ^^
changela.cpp - ^^
renegade.cpp - ^^
68705 sets in Taito drivers that are NOT suitable for hookup here?
bublbobl.cpp - bub68705 - this is a bootleg, not an official Taito hookup
changela.cpp - changela - looks like an ancestor of arkanoid without automatic semaphores
mexico86.cpp - knightb, mexico86 - bootleg 68705s
retofinv.cpp - the current MCU dump is a bootleg at least
sqix.cpp - hotsmash - kaneko hookup, different from Taito ones.
@ -76,7 +75,6 @@ MACHINE_CONFIG_END
device_type const TAITO68705_MCU = &device_creator<taito68705_mcu_device>;
device_type const TAITO68705_MCU_SLAP = &device_creator<taito68705_mcu_slap_device>;
device_type const TAITO68705_MCU_TIGER = &device_creator<taito68705_mcu_tiger_device>;
device_type const ARKANOID_68705P3 = &device_creator<arkanoid_68705p3_device>;
device_type const ARKANOID_68705P5 = &device_creator<arkanoid_68705p5_device>;
@ -117,22 +115,6 @@ WRITE_LINE_MEMBER(taito68705_mcu_device_base::reset_w)
m_mcu->set_input_line(INPUT_LINE_RESET, state);
}
CUSTOM_INPUT_MEMBER(taito68705_mcu_device_base::semaphore_r)
{
// bit 0 is host semaphore flag, bit 1 is MCU semaphore flag (both active low)
return (m_host_flag ? 0x00 : 0x01) | (m_mcu_flag ? 0x00 : 0x02) | 0xfc;
}
CUSTOM_INPUT_MEMBER(taito68705_mcu_device_base::host_flag_r)
{
return m_host_flag ? 1 : 0;
}
CUSTOM_INPUT_MEMBER(taito68705_mcu_device_base::mcu_flag_r)
{
return m_mcu_flag ? 1 : 0;
}
WRITE8_MEMBER(taito68705_mcu_device_base::mcu_pa_w)
{
m_pa_output = data;
@ -149,11 +131,11 @@ taito68705_mcu_device_base::taito68705_mcu_device_base(
char const *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source)
, m_mcu(*this, "mcu")
, m_host_flag(false)
, m_mcu_flag(false)
, m_semaphore_cb(*this)
, m_latch_driven(false)
, m_reset_input(false)
, m_host_flag(false)
, m_mcu_flag(false)
, m_host_latch(0xff)
, m_mcu_latch(0xff)
, m_pa_output(0xff)
@ -164,10 +146,10 @@ void taito68705_mcu_device_base::device_start()
{
m_semaphore_cb.resolve_safe();
save_item(NAME(m_host_flag));
save_item(NAME(m_mcu_flag));
save_item(NAME(m_latch_driven));
save_item(NAME(m_reset_input));
save_item(NAME(m_host_flag));
save_item(NAME(m_mcu_flag));
save_item(NAME(m_host_latch));
save_item(NAME(m_mcu_latch));
save_item(NAME(m_pa_output));
@ -188,11 +170,6 @@ void taito68705_mcu_device_base::device_reset()
m_semaphore_cb(CLEAR_LINE);
}
u8 taito68705_mcu_device_base::pa_value() const
{
return m_pa_output & (m_latch_driven ? m_host_latch : 0xff);
}
void taito68705_mcu_device_base::latch_control(u8 data, u8 &value, unsigned host_bit, unsigned mcu_bit)
{
// save this here to simulate latch propagation delays
@ -239,6 +216,7 @@ taito68705_mcu_device::taito68705_mcu_device(const machine_config &mconfig, cons
taito68705_mcu_device::taito68705_mcu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, u32 clock, const char *shortname, const char *source)
: taito68705_mcu_device_base(mconfig, type, name, tag, owner, clock, shortname, source)
, m_aux_strobe_cb(*this)
, m_pb_output(0xff)
{
}
@ -252,21 +230,14 @@ void taito68705_mcu_device::device_start()
{
taito68705_mcu_device_base::device_start();
m_aux_strobe_cb.resolve_safe();
save_item(NAME(m_pb_output));
m_pb_output = 0xff;
}
/***************************************************************************
Buggy Challenge 68705 protection interface
This is accurate. FairyLand Story seems to be identical.
***************************************************************************/
/*
* Port B connections:
* parts in [ ] are optional (not used by buggychl)
@ -290,49 +261,25 @@ READ8_MEMBER(taito68705_mcu_device::mcu_portc_r)
{
// PC0 is the host semaphore flag (active high)
// PC1 is the MCU semaphore flag (active low)
return (m_host_flag ? 0x01 : 0x00) | (m_mcu_flag ? 0x00 : 0x02) | 0xfc;
return (host_flag() ? 0x01 : 0x00) | (mcu_flag() ? 0x00 : 0x02) | 0xfc;
}
WRITE8_MEMBER(taito68705_mcu_device::mcu_portb_w)
{
// some games have additional peripherals strobed on falling edge
u8 const old_pa_value(pa_value());
u8 const aux_strobes((mem_mask & ~data & m_pb_output) >> 2);
// rising edge on PB1 clears the host semaphore flag
// PB2 sets the MCU semaphore when low
latch_control(data, m_pb_output, 1, 2);
}
/* Status readbacks for MAIN cpu - these hook up in various ways depending on the host (provide 2 lines instead?) */
READ8_MEMBER( taito68705_mcu_device::mcu_status_r )
{
// bit 0 = when 1, MCU is ready to receive data from main CPU
// bit 1 = when 1, MCU has sent data to the main CPU
return (m_host_flag ? 0x00 : 0x01) | (m_mcu_flag ? 0x02 : 0x00);
}
/* The Slap Fight interface has some extensions, handle them here */
taito68705_mcu_slap_device::taito68705_mcu_slap_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: taito68705_mcu_device(mconfig, TAITO68705_MCU_SLAP, "Taito M68705 MCU Interface (Slap Fight)", tag, owner, clock, "taito68705slap", __FILE__)
, m_extension_cb_w(*this)
{
}
WRITE8_MEMBER(taito68705_mcu_slap_device::mcu_portb_w)
{
if (BIT(mem_mask, 3) && !BIT(data, 3) && BIT(m_pb_output, 3))
m_extension_cb_w(0, pa_value(), 0xff); // m_scrollx_lo
if (BIT(mem_mask, 4) && !BIT(data, 4) && BIT(m_pb_output, 4))
m_extension_cb_w(1, pa_value(), 0xff); // m_scrollx_hi
taito68705_mcu_device::mcu_portb_w(space, offset, data, mem_mask);
}
void taito68705_mcu_slap_device::device_start()
{
taito68705_mcu_device::device_start();
m_extension_cb_w.resolve_safe();
// callbacks for other peripherals
for (unsigned i = 0; i < 6; ++i)
{
if (BIT(aux_strobes, i))
m_aux_strobe_cb(i, old_pa_value, 0xff);
}
}
@ -361,7 +308,7 @@ READ8_MEMBER(arkanoid_mcu_device_base::mcu_pc_r)
{
// PC0 is the host semaphore flag (active high)
// PC1 is the MCU semaphore flag (active low)
return (m_host_flag ? 0x01 : 0x00) | (m_mcu_flag ? 0x00 : 0x02) | 0xfc;
return (host_flag() ? 0x01 : 0x00) | (mcu_flag() ? 0x00 : 0x02) | 0xfc;
}
WRITE8_MEMBER(arkanoid_mcu_device_base::mcu_pc_w)

54
src/mame/machine/taito68705interface.h
View File

@ -5,7 +5,6 @@
extern const device_type TAITO68705_MCU;
extern const device_type TAITO68705_MCU_SLAP;
extern const device_type TAITO68705_MCU_TIGER;
extern const device_type ARKANOID_68705P3;
extern const device_type ARKANOID_68705P5;
@ -21,9 +20,10 @@ public:
DECLARE_READ8_MEMBER(data_r);
DECLARE_WRITE8_MEMBER(data_w);
DECLARE_WRITE_LINE_MEMBER(reset_w);
DECLARE_CUSTOM_INPUT_MEMBER(semaphore_r);
DECLARE_CUSTOM_INPUT_MEMBER(host_flag_r);
DECLARE_CUSTOM_INPUT_MEMBER(mcu_flag_r);
DECLARE_READ_LINE_MEMBER(host_semaphore_r) { return m_host_flag ? ASSERT_LINE : CLEAR_LINE; }
DECLARE_READ_LINE_MEMBER(mcu_semaphore_r) { return m_mcu_flag ? ASSERT_LINE : CLEAR_LINE; }
DECLARE_CUSTOM_INPUT_MEMBER(host_semaphore_r) { return m_host_flag ? 1 : 0; }
DECLARE_CUSTOM_INPUT_MEMBER(mcu_semaphore_r) { return m_mcu_flag ? 1 : 0; }
// MCU callbacks
DECLARE_WRITE8_MEMBER(mcu_pa_w);
@ -42,37 +42,39 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
u8 pa_value() const;
bool host_flag() const { return m_host_flag; }
bool mcu_flag() const { return m_mcu_flag; }
u8 pa_value() const { return m_pa_output & (m_latch_driven ? m_host_latch : 0xff); }
void latch_control(u8 data, u8 &value, unsigned host_bit, unsigned mcu_bit);
required_device<m68705p_device> m_mcu;
bool m_host_flag;
bool m_mcu_flag;
private:
devcb_write_line m_semaphore_cb;
bool m_latch_driven;
bool m_reset_input;
bool m_host_flag;
bool m_mcu_flag;
u8 m_host_latch;
u8 m_mcu_latch;
u8 m_pa_output;
};
#define MCFG_TAITO_M68705_AUX_STROBE_CB(cb) \
taito68705_mcu_device::set_aux_strobe_cb(*device, DEVCB_##cb);
class taito68705_mcu_device : public taito68705_mcu_device_base
{
public:
template <typename Obj> static devcb_base &set_aux_strobe_cb(device_t &device, Obj &&object)
{ return downcast<taito68705_mcu_device &>(device).m_aux_strobe_cb.set_callback(std::forward<Obj>(object)); }
taito68705_mcu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_READ8_MEMBER(mcu_portc_r);
virtual DECLARE_WRITE8_MEMBER(mcu_portb_w);
DECLARE_READ8_MEMBER(mcu_status_r);
bool get_main_sent() { return m_host_flag; };
bool get_mcu_sent() { return m_mcu_flag; };
DECLARE_WRITE8_MEMBER(mcu_portb_w);
protected:
taito68705_mcu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, u32 clock, const char *shortname, const char *source);
@ -80,28 +82,12 @@ protected:
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_start() override;
devcb_write8 m_aux_strobe_cb;
u8 m_pb_output;
};
#define MCFG_TAITO_M68705_EXTENSION_CB(_devcb) \
taito68705_mcu_slap_device::set_extension_cb(*device, DEVCB_##_devcb);
class taito68705_mcu_slap_device : public taito68705_mcu_device
{
public:
taito68705_mcu_slap_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
virtual DECLARE_WRITE8_MEMBER( mcu_portb_w ) override;
template<class _Object> static devcb_base &set_extension_cb(device_t &device, _Object object) { return downcast<taito68705_mcu_slap_device &>(device).m_extension_cb_w.set_callback(object); }
devcb_write8 m_extension_cb_w;
protected:
virtual void device_start() override;
};
class taito68705_mcu_tiger_device : public taito68705_mcu_device
{
public:
@ -111,10 +97,10 @@ public:
#define MCFG_ARKANOID_MCU_SEMAPHORE_CB(cb) \
arkanoid_mcu_device_base::set_semaphore_cb(*device, DEVCB_##cb);
arkanoid_mcu_device_base::set_semaphore_cb(*device, DEVCB_##cb);
#define MCFG_ARKANOID_MCU_PORTB_R_CB(cb) \
arkanoid_mcu_device_base::set_portb_r_cb(*device, DEVCB_##cb);
arkanoid_mcu_device_base::set_portb_r_cb(*device, DEVCB_##cb);
class arkanoid_mcu_device_base : public taito68705_mcu_device_base
{