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Fixed vblank irq trigger when interlace mode is used

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This commit is contained in:
Angelo Salese 2013-08-29 20:29:45 +00:00
parent bafb7b572e
commit b40f960226
6 changed files with 37 additions and 12 deletions
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5
src/mame/includes/dc.h
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@ -273,8 +273,9 @@ class dc_state : public driver_device
#define IST_EXT_MODEM 0x00000004 #define IST_EXT_MODEM 0x00000004
#define IST_EXT_AICA 0x00000002 #define IST_EXT_AICA 0x00000002
#define IST_EXT_GDROM 0x00000001 #define IST_EXT_GDROM 0x00000001
/* -------------- error interrupts ------------- */
#define IST_ERR_ISP_LIMIT_IRQ 0x00000004 #define IST_ERR_ISP_LIMIT 0x00000004
#define IST_ERR_PVRIF_ILL_ADDR 0x00000040
void dc_maple_irq(running_machine &machine); void dc_maple_irq(running_machine &machine);

6
src/mame/machine/dc.c
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@ -165,7 +165,11 @@ WRITE8_MEMBER(dc_state::pvr_irq)
break; break;
case powervr2_device::ERR_ISP_LIMIT_IRQ: case powervr2_device::ERR_ISP_LIMIT_IRQ:
dc_sysctrl_regs[SB_ISTERR] |= IST_ERR_ISP_LIMIT_IRQ; dc_sysctrl_regs[SB_ISTERR] |= IST_ERR_ISP_LIMIT;
break;
case powervr2_device::ERR_PVRIF_ILL_ADDR_IRQ:
dc_sysctrl_regs[SB_ISTERR] |= IST_ERR_PVRIF_ILL_ADDR;
break; break;
} }
dc_update_interrupt_status(); dc_update_interrupt_status();

29
src/mame/video/powervr2.c
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@ -2003,7 +2003,7 @@ WRITE8_MEMBER( powervr2_device::ta_fifo_yuv_w )
{ {
ta_yuv_y = 0; ta_yuv_y = 0;
/* TODO: timing */ /* TODO: timing */
yuv_timer_end->adjust(state->m_maincpu->cycles_to_attotime(ta_yuv_x_size*ta_yuv_y_size*0x180)); yuv_timer_end->adjust(state->m_maincpu->cycles_to_attotime((ta_yuv_x_size/16)*(ta_yuv_y_size/16)*0x180));
} }
} }
} }
@ -3356,9 +3356,21 @@ void powervr2_device::pvr_dma_execute(address_space &space)
size = 0; size = 0;
/* used so far by usagui and sprtjam*/ /* used so far by usagui and sprtjam*/
//printf("PVR-DMA start\n"); printf("PVR-DMA start\n");
//printf("%08x %08x %08x\n",m_pvr_dma.pvr_addr,m_pvr_dma.sys_addr,m_pvr_dma.size); printf("%08x %08x %08x\n",m_pvr_dma.pvr_addr,m_pvr_dma.sys_addr,m_pvr_dma.size);
//printf("src %s dst %08x\n",m_pvr_dma.dir ? "->" : "<-",m_pvr_dma.sel); printf("src %s dst %08x\n",m_pvr_dma.dir ? "->" : "<-",m_pvr_dma.sel);
/* Throw illegal address set */
#if 0
if((m_pvr_dma.sys_addr & 0x1c000000) != 0x0c000000)
{
/* TODO: timing */
irq_cb(ERR_PVRIF_ILL_ADDR_IRQ);
m_pvr_dma.start = sb_pdst = 0;
printf("Illegal PVR DMA set\n");
return;
}
#endif
/* 0 rounding size = 16 Mbytes */ /* 0 rounding size = 16 Mbytes */
if(m_pvr_dma.size == 0) { m_pvr_dma.size = 0x100000; } if(m_pvr_dma.size == 0) { m_pvr_dma.size = 0x100000; }
@ -3568,9 +3580,16 @@ void powervr2_device::pvr_scanline_timer(int vpos)
{ {
int vbin_line = spg_vblank_int & 0x3ff; int vbin_line = spg_vblank_int & 0x3ff;
int vbout_line = (spg_vblank_int >> 16) & 0x3ff; int vbout_line = (spg_vblank_int >> 16) & 0x3ff;
UINT8 interlace_on = ((spg_control & 0x10) >> 4);
dc_state *state = machine().driver_data<dc_state>(); dc_state *state = machine().driver_data<dc_state>();
if(vbin_line-1 == vpos) if(interlace_on)
{
vbin_line <<= 1;
vbout_line <<= 1;
}
if(vbin_line-(1+interlace_on) == vpos)
state->m_maple->maple_hw_trigger(); state->m_maple->maple_hw_trigger();
if(vbin_line == vpos) if(vbin_line == vpos)

3
src/mame/video/powervr2.h
View File

@ -24,7 +24,8 @@ public:
EOR_TSP_IRQ, EOR_TSP_IRQ,
EOR_ISP_IRQ, EOR_ISP_IRQ,
DMA_PVR_IRQ, DMA_PVR_IRQ,
ERR_ISP_LIMIT_IRQ ERR_ISP_LIMIT_IRQ,
ERR_PVRIF_ILL_ADDR_IRQ
}; };
DECLARE_ADDRESS_MAP(ta_map, 32); DECLARE_ADDRESS_MAP(ta_map, 32);

4
src/mess/drivers/tk80.c
View File

@ -48,7 +48,7 @@ ICS8080
#include "cpu/i8085/i8085.h" #include "cpu/i8085/i8085.h"
#include "machine/i8255.h" #include "machine/i8255.h"
#include "machine/keyboard.h" #include "machine/keyboard.h"
#include "tk80.lh" //#include "tk80.lh"
class tk80_state : public driver_device class tk80_state : public driver_device
@ -283,7 +283,7 @@ static MACHINE_CONFIG_START( tk80, tk80_state )
MCFG_CPU_IO_MAP(tk80_io) MCFG_CPU_IO_MAP(tk80_io)
/* video hardware */ /* video hardware */
MCFG_DEFAULT_LAYOUT(layout_tk80) // MCFG_DEFAULT_LAYOUT(layout_tk80)
/* Devices */ /* Devices */
MCFG_I8255_ADD( "ppi8255_0", ppi_intf_0 ) MCFG_I8255_ADD( "ppi8255_0", ppi_intf_0 )

2
src/mess/machine/dccons.c
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@ -743,7 +743,7 @@ WRITE32_MEMBER(dc_cons_state::dc_mess_g1_ctrl_w )
atapi_regs[ATAPI_REG_SAMTAG] = GDROM_PAUSE_STATE | 0x80; atapi_regs[ATAPI_REG_SAMTAG] = GDROM_PAUSE_STATE | 0x80;
} }
break; break;
// The following is required to unlock the GD-ROM. The original Japanese BIOS doen't need it // The following is required to unlock the GD-ROM. The original Japanese BIOS doesn't need it
case GD_UNLOCK: case GD_UNLOCK:
if (data==0 || data==0x001fffff || data==0x42fe) if (data==0 || data==0x001fffff || data==0x42fe)
{ {