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added Hughes HLCD 0438 LCD Driver device

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This commit is contained in:
hap 2020-07-24 13:31:04 +02:00
parent c9afe85236
commit b44810404e
12 changed files with 187 additions and 19 deletions
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12
scripts/src/video.lua
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@ -399,6 +399,18 @@ if (VIDEOS["HD66421"]~=null) then
}
end
--------------------------------------------------
--
--@src/devices/video/hlcd0438.h,VIDEOS["HLCD0438"] = true
--------------------------------------------------
if (VIDEOS["HLCD0438"]~=null) then
files {
MAME_DIR .. "src/devices/video/hlcd0438.cpp",
MAME_DIR .. "src/devices/video/hlcd0438.h",
}
end
--------------------------------------------------
--
--@src/devices/video/hlcd0488.h,VIDEOS["HLCD0488"] = true

1
scripts/target/mame/arcade.lua
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@ -322,6 +322,7 @@ VIDEOS["HD44780"] = true
VIDEOS["HD61830"] = true
VIDEOS["HD63484"] = true
--VIDEOS["HD66421"] = true
--VIDEOS["HLCD0438"] = true
--VIDEOS["HLCD0488"] = true
--VIDEOS["HLCD0515"] = true
--VIDEOS["HLCD0538"] = true

1
scripts/target/mame/mess.lua
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@ -349,6 +349,7 @@ VIDEOS["HD61603"] = true
VIDEOS["HD61830"] = true
--VIDEOS["HD63484"] = true
VIDEOS["HD66421"] = true
VIDEOS["HLCD0438"] = true
VIDEOS["HLCD0488"] = true
VIDEOS["HLCD0515"] = true
VIDEOS["HLCD0538"] = true

2
src/devices/machine/tms1024.h
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@ -68,7 +68,7 @@ public:
auto write_port5_callback() { return m_write_port[4].bind(); }
auto write_port6_callback() { return m_write_port[5].bind(); }
auto write_port7_callback() { return m_write_port[6].bind(); }
tms1024_device &set_ms(u8 i) { m_ms = i & 1; return *this; } // if hardwired, can just set MS pin state here
tms1024_device &set_ms(int state) { m_ms = state ? 1 : 0; return *this; } // if hardwired, can just set MS pin state here
void write_h(u8 data);
u8 read_h();

76
src/devices/video/hlcd0438.cpp Normal file
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@ -0,0 +1,76 @@
// license:BSD-3-Clause
// copyright-holders:hap
/*
Hughes HLCD 0438 LCD Driver
32 segment outputs, may also be used as a column driver
TODO:
- OSC (LCD phi pin)
*/
#include "emu.h"
#include "video/hlcd0438.h"
DEFINE_DEVICE_TYPE(HLCD0438, hlcd0438_device, "hlcd0438", "Hughes HLCD 0438 LCD Driver")
//-------------------------------------------------
// constructor
//-------------------------------------------------
hlcd0438_device::hlcd0438_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, HLCD0438, tag, owner, clock),
m_write_segs(*this), m_write_data(*this)
{ }
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void hlcd0438_device::device_start()
{
m_write_segs.resolve_safe();
m_write_data.resolve_safe();
// register for savestates
save_item(NAME(m_data_in));
save_item(NAME(m_data_out));
save_item(NAME(m_clk));
save_item(NAME(m_load));
save_item(NAME(m_shift));
}
//-------------------------------------------------
// handlers
//-------------------------------------------------
void hlcd0438_device::update_output()
{
// load output latches while LOAD pin is high
if (m_load)
m_write_segs(0, m_shift);
}
void hlcd0438_device::clock_w(int state)
{
state = state ? 1 : 0;
// shift on falling edge
if (m_clk && !state)
{
// DATA OUT pin follows carry out
m_data_out = BIT(m_shift, 31);
m_shift = m_shift << 1 | m_data_in;
// output
m_write_data(m_data_out);
update_output();
}
m_clk = state;
}

79
src/devices/video/hlcd0438.h Normal file
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@ -0,0 +1,79 @@
// license:BSD-3-Clause
// copyright-holders:hap
/*
Hughes HLCD 0438 LCD Driver
*/
#ifndef MAME_VIDEO_HLCD0438_H
#define MAME_VIDEO_HLCD0438_H
#pragma once
// pinout reference
/*
____ ____
VDD 1 |* \_/ | 40 CLOCK
LOAD 2 | | 39 SEG 1
SEG 32 3 | | 38 SEG 2
SEG 31 4 | | 37 SEG 3
SEG 30 5 | | 36 GND
SEG 29 6 | | 35 DATA OUT
SEG 28 7 | | 34 DATA IN
SEG 27 8 | | 33 SEG 4
SEG 26 9 | | 32 SEG 5
SEG 25 10 | HLCD 0438 | 31 LCD phi
SEG 24 11 | | 30 BP
SEG 23 12 | | 29 SEG 6
SEG 22 13 | | 28 SEG 7
SEG 21 14 | | 27 SEG 8
SEG 20 15 | | 26 SEG 9
SEG 19 16 | | 25 SEG 10
SEG 18 17 | | 24 SEG 11
SEG 17 18 | | 23 SEG 12
SEG 16 19 | | 22 SEG 13
SEG 15 20 |___________| 21 SEG 14
*/
class hlcd0438_device : public device_t
{
public:
hlcd0438_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
// configuration helpers
auto write_segs() { return m_write_segs.bind(); } // SEG pins
auto write_data() { return m_write_data.bind(); } // DATA OUT pin
hlcd0438_device &set_load(int state) { m_load = state ? 1 : 0; return *this; } // if hardwired, can just set LOAD pin state here
void data_w(int state) { m_data_in = state ? 1 : 0; }
int data_r() { return m_data_out; }
void load_w(int state) { m_load = state ? 1 : 0; update_output(); }
void clock_w(int state);
protected:
// device-level overrides
virtual void device_start() override;
private:
// pin state
int m_data_in = 0;
int m_data_out = 0;
int m_clk = 0;
int m_load = 0;
u32 m_shift = 0;
void update_output();
devcb_write32 m_write_segs;
devcb_write_line m_write_data;
};
DECLARE_DEVICE_TYPE(HLCD0438, hlcd0438_device)
#endif // MAME_VIDEO_HLCD0438_H

2
src/devices/video/hlcd0488.cpp
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Wilbert Pol
// copyright-holders:Wilbert Pol, hap
/*
Hughes HLCD 0488 LCD Driver

2
src/devices/video/hlcd0488.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Wilbert Pol
// copyright-holders:Wilbert Pol, hap
/*
Hughes HLCD 0488 LCD Driver

4
src/devices/video/md4330b.cpp
View File

@ -70,7 +70,7 @@ void md4330b_device::device_start()
// handlers
//-------------------------------------------------
void md4330b_device::update_q()
void md4330b_device::update_output()
{
u32 out = m_shift;
if (m_tc)
@ -96,8 +96,8 @@ WRITE_LINE_MEMBER(md4330b_device::clk_w)
m_shift = (m_shift << 1) | m_di;
// output
update_q();
m_write_do(m_do);
update_output();
}
m_clk = state;

4
src/devices/video/md4330b.h
View File

@ -49,7 +49,7 @@ public:
auto write_do() { return m_write_do.bind(); }
DECLARE_WRITE_LINE_MEMBER(clk_w);
DECLARE_WRITE_LINE_MEMBER(tc_w) { m_tc = (state) ? 1 : 0; update_q(); }
DECLARE_WRITE_LINE_MEMBER(tc_w) { m_tc = (state) ? 1 : 0; update_output(); }
DECLARE_WRITE_LINE_MEMBER(di_w) { m_di = (state) ? 1 : 0; }
DECLARE_WRITE_LINE_MEMBER(rst_w) { m_rst = (state) ? 1 : 0; }
DECLARE_READ_LINE_MEMBER(do_r) { return m_do; }
@ -60,7 +60,7 @@ protected:
// device-level overrides
virtual void device_start() override;
void update_q();
void update_output();
const u8 m_qmax; // number of Q pins
u32 m_shift;

21
src/mame/drivers/fidel_cc1.cpp
View File

@ -4,12 +4,10 @@
/******************************************************************************
Fidelity's 1st generation chess computers:
- *Chess Challenger
- Chess Challenger
- Chess Challenger (upgraded version) - more commonly known as CC3
- Chess Challenger (model UCC10) - more commonly known as CC10 ver. C
* denotes not dumped (actually CC1 is dumped, but with half of the contents missing)
The first generation of chesscomputers didn't have an electronic chessboard.
Some of them required a separate chessboard, others had a small chessboard
attached to it (the latter applies to Fidelity).
@ -40,15 +38,15 @@ CC1 hardware overview:
- NEC 8080AF @ 2MHz(18MHz XTAL through a 8224)
- Everything goes via a NEC B8228, its special features are unused.
- NEC 2316A ROM(2KB), 4*2101AL RAM(0.5KB total)
- 8255C for I/O, 4*7seg display + 2 extra leds, 12-key keypad
- 8255C for I/O, 4*7seg display + 2 extra leds, 12-key keypad, no sound
Chess Challenger (upgraded version) released a few months later is on the same
hardware, but with double the ROM size, and they corrected the reversed chess
notation. It was also offered as an upgrade to CC1. PCB label P179 C-3 9.77.
Chess Challenger (model UCC10) is on nearly the same PCB too, same label as CC3,
with a small daughterboard for 8KB ROM. Again, it was also offered as an upgrade
to CC1, or CC3.
with an 8KB ROM on a small daughterboard(P-410A 4 12 79). Again, it was also
offered as an upgrade to CC1, or CC3.
Note that although these 2 newer versions are known as "Chess Challenger 3" and
"Chess Challeger 10 C" nowadays, those are not the official titles. CC3 simply
@ -197,7 +195,7 @@ void cc1_state::cc10_map(address_map &map)
map.global_mask(0x3fff);
map(0x0000, 0x0fff).rom();
map(0x1000, 0x11ff).mirror(0x2e00).ram();
map(0x2000, 0x2fff).rom().region("maincpu", 0x1000);
map(0x2000, 0x2fff).rom();
}
@ -298,18 +296,19 @@ void cc1_state::cc10(machine_config &config)
******************************************************************************/
ROM_START( cc1 )
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
ROM_REGION(0x10000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD("d2316ac_011", 0x0000, 0x0800, BAD_DUMP CRC(e27f9816) SHA1(ad9881b3bf8341829a27e86de27805fc2ccb5f7d) ) // A4 line was broken
ROM_END
ROM_START( cc3 )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD("d2332c_011", 0x0000, 0x1000, CRC(51cf4682) SHA1(197374c633a0bf1a9b7ea51a72dc2b89a6c9c508) )
ROM_END
ROM_START( cc10c )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("k95069-922_ucc_10", 0x0000, 0x2000, CRC(2232c1c4) SHA1(fd282ba7ce7ac28834c860cec2cca398aec1b3f3) )
ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD("k95069-922_ucc_10", 0x0000, 0x1000, CRC(2232c1c4) SHA1(fd282ba7ce7ac28834c860cec2cca398aec1b3f3) )
ROM_CONTINUE( 0x2000, 0x1000 )
ROM_END
} // anonymous namespace

2
src/mame/drivers/saitek_ssystem3.cpp
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@ -76,7 +76,7 @@ BTANB (ssystem3):
#include "machine/nvram.h"
#include "sound/dac.h"
#include "sound/volt_reg.h"
//#include "video/hlcd0438.h"
#include "video/hlcd0438.h"
#include "video/md4330b.h"
#include "video/pwm.h"