diff --git a/src/emu/cpu/m6502/ddeco16.lst b/src/emu/cpu/m6502/ddeco16.lst
index e5c8fa7a8e3..3a41088c777 100644
--- a/src/emu/cpu/m6502/ddeco16.lst
+++ b/src/emu/cpu/m6502/ddeco16.lst
@@ -1,5 +1,5 @@
 # deco16 - deco variant
-brk_imp		ora_idx		ill_non		ill_non		ill_non		ora_zpg		asl_zpg		ill_non		php_imp		ora_imm		asl_acc		u0B_zpg		ill_non		ora_aba		asl_aba		ill_non
+brk_16_imp	ora_idx		ill_non		ill_non		ill_non		ora_zpg		asl_zpg		ill_non		php_imp		ora_imm		asl_acc		u0B_zpg		ill_non		ora_aba		asl_aba		ill_non
 bpl_rel		ora_idy		ill_non		u13_zpg		ill_non		ora_zpx		asl_zpx		ill_non		clc_imp		ora_aby		ill_non		ill_non		ill_non		ora_abx		asl_abx		ill_non
 jsr_adr		and_idx		ill_non		u23_zpg		bit_zpg		and_zpg		rol_zpg		ill_non		plp_imp		and_imm		rol_acc		ill_non		bit_aba		and_aba		rol_aba		ill_non
 bmi_rel		and_idy		ill_non		ill_non		ill_non		and_zpx		rol_zpx		ill_non		sec_imp		and_aby		ill_non		ill_non		ill_non		and_abx		rol_abx		u3F_zpg
@@ -15,4 +15,4 @@ cpy_imm		cmp_idx		ill_non		ill_non		cpy_zpg		cmp_zpg		dec_zpg		ill_non		iny_imp
 bne_rel		cmp_idy		ill_non		ill_non		ill_non		cmp_zpx		dec_zpx		ill_non		cld_imp		cmp_aby		ill_non		ill_non		ill_non		cmp_abx		dec_abx		ill_non
 cpx_imm		sbc_idx		ill_non		ill_non		cpx_zpg		sbc_zpg		inc_zpg		ill_non		inx_imp		sbc_imm		nop_imp		ill_non		cpx_aba		sbc_aba		inc_aba		ill_non
 beq_rel		sbc_idy		ill_non		ill_non		ill_non		sbc_zpx		inc_zpx		ill_non		sed_imp		sbc_aby		ill_non		ill_non		ill_non		sbc_abx		inc_abx		ill_non
-reset
+reset_16
diff --git a/src/emu/cpu/m6502/deco16.h b/src/emu/cpu/m6502/deco16.h
index 1d7548a06a7..3e52820cd1e 100644
--- a/src/emu/cpu/m6502/deco16.h
+++ b/src/emu/cpu/m6502/deco16.h
@@ -61,6 +61,7 @@ protected:
 
 #define O(o) void o ## _full(); void o ## _partial()
 
+	O(brk_16_imp);
 	O(ill_non);
 	O(u0B_zpg);
 	O(u13_zpg);
@@ -74,6 +75,8 @@ protected:
 	O(uBB_zpg);
 	O(vbl_zpg);
 
+	O(reset_16);
+
 #undef O
 };
 
diff --git a/src/emu/cpu/m6502/odeco16.lst b/src/emu/cpu/m6502/odeco16.lst
index e6035e751bf..cf8b75455d6 100644
--- a/src/emu/cpu/m6502/odeco16.lst
+++ b/src/emu/cpu/m6502/odeco16.lst
@@ -1,4 +1,33 @@
 # deco 16 opcodes
+brk_16_imp
+	// The 6502 bug when a nmi occurs in a brk is reproduced (case !irq_taken && nmi_state)
+	if(irq_taken) {
+		read_pc_noinc();
+	} else {
+		read_pc();
+	}
+	write(SP, PC >> 8);
+	dec_SP();
+	write(SP, PC);
+	dec_SP();
+	write(SP, irq_taken ? P & ~F_B : P);
+	dec_SP();
+	if(nmi_state) {
+		PC = read_direct(0xfff7);
+		PC = set_h(PC, read_direct(0xfff6));
+		nmi_state = false;
+		standard_irq_callback(NMI_LINE);
+	} else {
+		PC = read_direct(0xfff3);
+		PC = set_h(PC, read_direct(0xfff2));
+		if(irq_taken)
+			standard_irq_callback(IRQ_LINE);
+	}
+	irq_taken = false;
+	P |= F_I; // Do *not* move after the prefetch
+	prefetch();
+	inst_state = -1;
+
 ill_non
 	logerror("%s: Unimplemented instruction %02x\n", tag(), inst_state);
 	prefetch();
@@ -63,3 +92,10 @@ vbl_zpg
 	if(DECO16_VERBOSE)
 		logerror("%s: VBL %02x (%04x)\n", tag(), NPC, TMP2);
 	prefetch();
+
+#   exceptions
+reset_16
+	PC = read_direct(0xfff1);
+	PC = set_h(PC, read_direct(0xfff0));
+	prefetch();
+	inst_state = -1;