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arm: add back wrong interrupt handling and make it an option (nw)

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This commit is contained in:
hap 2019-05-30 18:51:16 +02:00
parent ea8383057b
commit b48f4470cd
3 changed files with 18 additions and 4 deletions
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1
src/devices/bus/isa/chessm.cpp
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@ -137,6 +137,7 @@ void isa8_chessm_device::device_add_mconfig(machine_config &config)
ARM(config, m_maincpu, 30_MHz_XTAL/2); ARM(config, m_maincpu, 30_MHz_XTAL/2);
m_maincpu->set_addrmap(AS_PROGRAM, &isa8_chessm_device::chessm_mem); m_maincpu->set_addrmap(AS_PROGRAM, &isa8_chessm_device::chessm_mem);
m_maincpu->set_copro_type(arm_cpu_device::copro_type::VL86C020); m_maincpu->set_copro_type(arm_cpu_device::copro_type::VL86C020);
m_maincpu->set_nested_irq_hack(false);
GENERIC_LATCH_8(config, m_mainlatch); GENERIC_LATCH_8(config, m_mainlatch);
GENERIC_LATCH_8(config, m_sublatch); GENERIC_LATCH_8(config, m_sublatch);

19
src/devices/cpu/arm/arm.cpp
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@ -4,8 +4,12 @@
ARM 2/3/6 Emulation (26 bit address bus) ARM 2/3/6 Emulation (26 bit address bus)
Todo: Todo:
Timing - Currently very approximated, nothing relies on proper timing so far. - Get rid of m_nested_irq_hack, interrupts don't work like that but several MAME
IRQ timing not yet correct (again, nothing is affected by this so far). drivers rely on it since it's been in arm.cpp for so long
- Interrupts are currently implemented like HOLD_LINE for everything, with the way it
resets pending interrupts when taken, again wrong
- Timing - Currently very approximated, nothing relies on proper timing so far.
- IRQ timing not yet correct (again, nothing is affected by this so far).
Recent changes (2005): Recent changes (2005):
Fixed software interrupts Fixed software interrupts
@ -243,6 +247,7 @@ arm_cpu_device::arm_cpu_device(const machine_config &mconfig, device_type type,
, m_program_config("program", endianness, 32, 26, 0) , m_program_config("program", endianness, 32, 26, 0)
, m_endian(endianness) , m_endian(endianness)
, m_copro_type(copro_type::UNKNOWN_CP15) , m_copro_type(copro_type::UNKNOWN_CP15)
, m_nested_irq_hack(true)
{ {
std::fill(std::begin(m_sArmRegister), std::end(m_sArmRegister), 0); std::fill(std::begin(m_sArmRegister), std::end(m_sArmRegister), 0);
} }
@ -488,11 +493,17 @@ void arm_cpu_device::execute_set_input(int irqline, int state)
switch (irqline) switch (irqline)
{ {
case ARM_IRQ_LINE: /* IRQ */ case ARM_IRQ_LINE: /* IRQ */
m_pendingIrq = state ? 1 : 0; if (state && (!m_nested_irq_hack || (R15&0x3)!=eARM_MODE_IRQ)) /* Don't allow nested IRQs */
m_pendingIrq=1;
else
m_pendingIrq=0;
break; break;
case ARM_FIRQ_LINE: /* FIRQ */ case ARM_FIRQ_LINE: /* FIRQ */
m_pendingFiq = state ? 1 : 0; if (state && (!m_nested_irq_hack || (R15&0x3)!=eARM_MODE_FIQ)) /* Don't allow nested FIRQs */
m_pendingFiq=1;
else
m_pendingFiq=0;
break; break;
} }

2
src/devices/cpu/arm/arm.h
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@ -30,6 +30,7 @@ public:
arm_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); arm_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void set_copro_type(copro_type type) { m_copro_type = type; } void set_copro_type(copro_type type) { m_copro_type = type; }
void set_nested_irq_hack(bool enable) { m_nested_irq_hack = enable; }
protected: protected:
enum enum
@ -74,6 +75,7 @@ protected:
std::function<u32 (offs_t)> m_pr32; std::function<u32 (offs_t)> m_pr32;
endianness_t m_endian; endianness_t m_endian;
copro_type m_copro_type; copro_type m_copro_type;
bool m_nested_irq_hack;
void cpu_write32( int addr, uint32_t data ); void cpu_write32( int addr, uint32_t data );
void cpu_write8( int addr, uint8_t data ); void cpu_write8( int addr, uint8_t data );