ccastles: Add addressable latches (nw)

This commit is contained in:
AJR 2018-05-31 15:03:03 -04:00
parent 8e6b484e86
commit b4ef226b83
3 changed files with 36 additions and 47 deletions

View File

@ -188,8 +188,6 @@ void ccastles_state::machine_start()
{
rectangle visarea;
m_leds.resolve();
/* initialize globals */
m_syncprom = memregion("proms")->base() + 0x000;
@ -222,7 +220,6 @@ void ccastles_state::machine_start()
/* setup for save states */
save_item(NAME(m_irq_state));
save_item(NAME(m_nvram_store));
}
@ -250,21 +247,9 @@ WRITE8_MEMBER(ccastles_state::irq_ack_w)
}
WRITE8_MEMBER(ccastles_state::led_w)
template<int C> WRITE_LINE_MEMBER(ccastles_state::ccounter_w)
{
m_leds[offset] = BIT(~data, 0);
}
WRITE8_MEMBER(ccastles_state::ccounter_w)
{
machine().bookkeeping().coin_counter_w(offset, data & 1);
}
WRITE8_MEMBER(ccastles_state::bankswitch_w)
{
membank("bank1")->set_entry(data & 1);
machine().bookkeeping().coin_counter_w(C, state);
}
@ -294,11 +279,10 @@ WRITE8_MEMBER(ccastles_state::nvram_recall_w)
}
WRITE8_MEMBER(ccastles_state::nvram_store_w)
WRITE_LINE_MEMBER(ccastles_state::nvram_store_w)
{
m_nvram_store[offset] = data & 1;
m_nvram_4b->store(~m_nvram_store[0] & m_nvram_store[1]);
m_nvram_4a->store(~m_nvram_store[0] & m_nvram_store[1]);
m_nvram_4b->store(!m_outlatch[0]->q2_r() && m_outlatch[0]->q3_r());
m_nvram_4a->store(!m_outlatch[0]->q2_r() && m_outlatch[0]->q3_r());
}
@ -340,10 +324,7 @@ void ccastles_state::main_map(address_map &map)
map(0x9d00, 0x9d7f).w(this, FUNC(ccastles_state::ccastles_vscroll_w));
map(0x9d80, 0x9dff).w(this, FUNC(ccastles_state::irq_ack_w));
map(0x9e00, 0x9e7f).w("watchdog", FUNC(watchdog_timer_device::reset_w));
map(0x9e80, 0x9e81).mirror(0x0078).w(this, FUNC(ccastles_state::led_w));
map(0x9e82, 0x9e83).mirror(0x0078).w(this, FUNC(ccastles_state::nvram_store_w));
map(0x9e85, 0x9e86).mirror(0x0078).w(this, FUNC(ccastles_state::ccounter_w));
map(0x9e87, 0x9e87).mirror(0x0078).w(this, FUNC(ccastles_state::bankswitch_w));
map(0x9e80, 0x9e87).mirror(0x0078).w("outlatch0", FUNC(ls259_device::write_d0));
map(0x9f00, 0x9f07).mirror(0x0078).w(this, FUNC(ccastles_state::ccastles_video_control_w));
map(0x9f80, 0x9fbf).mirror(0x0040).w(this, FUNC(ccastles_state::ccastles_paletteram_w));
map(0xa000, 0xdfff).bankr("bank1");
@ -462,6 +443,17 @@ MACHINE_CONFIG_START(ccastles_state::ccastles)
MCFG_DEVICE_ADD("maincpu", M6502, MASTER_CLOCK/8)
MCFG_DEVICE_PROGRAM_MAP(main_map)
MCFG_DEVICE_ADD("outlatch0", LS259, 0) // 8N
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(OUTPUT("led0")) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(OUTPUT("led1")) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(*this, ccastles_state, nvram_store_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(*this, ccastles_state, nvram_store_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(*this, ccastles_state, ccounter_w<0>))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(*this, ccastles_state, ccounter_w<1>))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(MEMBANK("bank1"))
MCFG_DEVICE_ADD("outlatch1", LS259, 0) // 6P
MCFG_WATCHDOG_ADD("watchdog")
MCFG_WATCHDOG_VBLANK_INIT("screen", 8)
@ -513,10 +505,10 @@ ROM_START( ccastles )
ROM_LOAD( "136022-107.8b", 0x2000, 0x2000, CRC(39960b7d) SHA1(82bdf764ac23e72598883283c5e957169387abd4) )
ROM_REGION( 0x0400, "proms", 0 )
ROM_LOAD( "82s129-136022-108.7k", 0x0000, 0x0100, CRC(6ed31e3b) SHA1(c3f3e4e7f313ecfd101cc52dfc44bd6b51a2ac88) )
ROM_LOAD( "82s129-136022-109.6l", 0x0100, 0x0100, CRC(b3515f1a) SHA1(c1bf077242481ef2f958580602b8113532b58612) )
ROM_LOAD( "82s129-136022-110.11l", 0x0200, 0x0100, CRC(068bdc7e) SHA1(ae155918fdafd14299bc448b43eed8ad9c1ef5ef) )
ROM_LOAD( "82s129-136022-111.10k", 0x0300, 0x0100, CRC(c29c18d9) SHA1(278bf61a290ae72ddaae2bafb4ab6739d3fb6238) )
ROM_LOAD( "82s129-136022-108.7k", 0x0000, 0x0100, CRC(6ed31e3b) SHA1(c3f3e4e7f313ecfd101cc52dfc44bd6b51a2ac88) ) // vertical sync generation
ROM_LOAD( "82s129-136022-109.6l", 0x0100, 0x0100, CRC(b3515f1a) SHA1(c1bf077242481ef2f958580602b8113532b58612) ) // address decoding
ROM_LOAD( "82s129-136022-110.11l", 0x0200, 0x0100, CRC(068bdc7e) SHA1(ae155918fdafd14299bc448b43eed8ad9c1ef5ef) ) // DRAM write protection
ROM_LOAD( "82s129-136022-111.10k", 0x0300, 0x0100, CRC(c29c18d9) SHA1(278bf61a290ae72ddaae2bafb4ab6739d3fb6238) ) // color selection
ROM_END

View File

@ -11,6 +11,7 @@
#pragma once
#include "cpu/m6502/m6502.h"
#include "machine/74259.h"
#include "machine/x2212.h"
#include "screen.h"
@ -21,13 +22,13 @@ public:
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_nvram_4b(*this, "nvram_4b"),
m_nvram_4a(*this, "nvram_4a") ,
m_nvram_4a(*this, "nvram_4a"),
m_outlatch(*this, "outlatch%u", 0U),
m_videoram(*this, "videoram"),
m_spriteram(*this, "spriteram"),
m_gfxdecode(*this, "gfxdecode"),
m_screen(*this, "screen"),
m_palette(*this, "palette"),
m_leds(*this, "led%u", 0U)
m_palette(*this, "palette")
{ }
DECLARE_CUSTOM_INPUT_MEMBER(get_vblank);
@ -35,12 +36,10 @@ public:
protected:
DECLARE_WRITE8_MEMBER(irq_ack_w);
DECLARE_WRITE8_MEMBER(led_w);
DECLARE_WRITE8_MEMBER(ccounter_w);
DECLARE_WRITE8_MEMBER(bankswitch_w);
template<int C> DECLARE_WRITE_LINE_MEMBER(ccounter_w);
DECLARE_READ8_MEMBER(leta_r);
DECLARE_WRITE8_MEMBER(nvram_recall_w);
DECLARE_WRITE8_MEMBER(nvram_store_w);
DECLARE_WRITE_LINE_MEMBER(nvram_store_w);
DECLARE_READ8_MEMBER(nvram_r);
DECLARE_WRITE8_MEMBER(nvram_w);
DECLARE_WRITE8_MEMBER(ccastles_hscroll_w);
@ -66,6 +65,8 @@ private:
required_device<m6502_device> m_maincpu;
required_device<x2212_device> m_nvram_4b;
required_device<x2212_device> m_nvram_4a;
required_device_array<ls259_device, 2> m_outlatch;
/* memory pointers */
required_shared_ptr<uint8_t> m_videoram;
required_shared_ptr<uint8_t> m_spriteram;
@ -73,7 +74,6 @@ private:
required_device<gfxdecode_device> m_gfxdecode;
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;
output_finder<2> m_leds;
/* video-related */
const uint8_t *m_syncprom;
@ -83,7 +83,6 @@ private:
double m_rweights[3];
double m_gweights[3];
double m_bweights[3];
uint8_t m_video_control[8];
uint8_t m_bitmode_addr[2];
uint8_t m_hscroll;
uint8_t m_vscroll;
@ -93,7 +92,6 @@ private:
int m_vblank_end;
emu_timer *m_irq_timer;
uint8_t m_irq_state;
uint8_t m_nvram_store[2];
};
#endif // MAME_INCLUDES_CCASTLES_H

View File

@ -36,7 +36,6 @@ void ccastles_state::video_start()
m_screen->register_screen_bitmap(m_spritebitmap);
/* register for savestates */
save_item(NAME(m_video_control));
save_item(NAME(m_bitmode_addr));
save_item(NAME(m_hscroll));
save_item(NAME(m_vscroll));
@ -66,7 +65,7 @@ WRITE8_MEMBER(ccastles_state::ccastles_vscroll_w)
WRITE8_MEMBER(ccastles_state::ccastles_video_control_w)
{
/* only D3 matters */
m_video_control[offset] = (data >> 3) & 1;
m_outlatch[1]->write_bit(offset, BIT(data, 3));
}
@ -166,18 +165,18 @@ inline void ccastles_state::ccastles_write_vram( uint16_t addr, uint8_t data, ui
inline void ccastles_state::bitmode_autoinc( )
{
/* auto increment in the x-direction if it's enabled */
if (!m_video_control[0]) /* /AX */
if (!m_outlatch[1]->q0_r()) /* /AX */
{
if (!m_video_control[2]) /* /XINC */
if (!m_outlatch[1]->q2_r()) /* /XINC */
m_bitmode_addr[0]++;
else
m_bitmode_addr[0]--;
}
/* auto increment in the y-direction if it's enabled */
if (!m_video_control[1]) /* /AY */
if (!m_outlatch[1]->q1_r()) /* /AY */
{
if (!m_video_control[3]) /* /YINC */
if (!m_outlatch[1]->q3_r()) /* /YINC */
m_bitmode_addr[1]++;
else
m_bitmode_addr[1]--;
@ -255,8 +254,8 @@ WRITE8_MEMBER(ccastles_state::ccastles_bitmode_addr_w)
uint32_t ccastles_state::screen_update_ccastles(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
uint8_t *spriteaddr = &m_spriteram[m_video_control[7] * 0x100]; /* BUF1/BUF2 */
int flip = m_video_control[4] ? 0xff : 0x00; /* PLAYER2 */
uint8_t *spriteaddr = &m_spriteram[m_outlatch[1]->q7_r() * 0x100]; /* BUF1/BUF2 */
int flip = m_outlatch[1]->q4_r() ? 0xff : 0x00; /* PLAYER2 */
pen_t black = m_palette->black_pen();
int x, y, offs;