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model1: TGP interface fixes [O. Galibert]

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This commit is contained in:
Olivier Galibert 2019-10-04 12:02:25 +02:00
parent c2c181c351
commit b51ae75c3a
4 changed files with 36 additions and 34 deletions
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22
src/devices/cpu/mb86233/mb86233.cpp
View File

@ -634,7 +634,7 @@ u32 mb86233_device::read_reg(u32 r)
case 0x34: return m_rpc;
default:
logerror("unimplemented read_reg(%02x)\n", r);
logerror("unimplemented read_reg(%02x) (%x)\n", r, m_ppc);
return 0;
}
}
@ -696,7 +696,7 @@ void mb86233_device::write_reg(u32 r, u32 v)
case 0x3c: m_mask = v; break;
default:
logerror("unimplemented write_reg(%02x, %08x)\n", r, v);
logerror("unimplemented write_reg(%02x, %08x) (%x)\n", r, v, m_ppc);
break;
}
}
@ -825,8 +825,8 @@ void mb86233_device::execute_run()
}
case 1: {
// mov mem + 0x200, mem (e)
u32 ea = ea_pre_0(r1) + 0x200*0;
// mov mem, mem (e)
u32 ea = ea_pre_0(r1);
u32 v = m_data->read_dword(ea);
if(m_stall) goto do_stall;
ea_post_0(r1);
@ -941,14 +941,14 @@ void mb86233_device::execute_run()
}
default:
logerror("unhandler ld/mov subop 7/%x\n", r2 >> 6);
logerror("unhandled ld/mov subop 7/%x (%x)\n", r2 >> 6, m_ppc);
break;
}
break;
}
default:
logerror("unhandler ld/mov subop %x\n", op);
logerror("unhandled ld/mov subop %x (%x)\n", op, m_ppc);
break;
}
@ -971,7 +971,7 @@ void mb86233_device::execute_run()
break;
default:
logerror("unimplemented opcode 0d/%x\n", sub2);
logerror("unimplemented opcode 0d/%x (%x)\n", sub2, m_ppc);
break;
}
break;
@ -1030,7 +1030,7 @@ void mb86233_device::execute_run()
break;
default:
logerror("unimplemented opcode 0f/%x\n", sub2);
logerror("unimplemented opcode 0f/%x (%x)\n", sub2, m_ppc);
break;
}
@ -1096,7 +1096,7 @@ void mb86233_device::execute_run()
break;
default:
logerror("unimplemented condition %x\n", cond);
logerror("unimplemented condition %x (%x)\n", cond, m_ppc);
break;
}
if(invert)
@ -1161,7 +1161,7 @@ void mb86233_device::execute_run()
}
default:
logerror("unimplemented branch subtype %x\n", subtype);
logerror("unimplemented branch subtype %x (%x)\n", subtype, m_ppc);
break;
}
}
@ -1189,7 +1189,7 @@ void mb86233_device::execute_run()
}
default:
logerror("unimplemented opcode type %02x\n", (opcode >> 26) & 0x3f);
logerror("unimplemented opcode type %02x (%x)\n", (opcode >> 26) & 0x3f, m_ppc);
break;
}

2
src/devices/cpu/mb86233/mb86233d.cpp
View File

@ -311,7 +311,7 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const
break;
case 1:
util::stream_format(stream, "mov {1} %s, %s (e)", memory(r1, false, false), memory(r2, true, false));
util::stream_format(stream, "mov %s, %s (e)", memory(r1, false, false), memory(r2, true, false));
break;
case 2:

2
src/mame/includes/model1.h
View File

@ -159,7 +159,7 @@ private:
u32 m_copro_isqrt_base;
u32 m_copro_atan_base[4];
u32 m_copro_data_base;
u32 m_copro_ram_adr;
u32 m_copro_ram_adr[4];
uint16_t m_r360_state;
DECLARE_READ8_MEMBER(r360_r);

44
src/mame/machine/model1.cpp
View File

@ -10,6 +10,8 @@
#include "cpu/v60/v60.h"
#include "includes/model1.h"
#define DS 0x8000
#define TGP_FUNCTION(name) void name()
void model1_state::fifoout_push(u32 data)
@ -58,12 +60,12 @@ float model1_state::tsin(s16 a)
u16 model1_state::ram_get_i()
{
return m_copro_ram_data[(m_copro_hle_ram_scan_adr++) & 0x7fff];
return m_copro_ram_data[(m_copro_hle_ram_scan_adr++) & (DS-1)];
}
float model1_state::ram_get_f()
{
return u2f(m_copro_ram_data[(m_copro_hle_ram_scan_adr++) & 0x7fff]);
return u2f(m_copro_ram_data[(m_copro_hle_ram_scan_adr++) & (DS-1)]);
}
TGP_FUNCTION( model1_state::fadd )
@ -1728,9 +1730,9 @@ void model1_state::machine_start()
m_digits.resolve();
m_outs.resolve();
m_copro_ram_data = std::make_unique<u32[]>(0x8000);
m_copro_ram_data = std::make_unique<u32[]>(DS);
save_pointer(NAME(m_copro_ram_data), 0x8000);
save_pointer(NAME(m_copro_ram_data), DS);
save_item(NAME(m_v60_copro_ram_adr));
save_item(NAME(m_copro_hle_ram_scan_adr));
save_item(NAME(m_v60_copro_ram_latch));
@ -1799,13 +1801,16 @@ void model1_state::machine_start()
void model1_state::copro_reset()
{
m_v60_copro_ram_adr = 0;
m_copro_ram_adr = 0;
m_copro_ram_adr[0] = 0;
m_copro_ram_adr[1] = 0;
m_copro_ram_adr[2] = 0;
m_copro_ram_adr[3] = 0;
m_copro_sincos_base = 0;
m_copro_inv_base = 0;
m_copro_isqrt_base = 0;
std::fill(std::begin(m_copro_atan_base), std::end(m_copro_atan_base), 0);
std::fill(std::begin(m_v60_copro_ram_latch), std::end(m_v60_copro_ram_latch), 0);
memset(m_copro_ram_data.get(), 0, 0x8000*4);
memset(m_copro_ram_data.get(), 0, DS*4);
if(!m_tgp_copro) {
m_acc = 0;
@ -1836,10 +1841,10 @@ READ16_MEMBER(model1_state::v60_copro_ram_r)
u16 r;
if (!offset)
r = m_copro_ram_data[m_v60_copro_ram_adr & 0x7fff];
r = m_copro_ram_data[m_v60_copro_ram_adr & (DS-1)];
else {
r = m_copro_ram_data[m_v60_copro_ram_adr & 0x7fff] >> 16;
r = m_copro_ram_data[m_v60_copro_ram_adr & (DS-1)] >> 16;
if(m_v60_copro_ram_adr & 0x8000)
m_v60_copro_ram_adr ++;
@ -1854,7 +1859,7 @@ WRITE16_MEMBER(model1_state::v60_copro_ram_w)
if (offset) {
u32 v = m_v60_copro_ram_latch[0] | (m_v60_copro_ram_latch[1] << 16);
m_copro_ram_data[m_v60_copro_ram_adr & 0x7fff] = v;
m_copro_ram_data[m_v60_copro_ram_adr & (DS-1)] = v;
if(m_v60_copro_ram_adr & 0x8000)
m_v60_copro_ram_adr++;
}
@ -1898,8 +1903,8 @@ void model1_state::copro_data_map(address_map &map)
void model1_state::copro_io_map(address_map &map)
{
map(0x0008, 0x0008).rw(FUNC(model1_state::copro_ramadr_r), FUNC(model1_state::copro_ramadr_w));
map(0x0009, 0x0009).rw(FUNC(model1_state::copro_ramdata_r), FUNC(model1_state::copro_ramdata_w));
map(0x0000, 0x0000).rw(FUNC(model1_state::copro_ramadr_r), FUNC(model1_state::copro_ramadr_w)).select(0x18);
map(0x0001, 0x0001).rw(FUNC(model1_state::copro_ramdata_r), FUNC(model1_state::copro_ramdata_w)).select(0x18);
map(0x0020, 0x0023).rw(FUNC(model1_state::copro_sincos_r), FUNC(model1_state::copro_sincos_w));
map(0x0024, 0x0027).rw(FUNC(model1_state::copro_atan_r), FUNC(model1_state::copro_atan_w));
map(0x0028, 0x0029).rw(FUNC(model1_state::copro_inv_r), FUNC(model1_state::copro_inv_w));
@ -1915,24 +1920,24 @@ void model1_state::copro_rf_map(address_map &map)
WRITE32_MEMBER(model1_state::copro_ramadr_w)
{
COMBINE_DATA(&m_copro_ram_adr);
COMBINE_DATA(&m_copro_ram_adr[offset >> 3]);
}
READ32_MEMBER(model1_state::copro_ramadr_r)
{
return m_copro_ram_adr;
return m_copro_ram_adr[offset >> 3];
}
WRITE32_MEMBER(model1_state::copro_ramdata_w)
{
COMBINE_DATA(&m_copro_ram_data[m_copro_ram_adr & 0x7fff]);
m_copro_ram_adr ++;
COMBINE_DATA(&m_copro_ram_data[m_copro_ram_adr[offset >> 3] & (DS-1)]);
m_copro_ram_adr[offset >> 3] ++;
}
READ32_MEMBER(model1_state::copro_ramdata_r)
{
u32 val = m_copro_ram_data[m_copro_ram_adr & 0x7fff];
m_copro_ram_adr ++;
u32 val = m_copro_ram_data[m_copro_ram_adr[offset >> 3] & (DS-1)];
m_copro_ram_adr[offset >> 3] ++;
return val;
}
@ -1996,10 +2001,7 @@ WRITE32_MEMBER(model1_state::copro_atan_w)
READ32_MEMBER(model1_state::copro_atan_r)
{
offs_t index = (m_copro_atan_base[3] << 1);
if(index == 0x4000)
index = 0x3fff;
u32 result = m_copro_tables[index | 0x4000];
u32 result = m_copro_tables[(m_copro_atan_base[3] & 0x3fff) | 0x4000];
bool s0 = m_copro_atan_base[0] & 0x80000000;
bool s1 = m_copro_atan_base[1] & 0x80000000;