mirror of
https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
Merge pull request #67 from yz70s/master
Chihiro vertex programs update [Samuele Zannoli]
This commit is contained in:
Miodrag Milanović
commit
b545914a3c
@ -226,6 +226,9 @@ private:
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inline INT32 round_coordinate(_BaseType value)
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{
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INT32 result = poly_floor(value);
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if ((value > 0) && (result < 0))
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return INT_MAX-1;
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return result + (value - _BaseType(result) > _BaseType(0.5));
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}
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File diff suppressed because it is too large
Load Diff
539
src/mame/includes/chihiro.h
Normal file
539
src/mame/includes/chihiro.h
Normal file
@ -0,0 +1,539 @@
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/*
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* geforce 3d (NV2A) vertex program disassembler
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*/
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class vertex_program_disassembler {
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static const char *srctypes[];
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static const char *scaops[];
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static const int scapar2[];
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static const char *vecops[];
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static const int vecpar2[];
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static const char *vecouts[];
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static const char compchar[];
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int o[6];
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int state;
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struct sourcefields
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{
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int Sign;
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int SwizzleX;
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int SwizzleY;
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int SwizzleZ;
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int SwizzleW;
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int TempIndex;
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int ParameterType;
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};
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struct fields
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{
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int ScaOperation;
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int VecOperation;
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int SourceConstantIndex;
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int InputIndex;
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sourcefields src[3];
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int VecTempWriteMask;
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int VecTempIndex;
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int ScaTempWriteMask;
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int OutputWriteMask;
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int OutputSelect;
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int OutputIndex;
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int MultiplexerControl;
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int Usea0x;
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int EndOfProgram;
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};
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fields f;
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void decodefields(unsigned int *dwords, int offset, fields &decoded);
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int disassemble_mask(int mask, char *s);
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int disassemble_swizzle(sourcefields f, char *s);
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int disassemble_source(sourcefields f, fields fi, char *s);
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int disassemble_output(fields f, char *s);
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int output_types(fields f, int *o);
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public:
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vertex_program_disassembler() { state = 0; }
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int disassemble(unsigned int *instruction, char *line);
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};
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/*
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* geforce 3d (NV2A) vertex structure
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*/
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struct vertex_nv {
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union {
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float fv[4];
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UINT32 iv[4];
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} attribute[16];
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};
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/*
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* geforce 3d (NV2A) vertex program simulator
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*/
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class vertex_program_simulator {
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public:
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vertex_program_simulator();
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// input vertex
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vertex_nv *input;
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// input parameters
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union constant {
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float fv[4];
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unsigned int iv[4];
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} c_constant[192];
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union temp {
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float fv[4];
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unsigned int iv[4];
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} r_temp[32];
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// output vertex
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vertex_nv *output;
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// instructions
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struct instruction {
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unsigned int i[4];
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int modified;
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struct decoded {
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int SwizzleA[4], SignA, ParameterTypeA, TempIndexA;
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int SwizzleB[4], SignB, ParameterTypeB, TempIndexB;
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int SwizzleC[4], SignC, ParameterTypeC, TempIndexC;
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int VecOperation, ScaOperation;
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int OutputWriteMask, MultiplexerControl;
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int VecTempWriteMask, ScaTempWriteMask;
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int VecTempIndex, OutputIndex;
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int InputIndex;
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int SourceConstantIndex;
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int OutputSelect;
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int Usea0x;
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int EndOfProgram;
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} d;
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} op[256];
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public:
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void set_data(vertex_nv *in, vertex_nv *out);
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void reset();
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int step();
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void decode_instruction(int address);
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void execute();
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void jump(int address);
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void process(int address, vertex_nv *in, vertex_nv *out, int count);
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int status();
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private:
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void initialize_outputs();
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void initialize_temps();
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void initialize_constants();
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void generate_input(float t[4], int sign, int type, int temp, int swizzle[4]);
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void compute_vectorial_operation(float t[4], int instruction, float par[3 * 4]);
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void compute_scalar_operation(float t[4], int instruction, float par[3 * 4]);
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int ip;
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int a0x;
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};
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class nv2a_renderer; // forward declaration
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struct nvidia_object_data
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{
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nv2a_renderer *data;
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};
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/*
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* geforce 3d (NV2A) accellerator
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*/
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/* very simplified view
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there is a set of context objects
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context objects are stored in RAMIN
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each context object is identified by an handle stored in RAMHT
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each context object can be assigned to a channel
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to assign you give to the channel an handle for the object
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offset in ramht=(((((handle >> 11) xor handle) >> 11) xor handle) & 0x7ff)*8
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offset in ramht contains the handle itself
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offset in ramht+4 contains in the lower 16 bits the offset in RAMIN divided by 16
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objects have methods used to do drawing
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most methods set parameters, others actually draw
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*/
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class nv2a_renderer : public poly_manager<float, nvidia_object_data, 12, 8192>
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{
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public:
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nv2a_renderer(running_machine &machine) : poly_manager<float, nvidia_object_data, 12, 8192>(machine)
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{
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memset(channel, 0, sizeof(channel));
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memset(pfifo, 0, sizeof(pfifo));
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memset(pcrtc, 0, sizeof(pcrtc));
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memset(pmc, 0, sizeof(pmc));
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memset(ramin, 0, sizeof(ramin));
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computedilated();
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fb.allocate(640, 480);
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objectdata = &(object_data_alloc());
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objectdata->data = this;
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combiner.used = 0;
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combiner.lock = osd_lock_alloc();
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enabled_vertex_attributes = 0;
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indexesleft_count = 0;
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vertex_pipeline = 4;
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alpha_test_enabled = false;
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alpha_reference = 0;
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alpha_func = nv2a_renderer::ALWAYS;
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blending_enabled = false;
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blend_equation = nv2a_renderer::FUNC_ADD;
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blend_color = 0;
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blend_function_destination = nv2a_renderer::ZERO;
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blend_function_source = nv2a_renderer::ONE;
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logical_operation_enabled = false;
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logical_operation = nv2a_renderer::COPY;
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debug_grab_texttype = -1;
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debug_grab_textfile = NULL;
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memset(vertex_attribute_words, 0, sizeof(vertex_attribute_words));
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memset(vertex_attribute_offset, 0, sizeof(vertex_attribute_offset));
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}
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DECLARE_READ32_MEMBER(geforce_r);
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DECLARE_WRITE32_MEMBER(geforce_w);
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bool vblank_callback(screen_device &screen, bool state);
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UINT32 screen_update_callback(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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void render_texture_simple(INT32 scanline, const extent_t &extent, const nvidia_object_data &extradata, int threadid);
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void render_color(INT32 scanline, const extent_t &extent, const nvidia_object_data &extradata, int threadid);
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void render_register_combiners(INT32 scanline, const extent_t &extent, const nvidia_object_data &objectdata, int threadid);
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int geforce_commandkind(UINT32 word);
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UINT32 geforce_object_offset(UINT32 handle);
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void geforce_read_dma_object(UINT32 handle, UINT32 &offset, UINT32 &size);
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void geforce_exec_method(address_space &space, UINT32 channel, UINT32 subchannel, UINT32 method, UINT32 address, int &countlen);
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UINT32 texture_get_texel(int number, int x, int y);
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void write_pixel(int x, int y, UINT32 color);
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void combiner_initialize_registers(UINT32 argb8[6]);
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void combiner_initialize_stage(int stage_number);
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void combiner_initialize_final();
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void combiner_map_input(int stage_number); // map combiner registers to variables A..D
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void combiner_map_output(int stage_number); // map combiner calculation results to combiner registers
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void combiner_map_final_input(); // map final combiner registers to variables A..F
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void combiner_final_output(); // generate final combiner output
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float combiner_map_input_select(int code, int index); // get component index in register code
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float *combiner_map_input_select3(int code); // get pointer to register code
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float *combiner_map_output_select3(int code); // get pointer to register code for output
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float combiner_map_input_function(int code, float value); // apply input mapping function code to value
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void combiner_map_input_function3(int code, float *data); // apply input mapping function code to data
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void combiner_function_AB(float result[4]);
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void combiner_function_AdotB(float result[4]);
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void combiner_function_CD(float result[4]);
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void combiner_function_CdotD(float result[4]);
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void combiner_function_ABmuxCD(float result[4]);
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void combiner_function_ABsumCD(float result[4]);
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void combiner_compute_rgb_outputs(int index);
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void combiner_compute_a_outputs(int index);
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void combiner_argb8_float(UINT32 color, float reg[4]);
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UINT32 combiner_float_argb8(float reg[4]);
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UINT32 dilate0(UINT32 value, int bits);
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UINT32 dilate1(UINT32 value, int bits);
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void computedilated(void);
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void putpixtex(int xp, int yp, int up, int vp);
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int toggle_register_combiners_usage();
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void debug_grab_texture(int type, const char *filename);
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void debug_grab_vertex_program_slot(int slot, UINT32 *instruction);
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void savestate_items();
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void read_vertex(address_space & space, offs_t address, vertex_nv &vertex, int attrib);
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int read_vertices_0x1810(address_space & space, vertex_nv *destination, int offset, int limit);
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int read_vertices_0x1800(address_space & space, vertex_nv *destination, UINT32 address, int limit);
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int read_vertices_0x1818(address_space & space, vertex_nv *destination, UINT32 address, int limit);
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void convert_vertices_poly(vertex_nv *source, vertex_t *destination, int count);
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struct {
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UINT32 regs[0x80 / 4];
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struct {
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UINT32 objhandle;
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UINT32 objclass;
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UINT32 method[0x2000 / 4];
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} object;
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} channel[32][8];
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UINT32 pfifo[0x2000 / 4];
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UINT32 pcrtc[0x1000 / 4];
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UINT32 pmc[0x1000 / 4];
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UINT32 ramin[0x100000 / 4];
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UINT32 dma_offset[2];
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UINT32 dma_size[2];
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UINT32 vertexbuffer_address[16];
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int vertexbuffer_stride[16];
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int vertexbuffer_kind[16];
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int vertexbuffer_size[16];
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struct {
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int enabled;
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int sizeu;
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int sizev;
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int sizew;
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int dilate;
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int format;
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int rectangle_pitch;
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void *buffer;
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} texture[4];
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int primitives_count;
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int indexesleft_count;
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int indexesleft_first;
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UINT32 indexesleft[8];
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struct {
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float variable_A[4]; // 0=R 1=G 2=B 3=A
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float variable_B[4];
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float variable_C[4];
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float variable_D[4];
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float variable_E[4];
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float variable_F[4];
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float variable_G;
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float variable_EF[4];
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float variable_sumclamp[4];
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float function_RGBop1[4]; // 0=R 1=G 2=B
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float function_RGBop2[4];
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float function_RGBop3[4];
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float function_Aop1;
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float function_Aop2;
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float function_Aop3;
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float register_primarycolor[4]; // rw
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float register_secondarycolor[4];
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float register_texture0color[4];
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float register_texture1color[4];
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float register_texture2color[4];
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float register_texture3color[4];
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float register_color0[4];
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float register_color1[4];
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float register_spare0[4];
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float register_spare1[4];
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float register_fogcolor[4]; // ro
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float register_zero[4];
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float output[4];
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struct {
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float register_constantcolor0[4];
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float register_constantcolor1[4];
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int mapin_aA_input;
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int mapin_aA_component;
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int mapin_aA_mapping;
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int mapin_aB_input;
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int mapin_aB_component;
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int mapin_aB_mapping;
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int mapin_aC_input;
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int mapin_aC_component;
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int mapin_aC_mapping;
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int mapin_aD_input;
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int mapin_aD_component;
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int mapin_aD_mapping;
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int mapin_rgbA_input;
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int mapin_rgbA_component;
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int mapin_rgbA_mapping;
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int mapin_rgbB_input;
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int mapin_rgbB_component;
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int mapin_rgbB_mapping;
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int mapin_rgbC_input;
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int mapin_rgbC_component;
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int mapin_rgbC_mapping;
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int mapin_rgbD_input;
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int mapin_rgbD_component;
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int mapin_rgbD_mapping;
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int mapout_aCD_output;
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int mapout_aAB_output;
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int mapout_aSUM_output;
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int mapout_aCD_dotproduct;
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int mapout_aAB_dotproduct;
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int mapout_a_muxsum;
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int mapout_a_bias;
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int mapout_a_scale;
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int mapout_rgbCD_output;
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int mapout_rgbAB_output;
|
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int mapout_rgbSUM_output;
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int mapout_rgbCD_dotproduct;
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||||
int mapout_rgbAB_dotproduct;
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int mapout_rgb_muxsum;
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int mapout_rgb_bias;
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int mapout_rgb_scale;
|
||||
} stage[8];
|
||||
struct {
|
||||
float register_constantcolor0[4];
|
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float register_constantcolor1[4];
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int color_sum_clamp;
|
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int mapin_rgbA_input;
|
||||
int mapin_rgbA_component;
|
||||
int mapin_rgbA_mapping;
|
||||
int mapin_rgbB_input;
|
||||
int mapin_rgbB_component;
|
||||
int mapin_rgbB_mapping;
|
||||
int mapin_rgbC_input;
|
||||
int mapin_rgbC_component;
|
||||
int mapin_rgbC_mapping;
|
||||
int mapin_rgbD_input;
|
||||
int mapin_rgbD_component;
|
||||
int mapin_rgbD_mapping;
|
||||
int mapin_rgbE_input;
|
||||
int mapin_rgbE_component;
|
||||
int mapin_rgbE_mapping;
|
||||
int mapin_rgbF_input;
|
||||
int mapin_rgbF_component;
|
||||
int mapin_rgbF_mapping;
|
||||
int mapin_aG_input;
|
||||
int mapin_aG_component;
|
||||
int mapin_aG_mapping;
|
||||
} final;
|
||||
int stages;
|
||||
int used;
|
||||
osd_lock *lock;
|
||||
} combiner;
|
||||
bool alpha_test_enabled;
|
||||
int alpha_func;
|
||||
int alpha_reference;
|
||||
bool blending_enabled;
|
||||
int blend_equation;
|
||||
int blend_function_source;
|
||||
int blend_function_destination;
|
||||
UINT32 blend_color;
|
||||
bool logical_operation_enabled;
|
||||
int logical_operation;
|
||||
struct {
|
||||
float modelview[16];
|
||||
float modelview_inverse[16];
|
||||
float projection[16];
|
||||
float translate[4];
|
||||
float scale[4];
|
||||
} matrix;
|
||||
struct {
|
||||
vertex_program_simulator exec;
|
||||
int instructions;
|
||||
int upload_instruction_index;
|
||||
int upload_instruction_component;
|
||||
int start_instruction;
|
||||
int upload_parameter_index;
|
||||
int upload_parameter_component;
|
||||
} vertexprogram;
|
||||
int vertex_pipeline;
|
||||
int enabled_vertex_attributes;
|
||||
int vertex_attribute_words[16];
|
||||
int vertex_attribute_offset[16];
|
||||
bitmap_rgb32 fb;
|
||||
UINT32 dilated0[16][2048];
|
||||
UINT32 dilated1[16][2048];
|
||||
int dilatechose[256];
|
||||
nvidia_object_data *objectdata;
|
||||
int debug_grab_texttype;
|
||||
char *debug_grab_textfile;
|
||||
|
||||
enum NV2A_BEGIN_END {
|
||||
STOP = 0,
|
||||
POINTS = 1,
|
||||
LINES = 2,
|
||||
LINE_LOOP = 3,
|
||||
LINE_STRIP = 4,
|
||||
TRIANGLES = 5,
|
||||
TRIANGLE_STRIP = 6,
|
||||
TRIANGLE_FAN = 7,
|
||||
QUADS = 8,
|
||||
QUAD_STRIP = 9,
|
||||
POLYGON = 10
|
||||
};
|
||||
enum NV2A_VERTEX_ATTR {
|
||||
POS = 0,
|
||||
WEIGHT = 1,
|
||||
NORMAL = 2,
|
||||
COLOR0 = 3, // diffuse
|
||||
COLOR1 = 4, // specular
|
||||
FOG = 5,
|
||||
BACKCOLOR0 = 7, // diffuse
|
||||
BACKCOLOR1 = 8, // specular
|
||||
TEX0 = 9,
|
||||
TEX1 = 10,
|
||||
TEX2 = 11,
|
||||
TEX3 = 12
|
||||
};
|
||||
enum NV2A_VTXBUF_TYPE {
|
||||
NV2A_VTXBUF_TYPE_UNKNOWN_0 = 0, // used for vertex color ?
|
||||
NV2A_VTXBUF_TYPE_FLOAT = 2,
|
||||
NV2A_VTXBUF_TYPE_UBYTE = 4,
|
||||
NV2A_VTXBUF_TYPE_USHORT = 5,
|
||||
NV2A_VTXBUF_TYPE_UNKNOWN_6 = 6 // used for vertex color
|
||||
};
|
||||
enum NV2A_TEX_FORMAT {
|
||||
L8 = 0x0,
|
||||
I8 = 0x1,
|
||||
A1R5G5B5 = 0x2,
|
||||
A4R4G4B4 = 0x4,
|
||||
R5G6B5 = 0x5,
|
||||
A8R8G8B8 = 0x6,
|
||||
X8R8G8B8 = 0x7,
|
||||
INDEX8 = 0xb,
|
||||
DXT1 = 0xc,
|
||||
DXT3 = 0xe,
|
||||
DXT5 = 0xf,
|
||||
A1R5G5B5_RECT = 0x10,
|
||||
R5G6B5_RECT = 0x11,
|
||||
A8R8G8B8_RECT = 0x12,
|
||||
L8_RECT = 0x13,
|
||||
DSDT8_RECT = 0x17,
|
||||
A8L8 = 0x1a,
|
||||
I8_RECT = 0x1b,
|
||||
A4R4G4B4_RECT = 0x1d,
|
||||
R8G8B8_RECT = 0x1e,
|
||||
A8L8_RECT = 0x20,
|
||||
Z24 = 0x2a,
|
||||
Z24_RECT = 0x2b,
|
||||
Z16 = 0x2c,
|
||||
Z16_RECT = 0x2d,
|
||||
DSDT8 = 0x28,
|
||||
HILO16 = 0x33,
|
||||
HILO16_RECT = 0x36,
|
||||
HILO8 = 0x44,
|
||||
SIGNED_HILO8 = 0x45,
|
||||
HILO8_RECT = 0x46,
|
||||
SIGNED_HILO8_RECT = 0x47
|
||||
};
|
||||
enum NV2A_LOGIC_OP {
|
||||
CLEAR = 0x1500,
|
||||
AND = 0x1501,
|
||||
AND_REVERSE = 0x1502,
|
||||
COPY = 0x1503,
|
||||
AND_INVERTED = 0x1504,
|
||||
NOOP = 0x1505,
|
||||
XOR = 0x1506,
|
||||
OR = 0x1507,
|
||||
NOR = 0x1508,
|
||||
EQUIV = 0x1509,
|
||||
INVERT = 0x150a,
|
||||
OR_REVERSE = 0x150b,
|
||||
COPY_INVERTED = 0x150c,
|
||||
OR_INVERTED = 0x150d,
|
||||
NAND = 0x150e,
|
||||
SET = 0x150f
|
||||
};
|
||||
enum NV2A_BLEND_EQUATION {
|
||||
FUNC_ADD = 0x8006,
|
||||
MIN = 0x8007,
|
||||
MAX = 0x8008,
|
||||
FUNC_SUBTRACT = 0x800a,
|
||||
FUNC_REVERSE_SUBTRACT = 0x80b
|
||||
};
|
||||
enum NV2A_BLEND_FACTOR {
|
||||
ZERO = 0x0000,
|
||||
ONE = 0x0001,
|
||||
SRC_COLOR = 0x0300,
|
||||
ONE_MINUS_SRC_COLOR = 0x0301,
|
||||
SRC_ALPHA = 0x0302,
|
||||
ONE_MINUS_SRC_ALPHA = 0x0303,
|
||||
DST_ALPHA = 0x0304,
|
||||
ONE_MINUS_DST_ALPHA = 0x0305,
|
||||
DST_COLOR = 0x0306,
|
||||
ONE_MINUS_DST_COLOR = 0x0307,
|
||||
SRC_ALPHA_SATURATE = 0x0308,
|
||||
CONSTANT_COLOR = 0x8001,
|
||||
ONE_MINUS_CONSTANT_COLOR = 0x8002,
|
||||
CONSTANT_ALPHA = 0x8003,
|
||||
ONE_MINUS_CONSTANT_ALPHA = 0x8004
|
||||
};
|
||||
enum NV2A_COMPARISON_OP {
|
||||
NEVER = 0x0200,
|
||||
LESS = 0x0201,
|
||||
EQUAL = 0x0202,
|
||||
LEQUAL = 0x0203,
|
||||
GREATER = 0x0204,
|
||||
NOTEQUAL = 0x0205,
|
||||
GEQUAL = 0x0206,
|
||||
ALWAYS = 0x0207
|
||||
};
|
||||
enum NV2A_STENCIL_OP {
|
||||
ZEROOP = 0x0000,
|
||||
INVERTOP = 0x150a,
|
||||
KEEP = 0x1e00,
|
||||
REPLACE = 0x1e01,
|
||||
INCR = 0x1e02,
|
||||
DECR = 0x1e03,
|
||||
INCR_WRAP = 0x8507,
|
||||
DECR_WRAP = 0x8508
|
||||
};
|
||||
};
|
||||
@ -1695,7 +1695,7 @@ $(MAMEOBJ)/sega.a: \
|
||||
$(DRIVERS)/bingoc.o \
|
||||
$(DRIVERS)/blockade.o $(AUDIO)/blockade.o $(VIDEO)/blockade.o \
|
||||
$(DRIVERS)/calorie.o \
|
||||
$(DRIVERS)/chihiro.o \
|
||||
$(DRIVERS)/chihiro.o $(VIDEO)/chihiro.o \
|
||||
$(DRIVERS)/coolridr.o \
|
||||
$(DRIVERS)/deniam.o $(VIDEO)/deniam.o \
|
||||
$(DRIVERS)/dotrikun.o \
|
||||
|
||||
3528
src/mame/video/chihiro.c
Normal file
3528
src/mame/video/chihiro.c
Normal file
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user