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igs/igs_m027xa.cpp: Copied sound MCU interface and timer logic from igs_fear.cpp, use uploaded XOR tables when available. (#12743)
This commit is contained in:
mamehaze
GitHub
parent
7fdaa03bcf
commit
b558650344
@ -23,6 +23,10 @@ These games use the IGS027A processor.
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#include "screen.h"
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#define LOG_DEBUG (1U << 1)
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#define VERBOSE (LOG_DEBUG)
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#include "logmacro.h"
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namespace {
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class igs_m027xa_state : public driver_device
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@ -35,10 +39,13 @@ public:
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m_xa(*this, "xa"),
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m_ppi(*this, "ppi8255"),
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m_igs017_igs031(*this, "igs017_igs031"),
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m_screen(*this, "screen")
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m_screen(*this, "screen"),
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m_external_rom(*this, "user1")
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{ }
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void igs_mahjong_xa(machine_config &config);
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void igs_mahjong_xa_xor(machine_config &config);
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void igs_mahjong_xa_xor_disable(machine_config &config);
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void init_crzybugs();
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void init_crzybugsj();
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@ -48,6 +55,7 @@ public:
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protected:
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virtual void machine_start() override;
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virtual void machine_reset() override;
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virtual void video_start() override;
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private:
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@ -57,26 +65,105 @@ private:
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required_device<i8255_device> m_ppi;
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required_device<igs017_igs031_device> m_igs017_igs031;
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required_device<screen_device> m_screen;
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required_region_ptr<u32> m_external_rom;
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emu_timer *m_timer0;
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emu_timer *m_timer1;
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u32 m_xor_table[0x100];
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u8 m_port2_latch;
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u8 m_port0_latch;
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u32 m_irq_enable; // m_irq_enable and m_irq_pending are not currently hooked up
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u32 m_irq_pending; // it appears they will be needed to differentiate between IRQs from the XA and elsewhere though
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u32 m_xa_cmd;
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u32 m_xa_ret0;
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u32 m_xa_ret1;
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u8 m_port0_dat;
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s8 m_num_params;
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u8 m_port1_dat;
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u8 m_port2_dat;
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u8 m_port3_dat;
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u32 m_igs_40000014;
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TIMER_DEVICE_CALLBACK_MEMBER(interrupt);
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void pgm_create_dummy_internal_arm_region();
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void igs_mahjong_map(address_map &map);
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void main_map(address_map &map);
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void main_xor_map(address_map &map);
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void igs_70000100_w(u32 data);
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u32 m_igs_70000100 = 0;
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void igs027_trigger_irq(int num);
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u32 rnd_r()
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{
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return machine().rand();
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}
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u32 external_rom_r(offs_t offset);
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void xor_table_w(offs_t offset, u8 data);
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u32 xa_r(offs_t offset, u32 mem_mask);
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void xa_w(offs_t offset, u32 data, u32 mem_mask);
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void igs_40000014_w(offs_t offset, u32 data, u32 mem_mask);
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u8 mcu_p0_r();
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u8 mcu_p1_r();
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u8 mcu_p2_r();
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u8 mcu_p3_r();
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void mcu_p0_w(uint8_t data);
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void mcu_p1_w(uint8_t data);
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void mcu_p2_w(uint8_t data);
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void mcu_p3_w(uint8_t data);
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u32 igs027_periph_r(offs_t offset, u32 mem_mask);
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void igs027_periph_w(offs_t offset, u32 data, u32 mem_mask);
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template <unsigned N>
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TIMER_CALLBACK_MEMBER(igs027_timer_irq);
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u32 rnd_r() { return machine().rand(); }
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};
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void igs_m027xa_state::machine_reset()
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{
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m_port2_latch = 0;
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m_port0_latch = 0;
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m_irq_enable = 0xff;
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m_irq_pending = 0xff;
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m_xa_cmd = 0;
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m_xa_ret0 = 0;
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m_xa_ret1 = 0;
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m_num_params = 0;
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m_port0_dat = 0;
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m_port1_dat = 0;
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m_port2_dat = 0;
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m_port3_dat = 0;
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m_igs_40000014 = 0;
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}
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void igs_m027xa_state::machine_start()
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{
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save_item(NAME(m_igs_70000100));
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std::fill(std::begin(m_xor_table), std::end(m_xor_table), 0);
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save_item(NAME(m_xor_table));
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save_item(NAME(m_port2_latch));
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save_item(NAME(m_port0_latch));
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save_item(NAME(m_irq_enable));
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save_item(NAME(m_irq_pending));
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save_item(NAME(m_xa_cmd));
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save_item(NAME(m_xa_ret0));
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save_item(NAME(m_xa_ret1));
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save_item(NAME(m_num_params));
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save_item(NAME(m_port0_dat));
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save_item(NAME(m_port1_dat));
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save_item(NAME(m_port2_dat));
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save_item(NAME(m_port3_dat));
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save_item(NAME(m_igs_40000014));
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m_timer0 = timer_alloc(FUNC(igs_m027xa_state::igs027_timer_irq<0>), this);
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m_timer1 = timer_alloc(FUNC(igs_m027xa_state::igs027_timer_irq<1>), this);
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}
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void igs_m027xa_state::video_start()
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@ -84,11 +171,49 @@ void igs_m027xa_state::video_start()
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m_igs017_igs031->video_start();
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}
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void igs_m027xa_state::igs_70000100_w(u32 data)
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template <unsigned N>
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TIMER_CALLBACK_MEMBER(igs_m027xa_state::igs027_timer_irq)
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{
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m_igs_70000100 = data;
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igs027_trigger_irq(N);
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}
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void igs_m027xa_state::igs027_periph_w(offs_t offset, u32 data, u32 mem_mask)
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{
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switch (offset * 4)
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{
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case 0x100:
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// TODO: verify the timer interval
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m_timer0->adjust(attotime::from_hz(data / 2), 0, attotime::from_hz(data / 2));
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break;
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case 0x104:
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m_timer1->adjust(attotime::from_hz(data / 2), 0, attotime::from_hz(data / 2));
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break;
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case 0x200:
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m_irq_enable = data;
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break;
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default:
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LOGMASKED(LOG_DEBUG, "%s: unhandled igs027_periph_w %04x %08x (%08x)\n", machine().describe_context(), offset * 4, data, mem_mask);
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}
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}
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u32 igs_m027xa_state::igs027_periph_r(offs_t offset, u32 mem_mask)
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{
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u32 data = ~u32(0);
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switch (offset * 4)
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{
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case 0x200:
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data = m_irq_pending;
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m_irq_pending = 0xff;
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break;
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default:
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LOGMASKED(LOG_DEBUG, "%s: unhandled igs027_periph_r %04x (%08x)\n", machine().describe_context(), offset * 4, mem_mask);
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}
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return data;
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}
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/***************************************************************************
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@ -96,7 +221,7 @@ void igs_m027xa_state::igs_70000100_w(u32 data)
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***************************************************************************/
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void igs_m027xa_state::igs_mahjong_map(address_map &map)
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void igs_m027xa_state::main_map(address_map &map)
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{
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map(0x00000000, 0x00003fff).rom(); // Internal ROM
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map(0x08000000, 0x0807ffff).rom().region("user1", 0); // Game ROM
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@ -106,16 +231,23 @@ void igs_m027xa_state::igs_mahjong_map(address_map &map)
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map(0x38000000, 0x38007fff).rw(m_igs017_igs031, FUNC(igs017_igs031_device::read), FUNC(igs017_igs031_device::write));
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map(0x38009000, 0x38009003).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write));
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map(0x4000000c, 0x4000000f).r(FUNC(igs_m027xa_state::rnd_r));
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map(0x40000014, 0x40000017).w(FUNC(igs_m027xa_state::igs_40000014_w));
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map(0x58000000, 0x580000ff).rw(FUNC(igs_m027xa_state::xa_r), FUNC(igs_m027xa_state::xa_w));
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map(0x58000000, 0x580000ff).ram(); // XA?
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map(0x70000000, 0x700003ff).rw(FUNC(igs_m027xa_state::igs027_periph_r), FUNC(igs_m027xa_state::igs027_periph_w));
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map(0x70000100, 0x70000103).w(FUNC(igs_m027xa_state::igs_70000100_w));
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map(0x50000000, 0x500003ff).umask32(0x000000ff).w(FUNC(igs_m027xa_state::xor_table_w));
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map(0x70000200, 0x70000203).ram(); //??????????????
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map(0x50000000, 0x500003ff).nopw(); // uploads XOR table to external ROM here
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map(0xf0000000, 0xf000000f).nopw(); // magic registers
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}
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void igs_m027xa_state::main_xor_map(address_map &map)
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{
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main_map(map);
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map(0x08000000, 0x0807ffff).r(FUNC(igs_m027xa_state::external_rom_r)); // Game ROM
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}
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static INPUT_PORTS_START( base )
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PORT_START("TEST0")
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PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
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@ -127,26 +259,206 @@ static INPUT_PORTS_START( base )
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PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
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INPUT_PORTS_END
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void igs_m027xa_state::igs027_trigger_irq(int num)
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{
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if (!BIT(m_irq_enable, num))
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{
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m_irq_pending &= ~(u32(1) << num);
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m_maincpu->pulse_input_line(ARM7_IRQ_LINE, m_maincpu->minimum_quantum_time());
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}
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}
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u32 igs_m027xa_state::xa_r(offs_t offset, u32 mem_mask)
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{
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u32 data = ~u32(0);
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switch (offset * 4)
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{
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case 0:
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data = m_xa_ret0;
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break;
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case 0x80:
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data = m_xa_ret1 << 16;
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break;
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}
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return data;
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}
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void igs_m027xa_state::igs_40000014_w(offs_t offset, u32 data, u32 mem_mask)
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{
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// sets bit 1 before waiting on FIRQ, maybe it's an enable here?
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m_igs_40000014 = data;
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}
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void igs_m027xa_state::xa_w(offs_t offset, u32 data, u32 mem_mask)
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{
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m_xa_cmd = data;
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if (offset == 0)
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{
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m_num_params--;
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if (m_num_params <= 0)
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{
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LOGMASKED(LOG_DEBUG, "---------------m_xa_cmd is %02x size %02x\n", (data & 0xff00)>>8, data & 0xff);
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m_num_params = data & 0xff;
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}
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else
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{
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LOGMASKED(LOG_DEBUG, "-------------------------- param %04x\n", data & 0xffff);
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}
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m_xa->set_input_line(XA_EXT_IRQ0, ASSERT_LINE);
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}
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else
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{
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LOGMASKED(LOG_DEBUG, "%s: unhandled xa_w %04x %08x (%08x)\n", machine().describe_context(), offset * 4, data, mem_mask);
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}
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}
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u8 igs_m027xa_state::mcu_p0_r()
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{
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u8 ret = m_port0_latch;
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LOGMASKED(LOG_DEBUG, "%s: COMMAND READ LOWER mcu_p0_r() returning %02x with port3 as %02x\n", machine().describe_context(), ret, m_port3_dat);
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return ret;
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}
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u8 igs_m027xa_state::mcu_p1_r()
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{
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LOGMASKED(LOG_DEBUG, "%s: mcu_p1_r()\n", machine().describe_context());
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return m_port1_dat;
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}
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u8 igs_m027xa_state::mcu_p2_r()
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{
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u8 ret = m_port2_latch;
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LOGMASKED(LOG_DEBUG, "%s: COMMAND READ mcu_p2_r() returning %02x with port3 as %02x\n", machine().describe_context(), ret, m_port3_dat);
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return m_port2_latch;
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}
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u8 igs_m027xa_state::mcu_p3_r()
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{
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LOGMASKED(LOG_DEBUG, "%s: mcu_p3_r()\n", machine().describe_context());
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return m_port3_dat;
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}
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template <typename T>
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constexpr bool posedge(T oldval, T val, unsigned bit)
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{
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return BIT(~oldval & val, bit);
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}
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template <typename T>
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constexpr bool negedge(T oldval, T val, unsigned bit)
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{
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return BIT(oldval & ~val, bit);
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}
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void igs_m027xa_state::mcu_p0_w(uint8_t data)
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{
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LOGMASKED(LOG_DEBUG, "%s: mcu_p0_w() %02x with port 3 as %02x and port 1 as %02x\n", machine().describe_context(), data, m_port3_dat, m_port1_dat);
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m_port0_dat = data;
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}
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void igs_m027xa_state::mcu_p1_w(uint8_t data)
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{
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u8 olddata = m_port1_dat;
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LOGMASKED(LOG_DEBUG, "%s: mcu_p1_w() %02x\n", machine().describe_context(), data);
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m_port1_dat = data;
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if (posedge(olddata, m_port1_dat, 3))
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{
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igs027_trigger_irq(3); // wrong here?
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}
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}
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void igs_m027xa_state::mcu_p2_w(uint8_t data)
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{
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m_port2_dat = data;
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LOGMASKED(LOG_DEBUG, "%s: mcu_p2_w() %02x with port 3 as %02x\n", machine().describe_context(), data, m_port3_dat);
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}
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void igs_m027xa_state::mcu_p3_w(uint8_t data)
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{
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u8 oldport3 = m_port3_dat;
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m_port3_dat = data;
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LOGMASKED(LOG_DEBUG, "%s: mcu_p3_w() %02x - do latches oldport3 %02x newport3 %02x\n", machine().describe_context(), data, oldport3, m_port3_dat);
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// high->low transition on bit 0x80 must read into latches!
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if (negedge(oldport3, m_port3_dat, 7))
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{
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if (!BIT(m_port3_dat, 5))
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{
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LOGMASKED(LOG_DEBUG, "read command [%d] = [%04x]\n", m_port1_dat & 7, m_xa_cmd);
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m_port2_latch = (m_xa_cmd & 0xff00) >> 8;
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m_port0_latch = m_xa_cmd & 0x00ff;
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}
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}
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if (negedge(oldport3, m_port3_dat, 6))
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{
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if (!BIT(m_port3_dat, 5))
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{
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uint32_t dat = (m_port2_dat << 8) | m_port0_dat;
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LOGMASKED(LOG_DEBUG, "write command [%d] = [%04x]\n", m_port1_dat & 7, dat);
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switch (m_port1_dat & 7)
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{
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case 1:
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m_xa_ret1 = dat;
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break;
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case 2:
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m_xa_ret0 = dat;
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break;
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}
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}
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}
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}
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u32 igs_m027xa_state::external_rom_r(offs_t offset)
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{
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return m_external_rom[offset] ^ m_xor_table[offset & 0x00ff];
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}
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void igs_m027xa_state::xor_table_w(offs_t offset, u8 data)
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{
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m_xor_table[offset] = (u32(data) << 24) | (u32(data) << 8);
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}
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TIMER_DEVICE_CALLBACK_MEMBER(igs_m027xa_state::interrupt)
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{
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int scanline = param;
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if (scanline == 240 && m_igs017_igs031->get_irq_enable())
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m_maincpu->pulse_input_line(ARM7_IRQ_LINE, m_maincpu->minimum_quantum_time()); // source? (can the XA trigger this?)
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// should be using igs027_trigger_irq with more compelx interrupt logic?
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if (scanline == 0 && m_igs017_igs031->get_nmi_enable())
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//if (scanline == 240 && m_igs017_igs031->get_irq_enable())
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// m_maincpu->pulse_input_line(ARM7_IRQ_LINE, m_maincpu->minimum_quantum_time()); // source? (can the XA trigger this?)
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if (scanline == 0 && (m_igs_40000014 & 1))
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m_maincpu->pulse_input_line(ARM7_FIRQ_LINE, m_maincpu->minimum_quantum_time()); // vbl?
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}
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void igs_m027xa_state::igs_mahjong_xa(machine_config &config)
|
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{
|
||||
ARM7(config, m_maincpu, 22000000); // Crazy Bugs has a 22Mhz Xtal, what about the others?
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &igs_m027xa_state::igs_mahjong_map);
|
||||
ARM7(config, m_maincpu, 22'000'000); // Crazy Bugs has a 22MHz crystal, what about the others?
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &igs_m027xa_state::main_map);
|
||||
|
||||
// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
MX10EXA(config, m_xa, 10000000); // MX10EXAQC (Philips 80C51 XA) unknown frequency
|
||||
MX10EXA(config, m_xa, 10'000'000); // MX10EXAQC (Philips 80C51 XA) unknown frequency
|
||||
m_xa->port_in_cb<0>().set(FUNC(igs_m027xa_state::mcu_p0_r));
|
||||
m_xa->port_in_cb<1>().set(FUNC(igs_m027xa_state::mcu_p1_r));
|
||||
m_xa->port_in_cb<2>().set(FUNC(igs_m027xa_state::mcu_p2_r));
|
||||
m_xa->port_in_cb<3>().set(FUNC(igs_m027xa_state::mcu_p3_r));
|
||||
m_xa->port_out_cb<0>().set(FUNC(igs_m027xa_state::mcu_p0_w));
|
||||
m_xa->port_out_cb<1>().set(FUNC(igs_m027xa_state::mcu_p1_w));
|
||||
m_xa->port_out_cb<2>().set(FUNC(igs_m027xa_state::mcu_p2_w));
|
||||
m_xa->port_out_cb<3>().set(FUNC(igs_m027xa_state::mcu_p3_w));
|
||||
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_refresh_hz(60);
|
||||
@ -171,6 +483,22 @@ void igs_m027xa_state::igs_mahjong_xa(machine_config &config)
|
||||
// OK6295
|
||||
}
|
||||
|
||||
void igs_m027xa_state::igs_mahjong_xa_xor(machine_config &config)
|
||||
{
|
||||
igs_mahjong_xa(config);
|
||||
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &igs_m027xa_state::main_xor_map);
|
||||
}
|
||||
|
||||
void igs_m027xa_state::igs_mahjong_xa_xor_disable(machine_config &config)
|
||||
{
|
||||
igs_mahjong_xa_xor(config);
|
||||
|
||||
m_xa->set_disable();
|
||||
}
|
||||
|
||||
|
||||
|
||||
// prg at u34
|
||||
// text at u15
|
||||
// cg at u32 / u12
|
||||
@ -433,13 +761,18 @@ void igs_m027xa_state::init_wldfruit()
|
||||
|
||||
} // anonymous namespace
|
||||
|
||||
// These use the MX10EXAQC (80c51XA from Philips) and maybe don't belong in here
|
||||
// These use the MX10EXAQC (80c51XA from Philips)
|
||||
// the PCBs are closer to igs_fear.cpp in terms of layout
|
||||
GAME( 2008, haunthig, 0, igs_mahjong_xa, base, igs_m027xa_state, init_hauntedh, ROT0, "IGS", "Haunted House (IGS, V109US)", MACHINE_IS_SKELETON ) // IGS FOR V109US 2008 10 14
|
||||
GAME( 2006, haunthiga, haunthig, igs_mahjong_xa, base, igs_m027xa_state, init_hauntedh, ROT0, "IGS", "Haunted House (IGS, V101US)", MACHINE_IS_SKELETON ) // IGS FOR V101US 2006 08 23
|
||||
GAME( 2009, crzybugs, 0, igs_mahjong_xa, base, igs_m027xa_state, init_crzybugs, ROT0, "IGS", "Crazy Bugs (V204US)", MACHINE_IS_SKELETON ) // IGS FOR V204US 2009 5 19
|
||||
GAME( 2006, crzybugsa, crzybugs, igs_mahjong_xa, base, igs_m027xa_state, init_crzybugs, ROT0, "IGS", "Crazy Bugs (V202US)", MACHINE_IS_SKELETON ) // IGS FOR V100US 2006 3 29 but also V202US string
|
||||
GAME( 2005, crzybugsb, crzybugs, igs_mahjong_xa, base, igs_m027xa_state, init_crzybugs, ROT0, "IGS", "Crazy Bugs (V200US)", MACHINE_IS_SKELETON ) // FOR V100US 2005 7 20 but also V200US string
|
||||
GAME( 2007, crzybugsj, crzybugs, igs_mahjong_xa, base, igs_m027xa_state, init_crzybugsj, ROT0, "IGS", "Crazy Bugs (V103JP)", MACHINE_IS_SKELETON ) // IGS FOR V101JP 2007 06 08
|
||||
GAME( 2006, tripfev, 0, igs_mahjong_xa, base, igs_m027xa_state, init_tripfev, ROT0, "IGS", "Triple Fever (V107US)", MACHINE_IS_SKELETON ) // IGS FOR V107US 2006 09 07
|
||||
GAME( 2008, haunthig, 0, igs_mahjong_xa, base, igs_m027xa_state, init_hauntedh, ROT0, "IGS", "Haunted House (IGS, V109US)", MACHINE_IS_SKELETON ) // IGS FOR V109US 2008 10 14
|
||||
GAME( 2006, haunthiga, haunthig, igs_mahjong_xa, base, igs_m027xa_state, init_hauntedh, ROT0, "IGS", "Haunted House (IGS, V101US)", MACHINE_IS_SKELETON ) // IGS FOR V101US 2006 08 23
|
||||
|
||||
GAME( 2009, crzybugs, 0, igs_mahjong_xa_xor, base, igs_m027xa_state, init_crzybugs, ROT0, "IGS", "Crazy Bugs (V204US)", MACHINE_IS_SKELETON ) // IGS FOR V204US 2009 5 19
|
||||
GAME( 2006, crzybugsa, crzybugs, igs_mahjong_xa_xor, base, igs_m027xa_state, init_crzybugs, ROT0, "IGS", "Crazy Bugs (V202US)", MACHINE_IS_SKELETON ) // IGS FOR V100US 2006 3 29 but also V202US string
|
||||
GAME( 2005, crzybugsb, crzybugs, igs_mahjong_xa_xor, base, igs_m027xa_state, init_crzybugs, ROT0, "IGS", "Crazy Bugs (V200US)", MACHINE_IS_SKELETON ) // FOR V100US 2005 7 20 but also V200US string
|
||||
|
||||
GAME( 2007, crzybugsj, crzybugs, igs_mahjong_xa, base, igs_m027xa_state, init_crzybugsj, ROT0, "IGS", "Crazy Bugs (V103JP)", MACHINE_IS_SKELETON ) // IGS FOR V101JP 2007 06 08
|
||||
|
||||
// XA dump is missing, so XA CPU will crash, disable for now
|
||||
GAME( 2006, tripfev, 0, igs_mahjong_xa_xor_disable, base, igs_m027xa_state, init_tripfev, ROT0, "IGS", "Triple Fever (V107US)", MACHINE_IS_SKELETON ) // IGS FOR V107US 2006 09 07
|
||||
|
||||
GAME( 200?, wldfruit, 0, igs_mahjong_xa, base, igs_m027xa_state, init_wldfruit, ROT0, "IGS", "Wild Fruit (V208US)", MACHINE_IS_SKELETON ) // IGS-----97----V208US
|
||||
|
||||
@ -1663,35 +1663,15 @@ void olympic5_decrypt(running_machine &machine)
|
||||
}
|
||||
|
||||
|
||||
|
||||
static const uint8_t crzybugs_tab[0x100] = {
|
||||
0x49, 0x47, 0x53, 0x30, 0x31, 0x38, 0x36, 0x52, 0x44, 0x34, 0x30, 0x34, 0x30, 0x39, 0x31, 0x30, // IGS0186RD040910
|
||||
0xa4, 0x16, 0xa0, 0x3c, 0x4e, 0xd6, 0x43, 0x3f, 0xcb, 0xf2, 0xb4, 0x36, 0xd4, 0x13, 0x81, 0x30,
|
||||
0x71, 0x69, 0xb9, 0x44, 0xeb, 0x86, 0x7a, 0x95, 0xf4, 0x7a, 0xb5, 0x8c, 0x15, 0x35, 0x45, 0x52,
|
||||
0x59, 0x19, 0x30, 0x8c, 0x38, 0xde, 0x3c, 0x5b, 0xc6, 0xab, 0xb6, 0x93, 0x1c, 0x72, 0x7e, 0x3a,
|
||||
0x07, 0x8d, 0x57, 0x44, 0xf0, 0x97, 0x6e, 0x8d, 0x0b, 0x8c, 0x28, 0x18, 0xc4, 0x23, 0x30, 0x86,
|
||||
0x66, 0x6c, 0xc1, 0xda, 0x0e, 0xa6, 0x31, 0x6c, 0xd0, 0x63, 0xbf, 0x2a, 0x27, 0xdf, 0x9e, 0x17,
|
||||
0xa2, 0x9d, 0x41, 0xfd, 0xcd, 0x43, 0xe9, 0x75, 0x5e, 0xb8, 0x6d, 0x1a, 0xa1, 0x7b, 0x49, 0x0a,
|
||||
0x25, 0x47, 0xea, 0x9d, 0xa8, 0xe5, 0x39, 0x69, 0x40, 0x51, 0x66, 0x76, 0xcc, 0x10, 0xf6, 0xbe,
|
||||
0x9a, 0xd1, 0x10, 0xe9, 0x5a, 0x43, 0x04, 0x47, 0x43, 0x36, 0x1c, 0x0d, 0x84, 0xf5, 0xa8, 0xd4,
|
||||
0xed, 0xe2, 0x44, 0x4f, 0xde, 0x53, 0x6d, 0x4c, 0x70, 0xad, 0x44, 0xee, 0xe3, 0xbf, 0xa1, 0x29,
|
||||
0x48, 0x61, 0x5b, 0x7e, 0x6f, 0x4e, 0xd6, 0xf8, 0x13, 0x3e, 0xcf, 0x68, 0x44, 0x47, 0x64, 0xdd,
|
||||
0x16, 0x76, 0x67, 0x66, 0x88, 0xa9, 0xe4, 0x0b, 0xb7, 0xb0, 0xf0, 0x09, 0x44, 0xa4, 0xb5, 0x4e,
|
||||
0x02, 0x86, 0xbb, 0x35, 0xe4, 0x1c, 0x78, 0x83, 0x27, 0x09, 0x1b, 0xa2, 0xbb, 0x2b, 0x96, 0x1c,
|
||||
0xf8, 0x3a, 0xea, 0x5b, 0x7e, 0x9e, 0xb7, 0x9f, 0x6d, 0x90, 0x03, 0x40, 0xc7, 0x75, 0x4a, 0x26,
|
||||
0x22, 0x77, 0xc7, 0x86, 0x92, 0x66, 0x02, 0xdf, 0xd5, 0xce, 0x9a, 0x34, 0xc1, 0x58, 0x55, 0x8b,
|
||||
0xeb, 0x66, 0x65, 0xa6, 0x99, 0xea, 0xfd, 0x00, 0xea, 0x88, 0x14, 0x0c, 0x44, 0xec, 0x79, 0xa9
|
||||
};
|
||||
|
||||
void crzybugs_decrypt(running_machine &machine)
|
||||
{
|
||||
auto const src = reinterpret_cast<u16 *>(machine.root_device().memregion("user1")->base());
|
||||
|
||||
int const rom_size = 0x80000;
|
||||
memory_region *const region = machine.root_device().memregion("user1");
|
||||
auto const src = util::little_endian_cast<u16>(reinterpret_cast<u32 *>(region->base()));
|
||||
auto const rom_size = region->bytes();
|
||||
|
||||
for (int i = 0; i < rom_size / 2; i++)
|
||||
{
|
||||
uint16_t x = src[i];
|
||||
uint16_t x = 0;
|
||||
|
||||
IGS27_CRYPT1
|
||||
IGS27_CRYPT2_ALT
|
||||
@ -1702,9 +1682,7 @@ void crzybugs_decrypt(running_machine &machine)
|
||||
IGS27_CRYPT7
|
||||
IGS27_CRYPT8
|
||||
|
||||
x ^= crzybugs_tab[(i>> 1) & 0xff] << 8;
|
||||
|
||||
src[i] = x;
|
||||
src[i] ^= x;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1754,34 +1732,15 @@ void icescape_decrypt(running_machine &machine)
|
||||
}
|
||||
|
||||
|
||||
static const uint8_t tripfev_tab[0x100] = {
|
||||
0x49, 0x47, 0x53, 0x30, 0x32, 0x31, 0x35, 0x52, 0x44, 0x34, 0x30, 0x35, 0x30, 0x36, 0x32, 0x30, // IGS0213RD4050620
|
||||
0xc2, 0x79, 0xb0, 0xbf, 0xc7, 0xe0, 0x48, 0x2b, 0x40, 0x7c, 0x02, 0x52, 0xfb, 0xf2, 0xec, 0xfa,
|
||||
0xa3, 0xfe, 0xd0, 0xf8, 0x8b, 0xb5, 0x9e, 0x8b, 0xba, 0xf9, 0x17, 0xfb, 0x37, 0x3d, 0xbc, 0x72,
|
||||
0x96, 0x7b, 0xf6, 0x1b, 0xc3, 0x72, 0x86, 0x79, 0x0e, 0x25, 0x30, 0x09, 0x77, 0x90, 0xa3, 0x1b,
|
||||
0x3c, 0xad, 0xac, 0xee, 0xa1, 0xa8, 0x9c, 0x0b, 0xff, 0x5e, 0xf7, 0xe4, 0x10, 0x1b, 0x5e, 0xac,
|
||||
0x79, 0x95, 0xbf, 0x79, 0x99, 0x24, 0xbb, 0x98, 0x91, 0x44, 0x57, 0x31, 0x94, 0x4d, 0xe7, 0x1c,
|
||||
0x70, 0x71, 0x38, 0x02, 0x5d, 0xf6, 0xfd, 0xb8, 0x06, 0xb5, 0x7c, 0xd8, 0xd6, 0xd4, 0x79, 0xa1,
|
||||
0x84, 0xc0, 0x63, 0x11, 0xe2, 0x6e, 0xbd, 0x41, 0xe2, 0xd2, 0xd0, 0x01, 0xe9, 0x9f, 0x8f, 0xb4,
|
||||
0x58, 0x41, 0xca, 0x6d, 0x58, 0x19, 0x97, 0x4a, 0xe7, 0xf8, 0xfe, 0x11, 0x20, 0xde, 0xe4, 0x0a,
|
||||
0xcf, 0xf4, 0x3a, 0x1c, 0x35, 0xc7, 0x66, 0x2b, 0x18, 0xc7, 0xf1, 0xb1, 0x0f, 0xff, 0x73, 0x9b,
|
||||
0x0c, 0x17, 0xbc, 0x66, 0x2a, 0x87, 0x44, 0x7a, 0xb9, 0x1d, 0xd5, 0xc6, 0x87, 0xb2, 0x77, 0x9e,
|
||||
0x71, 0x28, 0x9c, 0xd1, 0x2b, 0xa8, 0x8d, 0x0e, 0x4c, 0x1a, 0x14, 0x79, 0x9d, 0xe5, 0x6b, 0x89,
|
||||
0xa3, 0xe9, 0x65, 0x25, 0x6a, 0xb9, 0xdb, 0xff, 0x94, 0x1d, 0x59, 0x30, 0xa3, 0xc8, 0x0a, 0x15,
|
||||
0x83, 0x56, 0xe1, 0x69, 0x5b, 0x89, 0x09, 0xa3, 0x95, 0xc5, 0x90, 0x92, 0x2c, 0xc9, 0x4f, 0x37,
|
||||
0x35, 0xb0, 0x1c, 0xe3, 0xb1, 0x27, 0x34, 0x91, 0x91, 0xf0, 0xe2, 0x86, 0x0b, 0x98, 0x75, 0x27,
|
||||
0x1c, 0x74, 0x61, 0x1a, 0x5e, 0xe2, 0xb4, 0xa1, 0x0c, 0xbe, 0xbc, 0x33, 0x53, 0x23, 0xf7, 0x5c
|
||||
};
|
||||
|
||||
void tripfev_decrypt(running_machine &machine)
|
||||
{
|
||||
auto const src = reinterpret_cast<u16 *>(machine.root_device().memregion("user1")->base());
|
||||
|
||||
int const rom_size = 0x80000;
|
||||
memory_region *const region = machine.root_device().memregion("user1");
|
||||
auto const src = util::little_endian_cast<u16>(reinterpret_cast<u32 *>(region->base()));
|
||||
auto const rom_size = region->bytes();
|
||||
|
||||
for (int i = 0; i < rom_size / 2; i++)
|
||||
{
|
||||
uint16_t x = src[i];
|
||||
uint16_t x = 0;
|
||||
|
||||
IGS27_CRYPT1
|
||||
IGS27_CRYPT2 //
|
||||
@ -1792,9 +1751,7 @@ void tripfev_decrypt(running_machine &machine)
|
||||
IGS27_CRYPT7_ALT // $2b0
|
||||
IGS27_CRYPT8 // $1100
|
||||
|
||||
x ^= tripfev_tab[(i>> 1) & 0xff] << 8;
|
||||
|
||||
src[i] = x;
|
||||
src[i] ^= x;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user