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https://github.com/holub/mame
synced 2025-05-11 08:38:47 +03:00
not sure what I was thinking here (nw)
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@ -675,57 +675,45 @@ static I8255A_INTERFACE( ppi8255_intf_0 )
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};
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WRITE_LINE_MEMBER(megaphx_state::z80ctc_ch0)
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WRITE_LINE_MEMBER(megaphx_state::z80ctc_ch0)
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{
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{
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megaphx_state *drvstate = machine().driver_data<megaphx_state>();
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int bank = m_soundbank[0] & 7;
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membank("snddata")->set_entry(bank);
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int bank = drvstate->m_soundbank[0] & 7;
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m_audiocpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
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drvstate->membank("snddata")->set_entry(bank);
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drvstate->m_audiocpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
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}
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}
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WRITE_LINE_MEMBER(megaphx_state::z80ctc_ch1)
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WRITE_LINE_MEMBER(megaphx_state::z80ctc_ch1)
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{
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{
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megaphx_state *drvstate = machine().driver_data<megaphx_state>();
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int bank = m_soundbank[1] & 7;
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membank("snddata")->set_entry(bank);
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int bank = drvstate->m_soundbank[1] & 7;
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m_audiocpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
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drvstate->membank("snddata")->set_entry(bank);
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drvstate->m_audiocpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
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}
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}
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WRITE_LINE_MEMBER(megaphx_state::z80ctc_ch2)
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WRITE_LINE_MEMBER(megaphx_state::z80ctc_ch2)
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{
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{
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megaphx_state *drvstate = machine().driver_data<megaphx_state>();
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int bank = m_soundbank[2] & 7;
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membank("snddata")->set_entry(bank);
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int bank = drvstate->m_soundbank[2] & 7;
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m_audiocpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
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drvstate->membank("snddata")->set_entry(bank);
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drvstate->m_audiocpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
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}
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}
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WRITE_LINE_MEMBER(megaphx_state::z80ctc_ch3)
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WRITE_LINE_MEMBER(megaphx_state::z80ctc_ch3)
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{
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{
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megaphx_state *drvstate = machine().driver_data<megaphx_state>();
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int bank = m_soundbank[3] & 7;
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membank("snddata")->set_entry(bank);
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int bank = drvstate->m_soundbank[3] & 7;
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m_audiocpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
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drvstate->membank("snddata")->set_entry(bank);
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drvstate->m_audiocpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
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}
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}
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static Z80CTC_INTERFACE( z80ctc_intf ) // runs in IM2 , vector set to 0x20 , values there are 0xCC, 0x02, 0xE6, 0x02, 0x09, 0x03, 0x23, 0x03 (so 02cc, 02e6, 0309, 0323, all of which are valid irq handlers)
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static Z80CTC_INTERFACE( z80ctc_intf ) // runs in IM2 , vector set to 0x20 , values there are 0xCC, 0x02, 0xE6, 0x02, 0x09, 0x03, 0x23, 0x03 (so 02cc, 02e6, 0309, 0323, all of which are valid irq handlers)
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{
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{
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DEVCB_DEVICE_LINE_MEMBER("ctc", megaphx_state, z80ctc_ch0), // for channel 0
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DEVCB_DRIVER_LINE_MEMBER(megaphx_state, z80ctc_ch0), // for channel 0
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DEVCB_DEVICE_LINE_MEMBER("ctc", megaphx_state, z80ctc_ch1), // for channel 1
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DEVCB_DRIVER_LINE_MEMBER(megaphx_state, z80ctc_ch1), // for channel 1
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DEVCB_DEVICE_LINE_MEMBER("ctc", megaphx_state, z80ctc_ch2), // for channel 2
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DEVCB_DRIVER_LINE_MEMBER(megaphx_state, z80ctc_ch2), // for channel 2
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DEVCB_DEVICE_LINE_MEMBER("ctc", megaphx_state, z80ctc_ch3), // for channel 3
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DEVCB_DRIVER_LINE_MEMBER(megaphx_state, z80ctc_ch3), // for channel 3
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};
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};
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static const z80_daisy_config daisy_chain[] =
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static const z80_daisy_config daisy_chain[] =
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