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modernized nvram in 3do and mjkjidai + added default nvram

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to the latter. nw.
This commit is contained in:
Fabio Priuli 2014-04-03 14:23:32 +00:00
parent f243932428
commit b590822d96
5 changed files with 20 additions and 51 deletions
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25
src/mame/drivers/3do.c
View File

@ -98,8 +98,6 @@ Part list of Goldstar 3DO Interactive Multiplayer
#include "imagedev/chd_cd.h"
#include "cpu/arm/arm.h"
#include "cpu/arm7/arm7.h"
#include "mcfglgcy.h"
#define X2_CLOCK_PAL 59000000
@ -135,6 +133,7 @@ INPUT_PORTS_END
void _3do_state::machine_start()
{
m_bank2->set_base(memregion("user1")->base());
m_nvram->set_base(&m_nvmem, sizeof(m_nvmem));
/* configure overlay */
m_bank1->configure_entry(0, m_dram);
@ -159,24 +158,6 @@ struct cdrom_interface _3do_cdrom =
NULL
};
static NVRAM_HANDLER( _3do )
{
_3do_state *state = machine.driver_data<_3do_state>();
UINT8 *nvram = state->m_nvram;
if (read_or_write)
file->write(nvram,0x8000);
else
{
if (file)
file->read(nvram,0x8000);
else
{
/* fill in the default values */
memset(nvram,0xff,0x8000);
}
}
}
static MACHINE_CONFIG_START( 3do, _3do_state )
@ -184,7 +165,7 @@ static MACHINE_CONFIG_START( 3do, _3do_state )
MCFG_CPU_ADD( "maincpu", ARM7_BE, XTAL_50MHz/4 )
MCFG_CPU_PROGRAM_MAP( 3do_mem)
MCFG_NVRAM_HANDLER(_3do)
MCFG_NVRAM_ADD_1FILL("nvram")
MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_x16", _3do_state, timer_x16_cb, attotime::from_hz(12000)) // TODO: timing
@ -204,7 +185,7 @@ static MACHINE_CONFIG_START( 3do_pal, _3do_state )
MCFG_CPU_ADD("maincpu", ARM7_BE, XTAL_50MHz/4 )
MCFG_CPU_PROGRAM_MAP( 3do_mem)
MCFG_NVRAM_HANDLER(_3do)
MCFG_NVRAM_ADD_1FILL("nvram")
MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_x16", _3do_state, timer_x16_cb, attotime::from_hz(12000)) // TODO: timing

29
src/mame/drivers/mjkjidai.c
View File

@ -25,7 +25,6 @@ TODO:
#include "cpu/z80/z80.h"
#include "sound/sn76496.h"
#include "includes/mjkjidai.h"
#include "mcfglgcy.h"
/* Start of ADPCM custom chip code */
@ -133,12 +132,6 @@ READ8_MEMBER(mjkjidai_state::keyboard_r)
res |= (ioport("IN3")->read() & 0xc0);
if (m_nvram_init_count)
{
m_nvram_init_count--;
res &= 0xbf;
}
return res;
}
@ -153,27 +146,12 @@ WRITE8_MEMBER(mjkjidai_state::keyboard_select_w)
}
}
static NVRAM_HANDLER( mjkjidai )
{
mjkjidai_state *state = machine.driver_data<mjkjidai_state>();
if (read_or_write)
file->write(state->m_nvram, state->m_nvram.bytes());
else if (file)
file->read(state->m_nvram, state->m_nvram.bytes());
else
{
state->m_nvram_init_count = 1;
}
}
static ADDRESS_MAP_START( mjkjidai_map, AS_PROGRAM, 8, mjkjidai_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xcfff) AM_RAM
AM_RANGE(0xd000, 0xdfff) AM_RAM AM_SHARE("nvram") // cleared and initialized on startup if bit 6 if port 00 is 0
AM_RANGE(0xd000, 0xdfff) AM_RAM AM_SHARE("nvram") // cleared and initialized on startup if bit 6 of port 00 is 0
AM_RANGE(0xe000, 0xe01f) AM_RAM AM_SHARE("spriteram1") // shared with tilemap ram
AM_RANGE(0xe800, 0xe81f) AM_RAM AM_SHARE("spriteram2") // shared with tilemap ram
AM_RANGE(0xf000, 0xf01f) AM_RAM AM_SHARE("spriteram3") // shared with tilemap ram
@ -385,7 +363,7 @@ static MACHINE_CONFIG_START( mjkjidai, mjkjidai_state )
MCFG_CPU_IO_MAP(mjkjidai_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", mjkjidai_state, vblank_irq)
MCFG_NVRAM_HANDLER(mjkjidai)
MCFG_NVRAM_ADD_NO_FILL("nvram")
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -442,6 +420,9 @@ ROM_START( mjkjidai )
ROM_REGION( 0x8000, "adpcm", 0 ) /* ADPCM samples */
ROM_LOAD( "mkj-40.14c", 0x00000, 0x8000, CRC(4d8fcc4a) SHA1(24c2b8031367035c89c6649a084bce0714f3e8d4) )
ROM_REGION( 0x1000, "nvram", 0 ) /* preformatted NVRAM */
ROM_LOAD( "default.nv", 0x00000, 0x1000, CRC(eccc0263) SHA1(679010f096536e8bb572551e9d0776cad72145e2) )
ROM_END

8
src/mame/includes/3do.h
View File

@ -7,6 +7,9 @@
#ifndef _3DO_H_
#define _3DO_H_
#include "machine/nvram.h"
struct SLOW2 {
/* 03180000 - 0318003f - configuration group */
/* 03180040 - 0318007f - diagnostic UART */
@ -139,18 +142,20 @@ public:
m_maincpu(*this, "maincpu"),
m_dram(*this, "dram"),
m_vram(*this, "vram"),
m_nvram(*this, "nvram"),
m_bank1(*this, "bank1"),
m_bank2(*this, "bank2") { }
required_device<cpu_device> m_maincpu;
required_shared_ptr<UINT32> m_dram;
required_shared_ptr<UINT32> m_vram;
required_device<nvram_device> m_nvram;
SLOW2 m_slow2;
MADAM m_madam;
CLIO m_clio;
SVF m_svf;
DSPP m_dspp;
UINT8 m_nvram[0x8000];
UINT8 m_nvmem[0x8000];
// UINT8 m_video_bits[512];
DECLARE_READ8_MEMBER(_3do_nvarea_r);
@ -165,6 +170,7 @@ public:
DECLARE_WRITE32_MEMBER(_3do_clio_w);
virtual void machine_start();
virtual void machine_reset();
DECLARE_MACHINE_START(_3do);
DECLARE_VIDEO_START(_3do);
UINT32 screen_update__3do(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);

5
src/mame/includes/mjkjidai.h
View File

@ -1,3 +1,4 @@
#include "machine/nvram.h"
#include "sound/okiadpcm.h"
class mjkjidai_adpcm_device;
@ -7,17 +8,16 @@ class mjkjidai_state : public driver_device
public:
mjkjidai_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_nvram(*this, "nvram"),
m_spriteram1(*this, "spriteram1"),
m_spriteram2(*this, "spriteram2"),
m_spriteram3(*this, "spriteram3"),
m_videoram(*this, "videoram"),
m_maincpu(*this, "maincpu"),
m_mjk_adpcm(*this, "adpcm"),
m_nvram(*this, "nvram"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette") { }
required_shared_ptr<UINT8> m_nvram;
required_shared_ptr<UINT8> m_spriteram1;
required_shared_ptr<UINT8> m_spriteram2;
required_shared_ptr<UINT8> m_spriteram3;
@ -25,6 +25,7 @@ public:
required_device<cpu_device> m_maincpu;
required_device<mjkjidai_adpcm_device> m_mjk_adpcm;
required_device<nvram_device> m_nvram;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;

4
src/mame/machine/3do.c
View File

@ -164,8 +164,8 @@ TIMER_DEVICE_CALLBACK_MEMBER( _3do_state::timer_x16_cb )
}
}
READ8_MEMBER(_3do_state::_3do_nvarea_r) { return m_nvram[offset]; }
WRITE8_MEMBER(_3do_state::_3do_nvarea_w) { m_nvram[offset] = data; }
READ8_MEMBER(_3do_state::_3do_nvarea_r) { return m_nvmem[offset]; }
WRITE8_MEMBER(_3do_state::_3do_nvarea_w) { m_nvmem[offset] = data; }