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ins8250: fix cleared pending THRE interrupt

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The code notes that reading the iir register "will clear the int if
this is the source of the int" and the code cleared a pending THRE
interrupt if it was *pending*. This causes a lost THRE interrupt for
the SWTPC 8121 terminal firmware and this locks up the TX side of the
terminal. This occurred regularly when the ISR read this register upon
a higher priority RX pending interrupt. The documented operation has
been reinterpreted as only clearly the THRE interrupt if THRE is the
highest priority interrupt and so is the pending interrupt *causing*
the interrupt. This fixes that lost THRE interrupt for the SWTPC 8121
terminal.
This commit is contained in:
68bit 2019-10-16 16:35:04 +11:00
parent 151f5fca25
commit b592db7437
1 changed files with 5 additions and 2 deletions
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7
src/devices/machine/ins8250.cpp
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@ -434,8 +434,11 @@ u8 ins8250_uart_device::ins8250_r(offs_t offset)
data = m_regs.iir;
/* The documentation says that reading this register will
clear the int if this is the source of the int */
if (!machine().side_effects_disabled() && (m_regs.ier & COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY))
clear_int(COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY);
if (!machine().side_effects_disabled())
{
if (m_regs.iir == 0x02)
clear_int(COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY);
}
break;
case 3:
data = m_regs.lcr;