mirror of
https://github.com/holub/mame
synced 2025-04-21 16:01:56 +03:00
Add second timer output comparator and associated status register to the HD6301X and HD6301Y
This commit is contained in:
AJR
parent
e302ab780a
commit
b5a63a8e55
@ -34,23 +34,12 @@
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#define OC m_output_compare.w.l
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#define OCH m_output_compare.w.h
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#define OCD m_output_compare.d
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#define OC2 m_output_compare2.w.l
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#define OC2H m_output_compare2.w.h
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#define OC2D m_output_compare2.d
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#define TOH m_timer_over.w.l
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#define TOD m_timer_over.d
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#define MODIFIED_tcsr { \
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m_irq2 = (m_tcsr&(m_tcsr<<3))&(TCSR_ICF|TCSR_OCF|TCSR_TOF); \
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}
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#define SET_TIMER_EVENT { \
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m_timer_next = (OCD - CTD < TOD - CTD) ? OCD : TOD; \
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}
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/* when change freerunningcounter or outputcapture */
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#define MODIFIED_counters { \
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OCH = (OC >= CT) ? CTH : CTH+1; \
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SET_TIMER_EVENT; \
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}
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// serial I/O
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#define M6801_RMCR_SS_MASK 0x03 // Speed Select
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@ -104,6 +93,12 @@ enum
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#define TCSR_OCF 0x40
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#define TCSR_ICF 0x80
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#define TCSR2_OE1 0x01
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#define TCSR2_OE2 0x02
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#define TCSR2_OLVL2 0x04
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#define TCSR2_EOCI2 0x08
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#define TCSR2_OCF2 0x20
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/* Note: don't use 0 cycles here for invalid opcodes so that we don't */
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/* hang in an infinite loop if we hit one */
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#define XX 5 // invalid opcode unknown cc
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@ -269,7 +264,7 @@ void hd6301x_cpu_device::hd6301x_io(address_map &map)
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map(0x000c, 0x000c).rw(FUNC(hd6301x_cpu_device::ocrl_r), FUNC(hd6301x_cpu_device::ocrl_w));
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map(0x000d, 0x000d).r(FUNC(hd6301x_cpu_device::icrh_r));
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map(0x000e, 0x000e).r(FUNC(hd6301x_cpu_device::icrl_r));
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//map(0x000f, 0x000f).rw(FUNC(hd6301x_cpu_device::tcsr2_r), FUNC(hd6301x_cpu_device::tcsr2_w));
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map(0x000f, 0x000f).rw(FUNC(hd6301x_cpu_device::tcsr2_r), FUNC(hd6301x_cpu_device::tcsr2_w));
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map(0x0010, 0x0010).rw(FUNC(hd6301x_cpu_device::sci_rmcr_r), FUNC(hd6301x_cpu_device::sci_rmcr_w));
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map(0x0011, 0x0011).rw(FUNC(hd6301x_cpu_device::sci_trcsr_r), FUNC(hd6301x_cpu_device::sci_trcsr_w));
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map(0x0012, 0x0012).r(FUNC(hd6301x_cpu_device::sci_rdr_r));
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@ -279,8 +274,8 @@ void hd6301x_cpu_device::hd6301x_io(address_map &map)
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map(0x0016, 0x0016).rw(FUNC(hd6301x_cpu_device::ff_r), FUNC(hd6301x_cpu_device::p6_ddr_w));
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map(0x0017, 0x0017).rw(FUNC(hd6301x_cpu_device::p6_data_r), FUNC(hd6301x_cpu_device::p6_data_w));
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map(0x0018, 0x0018).rw(FUNC(hd6301x_cpu_device::p7_data_r), FUNC(hd6301x_cpu_device::p7_data_w)); // TODO: external except in single-chip mode
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//map(0x0019, 0x0019).rw(FUNC(hd6301x_cpu_device::ocr2h_r), FUNC(hd6301x_cpu_device::ocr2h_w));
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//map(0x001a, 0x001a).rw(FUNC(hd6301x_cpu_device::ocr2l_r), FUNC(hd6301x_cpu_device::ocr2l_w));
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map(0x0019, 0x0019).rw(FUNC(hd6301x_cpu_device::ocr2h_r), FUNC(hd6301x_cpu_device::ocr2h_w));
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map(0x001a, 0x001a).rw(FUNC(hd6301x_cpu_device::ocr2l_r), FUNC(hd6301x_cpu_device::ocr2l_w));
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//map(0x001b, 0x001b).rw(FUNC(hd6301x_cpu_device::tcsr3_r), FUNC(hd6301x_cpu_device::tcsr3_w));
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//map(0x001c, 0x001c).rw(FUNC(hd6301x_cpu_device::ff_r), FUNC(hd6301x_cpu_device::tconr_w));
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//map(0x001d, 0x001d).rw(FUNC(hd6301x_cpu_device::t2cnt_r), FUNC(hd6301x_cpu_device::t2cnt_w));
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@ -422,6 +417,69 @@ void m6801_cpu_device::m6800_check_irq2()
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}
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}
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void hd6301x_cpu_device::m6800_check_irq2()
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{
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if ((m_tcsr & (TCSR_EICI|TCSR_ICF)) == (TCSR_EICI|TCSR_ICF))
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{
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TAKE_ICI;
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standard_irq_callback(M6801_TIN_LINE);
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}
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else if ((m_tcsr & (TCSR_EOCI|TCSR_OCF)) == (TCSR_EOCI|TCSR_OCF) ||
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(m_tcsr2 & (TCSR2_EOCI2|TCSR2_OCF2)) == (TCSR2_EOCI2|TCSR2_OCF2))
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{
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TAKE_OCI;
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}
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else if ((m_tcsr & (TCSR_ETOI|TCSR_TOF)) == (TCSR_ETOI|TCSR_TOF))
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{
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TAKE_TOI;
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}
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else if (((m_trcsr & (M6801_TRCSR_RIE|M6801_TRCSR_RDRF)) == (M6801_TRCSR_RIE|M6801_TRCSR_RDRF)) ||
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((m_trcsr & (M6801_TRCSR_RIE|M6801_TRCSR_ORFE)) == (M6801_TRCSR_RIE|M6801_TRCSR_ORFE)) ||
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((m_trcsr & (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)) == (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)))
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{
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LOG("SCI interrupt\n");
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TAKE_SCI;
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}
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}
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void m6801_cpu_device::modified_tcsr()
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{
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m_irq2 = (m_tcsr&(m_tcsr<<3))&(TCSR_ICF|TCSR_OCF|TCSR_TOF);
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}
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void hd6301x_cpu_device::modified_tcsr()
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{
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m6801_cpu_device::modified_tcsr();
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if ((m_tcsr2 & TCSR2_EOCI2) && (m_tcsr2 & TCSR2_OCF2))
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m_irq2 |= TCSR_OCF;
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}
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void m6801_cpu_device::set_timer_event()
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{
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m_timer_next = (OCD - CTD < TOD - CTD) ? OCD : TOD;
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}
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void hd6301x_cpu_device::set_timer_event()
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{
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m6801_cpu_device::set_timer_event();
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if (OC2D - CTD < m_timer_next)
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m_timer_next = OC2D;
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}
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/* when change freerunningcounter or outputcapture */
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void m6801_cpu_device::modified_counters()
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{
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OCH = (OC >= CT) ? CTH : CTH+1;
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set_timer_event();
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}
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void hd6301x_cpu_device::modified_counters()
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{
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OCH = (OC >= CT) ? CTH : CTH+1;
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OC2H = (OC2 >= CT) ? CTH : CTH+1;
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set_timer_event();
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}
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/* check OCI or TOI */
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void m6801_cpu_device::check_timer_event()
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{
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@ -431,11 +489,7 @@ void m6801_cpu_device::check_timer_event()
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OCH++; // next IRQ point
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m_tcsr |= TCSR_OCF;
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m_pending_tcsr |= TCSR_OCF;
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MODIFIED_tcsr;
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if((m_tcsr & TCSR_EOCI) && m_wai_state & M6800_SLP)
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m_wai_state &= ~M6800_SLP;
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if ( !(m_cc & 0x10) && (m_tcsr & TCSR_EOCI))
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TAKE_OCI;
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modified_tcsr();
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// if output on P21 is enabled, let's do it
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if (m_port_ddr[1] & 2)
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@ -455,14 +509,78 @@ void m6801_cpu_device::check_timer_event()
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#endif
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m_tcsr |= TCSR_TOF;
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m_pending_tcsr |= TCSR_TOF;
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MODIFIED_tcsr;
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if((m_tcsr & TCSR_ETOI) && m_wai_state & M6800_SLP)
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modified_tcsr();
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}
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if (m_irq2 & (TCSR_OCF | TCSR_TOF))
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{
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if (m_wai_state & M6800_SLP)
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m_wai_state &= ~M6800_SLP;
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if ( !(m_cc & 0x10) && (m_tcsr & TCSR_ETOI))
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TAKE_TOI;
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if (!(m_cc & 0x10))
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m6800_check_irq2();
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}
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/* set next event */
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SET_TIMER_EVENT;
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set_timer_event();
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}
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void hd6301x_cpu_device::check_timer_event()
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{
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/* OCI */
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if (CTD >= OCD)
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{
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OCH++; // next IRQ point
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m_tcsr |= TCSR_OCF;
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m_pending_tcsr |= TCSR_OCF;
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modified_tcsr();
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// if output on P21 is enabled, let's do it
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if (m_tcsr2 & TCSR2_OE1)
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{
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m_port_data[1] &= ~2;
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m_port_data[1] |= (m_tcsr & TCSR_OLVL) << 1;
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m_port2_written = true;
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write_port2();
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}
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}
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if (CTD >= OC2D)
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{
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OC2H++; // next IRQ point
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m_tcsr2 |= TCSR2_OCF2;
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m_pending_tcsr2 |= TCSR2_OCF2;
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modified_tcsr();
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// if output on P25 is enabled, let's do it
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if (m_tcsr2 & TCSR2_OE2)
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{
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if (m_tcsr2 & TCSR2_OLVL2)
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m_port_data[1] |= 0x20;
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else
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m_port_data[1] &= ~0x20;
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m_port2_written = true;
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write_port2();
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}
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}
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/* TOI */
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if (CTD >= TOD)
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{
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TOH++; // next IRQ point
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#if 0
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CLEANUP_COUNTERS();
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#endif
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m_tcsr |= TCSR_TOF;
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m_pending_tcsr |= TCSR_TOF;
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modified_tcsr();
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}
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if (m_irq2 & (TCSR_OCF | TCSR_TOF))
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{
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if (m_wai_state & M6800_SLP)
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m_wai_state &= ~M6800_SLP;
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if (!(m_cc & 0x10))
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m6800_check_irq2();
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}
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/* set next event */
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set_timer_event();
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}
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void m6801_cpu_device::increment_counter(int amount)
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@ -486,11 +604,17 @@ void m6801_cpu_device::CLEANUP_COUNTERS()
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OCH -= CTH;
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TOH -= CTH;
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CTH = 0;
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SET_TIMER_EVENT;
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set_timer_event();
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if (CTD >= m_timer_next)
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check_timer_event();
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}
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void hd6301x_cpu_device::CLEANUP_COUNTERS()
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{
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OC2H -= CTH;
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m6801_cpu_device::CLEANUP_COUNTERS();
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}
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void m6801_cpu_device::set_rmcr(uint8_t data)
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{
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if (m_rmcr == data) return;
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@ -772,7 +896,7 @@ void m6801_cpu_device::execute_set_input(int irqline, int state)
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m_tcsr |= TCSR_ICF;
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m_pending_tcsr |= TCSR_ICF;
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m_input_capture = CT;
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MODIFIED_tcsr;
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modified_tcsr();
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}
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break;
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@ -864,6 +988,9 @@ void hd6301x_cpu_device::device_start()
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save_item(NAME(m_portx_ddr));
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save_item(NAME(m_portx_data));
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save_item(NAME(m_tcsr2));
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save_item(NAME(m_pending_tcsr2));
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save_item(NAME(m_output_compare2.d));
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}
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void m6801_cpu_device::device_reset()
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@ -912,6 +1039,10 @@ void hd6301x_cpu_device::device_reset()
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m_portx_ddr[0] = 0x00;
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m_portx_ddr[1] = 0x00;
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m_tcsr2 = 0x00;
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m_pending_tcsr2 = 0x00;
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OC2D = 0xffff;
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}
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@ -930,6 +1061,7 @@ void m6801_cpu_device::write_port2()
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if (m_trcsr & M6801_TRCSR_TE)
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{
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data = (data & 0xef) | (m_tx << 4);
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ddr |= 0x10;
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}
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data &= 0x1f;
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@ -942,11 +1074,17 @@ void hd6301x_cpu_device::write_port2()
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if (!m_port2_written) return;
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uint8_t ddr = m_port_ddr[1];
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if (m_tcsr2 & TCSR2_OE1)
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ddr |= 0x02;
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if (m_tcsr2 & TCSR2_OE2)
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ddr |= 0x20;
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uint8_t data = (m_port_data[1] & ddr) | (ddr ^ 0xff);
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if (m_trcsr & M6801_TRCSR_TE)
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{
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data = (data & 0xef) | (m_tx << 4);
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ddr |= 0x10;
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}
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m_out_port_func[1](0, data, ddr);
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@ -1235,7 +1373,7 @@ void m6801_cpu_device::tcsr_w(uint8_t data)
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m_tcsr = data;
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m_pending_tcsr &= m_tcsr;
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MODIFIED_tcsr;
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modified_tcsr();
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if( !(m_cc & 0x10) )
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m6800_check_irq2();
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}
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@ -1245,7 +1383,7 @@ uint8_t m6801_cpu_device::ch_r()
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if(!(m_pending_tcsr&TCSR_TOF) && !machine().side_effects_disabled())
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{
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m_tcsr &= ~TCSR_TOF;
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MODIFIED_tcsr;
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modified_tcsr();
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}
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return m_counter.b.h;
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}
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@ -1266,7 +1404,7 @@ void m6801_cpu_device::ch_w(uint8_t data)
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m_latch09 = data & 0xff; /* 6301 only */
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CT = 0xfff8;
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TOH = CTH;
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MODIFIED_counters;
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modified_counters();
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}
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void m6801_cpu_device::cl_w(uint8_t data)
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@ -1275,7 +1413,7 @@ void m6801_cpu_device::cl_w(uint8_t data)
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CT = (m_latch09 << 8) | (data & 0xff);
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TOH = CTH;
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MODIFIED_counters;
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modified_counters();
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}
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uint8_t m6801_cpu_device::ocrh_r()
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@ -1283,7 +1421,7 @@ uint8_t m6801_cpu_device::ocrh_r()
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if(!(m_pending_tcsr&TCSR_OCF) && !machine().side_effects_disabled())
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{
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m_tcsr &= ~TCSR_OCF;
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MODIFIED_tcsr;
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modified_tcsr();
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}
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return m_output_compare.b.h;
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}
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@ -1293,7 +1431,7 @@ uint8_t m6801_cpu_device::ocrl_r()
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if(!(m_pending_tcsr&TCSR_OCF) && !machine().side_effects_disabled())
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{
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m_tcsr &= ~TCSR_OCF;
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MODIFIED_tcsr;
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modified_tcsr();
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}
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return m_output_compare.b.l;
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}
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@ -1305,7 +1443,7 @@ void m6801_cpu_device::ocrh_w(uint8_t data)
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if( m_output_compare.b.h != data)
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{
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m_output_compare.b.h = data;
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MODIFIED_counters;
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modified_counters();
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}
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}
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@ -1316,7 +1454,7 @@ void m6801_cpu_device::ocrl_w(uint8_t data)
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if( m_output_compare.b.l != data)
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{
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m_output_compare.b.l = data;
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MODIFIED_counters;
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modified_counters();
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}
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}
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@ -1325,7 +1463,7 @@ uint8_t m6801_cpu_device::icrh_r()
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if(!(m_pending_tcsr&TCSR_ICF) && !machine().side_effects_disabled())
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{
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m_tcsr &= ~TCSR_ICF;
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MODIFIED_tcsr;
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modified_tcsr();
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}
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return (m_input_capture >> 0) & 0xff;
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}
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@ -1335,6 +1473,70 @@ uint8_t m6801_cpu_device::icrl_r()
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return (m_input_capture >> 8) & 0xff;
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}
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uint8_t hd6301x_cpu_device::tcsr2_r()
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{
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if (!machine().side_effects_disabled())
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{
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m_pending_tcsr &= ~(TCSR_ICF | TCSR_OCF);
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m_pending_tcsr2 = 0;
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||||
}
|
||||
return m_tcsr2 | (m_tcsr & (TCSR_ICF | TCSR_OCF)) | 0x10;
|
||||
}
|
||||
|
||||
void hd6301x_cpu_device::tcsr2_w(uint8_t data)
|
||||
{
|
||||
LOGTIMER("Timer Control and Status Register 2: %02x\n", data);
|
||||
|
||||
data &= TCSR2_OE1 | TCSR2_OE2 | TCSR2_OLVL2 | TCSR2_EOCI2;
|
||||
m_tcsr2 = data | (m_tcsr2 & TCSR2_OCF2);
|
||||
m_pending_tcsr2 &= m_tcsr2;
|
||||
modified_tcsr();
|
||||
if( !(m_cc & 0x10) )
|
||||
m6800_check_irq2();
|
||||
}
|
||||
|
||||
uint8_t hd6301x_cpu_device::ocr2h_r()
|
||||
{
|
||||
if(!(m_pending_tcsr2&TCSR2_OCF2) && !machine().side_effects_disabled())
|
||||
{
|
||||
m_tcsr2 &= ~TCSR2_OCF2;
|
||||
modified_tcsr();
|
||||
}
|
||||
return m_output_compare2.b.h;
|
||||
}
|
||||
|
||||
uint8_t hd6301x_cpu_device::ocr2l_r()
|
||||
{
|
||||
if(!(m_pending_tcsr2&TCSR2_OCF2) && !machine().side_effects_disabled())
|
||||
{
|
||||
m_tcsr2 &= ~TCSR2_OCF2;
|
||||
modified_tcsr();
|
||||
}
|
||||
return m_output_compare2.b.l;
|
||||
}
|
||||
|
||||
void hd6301x_cpu_device::ocr2h_w(uint8_t data)
|
||||
{
|
||||
LOGTIMER("Output Compare High Register 2: %02x\n", data);
|
||||
|
||||
if( m_output_compare2.b.h != data)
|
||||
{
|
||||
m_output_compare2.b.h = data;
|
||||
modified_counters();
|
||||
}
|
||||
}
|
||||
|
||||
void hd6301x_cpu_device::ocr2l_w(uint8_t data)
|
||||
{
|
||||
LOGTIMER("Output Compare Low Register 2: %02x\n", data);
|
||||
|
||||
if( m_output_compare2.b.l != data)
|
||||
{
|
||||
m_output_compare2.b.l = data;
|
||||
modified_counters();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
uint8_t m6801_cpu_device::sci_rmcr_r()
|
||||
{
|
||||
|
||||
@ -166,7 +166,10 @@ protected:
|
||||
virtual void EAT_CYCLES() override;
|
||||
virtual void CLEANUP_COUNTERS() override;
|
||||
|
||||
void check_timer_event();
|
||||
virtual void modified_tcsr();
|
||||
virtual void set_timer_event();
|
||||
virtual void modified_counters();
|
||||
virtual void check_timer_event();
|
||||
void set_rmcr(uint8_t data);
|
||||
virtual void write_port2();
|
||||
int m6800_rx();
|
||||
@ -274,11 +277,29 @@ protected:
|
||||
uint8_t p7_data_r();
|
||||
void p7_data_w(uint8_t data);
|
||||
|
||||
uint8_t tcsr2_r();
|
||||
void tcsr2_w(uint8_t data);
|
||||
uint8_t ocr2h_r();
|
||||
void ocr2h_w(uint8_t data);
|
||||
uint8_t ocr2l_r();
|
||||
void ocr2l_w(uint8_t data);
|
||||
|
||||
virtual void m6800_check_irq2() override;
|
||||
virtual void modified_tcsr() override;
|
||||
virtual void set_timer_event() override;
|
||||
virtual void modified_counters() override;
|
||||
virtual void check_timer_event() override;
|
||||
virtual void CLEANUP_COUNTERS() override;
|
||||
|
||||
devcb_read8::array<2> m_in_portx_func;
|
||||
devcb_write8::array<3> m_out_portx_func;
|
||||
|
||||
uint8_t m_portx_ddr[2];
|
||||
uint8_t m_portx_data[3];
|
||||
|
||||
uint8_t m_tcsr2;
|
||||
uint8_t m_pending_tcsr2;
|
||||
PAIR m_output_compare2;
|
||||
};
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user