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https://github.com/holub/mame
synced 2025-05-23 06:08:48 +03:00
Naomi / DC improvements [Samuele Zannoli]
Hello, with this patch finally cvs2gd stops looping forever. However with no 3d emulation nothing is shown on the screen. Then i have implemented the naomi RTC and there are a few verbose messages about transfers not implemented yet.
This commit is contained in:
davidhay
parent
84cf2596c5
commit
b5c6bb78fa
@ -796,7 +796,7 @@ static READ64_HANDLER( naomi_rom_board_r )
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static WRITE64_HANDLER( naomi_rom_board_w )
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{
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if ((offset == 1) && ACCESSING_BITS_32_47)
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if ((offset == 1) && (ACCESSING_BITS_32_47 || ACCESSING_BITS_32_63))
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{
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// DMA_OFFSETH
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dma_offset &= 0xffff;
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@ -821,7 +821,7 @@ static WRITE64_HANDLER( naomi_rom_board_w )
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rom_offset &= 0xffff0000;
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rom_offset |= ((data >> 32) & 0xffff);
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}
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if ((offset == 1) && ACCESSING_BITS_0_15)
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else if ((offset == 1) && ACCESSING_BITS_0_15)
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{
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// ROM_DATA
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// Doa2 writes here (16 bit decryption key ?)
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@ -924,6 +924,7 @@ static ADDRESS_MAP_START( naomi_map, ADDRESS_SPACE_PROGRAM, 64 )
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AM_RANGE(0x10000000, 0x107fffff) AM_WRITE( ta_fifo_poly_w )
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AM_RANGE(0x10800000, 0x10ffffff) AM_WRITE( ta_fifo_yuv_w )
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AM_RANGE(0x11000000, 0x11ffffff) AM_RAM AM_SHARE(2) // another mirror of texture memory
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AM_RANGE(0x13000000, 0x13ffffff) AM_RAM AM_SHARE(2) // another mirror of texture memory
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AM_RANGE(0xa0000000, 0xa01fffff) AM_ROM AM_REGION("main", 0)
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ADDRESS_MAP_END
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@ -43,6 +43,7 @@ extern UINT32 dc_coin_counts[2];
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#define SB_C2DSTAT ((0x005F6800-0x005F6800)/4)
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#define SB_C2DLEN ((0x005F6804-0x005F6800)/4)
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#define SB_C2DST ((0x005F6808-0x005F6800)/4)
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#define SB_SDST ((0x005F6820-0x005F6800)/4)
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#define SB_LMMODE0 ((0x005F6884-0x005F6800)/4)
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#define SB_LMMODE1 ((0x005F6888-0x005F6800)/4)
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#define SB_SBREV ((0x005F689c-0x005F6800)/4)
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@ -88,6 +89,13 @@ extern UINT32 dc_coin_counts[2];
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#define SB_G1CRDYC ((0x005F74B4-0x005F7400)/4)
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#define SB_GDAPRO ((0x005F74B8-0x005F7400)/4)
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#define SB_ADTSEL ((0x005F7810-0x005F7800)/4)
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#define SB_ADTRG SB_ADTSEL
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#define SB_ADEN ((0x005F7814-0x005F7800)/4)
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#define SB_ADST ((0x005F7818-0x005F7800)/4)
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#define SB_PDST ((0x005F7c18-0x005F7c00)/4)
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#define RTC1 ((0x00710000-0x00710000)/4)
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#define RTC2 ((0x00710004-0x00710000)/4)
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#define RTC3 ((0x00710008-0x00710000)/4)
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@ -122,6 +130,7 @@ VIDEO_UPDATE(dc);
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#define FB_R_SIZE ((0x005F805c-0x005F8000)/4)
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#define FB_W_SOF1 ((0x005F8060-0x005F8000)/4)
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#define FB_W_SOF2 ((0x005F8064-0x005F8000)/4)
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#define FPU_PARAM_CFG ((0x005F807C-0x005F8000)/4)
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#define VO_CONTROL ((0x005F80E8-0x005F8000)/4)
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#define PAL_RAM_CTRL ((0x005F8108-0x005F8000)/4)
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#define ISP_BACKGND_T ((0x005F808C-0x005F8000)/4)
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@ -126,6 +126,7 @@ static UINT32 g1bus_regs[0x100/4];
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extern UINT32 dma_offset;
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static UINT8 maple0x86data1[0x80];
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static UINT8 maple0x86data2[0x400];
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static emu_timer *dc_rtc_timer;
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static const UINT32 maple0x82answer[]=
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{
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@ -133,9 +134,10 @@ static const UINT32 maple0x82answer[]=
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0x05200083,0x5245544e,0x53495250,0x43205345,0x544c2c4f,0x20202e44,0x38393931,0x5c525043
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};
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// register decode helper
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// register decode helpers
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INLINE int decode_reg_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift)
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// this accepts only 32-bit accesses
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INLINE int decode_reg32_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift)
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{
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int reg = offset * 2;
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@ -157,6 +159,30 @@ INLINE int decode_reg_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift)
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return reg;
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}
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// this accepts only 32 and 16 bit accesses
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INLINE int decode_reg3216_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift)
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{
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int reg = offset * 2;
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*shift = 0;
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// non 16&32-bit accesses have not yet been seen here, we need to know when they are
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if ((mem_mask != U64(0x0000ffff00000000)) && (mem_mask != U64(0x000000000000ffff)) &&
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(mem_mask != U64(0xffffffff00000000)) && (mem_mask != U64(0x00000000ffffffff)))
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{
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mame_printf_verbose("Wrong mask! (PC=%x)\n", activecpu_get_pc());
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// debugger_break(Machine);
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}
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if (mem_mask & U64(0x0000ffff00000000))
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{
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reg++;
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*shift = 32;
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}
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return reg;
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}
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int compute_interrupt_level(void)
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{
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UINT32 ln,lx,le;
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@ -219,7 +245,7 @@ READ64_HANDLER( dc_sysctrl_r )
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int reg;
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UINT64 shift;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg32_64(offset, mem_mask, &shift);
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#if DEBUG_SYSCTRL
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if ((reg != 0x40) && (reg != 0x41) && (reg != 0x42) && (reg != 0x23) && (reg > 2)) // filter out IRQ status reads
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@ -236,16 +262,18 @@ WRITE64_HANDLER( dc_sysctrl_w )
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int reg;
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UINT64 shift;
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UINT32 old,dat;
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UINT32 address;
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struct sh4_ddt_dma ddtdata;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg32_64(offset, mem_mask, &shift);
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dat = (UINT32)(data >> shift);
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old = dc_sysctrl_regs[reg];
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dc_sysctrl_regs[reg] = dat; // 5f6800+off*4=dat
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switch (reg)
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{
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case SB_C2DST:
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ddtdata.destination=dc_sysctrl_regs[SB_C2DSTAT];
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address=dc_sysctrl_regs[SB_C2DSTAT];
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ddtdata.destination=address;
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ddtdata.length=dc_sysctrl_regs[SB_C2DLEN];
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ddtdata.size=1;
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ddtdata.direction=0;
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@ -253,9 +281,24 @@ WRITE64_HANDLER( dc_sysctrl_w )
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ddtdata.mode=25; //011001
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cpunum_set_info_ptr(0,CPUINFO_PTR_SH4_EXTERNAL_DDT_DMA,&ddtdata);
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#if DEBUG_SYSCTRL
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mame_printf_verbose("SYSCTRL: Ch2 dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]);
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if ((address >= 0x11000000) && (address <= 0x11FFFFFF))
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if (dc_sysctrl_regs[SB_LMMODE0])
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mame_printf_verbose("SYSCTRL: Ch2 direct display lists dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]); // 1
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else
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mame_printf_verbose("SYSCTRL: Ch2 direct textures dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]); // 0
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else if ((address >= 0x13000000) && (address <= 0x13FFFFFF))
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if (dc_sysctrl_regs[SB_LMMODE1])
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mame_printf_verbose("SYSCTRL: Ch2 direct display lists dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]); // 1
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else
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mame_printf_verbose("SYSCTRL: Ch2 direct textures dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]); // 0
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else if ((address >= 0x10800000) && (address <= 0x10ffffff))
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mame_printf_verbose("SYSCTRL: Ch2 YUV dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]);
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else if ((address >= 0x10000000) && (address <= 0x107fffff))
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mame_printf_verbose("SYSCTRL: Ch2 TA Display List dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]);
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else
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mame_printf_verbose("SYSCTRL: Ch2 unknown dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]);
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#endif
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dc_sysctrl_regs[SB_C2DSTAT]=dc_sysctrl_regs[SB_C2DSTAT]+ddtdata.length;
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dc_sysctrl_regs[SB_C2DSTAT]=address+ddtdata.length;
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dc_sysctrl_regs[SB_C2DLEN]=0;
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dc_sysctrl_regs[SB_C2DST]=0;
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dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_CH2;
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@ -272,6 +315,11 @@ WRITE64_HANDLER( dc_sysctrl_w )
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case SB_ISTERR:
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dc_sysctrl_regs[SB_ISTERR] = old & ~dat;
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break;
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case SB_SDST:
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#if DEBUG_SYSCTRL
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mame_printf_verbose("SYSCTRL: Sort-DMA not supported yet !!!\n");
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#endif
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break;
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}
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update_interrupt_status();
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@ -288,7 +336,7 @@ READ64_HANDLER( dc_maple_r )
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int reg;
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UINT64 shift;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg32_64(offset, mem_mask, &shift);
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#if DEBUG_MAPLE_REGS
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mame_printf_verbose("MAPLE: Unmapped read %08x\n", 0x5f6c00+reg*4);
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@ -310,7 +358,7 @@ WRITE64_HANDLER( dc_maple_w )
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int a;
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int off,len;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg32_64(offset, mem_mask, &shift);
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dat = (UINT32)(data >> shift);
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old = maple_regs[reg];
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@ -497,7 +545,7 @@ WRITE64_HANDLER( dc_maple_w )
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// first function
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maple0x86data2[pos+10]=1;
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maple0x86data2[pos+11]=2; // number of players
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maple0x86data2[pos+12]=9; // switches per player (27 = mahjong)
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maple0x86data2[pos+12]=9+4; // switches per player (27 = mahjong)
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maple0x86data2[pos+13]=0;
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// second function
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maple0x86data2[pos+14]=2;
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@ -685,7 +733,7 @@ READ64_HANDLER( dc_g1_ctrl_r )
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int reg;
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UINT64 shift;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg32_64(offset, mem_mask, &shift);
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mame_printf_verbose("G1CTRL: Unmapped read %08x\n", 0x5f7400+reg*4);
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return (UINT64)g1bus_regs[reg] << shift;
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}
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@ -698,7 +746,7 @@ WRITE64_HANDLER( dc_g1_ctrl_w )
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struct sh4_ddt_dma ddtdata;
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UINT8 *ROM = (UINT8 *)memory_region(machine, "user1");
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg32_64(offset, mem_mask, &shift);
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dat = (UINT32)(data >> shift);
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old = g1bus_regs[reg];
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@ -735,7 +783,7 @@ READ64_HANDLER( dc_g2_ctrl_r )
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int reg;
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UINT64 shift;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg32_64(offset, mem_mask, &shift);
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mame_printf_verbose("G2CTRL: Unmapped read %08x\n", 0x5f7800+reg*4);
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return 0;
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}
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@ -746,8 +794,17 @@ WRITE64_HANDLER( dc_g2_ctrl_w )
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UINT64 shift;
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UINT32 dat;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg32_64(offset, mem_mask, &shift);
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dat = (UINT32)(data >> shift);
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switch (reg)
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{
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case SB_ADTSEL:
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mame_printf_verbose("G2CTRL: initiation mode %d\n",dat);
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break;
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case SB_ADST:
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mame_printf_verbose("G2CTRL: AICA:G2-DMA start\n");
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break;
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}
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mame_printf_verbose("G2CTRL: [%08x=%x] write %llx to %x, mask %llx\n", 0x5f7800+reg*4, dat, data, offset, mem_mask);
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}
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@ -756,7 +813,7 @@ READ64_HANDLER( dc_modem_r )
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int reg;
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UINT64 shift;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg32_64(offset, mem_mask, &shift);
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// from ElSemi: this makes Atomiswave do it's "verbose boot" with a Sammy logo and diagnostics instead of just running the cart.
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// our PVR emulation is apparently not good enough for that to work yet though.
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@ -775,7 +832,7 @@ WRITE64_HANDLER( dc_modem_w )
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UINT64 shift;
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UINT32 dat;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg32_64(offset, mem_mask, &shift);
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dat = (UINT32)(data >> shift);
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mame_printf_verbose("MODEM: [%08x=%x] write %llx to %x, mask %llx\n", 0x600000+reg*4, dat, data, offset, mem_mask);
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}
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@ -785,9 +842,9 @@ READ64_HANDLER( dc_rtc_r )
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int reg;
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UINT64 shift;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg3216_64(offset, mem_mask, &shift);
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mame_printf_verbose("RTC: Unmapped read %08x\n", 0x710000+reg*4);
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return 0;
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return (UINT64)dc_rtcregister[reg] << shift;
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}
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WRITE64_HANDLER( dc_rtc_w )
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@ -796,7 +853,7 @@ WRITE64_HANDLER( dc_rtc_w )
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UINT64 shift;
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UINT32 old,dat;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg3216_64(offset, mem_mask, &shift);
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dat = (UINT32)(data >> shift);
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old = dc_rtcregister[reg];
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dc_rtcregister[reg] = dat & 0xFFFF; // 5f6c00+off*4=dat
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@ -811,6 +868,8 @@ WRITE64_HANDLER( dc_rtc_w )
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case RTC2:
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if (dc_rtcregister[RTC3] == 0)
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dc_rtcregister[reg] = old;
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else
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timer_adjust_periodic(dc_rtc_timer, attotime_zero, 0, ATTOTIME_IN_SEC(1));
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break;
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case RTC3:
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dc_rtcregister[RTC3] &= 1;
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@ -819,14 +878,12 @@ WRITE64_HANDLER( dc_rtc_w )
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mame_printf_verbose("RTC: [%08x=%x] write %llx to %x, mask %llx\n", 0x710000 + reg*4, dat, data, offset, mem_mask);
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}
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#ifdef UNUSED_FUNCTION
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static void dc_rtc_increment(void)
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static TIMER_CALLBACK(dc_rtc_increment)
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{
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dc_rtcregister[RTC2] = (dc_rtcregister[RTC2] + 1) & 0xFFFF;
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if (dc_rtcregister[RTC2] == 0)
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dc_rtcregister[RTC1] = (dc_rtcregister[RTC1] + 1) & 0xFFFF;
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}
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#endif
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MACHINE_START( dc )
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{
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@ -844,6 +901,9 @@ MACHINE_RESET( dc )
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memset(dc_rtcregister, 0, sizeof(dc_rtcregister));
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memset(dc_coin_counts, 0, sizeof(dc_coin_counts));
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dc_rtc_timer = timer_alloc(dc_rtc_increment, 0);
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timer_adjust_periodic(dc_rtc_timer, attotime_zero, 0, ATTOTIME_IN_SEC(1));
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dc_sysctrl_regs[SB_SBREV] = 0x0b;
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for (a=0;a < 0x80;a++)
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maple0x86data1[a]=0x11+a;
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@ -860,7 +920,7 @@ READ64_HANDLER( dc_aica_reg_r )
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int reg;
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UINT64 shift;
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reg = decode_reg_64(offset, mem_mask, &shift);
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reg = decode_reg32_64(offset, mem_mask, &shift);
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// mame_printf_verbose("AICA REG: [%08x] read %llx, mask %llx\n", 0x700000+reg*4, (UINT64)offset, mem_mask);
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@ -873,7 +933,7 @@ WRITE64_HANDLER( dc_aica_reg_w )
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UINT64 shift;
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UINT32 dat;
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|
||||
reg = decode_reg_64(offset, mem_mask, &shift);
|
||||
reg = decode_reg32_64(offset, mem_mask, &shift);
|
||||
dat = (UINT32)(data >> shift);
|
||||
|
||||
if (reg == (0x2c00/4))
|
||||
|
||||
@ -6,6 +6,8 @@
|
||||
#include "driver.h"
|
||||
#include "dc.h"
|
||||
#include "cpu/sh4/sh4.h"
|
||||
#include "render.h"
|
||||
#include "rendutil.h"
|
||||
|
||||
#define DEBUG_FIFO_POLY (0)
|
||||
#define DEBUG_PVRCTRL (0)
|
||||
@ -120,6 +122,15 @@ WRITE64_HANDLER( pvr_ctrl_w )
|
||||
reg = decode_reg_64(offset, mem_mask, &shift);
|
||||
dat = (UINT32)(data >> shift);
|
||||
|
||||
switch (reg)
|
||||
{
|
||||
case SB_PDST:
|
||||
#if DEBUG_PVRCTRL
|
||||
mame_printf_verbose("PVRCTRL: PVR-DMA start\n");
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
|
||||
#if DEBUG_PVRCTRL
|
||||
mame_printf_verbose("PVRCTRL: [%08x=%x] write %llx to %x (reg %x), mask %llx\n", 0x5f7c00+reg*4, dat, data>>shift, offset, reg, mem_mask);
|
||||
#endif
|
||||
@ -153,6 +164,7 @@ WRITE64_HANDLER( pvr_ta_w )
|
||||
int reg;
|
||||
UINT64 shift;
|
||||
UINT32 old,dat;
|
||||
//UINT32 sizera,offsetra,v;
|
||||
int a;
|
||||
|
||||
reg = decode_reg_64(offset, mem_mask, &shift);
|
||||
@ -194,6 +206,42 @@ WRITE64_HANDLER( pvr_ta_w )
|
||||
mame_printf_verbose("Start Render Received:\n");
|
||||
mame_printf_verbose(" Region Array at %08x\n",pvrta_regs[REGION_BASE]);
|
||||
mame_printf_verbose(" ISP/TSP Parameters at %08x\n",pvrta_regs[PARAM_BASE]);
|
||||
if (pvrta_regs[FPU_PARAM_CFG] & 0x200000)
|
||||
sizera=6;
|
||||
else
|
||||
sizera=5;
|
||||
offsetra=pvrta_regs[REGION_BASE];
|
||||
for (;;)
|
||||
{
|
||||
v=program_read_dword_64le(0x05000000+offsetra);
|
||||
mame_printf_verbose("Tile X:%d Y:%d\n ", (v >> 2) & 0x3f, (v >> 8) & 0x3f);
|
||||
offsetra = offsetra+4;
|
||||
v=program_read_dword_64le(0x05000000+offsetra);
|
||||
if (!(v & 0x80000000))
|
||||
mame_printf_verbose("OLP %d ",v & 0xFFFFFC);
|
||||
offsetra = offsetra+4;
|
||||
v=program_read_dword_64le(0x05000000+offsetra);
|
||||
if (!(v & 0x80000000))
|
||||
mame_printf_verbose("OMVLP %d ",v & 0xFFFFFC);
|
||||
offsetra = offsetra+4;
|
||||
v=program_read_dword_64le(0x05000000+offsetra);
|
||||
if (!(v & 0x80000000))
|
||||
mame_printf_verbose("TLP %d ",v & 0xFFFFFC);
|
||||
offsetra = offsetra+4;
|
||||
v=program_read_dword_64le(0x05000000+offsetra);
|
||||
if (!(v & 0x80000000))
|
||||
mame_printf_verbose("TMVLP %d ",v & 0xFFFFFC);
|
||||
if (sizera == 6)
|
||||
{
|
||||
offsetra = offsetra+4;
|
||||
v=program_read_dword_64le(0x05000000+offsetra);
|
||||
if (!(v & 0x80000000))
|
||||
mame_printf_verbose("PTLP %d ",v & 0xFFFFFC);
|
||||
}
|
||||
mame_printf_verbose("\n");
|
||||
if (v & 0x80000000)
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
// select buffer to draw using PARAM_BASE
|
||||
for (a=0;a < 4;a++)
|
||||
@ -312,6 +360,7 @@ WRITE64_HANDLER( ta_fifo_poly_w )
|
||||
state_ta.tafifo_pos &= state_ta.tafifo_mask;
|
||||
if (state_ta.tafifo_pos == 0)
|
||||
{
|
||||
// Para Control
|
||||
state_ta.paracontrol=(tafifo_buff[0] >> 24) & 0xff;
|
||||
// 0 end of list
|
||||
// 1 user tile clip
|
||||
@ -327,10 +376,12 @@ WRITE64_HANDLER( ta_fifo_poly_w )
|
||||
if ((state_ta.paratype >= 4) && (state_ta.paratype <= 6))
|
||||
{
|
||||
state_ta.global_paratype = state_ta.paratype;
|
||||
// Group Control
|
||||
state_ta.groupcontrol=(tafifo_buff[0] >> 16) & 0xff;
|
||||
state_ta.groupen=(state_ta.groupcontrol >> 7) & 1;
|
||||
state_ta.striplen=(state_ta.groupcontrol >> 2) & 3;
|
||||
state_ta.userclip=(state_ta.groupcontrol >> 0) & 3;
|
||||
// Obj Control
|
||||
state_ta.objcontrol=(tafifo_buff[0] >> 0) & 0xffff;
|
||||
state_ta.shadow=(state_ta.objcontrol >> 7) & 1;
|
||||
state_ta.volume=(state_ta.objcontrol >> 6) & 1;
|
||||
@ -357,6 +408,7 @@ WRITE64_HANDLER( ta_fifo_poly_w )
|
||||
return;
|
||||
}
|
||||
}
|
||||
// decide number of words when not a vertex
|
||||
state_ta.tafifo_vertexwords=pvr_wordsvertex[state_ta.parameterconfig];
|
||||
if ((state_ta.paratype == 4) && ((state_ta.listtype != 1) && (state_ta.listtype != 3)))
|
||||
if (pvr_wordspolygon[state_ta.parameterconfig] == 16)
|
||||
@ -366,10 +418,7 @@ WRITE64_HANDLER( ta_fifo_poly_w )
|
||||
return;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
state_ta.tafifo_mask = 7;
|
||||
}
|
||||
|
||||
// now we heve all the needed words
|
||||
// here we should generate the data for the various tiles
|
||||
@ -404,14 +453,14 @@ WRITE64_HANDLER( ta_fifo_poly_w )
|
||||
state_ta.listtype_used |= (2+8);
|
||||
}
|
||||
else if (state_ta.paratype == 1)
|
||||
{
|
||||
{ // user tile clip
|
||||
#if DEBUG_PVRDLIST
|
||||
mame_printf_verbose("Para Type 1 User Tile Clip\n");
|
||||
mame_printf_verbose(" (%d , %d)-(%d , %d)\n", tafifo_buff[4], tafifo_buff[5], tafifo_buff[6], tafifo_buff[7]);
|
||||
#endif
|
||||
}
|
||||
else if (state_ta.paratype == 2)
|
||||
{
|
||||
{ // object list set
|
||||
#if DEBUG_PVRDLIST
|
||||
mame_printf_verbose("Para Type 2 Object List Set at %08x\n", tafifo_buff[1]);
|
||||
mame_printf_verbose(" (%d , %d)-(%d , %d)\n", tafifo_buff[4], tafifo_buff[5], tafifo_buff[6], tafifo_buff[7]);
|
||||
@ -424,9 +473,11 @@ WRITE64_HANDLER( ta_fifo_poly_w )
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
{ // global parameter or vertex parameter
|
||||
#if DEBUG_PVRDLIST
|
||||
mame_printf_verbose("Para Type %d End of Strip %d", state_ta.paratype, state_ta.endofstrip);
|
||||
mame_printf_verbose("Para Type %d", state_ta.paratype);
|
||||
if (state_ta.paratype == 7)
|
||||
mame_printf_verbose(" End of Strip %d", state_ta.endofstrip);
|
||||
if (state_ta.listtype_used & 3)
|
||||
mame_printf_verbose(" List Type %d", state_ta.listtype);
|
||||
mame_printf_verbose("\n");
|
||||
@ -635,23 +686,29 @@ static void testdrawline(bitmap_t *bitmap, int index, int from, int to)
|
||||
{
|
||||
UINT32 *bmpaddr;
|
||||
int ix, iy, i, inc, x, y, dx, dy, plotx, ploty;
|
||||
int dxix, dyiy;
|
||||
render_bounds line, clip;
|
||||
|
||||
if ((state_ta.grab[index].showvertices[to].x < 0) || (state_ta.grab[index].showvertices[to].x > 639))
|
||||
clip.x0=0;
|
||||
clip.y0=0;
|
||||
clip.x1=639;
|
||||
clip.y1=479;
|
||||
line.x0=state_ta.grab[index].showvertices[from].x;
|
||||
line.y0=state_ta.grab[index].showvertices[from].y;
|
||||
line.x1=state_ta.grab[index].showvertices[to].x;
|
||||
line.y1=state_ta.grab[index].showvertices[to].y;
|
||||
if (render_clip_line(&line, &clip))
|
||||
return;
|
||||
if ((state_ta.grab[index].showvertices[from].x < 0) || (state_ta.grab[index].showvertices[from].x > 639))
|
||||
return;
|
||||
if ((state_ta.grab[index].showvertices[to].y < 0) || (state_ta.grab[index].showvertices[to].y > 479))
|
||||
return;
|
||||
if ((state_ta.grab[index].showvertices[from].y < 0) || (state_ta.grab[index].showvertices[from].y > 479))
|
||||
return;
|
||||
dx = state_ta.grab[index].showvertices[to].x - state_ta.grab[index].showvertices[from].x;
|
||||
dy = state_ta.grab[index].showvertices[to].y - state_ta.grab[index].showvertices[from].y;
|
||||
plotx = state_ta.grab[index].showvertices[from].x;
|
||||
ploty = state_ta.grab[index].showvertices[from].y;
|
||||
dx=line.x1-line.x0;
|
||||
dy=line.y1-line.y0;
|
||||
plotx=line.x0;
|
||||
ploty=line.y0;
|
||||
ix = abs(dx);
|
||||
iy = abs(dy);
|
||||
inc = max(ix,iy);
|
||||
x = y = 0;
|
||||
dxix = (dx ? dx/ix : 0);
|
||||
dyiy = (dy ? dy/iy : 0);
|
||||
|
||||
for (i=0; i <= inc; ++i)
|
||||
{
|
||||
@ -660,14 +717,14 @@ int ix, iy, i, inc, x, y, dx, dy, plotx, ploty;
|
||||
if (x > inc)
|
||||
{
|
||||
x -= inc;
|
||||
plotx += (dx ? dx/ix : 0);
|
||||
plotx += dxix;
|
||||
bmpaddr = BITMAP_ADDR32(bitmap,ploty,plotx);
|
||||
*bmpaddr = MAKE_RGB(0, 0, 255);
|
||||
}
|
||||
if (y > inc)
|
||||
{
|
||||
y -= inc;
|
||||
ploty += (dy ? dy/iy : 0);
|
||||
ploty += dyiy;
|
||||
bmpaddr = BITMAP_ADDR32(bitmap,ploty,plotx);
|
||||
*bmpaddr = MAKE_RGB(0, 0, 255);
|
||||
}
|
||||
@ -964,7 +1021,10 @@ static void pvr_build_parameterconfig(void)
|
||||
|
||||
static TIMER_CALLBACK(vbout)
|
||||
{
|
||||
dc_sysctrl_regs[SB_ISTNRM] |= IST_VBL_OUT; // V Blank-out interrupt
|
||||
UINT32 a;
|
||||
|
||||
a=dc_sysctrl_regs[SB_ISTNRM] | IST_VBL_OUT;
|
||||
dc_sysctrl_regs[SB_ISTNRM] = a; // V Blank-out interrupt
|
||||
update_interrupt_status();
|
||||
|
||||
timer_adjust_oneshot(vbout_timer, attotime_never, 0);
|
||||
@ -1000,14 +1060,11 @@ VIDEO_UPDATE(dc)
|
||||
{
|
||||
static int useframebuffer=1;
|
||||
|
||||
if (pvrta_regs[VO_CONTROL] & (1 << 3))
|
||||
{
|
||||
fillbitmap(bitmap,pvrta_regs[VO_BORDER_COL] & 0xFFFFFF,cliprect);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if ((useframebuffer) && !state_ta.start_render_received)
|
||||
{
|
||||
if (pvrta_regs[VO_CONTROL] & (1 << 3))
|
||||
fillbitmap(bitmap,pvrta_regs[VO_BORDER_COL] & 0xFFFFFF,cliprect);
|
||||
else
|
||||
testdrawscreenframebuffer(bitmap,cliprect);
|
||||
return 0;
|
||||
}
|
||||
@ -1016,6 +1073,8 @@ static int useframebuffer=1;
|
||||
{
|
||||
useframebuffer=0;
|
||||
testdrawscreen(bitmap,cliprect);
|
||||
if (pvrta_regs[VO_CONTROL] & (1 << 3))
|
||||
fillbitmap(bitmap,pvrta_regs[VO_BORDER_COL] & 0xFFFFFF,cliprect);
|
||||
state_ta.start_render_received=0;
|
||||
state_ta.renderselect= -1;
|
||||
dc_sysctrl_regs[SB_ISTNRM] |= IST_EOR_TSP; // TSP end of render
|
||||
|
||||
Loading…
Reference in New Issue
Block a user